[ELF][PPC64] Support long branch thunks with addends

[MaskRay]

Summary

Fixes PPC64 part of PR40438

// clang -target ppc64le -c a.cc
// .text.unlikely may be placed in a separate output section (via -z keep-text-section-prefix)
// The distance between bar in .text.unlikely and foo in .text may be larger than 32MiB.
static void foo() {}
__attribute__((section(".text.unlikely"))) static int bar() { foo(); return 0; }
__attribute__((used)) static int dummy = bar();

This patch makes such thunks with addends work for PPC64.

AArch64: .text -> __AArch64ADRPThunk_ (adrp x16, ...; add x16, x16, ...; br x16) -> target
PPC64: .text -> __long_branch_ (addis 12, 2, ...; ld 12, ...(12); mtctr 12; bctr) -> target

AArch64 can leverage ADRP to jump to the target directly, but PPC64
needs to load an address from .branch_lt . Before Power ISA v3.0, the
PC-relative ADDPCIS was not available. .branch_lt was invented to work
around the limitation.

Symbol::ppc64BranchltIndex is replaced by
PPC64LongBranchTargetSection::entry_index which take addends into
consideration.

The tests are rewritten: ppc64-long-branch.s (-no-pie) and
ppc64-long-branch-pi.s (-pie and -shared).

[MaskRay]

Improve tests (add backward bl)

[peter.smith]

The change looks reasonable to me but I'll defer to the PPC experts for the PPC specific changes, as I'm not that familiar with it.

[sfertile]

Sorry for the wait, I was on vacation. I'm going over the related pr, D70637 and this patch right now.

[sfertile]

I have a couple minor questions, but it LGTM.

Should there be an error when an addend is used and the call target is a function symbol with a non-zero offset between global and local entries?

lld/ELF/Relocations.cpp

511

On trunk I still see sym.ppc64BranchltIndex = old.ppc64BranchltIndex; here. I take it deleting that is meant to be part of this patch.

lld/ELF/SyntheticSections.cpp

3461–3462

Why sym->getVA() + addend as opposed to sym->getVA(addend)?

lld/test/ELF/ppc64-long-branch-pi.s

87

Odd, I though we would always create a .got section with the tocbase as the first entry. And the ppc64-long-branch.s doesn't seem to need it.

[MaskRay]

.got is not always created. .got will be created when there is at least .TOC. related relocation:

// Relocations.cpp:1308
} else if (oneof<R_GOTONLY_PC, R_GOTREL, R_PPC64_TOCBASE, R_PPC64_RELAX_TOC>(
               expr)) {
  in.got->hasGotOffRel = true;
}

Secondly, it works arounds a small issue that will not be fixed by this patch. If .rela.dyn has no entries before thunk creation.

Writer<ELFT>::run
  Writer<ELFT>::finalizeSections
      forEachRelSec(scanRelocations<ELFT>) // Most dynamic relocations are added in this pass.
    removeUnusedSyntheticSections
      // The synthetic section .rela.dyn is removed from its parent (OutputSection .rela.dyn) because it has no entries.
    Writer<ELFT>::finalizeAddressDependentContent
      ThunkCreator::createThunks
        // Add a dynamic relocation to mainPart->relaDyn

This can affect all targets that add dynamic relocations in ThunkCreator::createThunks. Currently only PPC64 is affected, because only PPC64 needs .branch_lt to work around the lack of PC-relative addressing before Power ISA v3.0.

Fortunately, this pass ordering problem usually does not matter in practice. PPC64PILongBranchThunk is used by config->isPic cases. In PIC cases, there are almost assuredly some dynamic relocations here and there.

I created a wontfix bug at https://github.com/llvm/llvm-project/issues/51 . It is not clear if it can be fixed, or if there is an easy fix. I have closed it because a fix is probably not worthwhile on its own.

lld/ELF/Relocations.cpp

511

I intend to delete this line in a separate change.

replaceWithDefined is used by canonical PLT and copy relocations, which implies that the symbol is preemptable. ppc64BranchltIndex is only used by non-preemptable cases. So the line is not needed.

lld/test/ELF/ppc64-long-branch-pi.s

87

## Force creation of .got
.section .data
.quad .TOC.@tocbase

in ppc64-long-branch-pi.s serves two purposes. I've put more information in the main comment (which is editable).

[MaskRay]

getVA() + addend => getVA(addend)

lld/ELF/Arch/PPC64.cpp

case R_PPC64_DTPREL64:
     write64(loc, val - dynamicThreadPointerOffset);
     break;
   default:
     llvm_unreachable("unknown relocation");
   }
 }
 
 bool PPC64::needsThunk(RelExpr expr, RelType type, const InputFile *file,
-                       uint64_t branchAddr, const Symbol &s, int64_t /*a*/) const {
+                       uint64_t branchAddr, const Symbol &s, int64_t a) const {
   if (type != R_PPC64_REL14 && type != R_PPC64_REL24)
     return false;
 
   // If a function is in the Plt it needs to be called with a call-stub.
   if (s.isInPlt())
     return true;
 
   // If a symbol is a weak undefined and we are compiling an executable
   // it doesn't need a range-extending thunk since it can't be called.
   if (s.isUndefWeak() && !config->shared)
     return false;
 
   // If the offset exceeds the range of the branch type then it will need
   // a range-extending thunk.
   // See the comment in getRelocTargetVA() about R_PPC64_CALL.
   return !inBranchRange(type, branchAddr,
-                        s.getVA() +
+                        s.getVA(a) +
                             getPPC64GlobalEntryToLocalEntryOffset(s.stOther));
 }
 
 uint32_t PPC64::getThunkSectionSpacing() const {
   // See comment in Arch/ARM.cpp for a more detailed explanation of
   // getThunkSectionSpacing(). For PPC64 we pick the constant here based on
   // R_PPC64_REL24, which is used by unconditional branch instructions.
   // 0x2000000 = (1 << 24-1) * 4

lld/ELF/Relocations.cpp

static void replaceWithDefined(Symbol &sym, SectionBase *sec, uint64_t value,
                                uint64_t size) {
   Symbol old = sym;
 
   sym.replace(Defined{sym.file, sym.getName(), sym.binding, sym.stOther,
                       sym.type, value, size, sec});
 
   sym.pltIndex = old.pltIndex;
   sym.gotIndex = old.gotIndex;
   sym.verdefIndex = old.verdefIndex;
   sym.exportDynamic = true;
   sym.isUsedInRegularObj = true;
 }
 
 // Reserve space in .bss or .bss.rel.ro for copy relocation.
 //
 // The copy relocation is pretty much a hack. If you use a copy relocation
 // in your program, not only the symbol name but the symbol's size, RW/RO

 // relocation back to its original non-Thunk target.
 bool ThunkCreator::normalizeExistingThunk(Relocation &rel, uint64_t src) {
   if (Thunk *t = thunks.lookup(rel.sym)) {
     if (target->inBranchRange(rel.type, src,
                               rel.sym->getVA(rel.addend) + getPCBias(rel.type)))
       return true;
     rel.sym = &t->destination;
     // TODO Restore addend on all targets.
-    if (config->emachine == EM_AARCH64)
+    if (config->emachine == EM_AARCH64 || config->emachine == EM_PPC64)
       rel.addend = t->addend;
     if (rel.sym->isInPlt())
       rel.expr = toPlt(rel.expr);
   }
   return false;
 }
 
 // Process all relocations from the InputSections that have been assigned
forEachInputSectionDescription(
               ts->addThunk(t);
               thunks[t->getThunkTargetSym()] = t;
             }
 
             // Redirect relocation to Thunk, we never go via the PLT to a Thunk
             rel.sym = t->getThunkTargetSym();
             rel.expr = fromPlt(rel.expr);
 
-            // On AArch64, a jump/call relocation may be encoded as STT_SECTION
-            // + non-zero addend, clear the addend after redirection.
+            // On AArch64 and PPC64, a jump/call relocation may be encoded as
+            // STT_SECTION + non-zero addend, clear the addend after
+            // redirection.
             //
             // The addend of R_PPC_PLTREL24 should be ignored after changing to
             // R_PC.
             if (config->emachine == EM_AARCH64 ||
+                config->emachine == EM_PPC64 ||
                 (config->emachine == EM_PPC && rel.type == R_PPC_PLTREL24))
               rel.addend = 0;
           }
 
         for (auto &p : isd->thunkSections)
           addressesChanged |= p.first->assignOffsets();
       });
 

lld/ELF/Symbols.h

public:
   uint32_t globalDynIndex = -1;
 
   // This field is a index to the symbol's version definition.
   uint32_t verdefIndex = -1;
 
   // Version definition index.
   uint16_t versionId;
 
-  // An index into the .branch_lt section on PPC64.
-  uint16_t ppc64BranchltIndex = -1;
-
   // Symbol binding. This is not overwritten by replace() to track
   // changes during resolution. In particular:
   //  - An undefined weak is still weak when it resolves to a shared library.
   //  - An undefined weak will not fetch archive members, but we have to
   //    remember it is weak.
   uint8_t binding;
 
   // The following fields have the same meaning as the ELF symbol attributes.
void setName(StringRef s) {
     nameData = s.data();
     nameSize = s.size();
   }
 
   void parseSymbolVersion();
 
   bool isInGot() const { return gotIndex != -1U; }
   bool isInPlt() const { return pltIndex != -1U; }
-  bool isInPPC64Branchlt() const { return ppc64BranchltIndex != 0xffff; }
 
   uint64_t getVA(int64_t addend = 0) const;
 
   uint64_t getGotOffset() const;
   uint64_t getGotVA() const;
   uint64_t getGotPltOffset() const;
   uint64_t getGotPltVA() const;
   uint64_t getPltVA() const;
-  uint64_t getPPC64LongBranchTableVA() const;
-  uint64_t getPPC64LongBranchOffset() const;
   uint64_t getSize() const;
   OutputSection *getOutputSection() const;
 
   // The following two functions are used for symbol resolution.
   //
   // You are expected to call mergeProperties for all symbols in input
   // files so that attributes that are attached to names rather than
   // indivisual symbol (such as visibility) are merged together.

lld/ELF/Symbols.cpp

 }
 
 uint64_t Symbol::getGotPltOffset() const {
   if (isInIplt)
     return pltIndex * config->wordsize;
   return (pltIndex + target->gotPltHeaderEntriesNum) * config->wordsize;
 }
 
-uint64_t Symbol::getPPC64LongBranchOffset() const {
-  assert(ppc64BranchltIndex != 0xffff);
-  return ppc64BranchltIndex * config->wordsize;
-}
-
 uint64_t Symbol::getPltVA() const {
   PltSection *plt = isInIplt ? in.iplt : in.plt;
   uint64_t outVA =
       plt->getVA() + plt->headerSize + pltIndex * target->pltEntrySize;
   // While linking microMIPS code PLT code are always microMIPS
   // code. Set the less-significant bit to track that fact.
   // See detailed comment in the `getSymVA` function.
   if (config->emachine == EM_MIPS && isMicroMips())
     outVA |= 1;
   return outVA;
 }
 
-uint64_t Symbol::getPPC64LongBranchTableVA() const {
-  assert(ppc64BranchltIndex != 0xffff);
-  return in.ppc64LongBranchTarget->getVA() +
-         ppc64BranchltIndex * config->wordsize;
-}
-
 uint64_t Symbol::getSize() const {
   if (const auto *dr = dyn_cast<Defined>(this))
     return dr->size;
   return cast<SharedSymbol>(this)->size;
 }
 
 OutputSection *Symbol::getOutputSection() const {
   if (auto *s = dyn_cast<Defined>(this)) {

lld/ELF/SyntheticSections.h

 // This section is used to store the addresses of functions that are called
 // in range-extending thunks on PowerPC64. When producing position dependent
 // code the addresses are link-time constants and the table is written out to
 // the binary. When producing position-dependent code the table is allocated and
 // filled in by the dynamic linker.
 class PPC64LongBranchTargetSection final : public SyntheticSection {
 public:
   PPC64LongBranchTargetSection();
-  void addEntry(Symbol &sym);
+  uint64_t getEntryVA(const Symbol *sym, int64_t addend);
+  llvm::Optional<uint32_t> addEntry(const Symbol *sym, int64_t addend);
   size_t getSize() const override;
   void writeTo(uint8_t *buf) override;
   bool isNeeded() const override;
   void finalizeContents() override { finalized = true; }
 
 private:
-  std::vector<const Symbol *> entries;
+  std::vector<std::pair<const Symbol *, int64_t>> entries;
+  llvm::DenseMap<std::pair<const Symbol *, int64_t>, uint32_t> entry_index;
   bool finalized = false;
 };
 
 template <typename ELFT>
 class PartitionElfHeaderSection : public SyntheticSection {
 public:
   PartitionElfHeaderSection();
   size_t getSize() const override;

lld/ELF/SyntheticSections.cpp

 // directly in the binary so the section has type SHT_PROGBITS. If linking
 // position-independent code the section has type SHT_NOBITS since it will be
 // allocated and filled in by the dynamic linker.
 PPC64LongBranchTargetSection::PPC64LongBranchTargetSection()
     : SyntheticSection(SHF_ALLOC | SHF_WRITE,
                        config->isPic ? SHT_NOBITS : SHT_PROGBITS, 8,
                        ".branch_lt") {}
 
-void PPC64LongBranchTargetSection::addEntry(Symbol &sym) {
-  assert(sym.ppc64BranchltIndex == 0xffff);
-  sym.ppc64BranchltIndex = entries.size();
-  entries.push_back(&sym);
+uint64_t PPC64LongBranchTargetSection::getEntryVA(const Symbol *sym,
+                                                  int64_t addend) {
+  return getVA() + entry_index.find({sym, addend})->second * 8;
+}
+
+Optional<uint32_t> PPC64LongBranchTargetSection::addEntry(const Symbol *sym,
+                                                          int64_t addend) {
+  auto res =
+      entry_index.try_emplace(std::make_pair(sym, addend), entries.size());
+  if (!res.second)
+    return None;
+  entries.emplace_back(sym, addend);
+  return res.first->second;
 }
 
 size_t PPC64LongBranchTargetSection::getSize() const {
   return entries.size() * 8;
 }
 
 void PPC64LongBranchTargetSection::writeTo(uint8_t *buf) {
   // If linking non-pic we have the final addresses of the targets and they get
   // written to the table directly. For pic the dynamic linker will allocate
   // the section and fill it it.
   if (config->isPic)
     return;
 
-  for (const Symbol *sym : entries) {
+  for (auto entry : entries) {
+    const Symbol *sym = entry.first;
+    int64_t addend = entry.second;
     assert(sym->getVA());
     // Need calls to branch to the local entry-point since a long-branch
     // must be a local-call.
-    write64(buf,
-            sym->getVA() + getPPC64GlobalEntryToLocalEntryOffset(sym->stOther));
+    write64(buf, sym->getVA(addend) +
+                     getPPC64GlobalEntryToLocalEntryOffset(sym->stOther));
     buf += 8;
   }
 }
 
 bool PPC64LongBranchTargetSection::isNeeded() const {
   // `removeUnusedSyntheticSections()` is called before thunk allocation which
   // is too early to determine if this section will be empty or not. We need
   // Finalized to keep the section alive until after thunk creation. Finalized

lld/ELF/Thunks.cpp

 // used.
 class PPC64LongBranchThunk : public Thunk {
 public:
   uint32_t size() override { return 16; }
   void writeTo(uint8_t *buf) override;
   void addSymbols(ThunkSection &isec) override;
 
 protected:
-  PPC64LongBranchThunk(Symbol &dest) : Thunk(dest, 0) {}
+  PPC64LongBranchThunk(Symbol &dest, int64_t addend) : Thunk(dest, addend) {}
 };
 
 class PPC64PILongBranchThunk final : public PPC64LongBranchThunk {
 public:
-  PPC64PILongBranchThunk(Symbol &dest) : PPC64LongBranchThunk(dest) {
+  PPC64PILongBranchThunk(Symbol &dest, int64_t addend)
+      : PPC64LongBranchThunk(dest, addend) {
     assert(!dest.isPreemptible);
-    if (dest.isInPPC64Branchlt())
-      return;
-
-    in.ppc64LongBranchTarget->addEntry(dest);
+    if (Optional<uint32_t> index =
+            in.ppc64LongBranchTarget->addEntry(&dest, addend)) {
       mainPart->relaDyn->addReloc(
-        {target->relativeRel, in.ppc64LongBranchTarget,
-         dest.getPPC64LongBranchOffset(), true, &dest,
-         getPPC64GlobalEntryToLocalEntryOffset(dest.stOther)});
+          {target->relativeRel, in.ppc64LongBranchTarget, *index * UINT64_C(8),
+           true, &dest,
+           addend + getPPC64GlobalEntryToLocalEntryOffset(dest.stOther)});
+    }
   }
 };
 
 class PPC64PDLongBranchThunk final : public PPC64LongBranchThunk {
 public:
-  PPC64PDLongBranchThunk(Symbol &dest) : PPC64LongBranchThunk(dest) {
-    if (!dest.isInPPC64Branchlt())
-      in.ppc64LongBranchTarget->addEntry(dest);
+  PPC64PDLongBranchThunk(Symbol &dest, int64_t addend)
+      : PPC64LongBranchThunk(dest, addend) {
+    in.ppc64LongBranchTarget->addEntry(&dest, addend);
   }
 };
 
 } // end anonymous namespace
 
 Defined *Thunk::addSymbol(StringRef name, uint8_t type, uint64_t value,
                           InputSectionBase &section) {
   Defined *d = addSyntheticLocal(name, type, value, /*size=*/0, section);

 
 void PPC64PltCallStub::addSymbols(ThunkSection &isec) {
   Defined *s = addSymbol(saver.save("__plt_" + destination.getName()), STT_FUNC,
                          0, isec);
   s->needsTocRestore = true;
 }
 
 void PPC64LongBranchThunk::writeTo(uint8_t *buf) {
-  int64_t offset = destination.getPPC64LongBranchTableVA() - getPPC64TocBase();
+  int64_t offset = in.ppc64LongBranchTarget->getEntryVA(&destination, addend) -
+                   getPPC64TocBase();
   writePPCLoadAndBranch(buf, offset);
 }
 
 void PPC64LongBranchThunk::addSymbols(ThunkSection &isec) {
   addSymbol(saver.save("__long_branch_" + destination.getName()), STT_FUNC, 0,
             isec);
 }
 

 
 static Thunk *addThunkPPC32(const InputSection &isec, const Relocation &rel,
                             Symbol &s) {
   assert((rel.type == R_PPC_REL24 || rel.type == R_PPC_PLTREL24) &&
          "unexpected relocation type for thunk");
   return make<PPC32PltCallStub>(isec, rel, s);
 }
 
-static Thunk *addThunkPPC64(RelType type, Symbol &s) {
+static Thunk *addThunkPPC64(RelType type, Symbol &s, int64_t a) {
   assert(type == R_PPC64_REL24 && "unexpected relocation type for thunk");
   if (s.isInPlt())
     return make<PPC64PltCallStub>(s);
 
   if (config->picThunk)
-    return make<PPC64PILongBranchThunk>(s);
+    return make<PPC64PILongBranchThunk>(s, a);
 
-  return make<PPC64PDLongBranchThunk>(s);
+  return make<PPC64PDLongBranchThunk>(s, a);
 }
 
 Thunk *addThunk(const InputSection &isec, Relocation &rel) {
   Symbol &s = *rel.sym;
   int64_t a = rel.addend;
 
   if (config->emachine == EM_AARCH64)
     return addThunkAArch64(rel.type, s, a);
 
   if (config->emachine == EM_ARM)
     return addThunkArm(rel.type, s);
 
   if (config->emachine == EM_MIPS)
     return addThunkMips(rel.type, s);
 
   if (config->emachine == EM_PPC)
     return addThunkPPC32(isec, rel, s);
 
   if (config->emachine == EM_PPC64)
-    return addThunkPPC64(rel.type, s);
+    return addThunkPPC64(rel.type, s, a);
 
   llvm_unreachable("add Thunk only supported for ARM, Mips and PowerPC");
 }
 
 } // end namespace elf
 } // end namespace lld

lld/test/ELF/ppc64-long-branch-pi.s

+# REQUIRES: ppc
+# RUN: llvm-mc -filetype=obj -triple=ppc64le %s -o %t.o
+# RUN: echo 'SECTIONS { \
+# RUN:       .text_low 0x2000: { *(.text_low) } \
+# RUN:       .text_high 0x2002000 : { *(.text_high) } \
+# RUN:       }' > %t.script
+# RUN: ld.lld -pie -T %t.script %t.o -o %t
+# RUN: llvm-readelf -S %t | FileCheck --check-prefix=SEC-PIE %s
+# RUN: llvm-readobj -r %t | FileCheck --check-prefix=RELOC %s
+# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
+
+# RUN: ld.lld -shared -T %t.script %t.o -o %t.so
+# RUN: llvm-readelf -S %t.so | FileCheck --check-prefix=SEC-SHARED %s
+# RUN: llvm-objdump -d --no-show-raw-insn %t.so | FileCheck %s
+
+# SEC-PIE:    Name       Type     Address          Off     Size   ES Flg Lk Inf Al
+# SEC-PIE:    .got       PROGBITS 00000000020020e0 20120e0 000008 00  WA  0   0  8
+# SEC-PIE:    .branch_lt NOBITS   00000000020020f0 20120f0 000020 00  WA  0   0  8
+
+# SEC-SHARED: Name       Type     Address          Off     Size   ES Flg Lk Inf Al
+# SEC-SHARED: .got       PROGBITS 00000000020020d0 20120d0 000008 00  WA  0   0  8
+# SEC-SHARED: .branch_lt NOBITS   00000000020020e0 20120e0 000020 00  WA  0   0  8
+
+# RELOC:      .rela.dyn {
+# RELOC-NEXT:   0x20020E8 R_PPC64_RELATIVE - 0x8000
+# RELOC-NEXT:   0x20020F0 R_PPC64_RELATIVE - 0x2002000
+# RELOC-NEXT:   0x20020F8 R_PPC64_RELATIVE - 0x2002008
+# RELOC-NEXT:   0x2002100 R_PPC64_RELATIVE - 0x200200C
+# RELOC-NEXT:   0x2002108 R_PPC64_RELATIVE - 0x2000
+# RELOC-NEXT: }
+
+# CHECK:      _start:
+# CHECK-NEXT:     2000:       bl .+16
+# CHECK-NEXT:                 bl .+33554428
+# CHECK-NEXT:                 bl .+24
+# CHECK-NEXT:                 bl .+36
+
+## &.branch_lt[0] - .TOC. = .branch_lt - (.got+0x8000) = -32752
+# CHECK:      __long_branch_:
+# CHECK-NEXT:     2010:       addis 12, 2, 0
+# CHECK-NEXT:                 ld 12, -32752(12)
+# CHECK-NEXT:                 mtctr 12
+# CHECK-NEXT:                 bctr
+
+## &.branch_lt[1] - .TOC. = .branch_lt - (.got+0x8000) = -32744
+# CHECK:      __long_branch_:
+# CHECK-NEXT:     2020:       addis 12, 2, 0
+# CHECK-NEXT:                 ld 12, -32744(12)
+# CHECK-NEXT:                 mtctr 12
+# CHECK-NEXT:                 bctr
+
+## &.branch_lt[2] - .TOC. = .branch_lt - (.got+0x8000) = -32736
+# CHECK:      __long_branch_:
+# CHECK-NEXT:     2030:       addis 12, 2, 0
+# CHECK-NEXT:                 ld 12, -32736(12)
+# CHECK-NEXT:                 mtctr 12
+# CHECK-NEXT:                 bctr
+
+.section .text_low, "ax", %progbits
+.globl _start
+_start:
+bl .text_high     # Need a thunk
+bl .text_high
+bl .text_high+8   # Need a thunk
+bl .text_high+0xc # Need a thunk
+
+# CHECK:      high_target:
+# CHECK-NEXT:  2002000:   bl .-33554428
+# CHECK-NEXT:             bl .-33554432
+# CHECK-NEXT:             bl .+8
+
+## &.branch_lt[3] - .TOC. = .branch_lt - (.got+0x8000) = -32728
+# CHECK:      __long_branch_:
+# CHECK-NEXT:  2002010:       addis 12, 2, 0
+# CHECK-NEXT:                 ld 12, -32728(12)
+# CHECK-NEXT:                 mtctr 12
+# CHECK-NEXT:                 bctr
+
+.section .text_high, "ax", %progbits
+high_target:
+bl .text_low+4
+bl .text_low+4
+bl .text_low      # Need a thunk
+blr
+
+## Force creation of .got
+.section .data
+.quad .TOC.@tocbase

lld/test/ELF/ppc64-long-branch.s

 # REQUIRES: ppc
-
-# RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t.o
-# RUN: ld.lld --no-toc-optimize -z separate-code %t.o -o %t
-# RUN: llvm-nm %t | FileCheck --check-prefix=NM %s
-# RUN: llvm-readelf -x .branch_lt %t | FileCheck %s -check-prefix=BRANCH-LE
+# RUN: echo 'SECTIONS { \
+# RUN:       .text_low 0x2000: { *(.text_low) } \
+# RUN:       .text_high 0x2002000 : { *(.text_high) } \
+# RUN:       }' > %t.script
+
+# RUN: llvm-mc -filetype=obj -triple=ppc64le %s -o %t.o
+# RUN: ld.lld -T %t.script %t.o -o %t
+# RUN: llvm-readelf -S -r %t | FileCheck --check-prefix=SEC %s
+# RUN: llvm-readelf -x .branch_lt %t | FileCheck --check-prefix=BRANCH-LE %s
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
 
-# RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t.o
-# RUN: ld.lld --no-toc-optimize -z separate-code %t.o -o %t
-# RUN: llvm-nm %t | FileCheck --check-prefix=NM %s
-# RUN: llvm-readelf -x .branch_lt %t | FileCheck %s -check-prefix=BRANCH-BE
+# RUN: llvm-mc -filetype=obj -triple=ppc64 %s -o %t.o
+# RUN: ld.lld -T %t.script %t.o -o %t
+# RUN: llvm-readelf -S -r %t | FileCheck --check-prefix=SEC %s
+# RUN: llvm-readelf -x .branch_lt %t | FileCheck --check-prefix=BRANCH-BE %s
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
 
-        .text
-        .abiversion 2
-        .protected callee
-        .globl callee
-        .p2align 4
-        .type callee,@function
-callee:
-.Lfunc_gep0:
-    addis 2, 12, .TOC.-.Lfunc_gep0@ha
-    addi 2, 2, .TOC.-.Lfunc_gep0@l
-.Lfunc_lep0:
-    .localentry callee, .Lfunc_lep0-.Lfunc_gep0
-    addis 4, 2, .LC0@toc@ha
-    ld    4, .LC0@toc@l(4)
-    lwz   3, 0(4)
-    blr
+# SEC: Name       Type     Address          Off     Size   ES Flg Lk Inf Al
+# SEC: .got       PROGBITS 0000000002002028 2002028 000008 00  WA  0   0  8
+# SEC: .branch_lt PROGBITS 0000000002002030 2002030 000018 00  WA  0   0  8
+
+# SEC: There are no relocations in this file.
+
+## high@localentry (high+8), .text_high+16 and .text_low+8
+# BRANCH-LE:      0x02002030 08200002 00000000 10200002 00000000
+# BRANCH-LE-NEXT: 0x02002040 08200000 00000000
+# BRANCH-BE:      0x02002030 00000000 02002008 00000000 02002010
+# BRANCH-BE-NEXT: 0x02002040 00000000 00002008
+
+# CHECK:      _start:
+# CHECK-NEXT:     2000:       bl .+24
+# CHECK-NEXT:                 bl .+20
+# CHECK-NEXT:                 bl .+16
+# CHECK-NEXT:                 bl .+33554428
+
+## &.branch_lt[0] - .TOC. = .branch_lt - (.got+0x8000) = -32760
+# CHECK:      __long_branch_high:
+# CHECK-NEXT:     2018:       addis 12, 2, 0
+# CHECK-NEXT:                 ld 12, -32760(12)
+# CHECK-NEXT:                 mtctr 12
+# CHECK-NEXT:                 bctr
 
-        .space 0x2000000
+## &.branch_lt[1] - .TOC. = .branch_lt - (.got+0x8000) = -32752
+# CHECK:      __long_branch_:
+# CHECK-NEXT:     2028:       addis 12, 2, 0
+# CHECK-NEXT:                 ld 12, -32752(12)
+# CHECK-NEXT:                 mtctr 12
+# CHECK-NEXT:                 bctr
 
-        .protected _start
-        .global _start
-        .p2align 4
-        .type _start,@function
+.section .text_low, "ax", %progbits
+.globl _start
 _start:
-.Lfunc_begin1:
-.Lfunc_gep1:
-    addis 2, 12, .TOC.-.Lfunc_gep1@ha
-    addi 2, 2, .TOC.-.Lfunc_gep1@l
-.Lfunc_lep1:
-    .localentry  _start, .Lfunc_lep1-.Lfunc_gep1
-    mflr 0
-    std  0, 16(1)
-    stdu 1, -32(1)
-    bl callee
-    bl callee
-    addi 1, 1, 32
-    ld   0, 16(1)
-    mtlr 0
-
-        .section        .toc,"aw",@progbits
-.LC0:
-       .tc a[TC],a
-
-
-        .data
-        .type a,@object
-        .globl a
-        .p2align 2
-a:
-        .long 11
-        .size a, 4
-
-# NM: 0000000012028000 d .TOC.
-
-# Without --toc-optimize, compute the address of .toc[0] first. .toc[0] stores
-# the address of a.
-# .TOC. - callee = 0x12030000 - 0x10010000 = (514<<16) - 32768
-# CHECK: callee:
-# CHECK:   10010000:       addis 2, 12, 514
-# CHECK:   10010004:       addi 2, 2, -32768
-# CHECK:   10010008:       addis 4, 2, 0
-
-# __long_branch_callee - . = 0x12010050 - 0x12010034 = 20
-# __long_branch_callee is not a PLT call stub. Calling it does not need TOC
-# restore, so it doesn't have to be followed by a nop.
-# CHECK: _start:
-# CHECK:   12010034:       bl .+20
-# CHECK:   12010038:       bl .+16
+bl high          # Need a thunk
+bl high          # Need a thunk
+bl high          # Need a thunk
+bl high
+bl .text_high+16 # Need a thunk
+blr
 
-# BRANCH-LE:     section '.branch_lt':
-# BRANCH-LE-NEXT: 0x12030018 08000110 00000000
-# BRANCH-BE:     section '.branch_lt':
-# BRANCH-BE-NEXT: 0x12030018 00000000 10010008
-
-# .branch_lt - .TOC. = 0x12030018 - 0x12028000 = (1<<16) - 32744
-# CHECK:     __long_branch_callee:
-# CHECK-NEXT: 12010048:       addis 12, 2, 1
+# CHECK:      Disassembly of section .text_high:
+# CHECK-EMPTY:
+# CHECK-NEXT: high:
+# CHECK-NEXT:  2002000:       addis 2, 12, 1
+# CHECK-NEXT:                 addi 2, 2, -32728
+# CHECK-NEXT:                 bl .-33554432
+# CHECK-NEXT:                 bl .+12
+# CHECK:      __long_branch_:
+# CHECK-NEXT:  2002018:       addis 12, 2, 0
 # CHECK-NEXT:                 ld 12, -32744(12)
 # CHECK-NEXT:                 mtctr 12
 # CHECK-NEXT:                 bctr
+
+.section .text_high, "ax", %progbits
+.globl high
+high:
+addis 2, 12, .TOC.-high@ha
+addi 2, 2, .TOC.-high@l
+.localentry high, 8
+bl .text_low+8
+bl .text_low+8 # Need a thunk
+blr

lld/test/ELF/ppc64-shared-long_branch.s

-# REQUIRES: ppc
-
-# RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t.o
-# RUN: ld.lld --no-toc-optimize -shared -z separate-code %t.o -o %t
-# RUN: llvm-objdump -d -start-address=0x10000 -stop-address=0x10018  %t | FileCheck %s -check-prefix=CALLEE_DUMP
-# RUN: llvm-objdump -d -start-address=0x2010020 -stop-address=0x2010070  %t | FileCheck %s -check-prefix=CALLER_DUMP
-# RUN: llvm-readelf --sections %t | FileCheck %s -check-prefix=SECTIONS
-# RUN: llvm-readelf --relocations %t | FileCheck %s -check-prefix=DYNRELOC
-
-
-# _start calls protected function callee. Since callee is protected no plt stub
-# is needed. The binary however has been padded out with space so that the call
-# distance is further then a bl instrution can reach.
-
-        .text
-        .abiversion 2
-        .protected callee
-        .global callee
-        .p2align 4
-        .type callee,@function
-callee:
-.Lfunc_gep0:
-    addis 2, 12, .TOC.-.Lfunc_gep0@ha
-    addi 2, 2, .TOC.-.Lfunc_gep0@l
-.Lfunc_lep0:
-    .localentry callee, .Lfunc_lep0-.Lfunc_gep0
-    addis 4, 2, .LC0@toc@ha
-    ld    4, .LC0@toc@l(4)
-    lwz   3, 0(4)
-    blr
-
-        .space 0x2000000
-
-        .protected _start
-        .globl _start
-        .p2align 4
-        .type _start,@function
-_start:
-.Lfunc_begin1:
-.Lfunc_gep1:
-    addis 2, 12, .TOC.-.Lfunc_gep1@ha
-    addi 2, 2, .TOC.-.Lfunc_gep1@l
-.Lfunc_lep1:
-    .localentry _start, .Lfunc_lep1-.Lfunc_gep1
-    mflr 0
-    std  0, 16(1)
-    stdu 1, -32(1)
-    bl callee
-    bl ext_callee
-    nop
-    addi 1, 1, 32
-    ld   0, 16(1)
-    mtlr 0
-
-    addis 4, 2, .LC1@toc@ha
-    ld    4, .LC1@toc@l(4)
-    lwz   4, 0(4)
-    add   3, 3, 4
-    blr
-
-
-        .section        .toc,"aw",@progbits
-.LC0:
-       .tc a[TC],a
-.LC1:
-       .tc b[TC],b
-
-
-        .data
-        .type a,@object
-        .globl a
-        .p2align 2
-a:
-        .long 11
-        .size a, 4
-
-        .type b,@object
-        .globl b
-        .p2align 2
-b:
-        .long 33
-        .size b, 4
-
-# Verify address of the callee
-# CALLEE_DUMP: callee:
-# CALLEE_DUMP:   10000:  {{.*}}  addis 2, 12, 514
-# CALLEE_DUMP:   10004:  {{.*}}  addi 2, 2, -32528
-# CALLEE_DUMP:   10008:  {{.*}}  addis 4, 2, 0
-
-# Verify the address of _start, and the call to the long-branch thunk.
-# CALLER_DUMP: _start:
-# CALLER_DUMP:   2010020:  {{.*}}  addis 2, 12, 2
-# CALLER_DUMP:   2010038:  {{.*}}  bl .+56
-
-## .branch_lt[0] - .TOC. = 
-# CALLER_DUMP: __long_branch_callee:
-# CALLER_DUMP:   2010060:  {{.*}}  addis 12, 2, 1
-# CALLER_DUMP:   2010064:  {{.*}}  ld 12, -32712(12)
-# CALLER_DUMP:   2010068:  {{.*}}  mtctr 12
-# CALLER_DUMP:   201006c:  {{.*}}  bctr
-
-# .got section is at address 0x20300f0 so TOC pointer points to 0x20400F0.
-# .plt section has a 2 entry header and a single entry for the long branch.
-#            [Nr] Name        Type            Address          Off     Size
-# SECTIONS:  [10] .got        PROGBITS        00000000020200f0 20200f0 000008
-# SECTIONS:  [13] .plt        NOBITS          0000000002030110 2020110 000018
-# SECTIONS:  [14] .branch_lt  NOBITS          0000000002030128 2020110 000008
-
-# There is a relative dynamic relocation for (.plt + 16 bytes), with a base
-# address equal to callees local entry point (0x10000 + 8).
-# DYNRELOC: Relocation section '.rela.dyn' at offset 0x{{[0-9a-f]+}} contains 3 entries:
-# DYNRELOC:    Offset             Info             Type               Symbol's Value
-# DYNRELOC:    0000000002030128   0000000000000016 R_PPC64_RELATIVE   10008