- User Since
- May 15 2019, 8:43 PM (36 w, 1 d)
Mon, Jan 6
Thu, Jan 2
Can you add more info about compilation errors and compiler version?
Mon, Dec 30
LGTM. Given some verbosity can really help us to understand code quickly.
Sun, Dec 29
LGTM with one nit.
Thu, Dec 26
Dec 23 2019
I would suggest to retitle it to be more descriptive about code behavior, like 'Add check' blah blah. Describe what bugs it can fix in summary field.
Dec 22 2019
Dec 18 2019
Dec 17 2019
Dec 16 2019
Add indentation in RUN lines.
Dec 12 2019
Hi @Jim we currently prefer to set this flag at a fine grained granularity, it's the purpose of sending a series of patches to perform such cleanups.
Dec 11 2019
Can you provide tests to demonstrate how ISD::SIGN_EXTEND_INREG works on PowerPC?
Dec 10 2019
Dec 9 2019
Dec 6 2019
@vddvss Landed with https://reviews.llvm.org/rG884351547da27e76e14bef5fe20c3e3cb0e89acd, thanks for fixing it.
Dec 5 2019
Hi @vddvss do you need help landing this patch?
Dec 4 2019
clang-10: /home/buildslave/buildslave/clang-cmake-armv7-selfhost-neon/llvm/llvm/lib/CodeGen/MachineOperand.cpp:118: bool llvm::MachineOperand::isRenamable() const: Assertion `Register::isPhysicalRegister(getReg()) && "isRenamable should only be checked on physical registers"' failed.
It misses check if the register is zero before invoking isRenamable.
It breaks http://lab.llvm.org:8011/builders/clang-cmake-armv7-selfhost/builds/2747, reverted. I'll investigate it.
As a newbie of PowerPC backend, I think what @jsji proposed will ease my mind burden when faced with o ended instructions. I have read ISA-3.0 and know
A period (.) as the last character of an instruction mnemonic means that the instruction *records* sta- tus information in certain fields of the Condition Register as a side effect of execution.
I can directly react to the effect of record-form instruction if it ends with _record. If _record is too long, how about _rec, just like X86's _alt ended instructions?
Dec 3 2019
Dec 2 2019
Rebased and add comment for invalidateRegister.
LGTM. Thanks for fixing it. Personally, I would recommend Alive to verify peephole optimizations.
Nov 29 2019
Rebased and fixed broken tests. Ready to be reviewed.
Nov 28 2019
Rebased and get broken tests, I'll investigate it and change this patch.
Nov 24 2019
What it broke seems to be tests on Power8.
Nov 20 2019
Nov 19 2019
LGTM considering patterns added for SIGN_EXTENDED_INREG also follow its atomic semantics.
I plan to move the two changed swap-le tests into another NFC patch, since they're not related to the logic.
I think all test cases change should be reflected so that reviewers can have a look if they are regressions.
Nov 18 2019
Add test case involving RegMask.
My concern is store and store volatile are so different in semantics that it might break original test intention.
Since d27a16eb392f39f9ee04ff5194b1eff3e189e6f8 reverts previous changes, LLVMDIBuilderCreateTypedef's signature becomes what it was. I'll revert this commit.
Nov 17 2019
Nov 16 2019
Nov 15 2019
Introduce CopyTracker::invalidateRegister, original markRegUnavailable and clobberRegister are not appropriate for backward copy propagation.
Nov 10 2019
Oct 31 2019
Oct 30 2019
LGTM. I'll wait for @nemanjai if he has additional comments.
Oct 29 2019
Hi @hiraditya , thanks for your work. I want to test your patch on PowerPC, however current patch seems unable to be applied to current master branch.
Oct 28 2019
Oct 27 2019
Oct 24 2019
Oct 21 2019
Oct 8 2019
Sep 29 2019
Sep 26 2019
Hi @jgorbe , indeed we still get some enhance opportunity for this patch, such as considering register pressure. I'm wondering if the regression was caused by spilling.
Sep 24 2019
Sep 22 2019
I think the test can be simplified more, kinda like
# RUN: llc -O3 -mtriple=powerpc64le-unknown-linux-gnu -stop-after=ppc-pre-emit-peephole -verify-machineinstrs %s -o - | FileCheck %s --- name: foo alignment: 4 tracksRegLiveness: true body: | bb.0.entry: liveins: $r3 renamable $r4 = LI 0 renamable $r5 = SRW renamable $r3, renamable killed $r4 $r3 = COPY renamable killed $r5 BLR implicit $lr, implicit $rm, implicit $r3 ...
And a NFC patch to pre-commit the test would also be preferable.