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lkail (Kai Luo)
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User Since
May 15 2019, 8:43 PM (9 w, 3 d)

Recent Activity

Yesterday

lkail added inline comments to D56772: [MIR] Add simple PRE pass to MachineCSE.
Sat, Jul 20, 8:08 AM · Restricted Project

Fri, Jul 19

lkail committed rGdec624682e06: [MachineCSE][MachinePRE] Avoid hoisting code from code regions into hot BBs. (authored by lkail).
[MachineCSE][MachinePRE] Avoid hoisting code from code regions into hot BBs.
Fri, Jul 19, 6:01 AM
lkail committed rL366570: [MachineCSE][MachinePRE] Avoid hoisting code from code regions into hot BBs..
[MachineCSE][MachinePRE] Avoid hoisting code from code regions into hot BBs.
Fri, Jul 19, 5:58 AM
lkail closed D64394: [MachineCSE][MachinePRE] Do not hoist common computations into hot BBs.
Fri, Jul 19, 5:58 AM · Restricted Project

Thu, Jul 18

lkail updated the diff for D64394: [MachineCSE][MachinePRE] Do not hoist common computations into hot BBs.

Use hasMinSize to check if optimized for size.

Thu, Jul 18, 6:39 PM · Restricted Project
lkail added a comment to D64394: [MachineCSE][MachinePRE] Do not hoist common computations into hot BBs.

Btw, this change breaks multiple (more than two) hoisting to common dominator. I've tested this patch for the original test case taken from here: https://bugs.llvm.org/show_bug.cgi?id=38917. There are several comparisons giving 96 > 40 + 10, 96 > 29 + 10, 96 > 18 + 10 (so no hoisting at all), meanwhile 96 < 97 = 40 + 29 + 18 + 10.
However I do not see easy solution for this issue.

Thu, Jul 18, 6:31 PM · Restricted Project

Wed, Jul 17

lkail updated the diff for D64394: [MachineCSE][MachinePRE] Do not hoist common computations into hot BBs.

Updated patch following @dmgreen 's suggestion.

Wed, Jul 17, 7:52 PM · Restricted Project
lkail added a reviewer for D64394: [MachineCSE][MachinePRE] Do not hoist common computations into hot BBs: dmgreen.
Wed, Jul 17, 6:36 PM · Restricted Project

Mon, Jul 15

lkail added a comment to D64394: [MachineCSE][MachinePRE] Do not hoist common computations into hot BBs.

Ping

Mon, Jul 15, 6:33 PM · Restricted Project
lkail added inline comments to D64394: [MachineCSE][MachinePRE] Do not hoist common computations into hot BBs.
Mon, Jul 15, 6:33 PM · Restricted Project

Fri, Jul 12

lkail updated the diff for D64394: [MachineCSE][MachinePRE] Do not hoist common computations into hot BBs.

Address @jsji 's comments and added new test.

Fri, Jul 12, 2:43 AM · Restricted Project
lkail committed rG1e49a96c127f: [NFC][PowerPC] Added test for MachinePRE. (authored by lkail).
[NFC][PowerPC] Added test for MachinePRE.
Fri, Jul 12, 2:12 AM
lkail committed rL365883: [NFC][PowerPC] Added test for MachinePRE..
[NFC][PowerPC] Added test for MachinePRE.
Fri, Jul 12, 2:12 AM

Thu, Jul 11

lkail committed rGcfd4c333448b: [NFC][PowerPC] Added test to track current behaviour of TailDup (authored by lkail).
[NFC][PowerPC] Added test to track current behaviour of TailDup
Thu, Jul 11, 2:44 AM
lkail committed rL365746: [NFC][PowerPC] Added test to track current behaviour of TailDup.
[NFC][PowerPC] Added test to track current behaviour of TailDup
Thu, Jul 11, 2:42 AM

Wed, Jul 10

lkail updated the diff for D64394: [MachineCSE][MachinePRE] Do not hoist common computations into hot BBs.
Wed, Jul 10, 1:25 AM · Restricted Project

Tue, Jul 9

lkail retitled D64394: [MachineCSE][MachinePRE] Do not hoist common computations into hot BBs from [MachineCSE][MachinePRE] Do not hoist common computations into loop bodies to [MachineCSE][MachinePRE] Do not hoist common computations into hot BBs.
Tue, Jul 9, 11:59 PM · Restricted Project
lkail updated the diff for D64394: [MachineCSE][MachinePRE] Do not hoist common computations into hot BBs.

Updated the patch, using MachineBlockFrequency as metric to check if CMBB is appropriate to hoist into.

Tue, Jul 9, 11:47 PM · Restricted Project
lkail added a reviewer for D64394: [MachineCSE][MachinePRE] Do not hoist common computations into hot BBs: anil9.
Tue, Jul 9, 6:56 PM · Restricted Project
lkail added a comment to D64394: [MachineCSE][MachinePRE] Do not hoist common computations into hot BBs.

@hfinkel , thanks for review.

Tue, Jul 9, 6:49 PM · Restricted Project
lkail added a reviewer for D64394: [MachineCSE][MachinePRE] Do not hoist common computations into hot BBs: nemanjai.
Tue, Jul 9, 2:43 AM · Restricted Project
lkail added reviewers for D64394: [MachineCSE][MachinePRE] Do not hoist common computations into hot BBs: rtereshin, greened, mzolotukhin.
Tue, Jul 9, 2:40 AM · Restricted Project
lkail created D64394: [MachineCSE][MachinePRE] Do not hoist common computations into hot BBs.
Tue, Jul 9, 2:26 AM · Restricted Project
lkail committed rG09329ce6c4b9: [NFC][PowerPC] Added a test to show current codegen of MachinePRE (authored by lkail).
[NFC][PowerPC] Added a test to show current codegen of MachinePRE
Tue, Jul 9, 2:14 AM
lkail committed rL365447: [NFC][PowerPC] Added a test to show current codegen of MachinePRE.
[NFC][PowerPC] Added a test to show current codegen of MachinePRE
Tue, Jul 9, 2:14 AM

Mon, Jul 8

lkail committed rG619e39bc729a: [NFC][PowerPC] Fixed unused variable 'NewInstr'. (authored by lkail).
[NFC][PowerPC] Fixed unused variable 'NewInstr'.
Mon, Jul 8, 8:35 PM
lkail committed rL365433: [NFC][PowerPC] Fixed unused variable 'NewInstr'..
[NFC][PowerPC] Fixed unused variable 'NewInstr'.
Mon, Jul 8, 8:33 PM
lkail committed rG1931ed73c3d2: [PowerPC][Peephole] Combine extsw and sldi after instruction selection (authored by lkail).
[PowerPC][Peephole] Combine extsw and sldi after instruction selection
Mon, Jul 8, 7:56 PM
lkail committed rL365430: [PowerPC][Peephole] Combine extsw and sldi after instruction selection.
[PowerPC][Peephole] Combine extsw and sldi after instruction selection
Mon, Jul 8, 7:55 PM
lkail closed D63806: [PowerPC][Peephole] Combine extsw and sldi after instruction selection.
Mon, Jul 8, 7:55 PM · Restricted Project
lkail added inline comments to D63806: [PowerPC][Peephole] Combine extsw and sldi after instruction selection.
Mon, Jul 8, 7:52 PM · Restricted Project
lkail updated the diff for D63806: [PowerPC][Peephole] Combine extsw and sldi after instruction selection.
Mon, Jul 8, 7:47 PM · Restricted Project
lkail added inline comments to D63806: [PowerPC][Peephole] Combine extsw and sldi after instruction selection.
Mon, Jul 8, 6:45 PM · Restricted Project

Sun, Jul 7

lkail added a comment to D63806: [PowerPC][Peephole] Combine extsw and sldi after instruction selection.

Ping.

Sun, Jul 7, 6:35 PM · Restricted Project

Mon, Jul 1

lkail added a comment to D63806: [PowerPC][Peephole] Combine extsw and sldi after instruction selection.

Gentle ping.

Mon, Jul 1, 2:48 AM · Restricted Project

Thu, Jun 27

lkail added reviewers for D63806: [PowerPC][Peephole] Combine extsw and sldi after instruction selection: stefanp, RolandF.
Thu, Jun 27, 6:56 PM · Restricted Project
lkail updated the diff for D63806: [PowerPC][Peephole] Combine extsw and sldi after instruction selection.

Updated the patch to reflect recent changes.

Thu, Jun 27, 6:56 PM · Restricted Project
lkail committed rGc6fe8436e88e: [PowerPC][NFC] Use `|=` to update `Simplified` flag (authored by lkail).
[PowerPC][NFC] Use `|=` to update `Simplified` flag
Thu, Jun 27, 6:40 PM
lkail committed rL364617: [PowerPC][NFC] Use `|=` to update `Simplified` flag.
[PowerPC][NFC] Use `|=` to update `Simplified` flag
Thu, Jun 27, 6:39 PM

Wed, Jun 26

lkail closed D63754: [PowerPC][NFC] Move current peephole optimization of RLDICR into a method.

llvm-svn: 364372

Wed, Jun 26, 4:25 AM · Restricted Project
lkail reopened D63754: [PowerPC][NFC] Move current peephole optimization of RLDICR into a method.
Wed, Jun 26, 4:21 AM · Restricted Project
lkail closed D63754: [PowerPC][NFC] Move current peephole optimization of RLDICR into a method.
Wed, Jun 26, 4:20 AM · Restricted Project
lkail added a comment to D63754: [PowerPC][NFC] Move current peephole optimization of RLDICR into a method.
Wed, Jun 26, 4:17 AM · Restricted Project
lkail added a comment to D63801: [PowerPC] Fixed missing change flag of emitRLDICWhenLoweringJumpTables.

Thanks @steven.zhang, I think using = rather than |= in line 764 might cause error. I fixed it in https://reviews.llvm.org/D63806. Other updates of Simplified are all Simplified = true, no need to replace = with |=.

Wed, Jun 26, 12:48 AM · Restricted Project

Tue, Jun 25

lkail updated the summary of D63806: [PowerPC][Peephole] Combine extsw and sldi after instruction selection.
Tue, Jun 25, 10:47 PM · Restricted Project
lkail updated the summary of D63806: [PowerPC][Peephole] Combine extsw and sldi after instruction selection.
Tue, Jun 25, 10:46 PM · Restricted Project
lkail created D63806: [PowerPC][Peephole] Combine extsw and sldi after instruction selection.
Tue, Jun 25, 10:44 PM · Restricted Project
lkail committed rGd6a8bc7a1258: [PowerPC] Fixed missing change flag of emitRLDICWhenLoweringJumpTables (authored by lkail).
[PowerPC] Fixed missing change flag of emitRLDICWhenLoweringJumpTables
Tue, Jun 25, 10:29 PM
lkail committed rL364383: [PowerPC] Fixed missing change flag of emitRLDICWhenLoweringJumpTables.
[PowerPC] Fixed missing change flag of emitRLDICWhenLoweringJumpTables
Tue, Jun 25, 10:25 PM
lkail closed D63801: [PowerPC] Fixed missing change flag of emitRLDICWhenLoweringJumpTables.
Tue, Jun 25, 10:25 PM · Restricted Project
lkail created D63801: [PowerPC] Fixed missing change flag of emitRLDICWhenLoweringJumpTables.
Tue, Jun 25, 7:03 PM · Restricted Project
lkail committed rG174b4ff781a5: [PowerPC][NFC] Move peephole optimization of RLDICR into a method. (authored by lkail).
[PowerPC][NFC] Move peephole optimization of RLDICR into a method.
Tue, Jun 25, 6:36 PM
lkail committed rL364372: [PowerPC][NFC] Move peephole optimization of RLDICR into a method..
[PowerPC][NFC] Move peephole optimization of RLDICR into a method.
Tue, Jun 25, 6:35 PM
lkail added a comment to D62890: [DAGCombiner] Merge consecutive stores of vector elements before types are legalized.

Considering suggestions of @niravd and @uweigand , is it proper to have an implementation like

bool DAGCombiner::isAbleToMergeConsecutiveStoresPreLegalize(ArrayRef<SNode*> elements, .../* Params related to align, addrspace and etc.*/) {
  if (LegalTypes)
    return false;
  // Let target decides cost of merging stores.
  return TLI.canMergeConsecutiveStoresOfVectorElements(elements, ...);
}

And new check is

if (isTypeLegal(Ty) &&
    TLI.canMergeStoresTo(FirstStoreAS, Ty, DAG) &&
    ((TLI.allowsMemoryAccess(Context, DL, Ty,
                           *FirstInChain->getMemOperand(), &IsFast) &&
      IsFast) || isAbleToMergeConsecutiveStoresPreLegalize(elements, ...))
Tue, Jun 25, 1:26 AM · Restricted Project
lkail added a reviewer for D63754: [PowerPC][NFC] Move current peephole optimization of RLDICR into a method: hfinkel.
Tue, Jun 25, 1:00 AM · Restricted Project
lkail created D63754: [PowerPC][NFC] Move current peephole optimization of RLDICR into a method.
Tue, Jun 25, 12:26 AM · Restricted Project

Sun, Jun 23

lkail added a comment to D62890: [DAGCombiner] Merge consecutive stores of vector elements before types are legalized.

Hi @jonpa, could you have a look if it is a real reg in SystemZ's change?

Sun, Jun 23, 6:38 PM · Restricted Project

Jun 20 2019

lkail added a comment to D62890: [DAGCombiner] Merge consecutive stores of vector elements before types are legalized.

Also, what happened to the PPC test changes?

Jun 20 2019, 6:29 PM · Restricted Project

Jun 19 2019

lkail edited reviewers for D62890: [DAGCombiner] Merge consecutive stores of vector elements before types are legalized, added: craig.topper, RKSimon, uweigand; removed: MaskRay.
Jun 19 2019, 11:34 PM · Restricted Project
lkail added a comment to D62890: [DAGCombiner] Merge consecutive stores of vector elements before types are legalized.

Updated patch following @niravd's suggestions.

Jun 19 2019, 11:31 PM · Restricted Project
lkail updated the diff for D62890: [DAGCombiner] Merge consecutive stores of vector elements before types are legalized.
Jun 19 2019, 11:28 PM · Restricted Project
lkail retitled D62890: [DAGCombiner] Merge consecutive stores of vector elements before types are legalized from [PowerPC] Merge consecutive stores of vector elements before types are legalized to [DAGCombiner] Merge consecutive stores of vector elements before types are legalized.
Jun 19 2019, 11:28 PM · Restricted Project

Jun 18 2019

lkail added a comment to D62890: [DAGCombiner] Merge consecutive stores of vector elements before types are legalized.

@niravd Thanks for pointing out my mistake. I tried swapping out TIL.isTypeLegal with isTypeLegal, code generated for PowerPC is not what I expect, cuz TIL.allowsMemoryAccess will return false if Ty is something like v3i32. Also this change will break some regression tests of SystemZ and X86. And I don't quite understand the meaning of 'double check' here, could you please explain more?

Jun 18 2019, 7:17 PM · Restricted Project

Jun 17 2019

lkail added a comment to D62890: [DAGCombiner] Merge consecutive stores of vector elements before types are legalized.

This seems like it should be folded into the already existing checks. Do you know why NumStoresToMerge was not being before. I expect it's the requirement of a legal types in pre-legal merges or PPC's check for allowed misaligned accesses missing some cases. If it's the former I suspect we can disable the legality requirement prelegaltypes for non-truncated stores (replace TLI.isTypeLegal(ty) with isTypeLegal(ty)).

Jun 17 2019, 1:27 AM · Restricted Project

Jun 11 2019

lkail committed rG8faff5606e96: [PowerPC][NFC] Added test for sext/shl combination after isel. (authored by lkail).
[PowerPC][NFC] Added test for sext/shl combination after isel.
Jun 11 2019, 7:43 PM
lkail committed rL363118: [PowerPC][NFC] Added test for sext/shl combination after isel..
[PowerPC][NFC] Added test for sext/shl combination after isel.
Jun 11 2019, 7:42 PM

Jun 9 2019

lkail added a comment to D62890: [DAGCombiner] Merge consecutive stores of vector elements before types are legalized.

This seems like it should be folded into the already existing checks. Do you know why NumStoresToMerge was not being before. I expect it's the requirement of a legal types in pre-legal merges or PPC's check for allowed misaligned accesses missing some cases. If it's the former I suspect we can disable the legality requirement prelegaltypes for non-truncated stores (replace TLI.isTypeLegal(ty) with isTypeLegal(ty)).

Jun 9 2019, 10:46 PM · Restricted Project
lkail committed rG3f3bae33a273: [NFC] Test if commit access granted. (authored by lkail).
[NFC] Test if commit access granted.
Jun 9 2019, 8:19 PM
lkail committed rL362917: [NFC] Test if commit access granted..
[NFC] Test if commit access granted.
Jun 9 2019, 8:17 PM

Jun 5 2019

lkail added reviewers for D62890: [DAGCombiner] Merge consecutive stores of vector elements before types are legalized: bogner, niravd, MaskRay.
Jun 5 2019, 11:47 PM · Restricted Project

Jun 4 2019

lkail retitled D62890: [DAGCombiner] Merge consecutive stores of vector elements before types are legalized from Merge consecutive stores of vector elements before types are legalized to [PowerPC] Merge consecutive stores of vector elements before types are legalized.
Jun 4 2019, 10:49 PM · Restricted Project
lkail updated the summary of D62890: [DAGCombiner] Merge consecutive stores of vector elements before types are legalized.
Jun 4 2019, 10:47 PM · Restricted Project
lkail created D62890: [DAGCombiner] Merge consecutive stores of vector elements before types are legalized.
Jun 4 2019, 10:40 PM · Restricted Project
lkail retitled D62843: [PowerPC][NFC] Add tests to show current codegen of consecutive stores of vector elements from [PowerPC][NFC] Add tests to show current codegen of consecutive stores of vector elments to [PowerPC][NFC] Add tests to show current codegen of consecutive stores of vector elements.
Jun 4 2019, 12:02 AM · Restricted Project
lkail created D62843: [PowerPC][NFC] Add tests to show current codegen of consecutive stores of vector elements.
Jun 4 2019, 12:02 AM · Restricted Project