[DebugInfo] Some fields do not need relocations even relax is enabled.

[HsiangKai]

Summary

In debug frame information, some fields, e.g., Length in CIE/FDE and
Offset in FDE are attributes to describe the structure of CIE/FDE. They
are not related to the relaxed code. However, these attributes are
symbol differences. So, in current design, these attributes will be
filled as zero and LLVM generates relocations for them.

[probinson]

I don't claim to be an MCExpr expert, but I think this should not be necessary. There are other situations where symbol differences are computed and emitted as constants, for example when DW_AT_high_pc is a length rather than an address, and they clearly don't require this tactic.

[HsiangKai]

In D61584#1491778, @probinson wrote:

I don't claim to be an MCExpr expert, but I think this should not be necessary. There are other situations where symbol differences are computed and emitted as constants, for example when DW_AT_high_pc is a length rather than an address, and they clearly don't require this tactic.

This patch is provided for the issue discussed in https://reviews.llvm.org/D45181#1470143.
When relaxation is enabled, linker may modify the code sequence according to relocation types. So, DW_AT_high_pc will be changed even it is used as a length instead of an address.

In current implementation, LLVM will generate relocations for ALL binary expressions if relaxation is enabled. However, not all binary expressions need relocations even relaxation is enabled. This attributes in MCExpr is designed for the values which are not expected to be changed after relaxation.

If the flag in MCExpr is an acceptable way to solve the problem, I will refine the patch, e.g., add test cases, until it is ready to land.

[probinson]

Thanks for the reference, that helps some.
However I still think this isn't the right way to go about fixing the problem. This started because RISC-V decided not to resolve certain kinds of expressions, and then it turns out that applies to too many expressions. Somebody suggested that the asm backend decision should be more refined, based on symbol section perhaps, and that feels like a more principled way to go about it.

[HsiangKai]

In D61584#1493600, @probinson wrote:

Thanks for the reference, that helps some.
However I still think this isn't the right way to go about fixing the problem. This started because RISC-V decided not to resolve certain kinds of expressions, and then it turns out that applies to too many expressions. Somebody suggested that the asm backend decision should be more refined, based on symbol section perhaps, and that feels like a more principled way to go about it.

I don't think to refine the backend decision is a solution for the problem. I have explained the reason in https://reviews.llvm.org/D45181#1495288.

In` EmitFDE` example, Length value will be converted to a Fixup. It is reasonable to convert the expression to fixup due to the symbol values are unknown then.

When finalization, these fixups will be converted to relocations if relaxation is enabled. However, there is no way to decide to generate relocations or generate absolute value in MCAssembler::evaluateFixup(). There is no information to distinguish these two cases.

[HsiangKai]

The call stack when evaluating Length in FDE is

MCExpr::evaluateAsAbsolute()
MCObjectStreamer::EmitValueImpl()  <= generate MCFixup
MCELFStreamer::EmitValueImpl()
MCStreamer::EmitValue()
emitAbsValue()

Another way to solve the problem is to modify the interfaces of emitAbsValue, EmitValue, and EmitValueImpl. Carry the information to MCObjectStreamer::EmitValueImpl and attach the information to MCFixup when generating fixups.

[HsiangKai]

Attach a test case.

[HsiangKai]

Add a flag to MCFixup instead of MCExpr.

[probinson]

It still bothers me that MCDwarf has to know exactly when to override the target's decision to do relaxation.

Why is it appropriate to do that in the two methods where you have made that change in this patch, and not in many other places within MCDwarf that call the same helper? What guides me to know it's correct in the first three calls to emitAbsValue within FrameEmitterImpl::EmitFDE, but not in the fourth? Without becoming an expert in all the fine details of every target.

include/llvm/MC/MCFixup.h

92

"Require the assembler to evaluate the fixup."

(It is going to become an absolute value regardless, in the contexts where this is set to true; the only question is where the evaluation happens.)

include/llvm/MC/MCStreamer.h

621

Need to add Fixed to the doxygen comment for this method.

[HsiangKai]

In D61584#1503168, @probinson wrote:

It still bothers me that MCDwarf has to know exactly when to override the target's decision to do relaxation.

Why is it appropriate to do that in the two methods where you have made that change in this patch, and not in many other places within MCDwarf that call the same helper? What guides me to know it's correct in the first three calls to emitAbsValue within FrameEmitterImpl::EmitFDE, but not in the fourth? Without becoming an expert in all the fine details of every target.

It is not about target's decision. It is about whether the symbol difference will be changed after linking. For example, length field in FDE is used to describe the size of this FDE structure. It will not be affected by linker even relaxation is enabled. However, address_range in FDE is used to describe the range of instructions related to this FDE. If the linker modifies the instructions in the range, address_range will need be updated by linker accordingly. That's why it needs to set Fixed flag in length field instead of address_range field in FDE.

I will review other uses of emitAbsValue to ensure the flag is set correctly.

[HsiangKai]

Set Fixed flag to length of debug_info and debug_line. These fields should be fixed even the linker has modified the instructions in the program.

[HsiangKai]

Update comments.

[HsiangKai]

Check Fixup is nullptr or not before calling its member functions.

[jrtc27]

Why do we need this flag; can we not already determine this (either in generic code or the target backends)? Anything where all symbols referenced are not in SHF_EXECINSTR sections can be evaluated even with relaxations, which covers all these cases:

1. MCDwarfLineTableHeader::Emit's LineStartSym/LineEndSym/ProEndSym are in .debug_line.dwo which is just SHF_EXCLUDE
2. EmitGenDwarfInfo's InfoStart/InfoEnd are in .debug_info.dwo which is just SHF_EXCLUDE
3. FrameEmitterImpl::EmitCIE's sectionStart/sectionEnd are either in .eh_frame which is SHF_ALLOC (and also SHF_WRITE on non-x86 Solaris), or in .debug_frame which has no flags
4. FrameEmitterImpl::EmitFDE's fdeStart/fdeEnd/cieStart/SectionStart should all also be in the same section as above

[HsiangKai]

In D61584#1504553, @jrtc27 wrote:

Why do we need this flag; can we not already determine this (either in generic code or the target backends)? Anything where all symbols referenced are not in SHF_EXECINSTR sections can be evaluated even with relaxations, which covers all these cases:

1. MCDwarfLineTableHeader::Emit's LineStartSym/LineEndSym/ProEndSym are in .debug_line.dwo which is just SHF_EXCLUDE
2. EmitGenDwarfInfo's InfoStart/InfoEnd are in .debug_info.dwo which is just SHF_EXCLUDE
3. FrameEmitterImpl::EmitCIE's sectionStart/sectionEnd are either in .eh_frame which is SHF_ALLOC (and also SHF_WRITE on non-x86 Solaris), or in .debug_frame which has no flags
4. FrameEmitterImpl::EmitFDE's fdeStart/fdeEnd/cieStart/SectionStart should all also be in the same section as above

I got it. I missed the information in MCSymbol. Every symbol should have information about the section it is located. So, we could use something like sym.getSection().getKind().isText() to determine the symbol is located in text or not. You are right. I will abandon this revision. Thanks.

[HsiangKai]

Fix the bug according to @jrtc27's suggestions.

[edward-jones]

lib/MC/MCExpr.cpp

610

I found a bug with these latest changes when compiling the following program:

func:
  .cfi_startproc
  .cfi_endproc

With the command:

llvm-mc -filetype=obj tmp.s -o tmp.o -triple riscv32

The calls to ...->getSymbol().getSection() can trigger an assertion if the symbol is not defined in a section, which seems to happen in the above testcase.

[lewis-revill]

Just a quick comment, I'm assuming this depends on D58335 based on the test file you've modified?

[HsiangKai]

Fix bugs.

[HsiangKai]

In D61584#1550273, @lewis-revill wrote:

Just a quick comment, I'm assuming this depends on D58335 based on the test file you've modified?

Yes, the test case is based on D58335.

lib/MC/MCExpr.cpp

610

Thank you for your information. I have fixed the bug. Please help me to review it and verify the solution. Thanks.

[edward-jones]

lib/MC/MCExpr.cpp

610

Yep, this all works for me now. Looks good!

[lenary]

I added D58335 as a parent revision, as the relax-debug-frame.ll file is created in that revision, and this patch does not apply without it.

[dblaikie]

Does this solution extend/address other label deltas, like those that would appear in the other DWARF/non-frame sections? (eg: currently we use a length in the DWARF high_pc because it means not having to use a relocation for high_pc, which reduces object size - so, does this fix cause relocations to be used for that length expression to ensure they're correct if the linker changes the instructions in that range?)

[HsiangKai]

In D61584#1574203, @dblaikie wrote:

Does this solution extend/address other label deltas, like those that would appear in the other DWARF/non-frame sections? (eg: currently we use a length in the DWARF high_pc because it means not having to use a relocation for high_pc, which reduces object size - so, does this fix cause relocations to be used for that length expression to ensure they're correct if the linker changes the instructions in that range?)

After D45181 committed, LLVM will generate relocation pairs for symbol difference expressions if target enables relaxation. So, it will generate relocations for high_pc due to it is a symbol difference expression of end symbol and start symbol of the function range. Such as,

.word   .Lfunc_begin0           # DW_AT_low_pc
.word   .Lfunc_end4-.Lfunc_begin0 # DW_AT_high_pc

This commit modified the condition to generate relocations for symbol difference expressions. Not all symbol difference expressions are related to executable code. However, only executable code will be modified by linker for relaxation. So, we do not need to generate relocations for symbol differences not located in executable code sections.

[dblaikie]

In D61584#1579860, @HsiangKai wrote:

In D61584#1574203, @dblaikie wrote:

Does this solution extend/address other label deltas, like those that would appear in the other DWARF/non-frame sections? (eg: currently we use a length in the DWARF high_pc because it means not having to use a relocation for high_pc, which reduces object size - so, does this fix cause relocations to be used for that length expression to ensure they're correct if the linker changes the instructions in that range?)

After D45181 committed, LLVM will generate relocation pairs for symbol difference expressions if target enables relaxation. So, it will generate relocations for high_pc due to it is a symbol difference expression of end symbol and start symbol of the function range. Such as,

.word   .Lfunc_begin0           # DW_AT_low_pc
.word   .Lfunc_end4-.Lfunc_begin0 # DW_AT_high_pc

This commit modified the condition to generate relocations for symbol difference expressions. Not all symbol difference expressions are related to executable code. However, only executable code will be modified by linker for relaxation. So, we do not need to generate relocations for symbol differences not located in executable code sections.

Good to know - so has LLVM been creating incorrect DWARF in these cases so far - or has no target enabled linker relaxation yet?

Is there any way to make this more targeted - does linker relaxation allow arbitrary machine code changes? Or is there something more fine-grained - so we could compute compile-time constants for some label differences, but only use linker relocations for cases where we know the instruction sequence includes something relaxable?

[HsiangKai]

In D61584#1579871, @dblaikie wrote:

In D61584#1579860, @HsiangKai wrote:

In D61584#1574203, @dblaikie wrote:

Does this solution extend/address other label deltas, like those that would appear in the other DWARF/non-frame sections? (eg: currently we use a length in the DWARF high_pc because it means not having to use a relocation for high_pc, which reduces object size - so, does this fix cause relocations to be used for that length expression to ensure they're correct if the linker changes the instructions in that range?)

After D45181 committed, LLVM will generate relocation pairs for symbol difference expressions if target enables relaxation. So, it will generate relocations for high_pc due to it is a symbol difference expression of end symbol and start symbol of the function range. Such as,

.word   .Lfunc_begin0           # DW_AT_low_pc
.word   .Lfunc_end4-.Lfunc_begin0 # DW_AT_high_pc

This commit modified the condition to generate relocations for symbol difference expressions. Not all symbol difference expressions are related to executable code. However, only executable code will be modified by linker for relaxation. So, we do not need to generate relocations for symbol differences not located in executable code sections.

Good to know - so has LLVM been creating incorrect DWARF in these cases so far - or has no target enabled linker relaxation yet?

Is there any way to make this more targeted - does linker relaxation allow arbitrary machine code changes? Or is there something more fine-grained - so we could compute compile-time constants for some label differences, but only use linker relocations for cases where we know the instruction sequence includes something relaxable?

AFAIK only RISC-V enables this feature. Currently, .debug_frame/.eh_frame is wrong after relaxation. I already fixed parts of the problem in D58335. In D58335, .debug_frame/.eh_frame will generate relocations if relaxation is enabled. Otherwise, it will not aware relaxation at all and it doesn't work to do frame inspection when debugging.

Linker relaxation processes some patterns of instruction sequences. For example, RISC-V could use auipc/jalr to jump to 32-bits pc-relative address. If linker knows the jump target is within +/-1 Mib, it could replace auipc/jalr to jal. The replacement will shorten the instruction sequence. So, the label differences between these instruction sequences may be changed after relaxation. That is why we need to annotate relocation types for these symbol differences in code sections.

Currently, there is no way to make it more targeted. When relaxation is enabled, it assumes all code sequences may be changed after relaxation. If we want to make placement of relocations more specific, we need to inspect every instruction between two symbols when we create symbol difference expressions for them. I think it will do a lot of work to gain few benefits. (Fewer relocations, smaller object code, less linker efforts, etc.)

[dblaikie]

In D61584#1579992, @HsiangKai wrote:

In D61584#1579871, @dblaikie wrote:

In D61584#1579860, @HsiangKai wrote:

In D61584#1574203, @dblaikie wrote:

Does this solution extend/address other label deltas, like those that would appear in the other DWARF/non-frame sections? (eg: currently we use a length in the DWARF high_pc because it means not having to use a relocation for high_pc, which reduces object size - so, does this fix cause relocations to be used for that length expression to ensure they're correct if the linker changes the instructions in that range?)

After D45181 committed, LLVM will generate relocation pairs for symbol difference expressions if target enables relaxation. So, it will generate relocations for high_pc due to it is a symbol difference expression of end symbol and start symbol of the function range. Such as,

.word   .Lfunc_begin0           # DW_AT_low_pc
.word   .Lfunc_end4-.Lfunc_begin0 # DW_AT_high_pc

This commit modified the condition to generate relocations for symbol difference expressions. Not all symbol difference expressions are related to executable code. However, only executable code will be modified by linker for relaxation. So, we do not need to generate relocations for symbol differences not located in executable code sections.

Good to know - so has LLVM been creating incorrect DWARF in these cases so far - or has no target enabled linker relaxation yet?

Is there any way to make this more targeted - does linker relaxation allow arbitrary machine code changes? Or is there something more fine-grained - so we could compute compile-time constants for some label differences, but only use linker relocations for cases where we know the instruction sequence includes something relaxable?

AFAIK only RISC-V enables this feature. Currently, .debug_frame/.eh_frame is wrong after relaxation. I already fixed parts of the problem in D58335. In D58335, .debug_frame/.eh_frame will generate relocations if relaxation is enabled. Otherwise, it will not aware relaxation at all and it doesn't work to do frame inspection when debugging.

Linker relaxation processes some patterns of instruction sequences. For example, RISC-V could use auipc/jalr to jump to 32-bits pc-relative address. If linker knows the jump target is within +/-1 Mib, it could replace auipc/jalr to jal. The replacement will shorten the instruction sequence. So, the label differences between these instruction sequences may be changed after relaxation. That is why we need to annotate relocation types for these symbol differences in code sections.

Currently, there is no way to make it more targeted. When relaxation is enabled, it assumes all code sequences may be changed after relaxation. If we want to make placement of relocations more specific, we need to inspect every instruction between two symbols when we create symbol difference expressions for them. I think it will do a lot of work to gain few benefits. (Fewer relocations, smaller object code, less linker efforts, etc.)

Thanks for helping me understand the context/support here.

I'm aware of some folks (should be announced/discussed upstream soon) working on a feature that'd require linker relaxation for x86 - but only under some fairly narrow circumstances, so there would be potentially more benefit to be gained by avoiding these label difference relocations where the address range is known not to be modifiable by the linker.

But all good - not your puzzle to solve, good for me to understand so I can keep it in mind as further work for this x86 situation/project.

[asb]

LGTM, thanks! Some minor rebasing is needed for relax-debug-frame.ll. Please go ahead and commit.

[MaskRay]

@reames for D150373

For MCObjectStreamer::emitDwarfAdvanceLineAddr and MCObjectStreamer::emitDwarfAdvanceFrameAddr, we have:

• fast path: used by assembly input (commit 57ab708bdd3231b23a8ef4978b11ff07616034a2 (2010))
• slow path (a relaxable fragment): used by code generation (much more important case)

This piece of code (canFold) blocks label difference folding, so that we will take the slow path.
The code was removed by @compnerd's linker relaxation refactoring D103539 (RISCV: adjust handling of relocation emission for RISCV)

I think we really just want to get rid of the "fast path": D150004.

With both fast path and slow path, we have diverging behaviors for RISC-V: how RISC-V linker relaxation leads to relocations happens in different code paths.

The slow path tends to be tested more and more robust, since it controls direct object code emission (more likely noticed by debuggers, etc), while the fast path is only for assembly output (assembly input files are less common & clang -S a.c; clang -c a.s users are uncommon).

I have tried reading MCExpr.cpp multiple times and I always feel that some parts of it need more love to address some problems (some are documented as FIXME).

(If the fast path is for simple operations like LEB128 (see D150004's analysis), I will more likely accept.
However, I'd prefer that we pay more attention to make the "slow path" faster.)

include/llvm/MC/MCELFStreamer.h

public:
   void EmitLocalCommonSymbol(MCSymbol *Symbol, uint64_t Size,
                              unsigned ByteAlignment) override;
 
   void EmitZerofill(MCSection *Section, MCSymbol *Symbol = nullptr,
                     uint64_t Size = 0, unsigned ByteAlignment = 0,
                     SMLoc L = SMLoc()) override;
   void EmitTBSSSymbol(MCSection *Section, MCSymbol *Symbol, uint64_t Size,
                       unsigned ByteAlignment = 0) override;
-  void EmitValueImpl(const MCExpr *Value, unsigned Size,
-                     SMLoc Loc = SMLoc()) override;
+  void EmitValueImpl(const MCExpr *Value, unsigned Size, SMLoc Loc = SMLoc(),
+                     bool Fixed = false) override;
 
   void EmitIdent(StringRef IdentString) override;
 
   void EmitValueToAlignment(unsigned, int64_t, unsigned, unsigned) override;
 
   void emitCGProfileEntry(const MCSymbolRefExpr *From,
                           const MCSymbolRefExpr *To, uint64_t Count) override;
 

include/llvm/MC/MCFixup.h

class MCFixup {
   uint32_t Offset;
 
   /// The target dependent kind of fixup item this is. The kind is used to
   /// determine how the operand value should be encoded into the instruction.
   unsigned Kind;
 
   /// The source location which gave rise to the fixup, if any.
   SMLoc Loc;
+
+  /// Enforce the fixup to be converted to an absolute value.
+  bool Fixed;
+
 public:
-  static MCFixup create(uint32_t Offset, const MCExpr *Value,
-                        MCFixupKind Kind, SMLoc Loc = SMLoc()) {
+  static MCFixup create(uint32_t Offset, const MCExpr *Value, MCFixupKind Kind,
+                        SMLoc Loc = SMLoc(), bool Fixed = false) {
     assert(unsigned(Kind) < MaxTargetFixupKind && "Kind out of range!");
     MCFixup FI;
     FI.Value = Value;
     FI.Offset = Offset;
     FI.Kind = unsigned(Kind);
     FI.Loc = Loc;
+    FI.Fixed = Fixed;
     return FI;
   }
 
   /// Return a fixup corresponding to the add half of a add/sub fixup pair for
   /// the given Fixup.
   static MCFixup createAddFor(const MCFixup &Fixup) {
     MCFixup FI;
     FI.Value = Fixup.getValue();
public:
 
   MCFixupKind getKind() const { return MCFixupKind(Kind); }
 
   uint32_t getOffset() const { return Offset; }
   void setOffset(uint32_t Value) { Offset = Value; }
 
   const MCExpr *getValue() const { return Value; }
 
+  bool isFixed() const { return Fixed; }
+
   /// Return the generic fixup kind for a value with the given size. It
   /// is an error to pass an unsupported size.
   static MCFixupKind getKindForSize(unsigned Size, bool isPCRel) {
     switch (Size) {
     default: llvm_unreachable("Invalid generic fixup size!");
     case 1: return isPCRel ? FK_PCRel_1 : FK_Data_1;
     case 2: return isPCRel ? FK_PCRel_2 : FK_Data_2;
     case 4: return isPCRel ? FK_PCRel_4 : FK_Data_4;

include/llvm/MC/MCObjectStreamer.h

public:
   MCAssembler &getAssembler() { return *Assembler; }
   MCAssembler *getAssemblerPtr() override;
   /// \name MCStreamer Interface
   /// @{
 
   void EmitLabel(MCSymbol *Symbol, SMLoc Loc = SMLoc()) override;
   virtual void EmitLabel(MCSymbol *Symbol, SMLoc Loc, MCFragment *F);
   void EmitAssignment(MCSymbol *Symbol, const MCExpr *Value) override;
-  void EmitValueImpl(const MCExpr *Value, unsigned Size,
-                     SMLoc Loc = SMLoc()) override;
+  void EmitValueImpl(const MCExpr *Value, unsigned Size, SMLoc Loc = SMLoc(),
+                     bool Fixed = false) override;
   void EmitULEB128Value(const MCExpr *Value) override;
   void EmitSLEB128Value(const MCExpr *Value) override;
   void EmitWeakReference(MCSymbol *Alias, const MCSymbol *Symbol) override;
   void ChangeSection(MCSection *Section, const MCExpr *Subsection) override;
   void EmitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI) override;
 
   /// Emit an instruction to a special fragment, because this instruction
   /// can change its size during relaxation.

include/llvm/MC/MCStreamer.h

public:
   /// This is used to implement assembler directives such as .word, .quad,
   /// etc.
   ///
   /// \param Value - The value to emit.
   /// \param Size - The size of the integer (in bytes) to emit. This must
   /// match a native machine width.
   /// \param Loc - The location of the expression for error reporting.
   virtual void EmitValueImpl(const MCExpr *Value, unsigned Size,
-                             SMLoc Loc = SMLoc());
+                             SMLoc Loc = SMLoc(), bool Fixed = false);
 
-  void EmitValue(const MCExpr *Value, unsigned Size, SMLoc Loc = SMLoc());
+  void EmitValue(const MCExpr *Value, unsigned Size, SMLoc Loc = SMLoc(),
+                 bool Fixed = false);
 
   /// Special case of EmitValue that avoids the client having
   /// to pass in a MCExpr for constant integers.
   virtual void EmitIntValue(uint64_t Value, unsigned Size);
 
   virtual void EmitULEB128Value(const MCExpr *Value);
 
   virtual void EmitSLEB128Value(const MCExpr *Value);

include/llvm/MC/MCWasmStreamer.h

public:
   void EmitLocalCommonSymbol(MCSymbol *Symbol, uint64_t Size,
                              unsigned ByteAlignment) override;
 
   void EmitZerofill(MCSection *Section, MCSymbol *Symbol = nullptr,
                     uint64_t Size = 0, unsigned ByteAlignment = 0,
                     SMLoc Loc = SMLoc()) override;
   void EmitTBSSSymbol(MCSection *Section, MCSymbol *Symbol, uint64_t Size,
                       unsigned ByteAlignment = 0) override;
-  void EmitValueImpl(const MCExpr *Value, unsigned Size,
-                     SMLoc Loc = SMLoc()) override;
+  void EmitValueImpl(const MCExpr *Value, unsigned Size, SMLoc Loc = SMLoc(),
+                     bool Fixed = false) override;
 
   void EmitIdent(StringRef IdentString) override;
 
   void EmitValueToAlignment(unsigned, int64_t, unsigned, unsigned) override;
 
   void FinishImpl() override;
 
 private:

lib/MC/MCAsmStreamer.cpp

public:
 
   void EmitTBSSSymbol(MCSection *Section, MCSymbol *Symbol, uint64_t Size,
                       unsigned ByteAlignment = 0) override;
 
   void EmitBinaryData(StringRef Data) override;
 
   void EmitBytes(StringRef Data) override;
 
-  void EmitValueImpl(const MCExpr *Value, unsigned Size,
-                     SMLoc Loc = SMLoc()) override;
+  void EmitValueImpl(const MCExpr *Value, unsigned Size, SMLoc Loc = SMLoc(),
+                     bool Fixed = false) override;
   void EmitIntValue(uint64_t Value, unsigned Size) override;
 
   void EmitULEB128Value(const MCExpr *Value) override;
 
   void EmitSLEB128Value(const MCExpr *Value) override;
 
   void EmitDTPRel32Value(const MCExpr *Value) override;
   void EmitDTPRel64Value(const MCExpr *Value) override;
for (size_t I = 0, EI = alignTo(Data.size(), Cols); I < EI; I += Cols) {
     EmitEOL();
   }
 }
 
 void MCAsmStreamer::EmitIntValue(uint64_t Value, unsigned Size) {
   EmitValue(MCConstantExpr::create(Value, getContext()), Size);
 }
 
-void MCAsmStreamer::EmitValueImpl(const MCExpr *Value, unsigned Size,
-                                  SMLoc Loc) {
+void MCAsmStreamer::EmitValueImpl(const MCExpr *Value, unsigned Size, SMLoc Loc,
+                                  bool Fixed) {
   assert(Size <= 8 && "Invalid size");
   assert(getCurrentSectionOnly() &&
          "Cannot emit contents before setting section!");
   const char *Directive = nullptr;
   switch (Size) {
   default: break;
   case 1: Directive = MAI->getData8bitsDirective();  break;
   case 2: Directive = MAI->getData16bitsDirective(); break;

lib/MC/MCDwarf.cpp

static const MCExpr *forceExpAbs(MCStreamer &OS, const MCExpr* Expr) {
   if (Context.getAsmInfo()->hasAggressiveSymbolFolding())
     return Expr;
 
   MCSymbol *ABS = Context.createTempSymbol();
   OS.EmitAssignment(ABS, Expr);
   return MCSymbolRefExpr::create(ABS, Context);
 }
 
-static void emitAbsValue(MCStreamer &OS, const MCExpr *Value, unsigned Size) {
+static void emitAbsValue(MCStreamer &OS, const MCExpr *Value, unsigned Size,
+                         bool Fixed = false) {
   const MCExpr *ABS = forceExpAbs(OS, Value);
-  OS.EmitValue(ABS, Size);
+  OS.EmitValue(ABS, Size, SMLoc(), Fixed);
 }
 
 void MCDwarfLineStr::emitSection(MCStreamer *MCOS) {
   // Switch to the .debug_line_str section.
   MCOS->SwitchSection(
       MCOS->getContext().getObjectFileInfo()->getDwarfLineStrSection());
   // Emit the strings without perturbing the offsets we used.
   LineStrings.finalizeInOrder();
MCDwarfLineTableHeader::Emit(MCStreamer *MCOS, MCDwarfLineTableParams Params,
   MCOS->EmitLabel(LineStartSym);
 
   // Create a symbol for the end of the section (to be set when we get there).
   MCSymbol *LineEndSym = context.createTempSymbol();
 
   // The first 4 bytes is the total length of the information for this
   // compilation unit (not including these 4 bytes for the length).
   emitAbsValue(*MCOS,
-               MakeStartMinusEndExpr(*MCOS, *LineStartSym, *LineEndSym, 4), 4);
+               MakeStartMinusEndExpr(*MCOS, *LineStartSym, *LineEndSym, 4), 4, true);
 
   // Next 2 bytes is the Version.
   unsigned LineTableVersion = context.getDwarfVersion();
   MCOS->EmitIntValue(LineTableVersion, 2);
 
   // Keep track of the bytes between the very start and where the header length
   // comes out.
   unsigned PreHeaderLengthBytes = 4 + 2;
 
   // In v5, we get address info next.
   if (LineTableVersion >= 5) {
     MCOS->EmitIntValue(context.getAsmInfo()->getCodePointerSize(), 1);
     MCOS->EmitIntValue(0, 1); // Segment selector; same as EmitGenDwarfAranges.
     PreHeaderLengthBytes += 2;
   }
 
   // Create a symbol for the end of the prologue (to be set when we get there).
   MCSymbol *ProEndSym = context.createTempSymbol(); // Lprologue_end
 
   // Length of the prologue, is the next 4 bytes.  This is actually the length
   // from after the length word, to the end of the prologue.
   emitAbsValue(*MCOS,
                MakeStartMinusEndExpr(*MCOS, *LineStartSym, *ProEndSym,
                                      (PreHeaderLengthBytes + 4)),
-               4);
+               4, true);
 
   // Parameters of the state machine, are next.
   MCOS->EmitIntValue(context.getAsmInfo()->getMinInstAlignment(), 1);
   // maximum_operations_per_instruction
   // For non-VLIW architectures this field is always 1.
   // FIXME: VLIW architectures need to update this field accordingly.
   if (LineTableVersion >= 4)
     MCOS->EmitIntValue(1, 1);
static void EmitGenDwarfInfo(MCStreamer *MCOS,
   MCOS->EmitLabel(InfoStart);
   MCSymbol *InfoEnd = context.createTempSymbol();
 
   // First part: the header.
 
   // The 4 byte total length of the information for this compilation unit, not
   // including these 4 bytes.
   const MCExpr *Length = MakeStartMinusEndExpr(*MCOS, *InfoStart, *InfoEnd, 4);
-  emitAbsValue(*MCOS, Length, 4);
+  emitAbsValue(*MCOS, Length, 4, true);
 
   // The 2 byte DWARF version.
   MCOS->EmitIntValue(context.getDwarfVersion(), 2);
 
   // The DWARF v5 header has unit type, address size, abbrev offset.
   // Earlier versions have abbrev offset, address size.
   const MCAsmInfo &AsmInfo = *context.getAsmInfo();
   int AddrSize = AsmInfo.getCodePointerSize();
const MCSymbol &FrameEmitterImpl::EmitCIE(const MCDwarfFrameInfo &Frame) {
   MCSymbol *sectionStart = context.createTempSymbol();
   Streamer.EmitLabel(sectionStart);
 
   MCSymbol *sectionEnd = context.createTempSymbol();
 
   // Length
   const MCExpr *Length =
       MakeStartMinusEndExpr(Streamer, *sectionStart, *sectionEnd, 4);
-  emitAbsValue(Streamer, Length, 4);
+  emitAbsValue(Streamer, Length, 4, true);
 
   // CIE ID
   unsigned CIE_ID = IsEH ? 0 : -1;
   Streamer.EmitIntValue(CIE_ID, 4);
 
   // Version
   uint8_t CIEVersion = getCIEVersion(IsEH, context.getDwarfVersion());
   Streamer.EmitIntValue(CIEVersion, 1);
void FrameEmitterImpl::EmitFDE(const MCSymbol &cieStart,
   MCSymbol *fdeStart = context.createTempSymbol();
   MCSymbol *fdeEnd = context.createTempSymbol();
   const MCObjectFileInfo *MOFI = context.getObjectFileInfo();
 
   CFAOffset = InitialCFAOffset;
 
   // Length
   const MCExpr *Length = MakeStartMinusEndExpr(Streamer, *fdeStart, *fdeEnd, 0);
-  emitAbsValue(Streamer, Length, 4);
+  emitAbsValue(Streamer, Length, 4, true);
 
   Streamer.EmitLabel(fdeStart);
 
   // CIE Pointer
   const MCAsmInfo *asmInfo = context.getAsmInfo();
   if (IsEH) {
     const MCExpr *offset =
         MakeStartMinusEndExpr(Streamer, cieStart, *fdeStart, 0);
-    emitAbsValue(Streamer, offset, 4);
+    emitAbsValue(Streamer, offset, 4, true);
   } else if (!asmInfo->doesDwarfUseRelocationsAcrossSections()) {
     const MCExpr *offset =
         MakeStartMinusEndExpr(Streamer, SectionStart, cieStart, 0);
-    emitAbsValue(Streamer, offset, 4);
+    emitAbsValue(Streamer, offset, 4, true);
   } else {
     Streamer.EmitSymbolValue(&cieStart, 4);
   }
 
   // PC Begin
   unsigned PCEncoding =
       IsEH ? MOFI->getFDEEncoding() : (unsigned)dwarf::DW_EH_PE_absptr;
   unsigned PCSize = getSizeForEncoding(Streamer, PCEncoding);

lib/MC/MCELFStreamer.cpp

void MCELFStreamer::EmitLocalCommonSymbol(MCSymbol *S, uint64_t Size,
   auto *Symbol = cast<MCSymbolELF>(S);
   // FIXME: Should this be caught and done earlier?
   getAssembler().registerSymbol(*Symbol);
   Symbol->setBinding(ELF::STB_LOCAL);
   Symbol->setExternal(false);
   EmitCommonSymbol(Symbol, Size, ByteAlignment);
 }
 
-void MCELFStreamer::EmitValueImpl(const MCExpr *Value, unsigned Size,
-                                  SMLoc Loc) {
+void MCELFStreamer::EmitValueImpl(const MCExpr *Value, unsigned Size, SMLoc Loc,
+                                  bool Fixed) {
   if (isBundleLocked())
     report_fatal_error("Emitting values inside a locked bundle is forbidden");
   fixSymbolsInTLSFixups(Value);
-  MCObjectStreamer::EmitValueImpl(Value, Size, Loc);
+  MCObjectStreamer::EmitValueImpl(Value, Size, Loc, Fixed);
 }
 
 void MCELFStreamer::EmitValueToAlignment(unsigned ByteAlignment,
                                          int64_t Value,
                                          unsigned ValueSize,
                                          unsigned MaxBytesToEmit) {
   if (isBundleLocked())
     report_fatal_error("Emitting values inside a locked bundle is forbidden");

lib/MC/MCExpr.cpp

EvaluateSymbolicAdd(const MCAssembler *Asm, const MCAsmLayout *Layout,
   assert((!Layout || Asm) &&
          "Must have an assembler object if layout is given!");
 
   // If we have a layout, we can fold resolved differences. Do not do this if
   // the backend requires this to be emitted as individual relocations, unless
   // the InSet flag is set to get the current difference anyway (used for
   // example to calculate symbol sizes).
   if (Asm &&
       (InSet || !Asm->getBackend().requiresDiffExpressionRelocations())) {
     // First, fold out any differences which are fully resolved. By
     // reassociating terms in
     //   Result = (LHS_A - LHS_B + LHS_Cst) + (RHS_A - RHS_B + RHS_Cst).
     // we have the four possible differences:
     //   (LHS_A - LHS_B),
     //   (LHS_A - RHS_B),
     //   (RHS_A - LHS_B),
     //   (RHS_A - RHS_B).
EvaluateSymbolicAdd(const MCAssembler *Asm, const MCAsmLayout *Layout,
   return true;
 }
 
 bool MCExpr::evaluateAsRelocatable(MCValue &Res,
                                    const MCAsmLayout *Layout,
                                    const MCFixup *Fixup) const {
   MCAssembler *Assembler = Layout ? &Layout->getAssembler() : nullptr;
   return evaluateAsRelocatableImpl(Res, Assembler, Layout, Fixup, nullptr,
-                                   false);
+                                   Fixup->isFixed());
 }
 
 bool MCExpr::evaluateAsValue(MCValue &Res, const MCAsmLayout &Layout) const {
   MCAssembler *Assembler = &Layout.getAssembler();
   return evaluateAsRelocatableImpl(Res, Assembler, &Layout, nullptr, nullptr,
                                    true);
 }
 

lib/MC/MCObjectStreamer.cpp

 
 void MCObjectStreamer::EmitCFISections(bool EH, bool Debug) {
   MCStreamer::EmitCFISections(EH, Debug);
   EmitEHFrame = EH;
   EmitDebugFrame = Debug;
 }
 
 void MCObjectStreamer::EmitValueImpl(const MCExpr *Value, unsigned Size,
-                                     SMLoc Loc) {
-  MCStreamer::EmitValueImpl(Value, Size, Loc);
+                                     SMLoc Loc, bool Fixed) {
+  MCStreamer::EmitValueImpl(Value, Size, Loc, Fixed);
   MCDataFragment *DF = getOrCreateDataFragment();
   flushPendingLabels(DF, DF->getContents().size());
 
   MCDwarfLineEntry::Make(this, getCurrentSectionOnly());
 
   // Avoid fixups when possible.
   int64_t AbsValue;
   if (Value->evaluateAsAbsolute(AbsValue, getAssemblerPtr())) {
     if (!isUIntN(8 * Size, AbsValue) && !isIntN(8 * Size, AbsValue)) {
       getContext().reportError(
           Loc, "value evaluated as " + Twine(AbsValue) + " is out of range.");
       return;
     }
     EmitIntValue(AbsValue, Size);
     return;
   }
   DF->getFixups().push_back(
       MCFixup::create(DF->getContents().size(), Value,
-                      MCFixup::getKindForSize(Size, false), Loc));
+                      MCFixup::getKindForSize(Size, false), Loc, Fixed));
   DF->getContents().resize(DF->getContents().size() + Size, 0);
 }
 
 MCSymbol *MCObjectStreamer::EmitCFILabel() {
   MCSymbol *Label = getContext().createTempSymbol("cfi", true);
   EmitLabel(Label);
   return Label;
 }

lib/MC/MCStreamer.cpp

 /// client having to pass in a MCExpr for constant integers.
 void MCStreamer::EmitSLEB128IntValue(int64_t Value) {
   SmallString<128> Tmp;
   raw_svector_ostream OSE(Tmp);
   encodeSLEB128(Value, OSE);
   EmitBytes(OSE.str());
 }
 
-void MCStreamer::EmitValue(const MCExpr *Value, unsigned Size, SMLoc Loc) {
-  EmitValueImpl(Value, Size, Loc);
+void MCStreamer::EmitValue(const MCExpr *Value, unsigned Size, SMLoc Loc,
+                           bool Fixed) {
+  EmitValueImpl(Value, Size, Loc, Fixed);
 }
 
 void MCStreamer::EmitSymbolValue(const MCSymbol *Sym, unsigned Size,
                                  bool IsSectionRelative) {
   assert((!IsSectionRelative || Size == 4) &&
          "SectionRelative value requires 4-bytes");
 
   if (!IsSectionRelative)

 void MCStreamer::EmitLocalCommonSymbol(MCSymbol *Symbol, uint64_t Size,
                                        unsigned ByteAlignment) {}
 void MCStreamer::EmitTBSSSymbol(MCSection *Section, MCSymbol *Symbol,
                                 uint64_t Size, unsigned ByteAlignment) {}
 void MCStreamer::ChangeSection(MCSection *, const MCExpr *) {}
 void MCStreamer::EmitWeakReference(MCSymbol *Alias, const MCSymbol *Symbol) {}
 void MCStreamer::EmitBytes(StringRef Data) {}
 void MCStreamer::EmitBinaryData(StringRef Data) { EmitBytes(Data); }
-void MCStreamer::EmitValueImpl(const MCExpr *Value, unsigned Size, SMLoc Loc) {
+void MCStreamer::EmitValueImpl(const MCExpr *Value, unsigned Size, SMLoc Loc,
+                               bool Fixed) {
   visitUsedExpr(*Value);
 }
 void MCStreamer::EmitULEB128Value(const MCExpr *Value) {}
 void MCStreamer::EmitSLEB128Value(const MCExpr *Value) {}
 void MCStreamer::emitFill(const MCExpr &NumBytes, uint64_t Value, SMLoc Loc) {}
 void MCStreamer::emitFill(const MCExpr &NumValues, int64_t Size, int64_t Expr,
                           SMLoc Loc) {}
 void MCStreamer::EmitValueToAlignment(unsigned ByteAlignment, int64_t Value,

lib/MC/MCWasmStreamer.cpp

 }
 
 void MCWasmStreamer::EmitLocalCommonSymbol(MCSymbol *S, uint64_t Size,
                                            unsigned ByteAlignment) {
   llvm_unreachable("Local common symbols are not yet implemented for Wasm");
 }
 
 void MCWasmStreamer::EmitValueImpl(const MCExpr *Value, unsigned Size,
-                                   SMLoc Loc) {
-  MCObjectStreamer::EmitValueImpl(Value, Size, Loc);
+                                   SMLoc Loc, bool Fixed) {
+  MCObjectStreamer::EmitValueImpl(Value, Size, Loc, Fixed);
 }
 
 void MCWasmStreamer::EmitValueToAlignment(unsigned ByteAlignment, int64_t Value,
                                           unsigned ValueSize,
                                           unsigned MaxBytesToEmit) {
   MCObjectStreamer::EmitValueToAlignment(ByteAlignment, Value, ValueSize,
                                          MaxBytesToEmit);
 }

lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp

public:
   void EmitBytes(StringRef Data) override {
     EmitDataMappingSymbol();
     MCELFStreamer::EmitBytes(Data);
   }
 
   /// This is one of the functions used to emit data into an ELF section, so the
   /// AArch64 streamer overrides it to add the appropriate mapping symbol ($d)
   /// if necessary.
-  void EmitValueImpl(const MCExpr *Value, unsigned Size, SMLoc Loc) override {
+  void EmitValueImpl(const MCExpr *Value, unsigned Size, SMLoc Loc,
+                     bool Fixed) override {
     EmitDataMappingSymbol();
-    MCELFStreamer::EmitValueImpl(Value, Size, Loc);
+    MCELFStreamer::EmitValueImpl(Value, Size, Loc, Fixed);
   }
 
   void emitFill(const MCExpr &NumBytes, uint64_t FillValue,
                                   SMLoc Loc) override {
     EmitDataMappingSymbol();
     MCObjectStreamer::emitFill(NumBytes, FillValue, Loc);
   }
 private:

lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp

void FlushPendingMappingSymbol() {
     ElfMappingSymbolInfo *EMS = LastEMSInfo.get();
     EmitMappingSymbol("$d", EMS->Loc, EMS->F, EMS->Offset);
     EMS->resetInfo();
   }
 
   /// This is one of the functions used to emit data into an ELF section, so the
   /// ARM streamer overrides it to add the appropriate mapping symbol ($d) if
   /// necessary.
-  void EmitValueImpl(const MCExpr *Value, unsigned Size, SMLoc Loc) override {
+  void EmitValueImpl(const MCExpr *Value, unsigned Size, SMLoc Loc,
+                     bool Fixed) override {
     if (const MCSymbolRefExpr *SRE = dyn_cast_or_null<MCSymbolRefExpr>(Value)) {
       if (SRE->getKind() == MCSymbolRefExpr::VK_ARM_SBREL && !(Size == 4)) {
         getContext().reportError(Loc, "relocated expression must be 32-bit");
         return;
       }
       getOrCreateDataFragment();
     }
 
     EmitDataMappingSymbol();
-    MCELFStreamer::EmitValueImpl(Value, Size, Loc);
+    MCELFStreamer::EmitValueImpl(Value, Size, Loc, Fixed);
   }
 
   void EmitAssemblerFlag(MCAssemblerFlag Flag) override {
     MCELFStreamer::EmitAssemblerFlag(Flag);
 
     switch (Flag) {
     case MCAF_SyntaxUnified:
       return; // no-op here.

lib/Target/Mips/MCTargetDesc/MipsELFStreamer.h

public:
   /// Overriding this function allows us to dismiss all labels that are
   /// candidates for marking as microMIPS when .section directive is processed.
   void SwitchSection(MCSection *Section,
                      const MCExpr *Subsection = nullptr) override;
 
   /// Overriding these functions allows us to dismiss all labels that are
   /// candidates for marking as microMIPS when .word/.long/.4byte etc
   /// directives are emitted.
-  void EmitValueImpl(const MCExpr *Value, unsigned Size, SMLoc Loc) override;
+  void EmitValueImpl(const MCExpr *Value, unsigned Size, SMLoc Loc,
+                     bool Fixed) override;
   void EmitIntValue(uint64_t Value, unsigned Size) override;
 
   // Overriding these functions allows us to avoid recording of these labels
   // in EmitLabel and later marking them as microMIPS.
   void EmitCFIStartProcImpl(MCDwarfFrameInfo &Frame) override;
   void EmitCFIEndProcImpl(MCDwarfFrameInfo &Frame) override;
   MCSymbol *EmitCFILabel() override;
 

lib/Target/Mips/MCTargetDesc/MipsELFStreamer.cpp

 
 void MipsELFStreamer::SwitchSection(MCSection *Section,
                                     const MCExpr *Subsection) {
   MCELFStreamer::SwitchSection(Section, Subsection);
   Labels.clear();
 }
 
 void MipsELFStreamer::EmitValueImpl(const MCExpr *Value, unsigned Size,
-                                    SMLoc Loc) {
-  MCELFStreamer::EmitValueImpl(Value, Size, Loc);
+                                    SMLoc Loc, bool Fixed) {
+  MCELFStreamer::EmitValueImpl(Value, Size, Loc, Fixed);
   Labels.clear();
 }
 
 void MipsELFStreamer::EmitIntValue(uint64_t Value, unsigned Size) {
   MCELFStreamer::EmitIntValue(Value, Size);
   Labels.clear();
 }
 

test/DebugInfo/RISCV/relax-debug-frame.ll

 ; RUN: llc -filetype=obj -mtriple=riscv32 -mattr=+relax %s -o - \
 ; RUN:     | llvm-readobj -r | FileCheck -check-prefix=RELAX %s
 ;
 ; RELAX: .rela.{{eh|debug}}_frame {
-; RELAX: R_RISCV_ADD32
-; RELAX: R_RISCV_SUB32
-; RELAX: R_RISCV_SET6
-; RELAX: R_RISCV_SUB6
+; RELAX-NOT: 0x0 R_RISCV_ADD32
+; RELAX-NOT: 0x0 R_RISCV_SUB32
+; RELAX: 0x20 R_RISCV_ADD32
+; RELAX: 0x20 R_RISCV_SUB32
+; RELAX: 0x25 R_RISCV_SET6
+; RELAX: 0x25 R_RISCV_SUB6
 source_filename = "frame.c"
 
 ; Function Attrs: noinline nounwind optnone
 define i32 @init() {
 entry:
   ret i32 0
 }