[RISCV] Allow delayed decision for ADD/SUB relocations

[MaskRay]

Summary

For a label difference A-B in assembly, if A and B are separated by a
linker-relaxable instruction, we should emit a pair of ADD/SUB
relocations (e.g. R_RISCV_ADD32/R_RISCV_SUB32,
R_RISCV_ADD64/R_RISCV_SUB64).

However, the decision is made upfront at parsing time with inadequate
heuristics (requiresFixup). As a result, LLVM integrated assembler
incorrectly suppresses R_RISCV_ADD32/R_RISCV_SUB32 for the following
code:

// Simplified from a workaround https://android-review.googlesource.com/c/platform/art/+/2619609
// Both end and begin are not defined yet. We decide ADD/SUB relocations upfront and don't know they will be needed.
.4byte end-begin

begin:
  call foo
end:

To fix the bug, make two primary changes:

• Delete requiresFixups and the overridden emitValueImpl (from D103539). This deletion requires accurate evaluateAsAbolute (D153097).
• In MCAssembler::evaluateFixup, call handleAddSubRelocations to emit ADD/SUB relocations.

However, there is a remaining issue in
MCExpr.cpp:AttemptToFoldSymbolOffsetDifference. With MCAsmLayout, we may
incorrectly fold A-B even when A and B are separated by a
linker-relaxable instruction. This deficiency is acknowledged (see
D153097), but was previously bypassed by eagerly emitting ADD/SUB using
requiresFixups. To address this, we partially reintroduce canFold (from
D61584, removed by D103539).

Some expressions (e.g. .size and .fill) need to take the MCAsmLayout
code path in AttemptToFoldSymbolOffsetDifference, avoiding relocations
(weird, but matching GNU assembler and needed to match user
expectation). Switch to evaluateKnownAbsolute to leverage the InSet
condition.

As a bonus, this change allows for the removal of some relocations for
the FDE address_range field in the .eh_frame section.

riscv64-64b-pcrel.s contains the main test.
Add a linker relaxable instruction to dwarf-riscv-relocs.ll to test what
it intends to test.
Merge fixups-relax-diff.ll into fixups-diff.ll.

[MaskRay]

rebase after llvm-readobj patch landed

[kito-cheng]

LGTM, requiresFixups is the one of the hard to maintain and hard to understand function around there, and this patch removed that and handled it in better way :)

[asb]

One piece of this I'm struggling to follow a bit is evaluateKnownAbsolute and InSet. This InSet parameter doesn't have much in the way of documentation. I'm sure it's obvious to someone working in this code regularly, but could you please clarify the intended meaning of this parameter?

[MaskRay]

In D155357#4518986, @asb wrote:

One piece of this I'm struggling to follow a bit is evaluateKnownAbsolute and InSet. This InSet parameter doesn't have much in the way of documentation. I'm sure it's obvious to someone working in this code regularly, but could you please clarify the intended meaning of this parameter?

Even if I have stared at the code for quite some time, InSet is not so obvious to me...

My current understanding is:

Some expressions cannot use relocations (e.g., .size and .fill directives). They set InSet as a parameter in various methods in llvm/lib/MC/.
This makes expression evaluation different based on the context and should be generally avoided if possible.
This issue is aggravated by the fact that LLVMMC seems to misuse InSet and make InSet affect the behavior in situations where it doesn't need to.
Unfortunately, the uses are a bit messy. Additionally, InSet appears to be used as a workaround for Mach-O in some places, specifically related to its .subsections_via_symbols mechanism.

---

We can probably add this explanation above MCExpr::evaluateAsAbsolute. In some situations InSet can be removed. I'll try to clean this up further when I get more time.

[MaskRay]

I'll land this tomorrow:)

llvm/include/llvm/MC/MCAsmBackend.h

public:
   virtual bool evaluateTargetFixup(const MCAssembler &Asm,
                                    const MCAsmLayout &Layout,
                                    const MCFixup &Fixup, const MCFragment *DF,
                                    const MCValue &Target, uint64_t &Value,
                                    bool &WasForced) {
     llvm_unreachable("Need to implement hook if target has custom fixups");
   }
 
+  virtual bool handleAddSubRelocations(const MCAsmLayout &Layout,
+                                       const MCFragment &F,
+                                       const MCFixup &Fixup,
+                                       const MCValue &Target,
+                                       uint64_t &FixedValue) const {
+    return false;
+  }
+
   /// Apply the \p Value for given \p Fixup into the provided data fragment, at
   /// the offset specified by the fixup and following the fixup kind as
   /// appropriate. Errors (such as an out of range fixup value) should be
   /// reported via \p Ctx.
   /// The  \p STI is present only for fragments of type MCRelaxableFragment and
   /// MCDataFragment with hasInstructions() == true.
   virtual void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
                           const MCValue &Target, MutableArrayRef<char> Data,

llvm/lib/MC/MCAssembler.cpp

bool MCAssembler::evaluateFixup(const MCAsmLayout &Layout,
   }
 
   // Let the backend force a relocation if needed.
   if (IsResolved && getBackend().shouldForceRelocation(*this, Fixup, Target)) {
     IsResolved = false;
     WasForced = true;
   }
 
+  // A linker relaxation target may emit ADD/SUB relocations for A-B+C. Let
+  // recordRelocation handle non-VK_None cases like A@plt-B+C.
+  if (!IsResolved && Target.getSymA() && Target.getSymB() &&
+      Target.getSymA()->getKind() == MCSymbolRefExpr::VK_None &&
+      getBackend().handleAddSubRelocations(Layout, *DF, Fixup, Target, Value))
+    return true;
+
   return IsResolved;
 }
 
 uint64_t MCAssembler::computeFragmentSize(const MCAsmLayout &Layout,
                                           const MCFragment &F) const {
   assert(getBackendPtr() && "Requires assembler backend");
   switch (F.getKind()) {
   case MCFragment::FT_Data:
     return cast<MCDataFragment>(F).getContents().size();
   case MCFragment::FT_Relaxable:
     return cast<MCRelaxableFragment>(F).getContents().size();
   case MCFragment::FT_CompactEncodedInst:
     return cast<MCCompactEncodedInstFragment>(F).getContents().size();
   case MCFragment::FT_Fill: {
     auto &FF = cast<MCFillFragment>(F);
     int64_t NumValues = 0;
-    if (!FF.getNumValues().evaluateAsAbsolute(NumValues, Layout)) {
+    if (!FF.getNumValues().evaluateKnownAbsolute(NumValues, Layout)) {
       getContext().reportError(FF.getLoc(),
                                "expected assembly-time absolute expression");
       return 0;
     }
     int64_t Size = NumValues * FF.getValueSize();
     if (Size < 0) {
       getContext().reportError(FF.getLoc(), "invalid number of bytes");
       return 0;

llvm/lib/MC/MCExpr.cpp

static void AttemptToFoldSymbolOffsetDifference(
 
   const MCFragment *FA = SA.getFragment();
   const MCFragment *FB = SB.getFragment();
   const MCSection &SecA = *FA->getParent();
   const MCSection &SecB = *FB->getParent();
   if ((&SecA != &SecB) && !Addrs)
     return;
 
-  if (Layout) {
+  // When layout is available, we can generally compute the difference using the
+  // getSymbolOffset path, which also avoids the possible slow fragment walk.
+  // However, linker relaxation may cause incorrect fold of A-B if A and B are
+  // separated by a linker-relaxable instruction. If the section contains
+  // instructions and InSet is false (not expressions in directive like
+  // .size/.fill), disable the fast path.
+  if (Layout && (InSet || !SecA.hasInstructions() ||
+                 !Asm->getContext().getTargetTriple().isRISCV())) {
     // If both symbols are in the same fragment, return the difference of their
     // offsets. canGetFragmentOffset(FA) may be false.
     if (FA == FB && !SA.isVariable() && !SB.isVariable()) {
       Addend += SA.getOffset() - SB.getOffset();
       return FinalizeFolding();
     }
     // One of the symbol involved is part of a fragment being laid out. Quit now
     // to avoid a self loop.

llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h

bool shouldInsertFixupForCodeAlign(MCAssembler &Asm,
                                      const MCAsmLayout &Layout,
                                      MCAlignFragment &AF) override;
 
   bool evaluateTargetFixup(const MCAssembler &Asm, const MCAsmLayout &Layout,
                            const MCFixup &Fixup, const MCFragment *DF,
                            const MCValue &Target, uint64_t &Value,
                            bool &WasForced) override;
 
+  bool handleAddSubRelocations(const MCAsmLayout &Layout, const MCFragment &F,
+                               const MCFixup &Fixup, const MCValue &Target,
+                               uint64_t &FixedValue) const override;
+
   void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
                   const MCValue &Target, MutableArrayRef<char> Data,
                   uint64_t Value, bool IsResolved,
                   const MCSubtargetInfo *STI) const override;
 
   std::unique_ptr<MCObjectTargetWriter>
   createObjectTargetWriter() const override;
 

llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp

bool RISCVAsmBackend::relaxDwarfCFA(MCDwarfCallFrameFragment &DF,
   const MCExpr &AddrDelta = DF.getAddrDelta();
   SmallVectorImpl<char> &Data = DF.getContents();
   SmallVectorImpl<MCFixup> &Fixups = DF.getFixups();
   size_t OldSize = Data.size();
 
   int64_t Value;
   if (AddrDelta.evaluateAsAbsolute(Value, Layout.getAssembler()))
     return false;
-  bool IsAbsolute = AddrDelta.evaluateAsAbsolute(Value, Layout);
+  bool IsAbsolute = AddrDelta.evaluateKnownAbsolute(Value, Layout);
   assert(IsAbsolute && "CFA with invalid expression");
   (void)IsAbsolute;
 
   Data.clear();
   Fixups.clear();
   raw_svector_ostream OS(Data);
 
   assert(
bool RISCVAsmBackend::evaluateTargetFixup(
   if (shouldForceRelocation(Asm, *AUIPCFixup, AUIPCTarget)) {
     WasForced = true;
     return false;
   }
 
   return true;
 }
 
+bool RISCVAsmBackend::handleAddSubRelocations(const MCAsmLayout &Layout,
+                                              const MCFragment &F,
+                                              const MCFixup &Fixup,
+                                              const MCValue &Target,
+                                              uint64_t &FixedValue) const {
+  uint64_t FixedValueA, FixedValueB;
+  unsigned TA = 0, TB = 0;
+  switch (Fixup.getKind()) {
+  case llvm::FK_Data_1:
+    TA = ELF::R_RISCV_ADD8;
+    TB = ELF::R_RISCV_SUB8;
+    break;
+  case llvm::FK_Data_2:
+    TA = ELF::R_RISCV_ADD16;
+    TB = ELF::R_RISCV_SUB16;
+    break;
+  case llvm::FK_Data_4:
+    TA = ELF::R_RISCV_ADD32;
+    TB = ELF::R_RISCV_SUB32;
+    break;
+  case llvm::FK_Data_8:
+    TA = ELF::R_RISCV_ADD64;
+    TB = ELF::R_RISCV_SUB64;
+    break;
+  default:
+    llvm_unreachable("unsupported fixup size");
+  }
+  MCValue A = MCValue::get(Target.getSymA(), nullptr, Target.getConstant());
+  MCValue B = MCValue::get(Target.getSymB());
+  auto FA = MCFixup::create(
+      Fixup.getOffset(), nullptr,
+      static_cast<MCFixupKind>(FirstLiteralRelocationKind + TA));
+  auto FB = MCFixup::create(
+      Fixup.getOffset(), nullptr,
+      static_cast<MCFixupKind>(FirstLiteralRelocationKind + TB));
+  auto &Asm = Layout.getAssembler();
+  Asm.getWriter().recordRelocation(Asm, Layout, &F, FA, A, FixedValueA);
+  Asm.getWriter().recordRelocation(Asm, Layout, &F, FB, B, FixedValueB);
+  FixedValue = FixedValueA - FixedValueB;
+  return true;
+}
+
 void RISCVAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
                                  const MCValue &Target,
                                  MutableArrayRef<char> Data, uint64_t Value,
                                  bool IsResolved,
                                  const MCSubtargetInfo *STI) const {
   MCFixupKind Kind = Fixup.getKind();
   if (Kind >= FirstLiteralRelocationKind)
     return;

llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.h

 #define LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVELFSTREAMER_H
 
 #include "RISCVTargetStreamer.h"
 #include "llvm/MC/MCELFStreamer.h"
 
 using namespace llvm;
 
 class RISCVELFStreamer : public MCELFStreamer {
-  static bool requiresFixups(MCContext &C, const MCExpr *Value,
-                             const MCExpr *&LHS, const MCExpr *&RHS);
   void reset() override;
 
 public:
   RISCVELFStreamer(MCContext &C, std::unique_ptr<MCAsmBackend> MAB,
                    std::unique_ptr<MCObjectWriter> MOW,
                    std::unique_ptr<MCCodeEmitter> MCE)
       : MCELFStreamer(C, std::move(MAB), std::move(MOW), std::move(MCE)) {}
-
-  void emitValueImpl(const MCExpr *Value, unsigned Size, SMLoc Loc) override;
 };
 
 namespace llvm {
 
 class RISCVTargetELFStreamer : public RISCVTargetStreamer {
 private:
   StringRef CurrentVendor;
 

llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp

void RISCVTargetELFStreamer::reset() {
   AttributeSection = nullptr;
 }
 
 void RISCVTargetELFStreamer::emitDirectiveVariantCC(MCSymbol &Symbol) {
   getStreamer().getAssembler().registerSymbol(Symbol);
   cast<MCSymbolELF>(Symbol).setOther(ELF::STO_RISCV_VARIANT_CC);
 }
 
-bool RISCVELFStreamer::requiresFixups(MCContext &C, const MCExpr *Value,
-                                      const MCExpr *&LHS, const MCExpr *&RHS) {
-  const auto *MBE = dyn_cast<MCBinaryExpr>(Value);
-  if (MBE == nullptr)
-    return false;
-
-  MCValue E;
-  if (!Value->evaluateAsRelocatable(E, nullptr, nullptr))
-    return false;
-  if (E.getSymA() == nullptr || E.getSymB() == nullptr)
-    return false;
-
-  const auto &A = E.getSymA()->getSymbol();
-  const auto &B = E.getSymB()->getSymbol();
-
-  LHS = MCBinaryExpr::create(MCBinaryExpr::Add, MCSymbolRefExpr::create(&A, C),
-                             MCConstantExpr::create(E.getConstant(), C), C);
-  RHS = E.getSymB();
-
-  // Avoid ADD/SUB if Kind is not VK_None, e.g. A@plt - B + C.
-  if (E.getSymA()->getKind() != MCSymbolRefExpr::VK_None)
-    return false;
-
-  // If either symbol is in a text section, we need to delay the relocation
-  // evaluation as relaxation may alter the size of the symbol.
-  //
-  // Unfortunately, we cannot identify if the symbol was built with relaxation
-  // as we do not track the state per symbol or section.  However, BFD will
-  // always emit the relocation and so we follow suit which avoids the need to
-  // track that information.
-  if (A.isInSection() && A.getSection().getKind().isText())
-    return true;
-  if (B.isInSection() && B.getSection().getKind().isText())
-    return true;
-
-  // If A is undefined and B is defined, we should emit ADD/SUB for A-B.
-  // Unfortunately, A may be defined later, but this requiresFixups call has to
-  // eagerly make a decision. For now, emit ADD/SUB unless A is .L*. This
-  // heuristic handles many temporary label differences for .debug_* and
-  // .apple_types sections.
-  //
-  // TODO Implement delayed relocation decision.
-  if (!A.isInSection() && !A.isTemporary() && B.isInSection())
-    return true;
-
-  // Support cross-section symbolic differences ...
-  return A.isInSection() && B.isInSection() &&
-         A.getSection().getName() != B.getSection().getName();
-}
-
 void RISCVELFStreamer::reset() {
   static_cast<RISCVTargetStreamer *>(getTargetStreamer())->reset();
   MCELFStreamer::reset();
 }
 
-void RISCVELFStreamer::emitValueImpl(const MCExpr *Value, unsigned Size,
-                                     SMLoc Loc) {
-  const MCExpr *A, *B;
-  if (!requiresFixups(getContext(), Value, A, B))
-    return MCELFStreamer::emitValueImpl(Value, Size, Loc);
-
-  MCStreamer::emitValueImpl(Value, Size, Loc);
-
-  MCDataFragment *DF = getOrCreateDataFragment();
-  flushPendingLabels(DF, DF->getContents().size());
-  MCDwarfLineEntry::make(this, getCurrentSectionOnly());
-
-  MCFixupKind Add, Sub;
-  std::tie(Add, Sub) = RISCV::getRelocPairForSize(Size);
-
-  DF->getFixups().push_back(
-      MCFixup::create(DF->getContents().size(), A, Add, Loc));
-  DF->getFixups().push_back(
-      MCFixup::create(DF->getContents().size(), B, Sub, Loc));
-
-  DF->getContents().resize(DF->getContents().size() + Size, 0);
-}
-
 namespace llvm {
 MCELFStreamer *createRISCVELFStreamer(MCContext &C,
                                       std::unique_ptr<MCAsmBackend> MAB,
                                       std::unique_ptr<MCObjectWriter> MOW,
                                       std::unique_ptr<MCCodeEmitter> MCE,
                                       bool RelaxAll) {
   RISCVELFStreamer *S =
       new RISCVELFStreamer(C, std::move(MAB), std::move(MOW), std::move(MCE));
   S->getAssembler().setRelaxAll(RelaxAll);
   return S;
 }
 } // namespace llvm

llvm/test/CodeGen/RISCV/fixups-diff.ll

 ; RUN: llc -filetype=obj -mtriple=riscv32 -mattr=+relax %s -o - \
 ; RUN:     | llvm-readobj -r - | FileCheck %s
 ; RUN: llc -filetype=obj -mtriple=riscv32 -mattr=-relax %s -o - \
 ; RUN:     | llvm-readobj -r - | FileCheck %s
 
-; Check that a difference between two symbols in the same fragment
-; causes relocations to be emitted.
-;
-; This specific test is checking that the size of the function in
-; the debug information is represented by a relocation. This isn't
-; an assembly test as the assembler takes a different path through
-; LLVM, which is already covered by the fixups-expr.s test.
+;; b-a in the inline asm is unaffected by linker relaxation, so we don't emit
+;; relocations.
+
+;; b-a in the inline asm and DW_AT_high_pc are unaffected by linker relaxation,
+;; so we don't emit ADD/SUB relocations.
+;; See also MC/RISCV/fixups-expr.s.
 
 source_filename = "tmp.c"
 target datalayout = "e-m:e-p:32:32-i64:64-n32-S128"
 target triple = "riscv32"
 
 define i32 @main() !dbg !7 {
 entry:
   %retval = alloca i32, align 4
   store i32 0, ptr %retval, align 4
+  call void asm sideeffect "a:\0Ab:\0A.dword b-a", ""()
   ret i32 0
 }
 
 ; CHECK:      Section {{.*}} .rela.debug_info {
-; CHECK:        0x22 R_RISCV_ADD32 <null> 0x0
-; CHECK-NEXT:   0x22 R_RISCV_SUB32 <null> 0x0
-; CHECK:        0x2B R_RISCV_ADD32 <null> 0x0
-; CHECK-NEXT:   0x2B R_RISCV_SUB32 <null> 0x0
+; CHECK-NOT:         R_RISCV_ADD32
 ; CHECK:      }
 
 ; CHECK:      Section {{.*}} .rela.eh_frame {
-; CHECK:        0x1C R_RISCV_32_PCREL <null> 0x0
-; CHECK:        0x20 R_RISCV_ADD32 <null> 0x0
-; CHECK-NEXT:   0x20 R_RISCV_SUB32 <null> 0x0
-; CHECK:      }
+; CHECK-NEXT:   0x1C R_RISCV_32_PCREL <null> 0x0
+; CHECK-NEXT: }
 
 !llvm.dbg.cu = !{!0}
 !llvm.module.flags = !{!3, !4, !5}
 !llvm.ident = !{!6}
 
 !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
 !1 = !DIFile(filename: "fixups-diff.ll", directory: "test/MC/RISCV")
 !2 = !{}

llvm/test/CodeGen/RISCV/fixups-relax-diff.ll

-; RUN: llc -filetype=obj -mtriple=riscv32 -mattr=+relax %s -o - | llvm-readobj -r - | FileCheck %s
-; RUN: llc -filetype=obj -mtriple=riscv32 -mattr=-relax %s -o - | llvm-readobj -r - | FileCheck %s
-
-; This test checks that a diff inserted via inline assembly always causes
-; relocations. This isn't an assembly test as the assembler takes a different
-; path through LLVM, which is already covered by the fixups-expr.s test.
-
-define i32 @main() nounwind {
-entry:
-  %retval = alloca i32, align 4
-  store i32 0, ptr %retval, align 4
-  ; CHECK: R_RISCV_ADD64 b
-  ; CHECK-NEXT: R_RISCV_SUB64 a
-  call void asm sideeffect "a:\0Ab:\0A.dword b-a", ""()
-  ret i32 0
-}

llvm/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll

 ; DWARF-DUMP-NEXT:            name: "dwarf-riscv-relocs.c"
 ; DWARF-DUMP-NEXT:       dir_index: 0
 ; DWARF-DUMP-NEXT:    md5_checksum: 05ab89f5481bc9f2d037e7886641e919
 ; DWARF-DUMP-NEXT:          source: "int main()\n{\n    return 0;\n}\n"
 ; DWARF-DUMP-EMPTY:
 ; DWARF-DUMP-NEXT: Address            Line   Column File   ISA Discriminator OpIndex Flags
 ; DWARF-DUMP-NEXT: ------------------ ------ ------ ------ --- ------------- ------- -------------
 ; DWARF-DUMP-NEXT: 0x0000000000000000      2      0      0   0             0       0  is_stmt
-; DWARF-DUMP-NEXT: 0x0000000000000014      3      5      0   0             0       0  is_stmt prologue_end
-; DWARF-DUMP-NEXT: 0x0000000000000020      3      5      0   0             0       0  epilogue_begin
-; DWARF-DUMP-NEXT: 0x0000000000000028      3      5      0   0             0       0  end_sequence
+; DWARF-DUMP-NEXT: 0x000000000000001c      3      5      0   0             0       0  is_stmt prologue_end
+; DWARF-DUMP-NEXT: 0x0000000000000028      3      5      0   0             0       0  epilogue_begin
+; DWARF-DUMP-NEXT: 0x0000000000000030      3      5      0   0             0       0  end_sequence
 
 ; ModuleID = 'dwarf-riscv-relocs.c'
 source_filename = "dwarf-riscv-relocs.c"
 target datalayout = "e-m:e-p:32:32-i64:64-n32-S128"
 target triple = "riscv32"
 
 ; Function Attrs: noinline nounwind optnone
 define dso_local i32 @main() #0 !dbg !7 {
 entry:
+  call void @ext()
   %retval = alloca i32, align 4
   store i32 0, ptr %retval, align 4
   ret i32 0, !dbg !11
 }
 
+declare void @ext()
+
 attributes #0 = { noinline nounwind optnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-features"="+relax" "unsafe-fp-math"="false" "use-soft-float"="false" }
 
 !llvm.dbg.cu = !{!0}
 !llvm.module.flags = !{!3, !4, !5}
 !llvm.ident = !{!6}
 
 !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, nameTableKind: None)
 !1 = !DIFile(filename: "dwarf-riscv-relocs.c", directory: ".", checksumkind: CSK_MD5, checksum: "05ab89f5481bc9f2d037e7886641e919", source: "int main()\0A{\0A    return 0;\0A}\0A")

llvm/test/DebugInfo/RISCV/relax-debug-frame.ll

 ; RUN: llc -filetype=obj -mtriple=riscv32 -mattr=+relax %s -o %t.o
 ; RUN: llvm-readobj -r %t.o | FileCheck -check-prefix=RELAX %s
 ; RUN: llvm-dwarfdump --debug-frame %t.o 2>&1 \
 ; RUN:     | FileCheck -check-prefix=RELAX-DWARFDUMP %s
 ;
 ; RELAX:      Section ({{.*}}) .rela.eh_frame {
 ; RELAX-NEXT:   0x1C R_RISCV_32_PCREL <null> 0x0
-; RELAX-NEXT:   0x20 R_RISCV_ADD32 <null> 0x0
-; RELAX-NEXT:   0x20 R_RISCV_SUB32 <null> 0x0
 ; RELAX-NEXT:   0x30 R_RISCV_32_PCREL <null> 0x0
-; RELAX-NEXT:   0x34 R_RISCV_ADD32 <null> 0x0
-; RELAX-NEXT:   0x34 R_RISCV_SUB32 <null> 0x0
 ; RELAX-NEXT:   0x44 R_RISCV_32_PCREL <null> 0x0
 ; RELAX-NEXT:   0x48 R_RISCV_ADD32 <null> 0x0
 ; RELAX-NEXT:   0x48 R_RISCV_SUB32 <null> 0x0
 ; RELAX-NEXT:  }
 
 ; RELAX-DWARFDUMP-NOT: error: failed to compute relocation
 ; RELAX-DWARFDUMP:      FDE
 ; RELAX-DWARFDUMP-NEXT: Format:

llvm/test/ExecutionEngine/JITLink/RISCV/anonymous_symbol.s

 # REQUIRES: asserts
 # RUN: llvm-mc -triple=riscv64 -filetype=obj -o %t %s
 # RUN: llvm-jitlink -debug-only=jitlink -noexec %t 2>&1 | FileCheck %s
 #
 # Because of the exist of cfi directive, sections like eh_frame section will be emitted
 # in llvm's object code emission phase. Anonymous symbols will also be emitted to indicate
 # the section start and section end. So that by relocating these symbol, the section length
 # can be calculated.
 #
 # CHECK: Creating defined graph symbol for ELF symbol ""
-# CHECK: Creating defined graph symbol for ELF symbol ""
+# CHECK: Creating defined graph symbol for ELF symbol "main"
         .text
         .globl main
         .p2align 2
         .type main,@function
 main:
         .cfi_startproc
         ret
         .Lfunc_end0:
         .size main, .Lfunc_end0-main
         .cfi_endproc

llvm/test/MC/ELF/RISCV/gen-dwarf.s

 ## Linker relaxation imposes restrictions on .eh_frame/.debug_frame, .debug_line,
 ## and LEB128 uses.
 
 ## CFI instructions can be preceded by relaxable instructions. We must use
 ## DW_CFA_advance_loc* opcodes with relocations.
 
 ## For .debug_line, emit DW_LNS_fixed_advance_pc with ADD16/SUB16 relocations so
 ## that .debug_line can be fixed by the linker. Without linker relaxation, we can
 ## emit special opcodes to make .debug_line smaller, but we don't do this for
 ## consistency.
 
 # RUN: llvm-mc -filetype=obj -triple=riscv64 -g -dwarf-version=5 -mattr=+relax < %s -o %t
 # RUN: llvm-dwarfdump -eh-frame -debug-line -debug-rnglists -v %t | FileCheck %s
-# RUN: llvm-readobj -r %t | FileCheck %s --check-prefix=RELOC
+# RUN: llvm-readobj -r -x .eh_frame %t | FileCheck %s --check-prefix=RELOC
 
 # CHECK:      FDE
 # CHECK-NEXT: Format:       DWARF32
 # CHECK-NEXT: DW_CFA_advance_loc: 16
 # CHECK-NEXT: DW_CFA_def_cfa_offset: +32
 # CHECK-NEXT: DW_CFA_advance_loc: 4
 # CHECK-NEXT: DW_CFA_offset: X1 -8
 # CHECK-NEXT: DW_CFA_nop:

 
 # RELOC:      Section ([[#]]) .rela.eh_frame {
 # RELOC-NEXT:   0x1C R_RISCV_32_PCREL <null> 0x0
 # RELOC-NEXT:   0x20 R_RISCV_ADD32 <null> 0x0
 # RELOC-NEXT:   0x20 R_RISCV_SUB32 <null> 0x0
 # RELOC-NEXT:   0x25 R_RISCV_SET6 <null> 0x0
 # RELOC-NEXT:   0x25 R_RISCV_SUB6 <null> 0x0
 # RELOC-NEXT:   0x34 R_RISCV_32_PCREL <null> 0x0
-# RELOC-NEXT:   0x38 R_RISCV_ADD32 <null> 0x0
-# RELOC-NEXT:   0x38 R_RISCV_SUB32 <null> 0x0
 # RELOC-NEXT: }
 
 ## TODO A section needs two relocations.
 # RELOC:      Section ([[#]]) .rela.debug_rnglists {
 # RELOC-NEXT:   0xD R_RISCV_64 .text.foo 0x0
 # RELOC-NEXT:   0x17 R_RISCV_64 .text.bar 0x0
 # RELOC-NEXT: }
 
 # RELOC:      Section ([[#]]) .rela.debug_line {
 # RELOC:        R_RISCV_ADD16 <null> 0x0
 # RELOC-NEXT:   R_RISCV_SUB16 <null> 0x0
 # RELOC-NEXT:   R_RISCV_ADD16 <null> 0x0
 # RELOC-NEXT:   R_RISCV_SUB16 <null> 0x0
 # RELOC-NEXT:   R_RISCV_ADD16 <null> 0x0
 # RELOC-NEXT:   R_RISCV_SUB16 <null> 0x0
 # RELOC:      }
 
+# RELOC:      Hex dump of section '.eh_frame':
+# RELOC-NEXT: 0x00000000
+# RELOC-NEXT: 0x00000010
+# RELOC-NEXT: 0x00000020
+# RELOC-NEXT: 0x00000030 30000000 00000000 04000000 00000000
+#                                          ^ address_range
+
 .section .text.foo,"ax"
 .globl foo
 foo:
 .cfi_startproc
 .Lpcrel_hi0:
   auipc a1, %pcrel_hi(g)
   lw a1, %pcrel_lo(.Lpcrel_hi0)(a1)
   bge a1, a0, .LBB0_2

llvm/test/MC/RISCV/cfi-advance.s

 # RUN: llvm-mc -filetype=obj -triple riscv32 %s -o %t.o  
 # RUN: llvm-readobj -r %t.o | FileCheck -check-prefix=CHECK %s
 # RUN: llvm-dwarfdump --debug-frame %t.o 2>&1 \
 # RUN:     | FileCheck -check-prefix=CHECK-DWARFDUMP %s
 
 # CHECK:      .rela.eh_frame {
 # CHECK-NEXT:   0x1C R_RISCV_32_PCREL <null> 0x0
-# CHECK-NEXT:   0x20 R_RISCV_ADD32 <null> 0x0
-# CHECK-NEXT:   0x20 R_RISCV_SUB32 <null> 0x0
 # CHECK-NEXT: }
-# CHECK-DWARFDUMP: DW_CFA_advance_loc1
-# CHECK-DWARFDUMP-NEXT: DW_CFA_def_cfa_offset
-# CHECK-DWARFDUMP-NEXT: DW_CFA_advance_loc2
-# CHECK-DWARFDUMP-NEXT: DW_CFA_def_cfa_offset
-# CHECK-DWARFDUMP-NEXT: DW_CFA_advance_loc4
-# CHECK-DWARFDUMP-NEXT: DW_CFA_def_cfa_offset
+# CHECK-DWARFDUMP: DW_CFA_advance_loc1: 104
+# CHECK-DWARFDUMP-NEXT: DW_CFA_def_cfa_offset: +8
+# CHECK-DWARFDUMP-NEXT: DW_CFA_advance_loc2: 259
+# CHECK-DWARFDUMP-NEXT: DW_CFA_def_cfa_offset: +8
+# CHECK-DWARFDUMP-NEXT: DW_CFA_advance_loc4: 65539
+# CHECK-DWARFDUMP-NEXT: DW_CFA_def_cfa_offset: +8
         .text
         .globl  test                            # -- Begin function test
         .p2align        1
         .type   test,@function
 test:
         .cfi_startproc
         nop
         .zero 100, 0x90

llvm/test/MC/RISCV/fde-reloc.s

 # RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+relax < %s \
-# RUN:     | llvm-readobj -r - | FileCheck %s
+# RUN:     | llvm-readobj -r -x .eh_frame - | FileCheck %s
 # RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=-relax < %s \
-# RUN:     | llvm-readobj -r - | FileCheck %s
+# RUN:     | llvm-readobj -r -x .eh_frame - | FileCheck %s
 
 # Ensure that the eh_frame records the symbolic difference with the paired
 # relocations always.
 
 func:
   .cfi_startproc
   ret
   .cfi_endproc
 
 # CHECK:   Section (4) .rela.eh_frame {
 # CHECK-NEXT:   0x1C R_RISCV_32_PCREL <null> 0x0
-# CHECK-NEXT:   0x20 R_RISCV_ADD32 <null> 0x0
-# CHECK-NEXT:   0x20 R_RISCV_SUB32 <null> 0x0
 # CHECK-NEXT: }
+# CHECK:      Hex dump of section '.eh_frame':
+# CHECK-NEXT: 0x00000000 10000000 00000000 017a5200 017c0101
+# CHECK-NEXT: 0x00000010 1b0c0200 10000000 18000000 00000000
+# CHECK-NEXT: 0x00000020 04000000 00000000
+#                        ^ address_range

llvm/test/MC/RISCV/fixups-expr.s

 # RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+relax %s \
 # RUN:     | llvm-readobj -r - | FileCheck -check-prefix RELAX %s
 # RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=-relax %s \
-# RUN:     | llvm-readobj -r - | FileCheck -check-prefix RELAX %s
+# RUN:     | llvm-readobj -r - | FileCheck -check-prefix NORELAX %s
 
 # RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+relax %s \
 # RUN:     | llvm-readobj -r - | FileCheck -check-prefix RELAX %s
 # RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=-relax %s \
-# RUN:     | llvm-readobj -r - | FileCheck -check-prefix RELAX %s
+# RUN:     | llvm-readobj -r - | FileCheck -check-prefix NORELAX %s
 
-# Check that subtraction expressions are emitted as two relocations always.
+# NORELAX:      Relocations [
+# NORELAX-NEXT:   .rela.text {
+# NORELAX-NEXT:     R_RISCV_CALL_PLT
+# NORELAX-NEXT:   }
+# NORELAX-NEXT: ]
 
 .globl G1
 .globl G2
 .L1:
 G1:
-addi a0, a0, 0
+  call extern
 .L2:
 G2:
 
 .data
 .dword .L2-.L1
 .dword G2-G1
 .word .L2-.L1
 .word G2-G1

llvm/test/MC/RISCV/riscv64-64b-pcrel.s

-# RUN: llvm-mc -triple riscv64-unknown-linux-gnu -filetype obj -o - %s \
-# RUN:   | llvm-readobj -r - | FileCheck %s
-# RUN: not llvm-mc -triple riscv64-unknown-linux-gnu -filetype obj --defsym ERR=1 -o /dev/null %s 2>&1 \
-# RUN:   | FileCheck %s --check-prefix=ERROR
+# RUN: llvm-mc -triple riscv64-unknown-linux-gnu -filetype obj %s -o %t
+# RUN: llvm-readobj -r %t | FileCheck %s
+# RUN: llvm-objdump -s %t | FileCheck %s --check-prefix=CONTENT
 
 # CHECK:      Relocations [
 # CHECK-NEXT:   Section ({{.*}}) .rela.note {
 # CHECK-NEXT:     0x0 R_RISCV_ADD64 extern 0x0
 # CHECK-NEXT:     0x0 R_RISCV_SUB64 note 0x0
 # CHECK-NEXT:   }
 # CHECK-NEXT:   Section ({{.*}}) .rela.rodata {
 # CHECK-NEXT:     0x0 R_RISCV_ADD64 extern 0x0
 # CHECK-NEXT:     0x0 R_RISCV_SUB64 rodata 0x0
 # CHECK-NEXT:   }
 # CHECK-NEXT:   Section ({{.*}}) .rela.alloc_w {
 # CHECK-NEXT:     0x0 R_RISCV_ADD64 extern 0x0
 # CHECK-NEXT:     0x0 R_RISCV_SUB64 w 0x0
 # CHECK-NEXT:     0x8 R_RISCV_ADD64 w 0x0
 # CHECK-NEXT:     0x8 R_RISCV_SUB64 extern 0x0
 # CHECK-NEXT:     0x10 R_RISCV_ADD32 x 0x0
 # CHECK-NEXT:     0x10 R_RISCV_SUB32 w 0x0
-# CHECK-NEXT:     0x14 R_RISCV_ADD32 w1 0x0
-# CHECK-NEXT:     0x14 R_RISCV_SUB32 w 0x0
 # CHECK-NEXT:     0x18 R_RISCV_ADD32 .L.str 0x0
 # CHECK-NEXT:     0x18 R_RISCV_SUB32 w 0x0
 # CHECK-NEXT:   }
 # CHECK-NEXT:   Section ({{.*}}) .rela.alloc_x {
 # CHECK-NEXT:     0x0 R_RISCV_ADD64 y 0x0
 # CHECK-NEXT:     0x0 R_RISCV_SUB64 x 0x0
 # CHECK-NEXT:   }
 # CHECK-NEXT:   Section ({{.*}}) .rela.alloc_y {
 # CHECK-NEXT:     0x0 R_RISCV_ADD64 x 0x0
 # CHECK-NEXT:     0x0 R_RISCV_SUB64 y 0x0
 # CHECK-NEXT:   }
 # CHECK-NEXT:   Section ({{.*}}) .rela.nonalloc_w {
 # CHECK-NEXT:     0x0 R_RISCV_ADD64 extern 0x0
 # CHECK-NEXT:     0x0 R_RISCV_SUB64 nw 0x0
+# CHECK-NEXT:     0x8 R_RISCV_ADD64 nw 0x0
+# CHECK-NEXT:     0x8 R_RISCV_SUB64 extern 0x0
 # CHECK-NEXT:   }
 # CHECK-NEXT:   Section ({{.*}}) .rela.nonalloc_x {
 # CHECK-NEXT:     0x0 R_RISCV_ADD64 ny 0x0
 # CHECK-NEXT:     0x0 R_RISCV_SUB64 nx 0x0
 # CHECK-NEXT:   }
 # CHECK-NEXT:   Section ({{.*}}) .rela.nonalloc_y {
 # CHECK-NEXT:     0x0 R_RISCV_ADD64 nx 0x0
 # CHECK-NEXT:     0x0 R_RISCV_SUB64 ny 0x0
 # CHECK-NEXT:   }
 # CHECK-NEXT: ]
 
+# CONTENT:      Contents of section .alloc_w:
+# CONTENT-NEXT:  0000 00000000 00000000 00000000 00000000
+# CONTENT-NEXT:  0010 00000000 1c000000 00000000
+
 .section .note,"a",@note; note:
 .quad extern-note
 .section .rodata,"a",@progbits; rodata:
 .quad extern-rodata
 
 .section .alloc_w,"aw",@progbits; w:
 .quad extern-w   # extern is undefined
 .quad w-extern
 .long x-w        # A is later defined in another section
 .long w1-w       # A is later defined in the same section
 .long .L.str-w   # A is temporary
 w1:
 
 .section .alloc_x,"aw",@progbits; x:
 .quad y-x
 .section .alloc_y,"aw",@progbits; y:
 .quad x-y
 
 .section .nonalloc_w; nw:
 .quad extern-nw
-.ifdef ERR
-# ERROR: :[[#@LINE+1]]:7: error: symbol 'extern' can not be undefined in a subtraction expression
 .quad nw-extern
-.endif
 .section .nonalloc_x; nx:
 .quad ny-nx
 .section .nonalloc_y; ny:
 .quad nx-ny
 
 ## -gdwarf-aranges generated assembly expects no relocation.
 ## Otherwise, a .Lsec_end0 symbol (defined at the end of .rodata.str1.1)
 ## will be rejected by linkers.