[MachineBasicBlock] Explicit FT branching param

[gandhi21299]

Summary

Introduce a parameter in getFallThrough() to optionally
allow returning the fall through basic block in spite of
an explicit branch instruction to it. This parameter is
set to false by default.

Introduce getLogicalFallThrough() which calls
getFallThrough(false) to obtain the block while avoiding
insertion of a jump instruction to its immediate successor.

This patch also reverts the changes made by D134557 and
solves the case where a jump is inserted after another jump
(branch-relax-no-terminators.mir).

[arsenm]

llvm/lib/CodeGen/BranchRelaxation.cpp

499–503

Can you factor this into something that looks like MachineBasicBlock::isReturnBlock, except for indirect branches?

[gandhi21299]

llvm/lib/CodeGen/BranchRelaxation.cpp

499–503

Doesn't look like MachineBasicBlock has any method for indirect branches.

[gandhi21299]

applied clang-format

[gandhi21299]

ping

[gandhi21299]

Passed PSDB

[efriedma]

llvm/lib/CodeGen/BranchRelaxation.cpp

501

This condition doesn't seem right.

The point of the existing code is to handle fallthrough from PrevBB to DestBB: we're inserting a block between those two blocks, so any fallthrough must be rewritten to a direct branch. We can only skip this if we can prove there isn't any fallthrough.

isIndirectBranch() doesn't prove there isn't any fallthrough; whether a branch is indirect isn't related to whether it's conditional. MachineBasicBlock::canFallThrough() is probably appropriate.

[gandhi21299]

• Use getFallThrough() instead of checking for indirect branches.
• Revert changes from D134557 and use an updated getFallThrough(..) where a param is set to true/false for explicit branching to fallthrough basic block. Allow explicit branching to fallthrough by default.

[gandhi21299]

• Apply clang-format

[gandhi21299]

ping

[gandhi21299]

llvm/lib/CodeGen/MachineBasicBlock.cpp

973–974

Thoughts on this change? @arsenm @efriedma

[arsenm]

llvm/include/llvm/CodeGen/MachineBasicBlock.h

780

ExplicitFT isn't the right name. It's an unconditional branch. Introduce another name, maybe getFallthroughOrUnconditionalSuccessor?

[gandhi21299]

llvm/include/llvm/CodeGen/MachineBasicBlock.h

780

Sorry, do you mean for the method name or the parameter?

[arsenm]

llvm/include/llvm/CodeGen/MachineBasicBlock.h

780

Separate method name, the parameter also should be something else if you leave it here as an implementation detail

[gandhi21299]

• Renamed the method and parameter name, as requested by reviewer

[gandhi21299]

• Applied clang-format

[foad]

llvm/test/CodeGen/AMDGPU/branch-relax-indirect-branch.mir

2

What is this new test testing? If it's a change in behaviour caused by your patch then please (a) precommit the test and (b) update the summary to explain what the change is.

[gandhi21299]

llvm/test/CodeGen/AMDGPU/branch-relax-indirect-branch.mir

2

Do you mean to commit a patch which only contains the changes in branch-relax-indirect-branch.mir? That would cause this test to fail.

Before this patch, getFallThrough() was essentially expanded in the branch relaxation pass which fixed a double terminator bug (D134557). As a result, an indirect branch instruction caused SIInstrInfo::analyzeBranchImpl(..) to return true which further reported a fatal error. This patch reverts changes made by D134557 and fixes both issues by introducing a parameter to the method MachineBasicBlock::getFallThroughOrUnonditionalSuccessor(..).

[foad]

The summary still doesn't explain that there was a bug, and how you fixed it. It makes it sound like you have just tweaked the API of some helper function.

[gandhi21299]

ping

[arsenm]

llvm/include/llvm/CodeGen/MachineBasicBlock.h

781

getFallThrough should exist as it did before, the other uses should not need updating

[gandhi21299]

llvm/include/llvm/CodeGen/MachineBasicBlock.h

781

How does MachineBasicBlock::getFallThrough(bool AllowUncondSucc = true) sound?

[gandhi21299]

Renamed getFallThroughOrUnconditionalSuccessor(..) back to getFallThrough(..)

[gandhi21299]

ping

[gandhi21299]

ping

[arsenm]

llvm/include/llvm/CodeGen/MachineBasicBlock.h

781

I was looking for that as an implementation detail with two separate method names for the two behaviors

[gandhi21299]

Thanks for the review, I will commit this patch.

[gandhi21299]

• Added getLogicalFallThrough() which calls getFallThrough(true).
• Renamed the param for getFallThrough().

[dhoekwater]

/// Return the fallthrough block if the block can implicitly
/// transfer control to the block after it by falling off the end of
/// it. If an explicit branch to the fallthrough block is not allowed,
/// set JumpToFallThrough to be false. Non-null return is a conservative
/// answer.
MachineBasicBlock *getFallThrough(bool JumpToFallThrough = false);

The documentation for this function seems at odds with the behavior.

The documentation suggests that, if JumpToFallThrough is false, then getFallThrough will return a nullptr if the basic block ends with an explicit branch to the fallthrough block.

However, the opposite is true. For a block that ends in an unconditional jump to the fallthrough block, if JumpToFallThrough == true, then the function will return nullptr. If JumpToFallThrough == false, then it will return the address of the fallthrough block.

Is this the intended behavior?

[gandhi21299]

In D140790#4257115, @dhoekwater wrote:

/// Return the fallthrough block if the block can implicitly
/// transfer control to the block after it by falling off the end of
/// it. If an explicit branch to the fallthrough block is not allowed,
/// set JumpToFallThrough to be false. Non-null return is a conservative
/// answer.
MachineBasicBlock *getFallThrough(bool JumpToFallThrough = false);

The documentation for this function seems at odds with the behavior.

The documentation suggests that, if JumpToFallThrough is false, then getFallThrough will return a nullptr if the basic block ends with an explicit branch to the fallthrough block.

However, the opposite is true. For a block that ends in an unconditional jump to the fallthrough block, if JumpToFallThrough == true, then the function will return nullptr. If JumpToFallThrough == false, then it will return the address of the fallthrough block.

Is this the intended behavior?

You're right! I will revert this patch and re-merge it with the corrected documentation.

[gandhi21299]

Submitted a new patch: https://reviews.llvm.org/D148139

llvm/include/llvm/CodeGen/MachineBasicBlock.h

public:
   const MachineBasicBlock *getSingleSuccessor() const;
   MachineBasicBlock *getSingleSuccessor() {
     return const_cast<MachineBasicBlock *>(
         static_cast<const MachineBasicBlock *>(this)->getSingleSuccessor());
   }
 
   /// Return the fallthrough block if the block can implicitly
   /// transfer control to the block after it by falling off the end of
-  /// it.  This should return null if it can reach the block after
-  /// it, but it uses an explicit branch to do so (e.g., a table
-  /// jump).  Non-null return  is a conservative answer.
-  MachineBasicBlock *getFallThrough();
+  /// it. If an explicit branch to the fallthrough block is not allowed,
+  /// set AllowUncondSucc to be false. Non-null return is a conservative answer.
+  MachineBasicBlock *getFallThroughOrUnconditionalSuccessor(bool AllowUncondSucc = true);
 
   /// Return true if the block can implicitly transfer control to the
   /// block after it by falling off the end of it.  This should return
   /// false if it can reach the block after it, but it uses an
   /// explicit branch to do so (e.g., a table jump).  True is a
   /// conservative answer.
   bool canFallThrough();
 
   /// Returns a pointer to the first instruction in this block that is not a

llvm/lib/CodeGen/BasicBlockSections.cpp

for (auto &MBB : MF)
         MBB.setSectionID(*EHPadsSectionID);
 }
 
 void llvm::sortBasicBlocksAndUpdateBranches(
     MachineFunction &MF, MachineBasicBlockComparator MBBCmp) {
   SmallVector<MachineBasicBlock *, 4> PreLayoutFallThroughs(
       MF.getNumBlockIDs());
   for (auto &MBB : MF)
-    PreLayoutFallThroughs[MBB.getNumber()] = MBB.getFallThrough();
+    PreLayoutFallThroughs[MBB.getNumber()] = MBB.getFallThroughOrUnconditionalSuccessor();
 
   MF.sort(MBBCmp);
 
   // Set IsBeginSection and IsEndSection according to the assigned section IDs.
   MF.assignBeginEndSections();
 
   // After reordering basic blocks, we must update basic block branches to
   // insert explicit fallthrough branches when required and optimize branches

llvm/lib/CodeGen/BranchRelaxation.cpp

bool BranchRelaxation::fixupConditionalBranch(MachineInstr &MI) {
   insertBranch(MBB, NewBB, FBB, Cond);
 
   finalizeBlockChanges(MBB, NewBB);
   return true;
 }
 
 bool BranchRelaxation::fixupUnconditionalBranch(MachineInstr &MI) {
   MachineBasicBlock *MBB = MI.getParent();
-  MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
   SmallVector<MachineOperand, 4> Cond;
   unsigned OldBrSize = TII->getInstSizeInBytes(MI);
   MachineBasicBlock *DestBB = TII->getBranchDestBlock(MI);
 
   int64_t DestOffset = BlockInfo[DestBB->getNumber()].Offset;
   int64_t SrcOffset = getInstrOffset(MI);
 
   assert(!TII->isBranchOffsetInRange(MI.getOpcode(), DestOffset - SrcOffset));
 
   BlockInfo[MBB->getNumber()].Size -= OldBrSize;
 
   MachineBasicBlock *BranchBB = MBB;
 
-  auto RemoveBranch = [&](MachineBasicBlock *MBB) {
-    unsigned &BBSize = BlockInfo[MBB->getNumber()].Size;
-    int RemovedSize = 0;
-    TII->removeBranch(*MBB, &RemovedSize);
-    BBSize -= RemovedSize;
-  };
-
-  auto InsertUncondBranch = [&](MachineBasicBlock *MBB,
-                                MachineBasicBlock *Dst) {
-    TII->insertUnconditionalBranch(*MBB, Dst, DebugLoc());
-    // Recalculate the block size.
-    BlockInfo[MBB->getNumber()].Size = computeBlockSize(*MBB);
-  };
-
   // If this was an expanded conditional branch, there is already a single
   // unconditional branch in a block.
   if (!MBB->empty()) {
     BranchBB = createNewBlockAfter(*MBB);
 
     // Add live outs.
     for (const MachineBasicBlock *Succ : MBB->successors()) {
       for (const MachineBasicBlock::RegisterMaskPair &LiveIn : Succ->liveins())
if (!RestoreBB->empty()) {
     // TODO: For multiple far branches to the same destination, there are
     // chances that some restore blocks could be shared if they clobber the
     // same registers and share the same restore sequence. So far, those
     // restore blocks are just duplicated for each far branch.
     assert(!DestBB->isEntryBlock());
     MachineBasicBlock *PrevBB = &*std::prev(DestBB->getIterator());
     // Fall through only if PrevBB has no unconditional branch as one of its
     // terminators.
-    if (TII->analyzeBranch(*PrevBB, TBB, FBB, Cond))
-      report_fatal_error("Could not analyze terminators.");
-    if (!FBB) {
-      if (!Cond.empty() && TBB && TBB == DestBB)
-        RemoveBranch(PrevBB);
-      if (!TBB || (TBB && !Cond.empty()))
-        InsertUncondBranch(PrevBB, DestBB);
+    if (auto *FT = PrevBB->getFallThroughOrUnconditionalSuccessor(false)) {
+      assert(FT == DestBB);
+      TII->insertUnconditionalBranch(*PrevBB, FT, DebugLoc());
+      BlockInfo[PrevBB->getNumber()].Size = computeBlockSize(*PrevBB);
     }
     // Now, RestoreBB could be placed directly before DestBB.
     MF->splice(DestBB->getIterator(), RestoreBB->getIterator());
     // Update successors and predecessors.
     RestoreBB->addSuccessor(DestBB);
     BranchBB->replaceSuccessor(DestBB, RestoreBB);
     if (TRI->trackLivenessAfterRegAlloc(*MF))
       computeAndAddLiveIns(LiveRegs, *RestoreBB);
     // Compute the restore block size.

llvm/lib/CodeGen/MachineBasicBlock.cpp

bool MachineBasicBlock::isLayoutSuccessor(const MachineBasicBlock *MBB) const {
   MachineFunction::const_iterator I(this);
   return std::next(I) == MachineFunction::const_iterator(MBB);
 }
 
 const MachineBasicBlock *MachineBasicBlock::getSingleSuccessor() const {
   return Successors.size() == 1 ? Successors[0] : nullptr;
 }
 
-MachineBasicBlock *MachineBasicBlock::getFallThrough() {
+MachineBasicBlock *MachineBasicBlock::getFallThroughOrUnconditionalSuccessor(bool AllowUncondSucc) {
   MachineFunction::iterator Fallthrough = getIterator();
   ++Fallthrough;
   // If FallthroughBlock is off the end of the function, it can't fall through.
   if (Fallthrough == getParent()->end())
     return nullptr;
 
   // If FallthroughBlock isn't a successor, no fallthrough is possible.
   if (!isSuccessor(&*Fallthrough))
return (empty() || !back().isBarrier() || TII->isPredicated(back()))
                : nullptr;
   }
 
   // If there is no branch, control always falls through.
   if (!TBB) return &*Fallthrough;
 
   // If there is some explicit branch to the fallthrough block, it can obviously
   // reach, even though the branch should get folded to fall through implicitly.
-  if (MachineFunction::iterator(TBB) == Fallthrough ||
-      MachineFunction::iterator(FBB) == Fallthrough)
+  if (AllowUncondSucc && (MachineFunction::iterator(TBB) == Fallthrough ||
+      MachineFunction::iterator(FBB) == Fallthrough))
     return &*Fallthrough;
 
   // If it's an unconditional branch to some block not the fall through, it
   // doesn't fall through.
   if (Cond.empty()) return nullptr;
 
   // Otherwise, if it is conditional and has no explicit false block, it falls
   // through.
   return (FBB == nullptr) ? &*Fallthrough : nullptr;
 }
 
 bool MachineBasicBlock::canFallThrough() {
-  return getFallThrough() != nullptr;
+  return getFallThroughOrUnconditionalSuccessor() != nullptr;
 }
 
 MachineBasicBlock *MachineBasicBlock::splitAt(MachineInstr &MI,
                                               bool UpdateLiveIns,
                                               LiveIntervals *LIS) {
   MachineBasicBlock::iterator SplitPoint(&MI);
   ++SplitPoint;
 

llvm/lib/CodeGen/MachineBlockPlacement.cpp

for (size_t I = 0; I < NewBlockOrder.size(); I++) {
     }
   }
   // Stop early if the new block order is identical to the existing one.
   if (!HasChanges)
     return;
 
   SmallVector<MachineBasicBlock *, 4> PrevFallThroughs(F->getNumBlockIDs());
   for (auto &MBB : *F) {
-    PrevFallThroughs[MBB.getNumber()] = MBB.getFallThrough();
+    PrevFallThroughs[MBB.getNumber()] = MBB.getFallThroughOrUnconditionalSuccessor();
   }
 
   // Sort basic blocks in the function according to the computed order.
   DenseMap<const MachineBasicBlock *, size_t> NewIndex;
   for (const MachineBasicBlock *MBB : NewBlockOrder) {
     NewIndex[MBB] = NewIndex.size();
   }
   F->sort([&](MachineBasicBlock &L, MachineBasicBlock &R) {

llvm/lib/Target/AArch64/AArch64SpeculationHardening.cpp

bool AArch64SpeculationHardening::endsWithCondControlFlow(
   if (analyzeBranchCondCode.empty())
     return false;
 
   // If the BB ends with a single conditional branch, FBB will be set to
   // nullptr (see API docs for TII->analyzeBranch). For the rest of the
   // analysis we want the FBB block to be set always.
   assert(TBB != nullptr);
   if (FBB == nullptr)
-    FBB = MBB.getFallThrough();
+    FBB = MBB.getFallThroughOrUnconditionalSuccessor();
 
   // If both the true and the false condition jump to the same basic block,
   // there isn't need for any protection - whether the branch is speculated
   // correctly or not, we end up executing the architecturally correct code.
   if (TBB == FBB)
     return false;
 
   assert(MBB.succ_size() == 2);

llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp

if (structurize_once < 2 || true) {
     structurize_once++;
   }
   return Changed;
 }
 
 void AMDGPUMachineCFGStructurizer::initFallthroughMap(MachineFunction &MF) {
   LLVM_DEBUG(dbgs() << "Fallthrough Map:\n");
   for (auto &MBBI : MF) {
-    MachineBasicBlock *MBB = MBBI.getFallThrough();
+    MachineBasicBlock *MBB = MBBI.getFallThroughOrUnconditionalSuccessor();
     if (MBB != nullptr) {
       LLVM_DEBUG(dbgs() << "Fallthrough: " << MBBI.getNumber() << " -> "
                         << MBB->getNumber() << "\n");
     }
     FallthroughMap[&MBBI] = MBB;
   }
 }
 

llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp

bool SILowerControlFlow::removeMBBifRedundant(MachineBasicBlock &MBB) {
 
   assert(MBB.succ_size() == 1 && "MBB has more than one successor");
 
   MachineBasicBlock *Succ = *MBB.succ_begin();
   MachineBasicBlock *FallThrough = nullptr;
 
   while (!MBB.predecessors().empty()) {
     MachineBasicBlock *P = *MBB.pred_begin();
-    if (P->getFallThrough() == &MBB)
+    if (P->getFallThroughOrUnconditionalSuccessor() == &MBB)
       FallThrough = P;
     P->ReplaceUsesOfBlockWith(&MBB, Succ);
   }
   MBB.removeSuccessor(Succ);
   if (LIS) {
     for (auto &I : MBB.instrs())
       LIS->RemoveMachineInstrFromMaps(I);
   }

llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp

if (SReg == ExecReg) {
     assert(Found && "conditional branch is not terminator");
     for (auto *BranchMI : ToRemove) {
       MachineOperand &Dst = BranchMI->getOperand(0);
       assert(Dst.isMBB() && "destination is not basic block");
       Parent->removeSuccessor(Dst.getMBB());
       BranchMI->eraseFromParent();
     }
 
-    if (MachineBasicBlock *Succ = Parent->getFallThrough()) {
+    if (MachineBasicBlock *Succ = Parent->getFallThroughOrUnconditionalSuccessor()) {
       Parent->removeSuccessor(Succ);
     }
 
     // Rewrite to unconditional branch
     MI.setDesc(TII->get(AMDGPU::S_BRANCH));
   } else if (!IsVCCZ && MaskValue == 0) {
     // Will never branch
     MachineOperand &Dst = MI.getOperand(0);

llvm/lib/Target/ARM/ARMConstantIslandPass.cpp

bool ARMConstantIslands::optimizeThumb2Branches() {
   // order within the function body. By visiting later branches first, we reduce
   // the distance between earlier forward branches and their targets, making it
   // more likely that the cbn?z optimization, which can only apply to forward
   // branches, will succeed.
   for (ImmBranch &Br : reverse(ImmBranches)) {
     MachineBasicBlock *DestBB = Br.MI->getOperand(0).getMBB();
     MachineBasicBlock *MBB = Br.MI->getParent();
     MachineBasicBlock *ExitBB = &MBB->back() == Br.MI ?
-      MBB->getFallThrough() :
+      MBB->getFallThroughOrUnconditionalSuccessor() :
       MBB->back().getOperand(0).getMBB();
 
     ImmCompare Cmp;
     if (FindCmpForCBZ(Br, Cmp, ExitBB) && TryConvertToLE(Br, Cmp)) {
       DestBB = ExitBB;
       MadeChange = true;
     } else {
       FindCmpForCBZ(Br, Cmp, DestBB);

llvm/lib/Target/ARM/ARMISelLowering.cpp

case ARM::MVE_MEMSETLOOPINST: {
     // The split is required for two reasons:
     // 1) A terminator(t2WhileLoopStart) will be placed at that site.
     // 2) Since a TPLoopBody will be added later, any phis in successive blocks
     //    need to be updated. splitAt() already handles this.
     TpExit = BB->splitAt(MI, false);
     if (TpExit == BB) {
       assert(BB->canFallThrough() && "Exit Block must be Fallthrough of the "
                                      "block containing memcpy/memset Pseudo");
-      TpExit = BB->getFallThrough();
+      TpExit = BB->getFallThroughOrUnconditionalSuccessor();
       BuildMI(BB, dl, TII->get(ARM::t2B))
           .addMBB(TpExit)
           .add(predOps(ARMCC::AL));
       TpExit = BB->splitAt(MI, false);
     }
 
     // Add logic for iteration count
     Register TotalIterationsReg =

llvm/lib/Target/AVR/AVRISelLowering.cpp

AVRTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
   // To "insert" a SELECT instruction, we insert the diamond
   // control-flow pattern. The incoming instruction knows the
   // destination vreg to set, the condition code register to branch
   // on, the true/false values to select between, and a branch opcode
   // to use.
 
   MachineFunction *MF = MBB->getParent();
   const BasicBlock *LLVM_BB = MBB->getBasicBlock();
-  MachineBasicBlock *FallThrough = MBB->getFallThrough();
+  MachineBasicBlock *FallThrough = MBB->getFallThroughOrUnconditionalSuccessor();
 
   // If the current basic block falls through to another basic block,
   // we must insert an unconditional branch to the fallthrough destination
   // if we are to insert basic blocks at the prior fallthrough point.
   if (FallThrough != nullptr) {
     BuildMI(MBB, dl, TII.get(AVR::RJMPk)).addMBB(FallThrough);
   }
 

llvm/lib/Target/RISCV/RISCVFrameLowering.cpp

bool RISCVFrameLowering::canUseAsEpilogue(const MachineBasicBlock &MBB) const {
   // Using the __riscv_restore libcalls to restore CSRs requires a tail call.
   // This means if we still need to continue executing code within this function
   // the restore cannot take place in this basic block.
 
   if (MBB.succ_size() > 1)
     return false;
 
   MachineBasicBlock *SuccMBB =
-      MBB.succ_empty() ? TmpMBB->getFallThrough() : *MBB.succ_begin();
+      MBB.succ_empty() ? TmpMBB->getFallThroughOrUnconditionalSuccessor() : *MBB.succ_begin();
 
   // Doing a tail call should be safe if there are no successors, because either
   // we have a returning block or the end of the block is unreachable, so the
   // restore will be eliminated regardless.
   if (!SuccMBB)
     return true;
 
   // The successor can only contain a return, since we would effectively be

llvm/lib/Target/X86/X86FlagsCopyLowering.cpp

bool IsEdgeSplit =
                   [&](MachineInstr &MI) {
                     assert(MI.isTerminator() &&
                            "Should only have spliced terminators!");
                     return llvm::any_of(
                         MI.operands(), [&](MachineOperand &MOp) {
                           return MOp.isMBB() && MOp.getMBB() == &UnsplitSucc;
                         });
                   }) ||
-      MBB.getFallThrough() == &UnsplitSucc;
+      MBB.getFallThroughOrUnconditionalSuccessor() == &UnsplitSucc;
 
   MachineBasicBlock &NewMBB = *MF.CreateMachineBasicBlock();
 
   // Insert the new block immediately after the current one. Any existing
   // fallthrough will be sunk into this new block anyways.
   MF.insert(std::next(MachineFunction::iterator(&MBB)), &NewMBB);
 
   // Splice the tail of instructions into the new block.

llvm/test/CodeGen/AMDGPU/branch-relax-indirect-branch.mir

+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -verify-machineinstrs -mtriple=amdgcn-amd-amdhsa --amdgpu-s-branch-bits=5 -run-pass branch-relaxation %s -o - | FileCheck %s
+
+---
+name:            branch_no_terminators
+alignment:       1
+tracksRegLiveness: true
+liveins:
+  - { reg: '$sgpr12' }
+machineFunctionInfo:
+  stackPtrOffsetReg: '$sgpr32'
+  scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
+body:             |
+  ; CHECK-LABEL: name: branch_no_terminators
+  ; CHECK: bb.0.entry:
+  ; CHECK-NEXT:   successors: %bb.1(0x50000000), %bb.5(0x30000000)
+  ; CHECK-NEXT:   liveins: $sgpr12, $sgpr30, $sgpr31, $sgpr33, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $vgpr0, $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   S_WAITCNT 0
+  ; CHECK-NEXT:   $sgpr4_sgpr5 = S_OR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
+  ; CHECK-NEXT:   BUFFER_STORE_DWORD_OFFSET $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec
+  ; CHECK-NEXT:   BUFFER_STORE_DWORD_OFFSET $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec
+  ; CHECK-NEXT:   $exec = S_MOV_B64 killed $sgpr4_sgpr5
+  ; CHECK-NEXT:   $vgpr0 = V_WRITELANE_B32 killed $sgpr30, 0, $vgpr0
+  ; CHECK-NEXT:   $vgpr0 = V_WRITELANE_B32 killed $sgpr31, 1, $vgpr0
+  ; CHECK-NEXT:   $vgpr0 = V_WRITELANE_B32 $sgpr33, 2, $vgpr0
+  ; CHECK-NEXT:   $sgpr81 = S_MOV_B32 killed $sgpr12
+  ; CHECK-NEXT:   $vgpr0 = V_WRITELANE_B32 killed $sgpr94, 63, $vgpr0
+  ; CHECK-NEXT:   $vgpr1 = V_WRITELANE_B32 killed $sgpr101, 6, $vgpr1
+  ; CHECK-NEXT:   S_CMP_EQ_U32 killed renamable $sgpr81, 0, implicit-def $scc
+  ; CHECK-NEXT:   S_CBRANCH_SCC0 %bb.1, implicit killed $scc
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.5.entry:
+  ; CHECK-NEXT:   successors: %bb.6(0x80000000)
+  ; CHECK-NEXT:   liveins: $vcc_hi, $vcc_lo, $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr32, $sgpr33, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $vgpr0, $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   $exec = S_NOT_B64 $exec, implicit-def dead $scc, implicit-def $vgpr2
+  ; CHECK-NEXT:   BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.0, addrspace 5)
+  ; CHECK-NEXT:   $vgpr2 = V_WRITELANE_B32 $sgpr0, 0, undef $vgpr2, implicit $sgpr0_sgpr1
+  ; CHECK-NEXT:   $vgpr2 = V_WRITELANE_B32 $sgpr1, 1, $vgpr2, implicit $sgpr0_sgpr1
+  ; CHECK-NEXT:   $sgpr0_sgpr1 = S_GETPC_B64 post-instr-symbol <mcsymbol >
+  ; CHECK-NEXT:   $sgpr0 = S_ADD_U32 $sgpr0, target-flags(<unknown target flag>) <mcsymbol >, implicit-def $scc
+  ; CHECK-NEXT:   $sgpr1 = S_ADDC_U32 $sgpr1, target-flags(<unknown target flag>) <mcsymbol >, implicit-def $scc, implicit $scc
+  ; CHECK-NEXT:   S_SETPC_B64 $sgpr0_sgpr1
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.1:
+  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
+  ; CHECK-NEXT:   liveins: $vcc_hi, $vcc_lo, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $vgpr0, $vgpr1
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   $vgpr1 = V_WRITELANE_B32 killed $sgpr81, 7, $vgpr1
+  ; CHECK-NEXT:   $sgpr81 = S_MOV_B32 killed $sgpr82
+  ; CHECK-NEXT:   $sgpr82 = S_MOV_B32 killed $sgpr83
+  ; CHECK-NEXT:   $sgpr83 = S_MOV_B32 killed $sgpr84
+  ; CHECK-NEXT:   $sgpr84 = S_MOV_B32 killed $sgpr85
+  ; CHECK-NEXT:   $sgpr101 = S_MOV_B32 killed $vcc_lo
+  ; CHECK-NEXT:   S_BRANCH %bb.2
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.8:
+  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
+  ; CHECK-NEXT:   liveins: $vcc_hi, $vcc_lo, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $vgpr0, $vgpr1, $vgpr2
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   $sgpr0 = V_READLANE_B32 $vgpr2, 0, implicit-def $sgpr0_sgpr1
+  ; CHECK-NEXT:   $sgpr1 = V_READLANE_B32 killed $vgpr2, 1
+  ; CHECK-NEXT:   $vgpr2 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (load (s32) from %stack.0, addrspace 5)
+  ; CHECK-NEXT:   $exec = S_NOT_B64 $exec, implicit-def dead $scc, implicit killed $vgpr2
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.2:
+  ; CHECK-NEXT:   successors: %bb.3(0x04000000), %bb.7(0x7c000000)
+  ; CHECK-NEXT:   liveins: $vcc_hi, $vcc_lo, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $vgpr0, $vgpr1
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   INLINEASM &"v_nop_e64\0A    v_nop_e64\0A    v_nop_e64\0A    v_nop_e64\0A    v_nop_e64\0A    v_nop_e64\0A    v_nop_e64\0A    v_nop_e64", 1 /* sideeffect attdialect */, 2097162 /* regdef:SReg_32_XEXEC */, def renamable $sgpr4
+  ; CHECK-NEXT:   S_CMP_LG_U32 killed renamable $sgpr4, 0, implicit-def $scc
+  ; CHECK-NEXT:   S_CBRANCH_SCC0 %bb.3, implicit killed $scc
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.7:
+  ; CHECK-NEXT:   successors: %bb.8(0x80000000)
+  ; CHECK-NEXT:   liveins: $vcc_hi, $vcc_lo, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $vgpr0, $vgpr1
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   $exec = S_NOT_B64 $exec, implicit-def dead $scc, implicit-def $vgpr2
+  ; CHECK-NEXT:   BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.0, addrspace 5)
+  ; CHECK-NEXT:   $vgpr2 = V_WRITELANE_B32 $sgpr0, 0, undef $vgpr2, implicit $sgpr0_sgpr1
+  ; CHECK-NEXT:   $vgpr2 = V_WRITELANE_B32 $sgpr1, 1, $vgpr2, implicit $sgpr0_sgpr1
+  ; CHECK-NEXT:   $sgpr0_sgpr1 = S_GETPC_B64 post-instr-symbol <mcsymbol >
+  ; CHECK-NEXT:   $sgpr0 = S_ADD_U32 $sgpr0, target-flags(<unknown target flag>) <mcsymbol >, implicit-def $scc
+  ; CHECK-NEXT:   $sgpr1 = S_ADDC_U32 $sgpr1, target-flags(<unknown target flag>) <mcsymbol >, implicit-def $scc, implicit $scc
+  ; CHECK-NEXT:   S_SETPC_B64 $sgpr0_sgpr1
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.3:
+  ; CHECK-NEXT:   liveins: $vcc_hi, $vcc_lo, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $vgpr0, $vgpr1
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   $sgpr4 = S_MOV_B32 killed $sgpr5
+  ; CHECK-NEXT:   $sgpr5 = S_MOV_B32 killed $sgpr6
+  ; CHECK-NEXT:   $sgpr6 = S_MOV_B32 killed $sgpr7
+  ; CHECK-NEXT:   $sgpr7 = S_MOV_B32 killed $sgpr8
+  ; CHECK-NEXT:   $sgpr8 = S_MOV_B32 killed $sgpr9
+  ; CHECK-NEXT:   $sgpr9 = S_MOV_B32 killed $sgpr10
+  ; CHECK-NEXT:   $sgpr10 = S_MOV_B32 killed $sgpr11
+  ; CHECK-NEXT:   S_SETPC_B64 $sgpr4_sgpr5
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.6:
+  ; CHECK-NEXT:   successors: %bb.4(0x80000000)
+  ; CHECK-NEXT:   liveins: $vcc_hi, $vcc_lo, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $vgpr0, $vgpr1, $vgpr2, $sgpr33
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   $sgpr0 = V_READLANE_B32 $vgpr2, 0, implicit-def $sgpr0_sgpr1
+  ; CHECK-NEXT:   $sgpr1 = V_READLANE_B32 killed $vgpr2, 1
+  ; CHECK-NEXT:   $vgpr2 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (load (s32) from %stack.0, addrspace 5)
+  ; CHECK-NEXT:   $exec = S_NOT_B64 $exec, implicit-def dead $scc, implicit killed $vgpr2
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.4:
+  ; CHECK-NEXT:   liveins: $vcc_hi, $vcc_lo, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $vgpr0, $vgpr1, $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr32, $sgpr33, $sgpr0_sgpr1_sgpr2_sgpr3
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   $sgpr101 = V_READLANE_B32 $vgpr1, 6
+  ; CHECK-NEXT:   $sgpr100 = V_READLANE_B32 $vgpr1, 5
+  ; CHECK-NEXT:   $sgpr4_sgpr5 = S_OR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
+  ; CHECK-NEXT:   $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec
+  ; CHECK-NEXT:   $vgpr1 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec
+  ; CHECK-NEXT:   $exec = S_MOV_B64 killed $sgpr4_sgpr5
+  ; CHECK-NEXT:   S_WAITCNT 3952
+  ; CHECK-NEXT:   S_SETPC_B64_return undef $sgpr30_sgpr31
+  bb.0.entry:
+    successors: %bb.1(0x50000000), %bb.4(0x30000000)
+    liveins: $sgpr12, $sgpr30, $sgpr31, $sgpr33, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $vgpr0, $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32
+
+    S_WAITCNT 0
+    $sgpr4_sgpr5 = S_OR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
+    BUFFER_STORE_DWORD_OFFSET $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec
+    BUFFER_STORE_DWORD_OFFSET $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec
+    $exec = S_MOV_B64 killed $sgpr4_sgpr5
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr30, 0, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr31, 1, $vgpr0
+    $vgpr0 = V_WRITELANE_B32 $sgpr33, 2, $vgpr0
+    $sgpr81 = S_MOV_B32 killed $sgpr12
+    $vgpr0 = V_WRITELANE_B32 killed $sgpr94, 63, $vgpr0
+    $vgpr1 = V_WRITELANE_B32 killed $sgpr101, 6, $vgpr1
+    S_CMP_EQ_U32 killed renamable $sgpr81, 0, implicit-def $scc
+    S_CBRANCH_SCC1 %bb.4, implicit killed $scc
+
+  bb.1:
+    liveins: $vcc_hi, $vcc_lo, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $vgpr0, $vgpr1
+
+    $vgpr1 = V_WRITELANE_B32 killed $sgpr81, 7, $vgpr1
+    $sgpr81 = S_MOV_B32 killed $sgpr82
+    $sgpr82 = S_MOV_B32 killed $sgpr83
+    $sgpr83 = S_MOV_B32 killed $sgpr84
+    $sgpr84 = S_MOV_B32 killed $sgpr85
+    $sgpr101 = S_MOV_B32 killed $vcc_lo
+
+  bb.2:
+    successors: %bb.3(0x04000000), %bb.2(0x7c000000)
+    liveins: $vcc_hi, $vcc_lo, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $vgpr0, $vgpr1
+
+    INLINEASM &"v_nop_e64\0A    v_nop_e64\0A    v_nop_e64\0A    v_nop_e64\0A    v_nop_e64\0A    v_nop_e64\0A    v_nop_e64\0A    v_nop_e64", 1 /* sideeffect attdialect */, 2097162 /* regdef:SReg_32 */, def renamable $sgpr4
+    S_CMP_LG_U32 killed renamable $sgpr4, 0, implicit-def $scc
+    S_CBRANCH_SCC1 %bb.2, implicit killed $scc
+
+  bb.3:
+    liveins: $vcc_hi, $vcc_lo, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $vgpr0, $vgpr1
+
+    $sgpr4 = S_MOV_B32 killed $sgpr5
+    $sgpr5 = S_MOV_B32 killed $sgpr6
+    $sgpr6 = S_MOV_B32 killed $sgpr7
+    $sgpr7 = S_MOV_B32 killed $sgpr8
+    $sgpr8 = S_MOV_B32 killed $sgpr9
+    $sgpr9 = S_MOV_B32 killed $sgpr10
+    $sgpr10 = S_MOV_B32 killed $sgpr11
+    S_SETPC_B64 $sgpr4_sgpr5
+
+  bb.4:
+    liveins: $vcc_hi, $vcc_lo, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $vgpr0, $vgpr1, $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr32, $sgpr33, $sgpr0_sgpr1_sgpr2_sgpr3
+
+    $sgpr101 = V_READLANE_B32 $vgpr1, 6
+    $sgpr100 = V_READLANE_B32 $vgpr1, 5
+    $sgpr4_sgpr5 = S_OR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
+    $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec
+    $vgpr1 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec
+    $exec = S_MOV_B64 killed $sgpr4_sgpr5
+    S_WAITCNT 3952
+    S_SETPC_B64_return undef $sgpr30_sgpr31
+
+...