Don't use Optional type for TargetID.

Rebase.

I'm working on eliminating some AGPR->VGPR->AGPR copies which commonly cause problems in loops where the VGPR is considered live across iterations by the register allocator even if the VGPR copy should be sunk. Why do we need this temp VGPR?

Add M0 to defs.

In D91048#2438757, @rampitec wrote:

JBTW, having a need to def M0 probably defeats the idea of potential rescheduling which justifies the separation of the indirect access methods.

ping

Fix test.

Rebase. Move some utility functions to header.

EPSDB is passing.

Address comments.

In D91048#2383872, @rampitec wrote:

In D91048#2383678, @kerbowa wrote:

In D91048#2383420, @rampitec wrote:

Is there a practical reason to have different pseudos for set_idx and movrel methods and not just expand a common pseudo accordingly post RA?

It's a good question but in the end, I chose not to since m0 initializations can be rescheduled, and combing the pseudo's would disallow this. The other issue is that the movrel pseudo includes the scalar version which is used on targets with VGPR indexing as well. I'm open to trying it if you think it seems more practical.

Both methods use M0, aren't they?

In D91048#2383420, @rampitec wrote:

Is there a practical reason to have different pseudos for set_idx and movrel methods and not just expand a common pseudo accordingly post RA?

Remove dead code.

Update, rebase, and merge with change of default patch.

In D89753#2342419, @rampitec wrote:

Do we properly count number of pre-existing wait states if we have s_nop > 0?

Address comments.

Add test.

In D89077#2320507, @t-tye wrote:

Is this now running after the waitcnt insertion pass? That would avoid the NOPs currently being inserted to split memory clauses that are not necessary as the waitcnt instructions will split the clauses.

In D89077#2320507, @t-tye wrote:

Is this now running after the waitcnt insertion pass? That would avoid the NOPs currently being inserted to split memory clauses that are not necessary as the waitcnt instructions will split the clauses.

Wt -> Wr

Rename "Default" to "Any". Address comments.

Re-add DoesNotSupport features. Use enum class. No fatal error on setting mismatch.

Fix typo.

As discussed offline with Mahesha, this and https://reviews.llvm.org/D85767 are fixing the same issue, we decided I would take the fix forward.

Seems wrong to have a bundle without BUNDLE opcode but the change seems fine obviously. Since it's allowed we should probably just account for the possibility.

LGTM

LGTM

LGTM either way

Actually MFMA would need more height to ensure post-RA tries to schedule them first and together. You could have their results be implicit uses on later instruction like S_ENDPGM or something.

Minor nit, but test should disable-power-sched otherwise I think MFMA will be scheduled apart anyway.

LGTM

LGTM

LGTM with parent

LGTM

Create the stack object in lowerShiftReservedVGPR. Also handle this reserved VGPR not being live-in to all BB. Add more tests. Cleanup some of the existing logic.

LGTM

LGTM as far as i can tell

Workaround MIR emitter issue.

LGTM

LGTM