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bcahoon (Brendon Cahoon)
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Apr 10 2015, 3:10 PM (383 w, 19 h)

Recent Activity

Mon, Aug 8

bcahoon accepted D127840: [MachinePipeliner] Fix Phi generation failure for large stages.

Thanks for the fix. LGTM.

Mon, Aug 8, 7:00 PM · Restricted Project, Restricted Project

Fri, Aug 5

bcahoon added a comment to D131276: AMDGPU: Implicit kernel arguments related optimization when uniform-workgroup-size=true.

I also think we're still missing a module flag to indicate the code object version

The module flag was implemented quite a while back. See D119026 from February. From a recent compile:

!llvm.module.flags = !{!0, !1, !2}
!0 = !{i32 1, !"amdgpu_code_object_version", i32 500}

We were using --amdhsa-code-object-version=5 to run LIT tests. Do you mean this flag will no longer take effect if we
switch to module flag for code object version?

Fri, Aug 5, 4:59 PM · Restricted Project, Restricted Project

Thu, Aug 4

bcahoon added a comment to D128073: [SROA] Try harder to find a vector promotion viable type when rewriting.

Is anything else needed for this patch or any additional review comments?

Thu, Aug 4, 6:49 AM · Restricted Project, Restricted Project

Tue, Aug 2

bcahoon added a comment to D127840: [MachinePipeliner] Fix Phi generation failure for large stages.

This is an interesting bug. The patch does fix a flaw with the current Phi generation by the pipeliner. I think the approach here is a good one. It is a little difficult to understand the reason needed for the two different VRMaps though (much of the code in generatePhis is difficult to understand). But, the two maps do reduce some of the complexity in the code, which is good. I'll accept it once the test case comment is resolved. Thanks for fix the issue!

Tue, Aug 2, 3:25 PM · Restricted Project, Restricted Project

Mon, Aug 1

bcahoon added inline comments to D123693: Transform illegal intrinsics to V_ILLEGAL.
Mon, Aug 1, 7:28 AM · Restricted Project, Restricted Project

Fri, Jul 29

bcahoon added a comment to D123693: Transform illegal intrinsics to V_ILLEGAL.

A couple more tests are needed. A test for for the image intrinsic. Also an assembler test for the v_illegal encoding.

Fri, Jul 29, 10:10 AM · Restricted Project, Restricted Project

Wed, Jul 27

bcahoon added inline comments to D123693: Transform illegal intrinsics to V_ILLEGAL.
Wed, Jul 27, 3:33 PM · Restricted Project, Restricted Project

Mon, Jul 25

bcahoon added inline comments to D123693: Transform illegal intrinsics to V_ILLEGAL.
Mon, Jul 25, 7:03 PM · Restricted Project, Restricted Project

Jul 14 2022

bcahoon added a reverting change for rGe13248ab0e79: [UnifyLoopExits] Reduce number of guard blocks: rG58fec78231dc: Revert "[UnifyLoopExits] Reduce number of guard blocks".
Jul 14 2022, 8:46 AM · Restricted Project, Restricted Project
bcahoon committed rG58fec78231dc: Revert "[UnifyLoopExits] Reduce number of guard blocks" (authored by bcahoon).
Revert "[UnifyLoopExits] Reduce number of guard blocks"
Jul 14 2022, 8:46 AM · Restricted Project, Restricted Project
bcahoon added a reverting change for D123230: [UnifyLoopExits] Reduce number of guard blocks: rG58fec78231dc: Revert "[UnifyLoopExits] Reduce number of guard blocks".
Jul 14 2022, 8:45 AM · Restricted Project, Restricted Project
bcahoon added a reverting change for rGf1b05a0a2bbb: [StructurizeCFG] Improve basic block ordering: rGc945d88d2b88: Revert "[StructurizeCFG] Improve basic block ordering".
Jul 14 2022, 7:45 AM · Restricted Project, Restricted Project
bcahoon committed rGc945d88d2b88: Revert "[StructurizeCFG] Improve basic block ordering" (authored by bcahoon).
Revert "[StructurizeCFG] Improve basic block ordering"
Jul 14 2022, 7:45 AM · Restricted Project, Restricted Project
bcahoon added a reverting change for D123231: [StructurizeCFG] Improve basic block ordering: rGc945d88d2b88: Revert "[StructurizeCFG] Improve basic block ordering".
Jul 14 2022, 7:45 AM · Restricted Project, Restricted Project

Jun 28 2022

bcahoon added a reviewer for D128001: apply DivergenceAnalysis for SLU: sameerds.
Jun 28 2022, 7:39 AM · Restricted Project, Restricted Project

Jun 27 2022

bcahoon added a comment to D123231: [StructurizeCFG] Improve basic block ordering.

The issue @critson reported in the related change reminds to take a careful look of this change. I think there is one critical correctness issue need to be fixed. When we are moving the exit block into the loop, we need to make sure there is no convergent operation in the exit block, otherwise we may change the threads that will participate the convergent operation if the threads exit the loop non-uniformly. So we have to scan all the instructions in the exit block before making the reorder decision.

Jun 27 2022, 2:11 PM · Restricted Project, Restricted Project

Jun 25 2022

bcahoon added a comment to D123230: [UnifyLoopExits] Reduce number of guard blocks.

Hi @critson. Thanks for reducing the test case. I don't see an error with the test case though, so I may be missing something. Or, perhaps I need to see the complete test case? Here's my understanding. With the patch, control flow still converges at TrueExit. It's just that the Exit3 and Exit4 blocks have moved in the CFG so that they appear prior to loop.exit.guard rather than after. Following the exit paths from F, G, and C. I think that should be ok?

Jun 25 2022, 10:58 AM · Restricted Project, Restricted Project

Jun 24 2022

bcahoon added a comment to D123230: [UnifyLoopExits] Reduce number of guard blocks.

Hi @critson, thanks for pointing out the issue, and a potential fix. I'm looking at it now.

Jun 24 2022, 10:13 AM · Restricted Project, Restricted Project

Jun 22 2022

bcahoon committed rGf1b05a0a2bbb: [StructurizeCFG] Improve basic block ordering (authored by bcahoon).
[StructurizeCFG] Improve basic block ordering
Jun 22 2022, 2:13 PM · Restricted Project, Restricted Project
bcahoon closed D123231: [StructurizeCFG] Improve basic block ordering.
Jun 22 2022, 2:13 PM · Restricted Project, Restricted Project
bcahoon committed rGe13248ab0e79: [UnifyLoopExits] Reduce number of guard blocks (authored by bcahoon).
[UnifyLoopExits] Reduce number of guard blocks
Jun 22 2022, 1:49 PM · Restricted Project, Restricted Project
bcahoon closed D123230: [UnifyLoopExits] Reduce number of guard blocks.
Jun 22 2022, 1:49 PM · Restricted Project, Restricted Project

Jun 19 2022

bcahoon added a comment to D123231: [StructurizeCFG] Improve basic block ordering.

I had tried a different approach to avoid inserting excessive number of boolean values during the loop-exit-unify in D127831. I just did some testing of that change against the LLVM IR Brendon shared with me. It shows the change could help reducing the number of registers as well as compile time. But it is sad that I still hit the error: "unhandled SGPR spill to memory" from SGPRSpillBuilder in SIRegisterInfo.cpp. Can the limitation be fixed? I did some register pressure comparison, seems the way I proposed would use much less VGPR than (D123230 + D123231), but use more SGPR. I haven't looked further why there is such behavior difference. I think we need more investigation to know why. But looks like D127831 might help us generate better code because we can use one VGPR as the backup storage for spilling of 64/32 SGPRs. And the idea used there is much easy to follow.

Jun 19 2022, 4:32 PM · Restricted Project, Restricted Project
bcahoon added inline comments to D123231: [StructurizeCFG] Improve basic block ordering.
Jun 19 2022, 4:27 PM · Restricted Project, Restricted Project
bcahoon updated the diff for D123231: [StructurizeCFG] Improve basic block ordering.

Updates to the comments in the improve-order.ll test, based up reviewer suggestions.

Jun 19 2022, 4:12 PM · Restricted Project, Restricted Project

Jun 16 2022

bcahoon accepted D127971: [MachinePipeliner] Handle failing constrainRegClass.

Thanks for making this change. It's an interesting case. We handled a related issue, with subregisters, by adding code to preprocessPhiNodes to create copies. I don't have a problem with approach in this patch. There may be other cases in this code that need a similar change? Not sure...

Jun 16 2022, 4:17 PM · Restricted Project, Restricted Project

Jun 14 2022

bcahoon added a comment to D123693: Transform illegal intrinsics to V_ILLEGAL.

The rationale is for library code that looks like:
void example(float *p, float v) {

if (_ISA_verison == 9008 || __ISA_verison == 9010)
   global_atomic_fadd(p, v);
else
   generic_atomic_fadd(p, v);

}

Jun 14 2022, 6:52 AM · Restricted Project, Restricted Project

Jun 13 2022

bcahoon updated the diff for D123231: [StructurizeCFG] Improve basic block ordering.

No changes with this patch. It's been a while since this patch was added. I was investigating an internal test failure, which turns out to be unrelated to this patch. So, I'd like to move forward with reviewing this again.

Jun 13 2022, 7:41 AM · Restricted Project, Restricted Project

May 24 2022

bcahoon accepted D126009: [AMDGPU] Enforce alignment of image vaddr on gfx90a.
May 24 2022, 9:42 AM · Restricted Project, Restricted Project

May 20 2022

bcahoon added a comment to D126009: [AMDGPU] Enforce alignment of image vaddr on gfx90a.

This looks good. Just a couple of minor comments.

May 20 2022, 8:01 PM · Restricted Project, Restricted Project

Apr 24 2022

bcahoon added inline comments to D124267: [MachinePipeliner] Fix unscheduled instruction.
Apr 24 2022, 7:08 PM · Restricted Project, Restricted Project

Apr 22 2022

bcahoon added inline comments to D124267: [MachinePipeliner] Fix unscheduled instruction.
Apr 22 2022, 1:43 PM · Restricted Project, Restricted Project
bcahoon added a reviewer for D124267: [MachinePipeliner] Fix unscheduled instruction: sgundapa.

Hi @sgundapa, just checking if you made a similar change that wasn't upstreamed?

Apr 22 2022, 8:44 AM · Restricted Project, Restricted Project

Apr 14 2022

bcahoon added a comment to D123231: [StructurizeCFG] Improve basic block ordering.

which increases compilation time and register pressure.

Have you looked at which part is responsible for the compilation time increase? Is is possible that we hit inefficiency in certain pass?
The "register pressure" here specifically means SGPR usage, right?

Apr 14 2022, 7:49 AM · Restricted Project, Restricted Project
bcahoon updated the diff for D123231: [StructurizeCFG] Improve basic block ordering.

Made several changes based upon suggestions and to fix a correctness issue:

  • The new function, reorderNodes, must appear before collectInfos because collectInfos collects branch predicate information based upon the order of the nodes, so the wrong branch information was used after nodes were reordered.
  • Changed name of the function, from improveNodeOrder to reorderNodes because changing the order is an improvement under certain conditions.
  • Only reorder the nodes for large regions. The size of the region can be changed with a command-line option. The issues fixed by this patch are seen only with very large regions, so this flag limits the impact of this patch. I'm open to other ways to do this.
  • Since reorderNodes appears before collectInfos, it no longer can use Visited. Instead, reorderNodes keeps track of the basic blocks in Order and uses that as part of the criteria to reorder. We only want to reorder a node that has a predecessor in Order.
Apr 14 2022, 7:19 AM · Restricted Project, Restricted Project

Apr 11 2022

bcahoon added reviewers for D123231: [StructurizeCFG] Improve basic block ordering: foad, nhaehnle.
Apr 11 2022, 12:20 PM · Restricted Project, Restricted Project

Apr 9 2022

bcahoon added inline comments to D123230: [UnifyLoopExits] Reduce number of guard blocks.
Apr 9 2022, 2:46 PM · Restricted Project, Restricted Project
bcahoon updated the diff for D123230: [UnifyLoopExits] Reduce number of guard blocks.

Messed up the last revision by including another patch. This hopefully fixes it. The only new change is an additional test case, three_loops, added to test/Transforms/UnifyLoopExits/reduce_guards.ll

Apr 9 2022, 2:44 PM · Restricted Project, Restricted Project
bcahoon updated the diff for D123230: [UnifyLoopExits] Reduce number of guard blocks.

Added a test to show the case when we need to move the guard block predecessor from an outer loop to an inner loop. Three nested loops are needed for this. Initially, the guard block predecessor is added to the outer loop, but then need to change to the middle loop.

Apr 9 2022, 2:27 PM · Restricted Project, Restricted Project

Apr 7 2022

bcahoon added inline comments to D123230: [UnifyLoopExits] Reduce number of guard blocks.
Apr 7 2022, 10:08 AM · Restricted Project, Restricted Project
bcahoon updated the diff for D123230: [UnifyLoopExits] Reduce number of guard blocks.

Changes based upon review comments.

Apr 7 2022, 10:02 AM · Restricted Project, Restricted Project

Apr 6 2022

bcahoon added a comment to D122672: [CodeGen][ARM] Enable Swing Module Scheduling for ARM.

It's great to see extensions to the pipeliner so that it works on more targets and loops that don't assume a hardware loop. A little while back a couple of functions, see shoulgnoreForPipelining, were added to support regular loops. However, I don't see that function used. Perhaps that effort was never completely finished? Do we need to get rid of that function, or try to combine the work you've done with that work?

Apr 6 2022, 6:39 PM · Restricted Project, Restricted Project
bcahoon requested review of D123231: [StructurizeCFG] Improve basic block ordering.
Apr 6 2022, 9:08 AM · Restricted Project, Restricted Project
bcahoon requested review of D123230: [UnifyLoopExits] Reduce number of guard blocks.
Apr 6 2022, 9:05 AM · Restricted Project, Restricted Project

Feb 22 2022

bcahoon committed rG3cc15e2cb657: [SLP] Fix assert from non-constant index in insertelement (authored by bcahoon).
[SLP] Fix assert from non-constant index in insertelement
Feb 22 2022, 2:01 PM
bcahoon closed D120223: [SLP] Fix assert from non-constant index in insertelement.
Feb 22 2022, 2:01 PM · Restricted Project
bcahoon updated the diff for D120223: [SLP] Fix assert from non-constant index in insertelement.

Changes based upon review. Don't just skip over insertelements with a
non-constant index. Instead, fall through to include additional cost
calculation.

Feb 22 2022, 12:55 PM · Restricted Project
bcahoon added inline comments to D120223: [SLP] Fix assert from non-constant index in insertelement.
Feb 22 2022, 11:28 AM · Restricted Project
bcahoon added inline comments to D120223: [SLP] Fix assert from non-constant index in insertelement.
Feb 22 2022, 11:13 AM · Restricted Project
bcahoon added inline comments to D120223: [SLP] Fix assert from non-constant index in insertelement.
Feb 22 2022, 10:06 AM · Restricted Project

Feb 20 2022

bcahoon requested review of D120223: [SLP] Fix assert from non-constant index in insertelement.
Feb 20 2022, 4:43 PM · Restricted Project

Jan 31 2022

bcahoon accepted D118272: AMDGPU: Add code object v5 support and generate metadata for implicit kernel args.

There are some clang-format issues to be addressed before committing. Other than that, the patch LGTM. Thanks!

Jan 31 2022, 5:09 PM · Restricted Project

Jan 7 2022

bcahoon accepted D116803: [GlobalISel] Use getPreferredShiftAmountTy in one more G_UBFX combine.

Looks good to me.

Jan 7 2022, 12:30 PM · Restricted Project
bcahoon accepted D116802: [GlobalISel] Fix legality checks for G_UBFX combines.

Looks good to me. Thanks!

Jan 7 2022, 12:27 PM · Restricted Project

Dec 23 2021

bcahoon committed rGd45a24799899: [AMDGPU] Don't remove VGPR to AGPR dead spills from frame info (authored by bcahoon).
[AMDGPU] Don't remove VGPR to AGPR dead spills from frame info
Dec 23 2021, 9:12 AM
bcahoon closed D115996: [AMDGPU] Don't remove VGPR to AGPR dead spills from frame info.
Dec 23 2021, 9:12 AM · Restricted Project

Dec 22 2021

bcahoon updated the diff for D115996: [AMDGPU] Don't remove VGPR to AGPR dead spills from frame info.

Changes so that the VGPR to AGPR spill slot can be removed if stack slot coloring has not allocated multiple objects to the same slot. Added a couple extra test cases to check for different cases when the slot can/can't be removed.

Dec 22 2021, 3:08 PM · Restricted Project

Dec 20 2021

bcahoon added a comment to D115996: [AMDGPU] Don't remove VGPR to AGPR dead spills from frame info.

Will the slot remain in the final allocation?

Yes. At least in the example I'm seeing.

Is there any way to get rid of them? Check they are actually dead, or move code later?

Dec 20 2021, 5:31 PM · Restricted Project
bcahoon added a comment to D115996: [AMDGPU] Don't remove VGPR to AGPR dead spills from frame info.

Will the slot remain in the final allocation?

Dec 20 2021, 10:57 AM · Restricted Project
bcahoon updated the summary of D115996: [AMDGPU] Don't remove VGPR to AGPR dead spills from frame info.
Dec 20 2021, 6:59 AM · Restricted Project

Dec 18 2021

bcahoon retitled D115996: [AMDGPU] Don't remove VGPR to AGPR dead spills from frame info from [AMDGPR] Don't remove VGPR to AGPR dead spills from frame info to [AMDGPU] Don't remove VGPR to AGPR dead spills from frame info.
Dec 18 2021, 1:29 PM · Restricted Project
bcahoon requested review of D115996: [AMDGPU] Don't remove VGPR to AGPR dead spills from frame info.
Dec 18 2021, 1:24 PM · Restricted Project

Oct 13 2021

bcahoon added a comment to D109762: [NewPM][SimpleLoopUnswitch] Add DivergenceInfo.

I talked to some people and we've decided that the best thing to do would be to refactor out the nontrivial unswitching part into a function pass. Nontrivial unswitching is fairly special in the kinds of transforms it does.

Oct 13 2021, 3:20 PM · Restricted Project

Sep 21 2021

bcahoon committed rGcbdf624bb82b: [AMDGPU] Correctly merge alias.scope and noalias metadata for memops (authored by bcahoon).
[AMDGPU] Correctly merge alias.scope and noalias metadata for memops
Sep 21 2021, 11:07 AM
bcahoon closed D110049: [AMDGPU] Correctly merge alias.scope and noalias metadata for memops.
Sep 21 2021, 11:06 AM · Restricted Project

Sep 20 2021

bcahoon added inline comments to D110049: [AMDGPU] Correctly merge alias.scope and noalias metadata for memops.
Sep 20 2021, 8:02 PM · Restricted Project
bcahoon updated the diff for D110049: [AMDGPU] Correctly merge alias.scope and noalias metadata for memops.

Add CHECKs for the alias scope metadata. Removed unintentional ws.

Sep 20 2021, 7:50 PM · Restricted Project

Sep 19 2021

bcahoon added inline comments to D109762: [NewPM][SimpleLoopUnswitch] Add DivergenceInfo.
Sep 19 2021, 6:31 PM · Restricted Project
bcahoon requested review of D110049: [AMDGPU] Correctly merge alias.scope and noalias metadata for memops.
Sep 19 2021, 6:27 PM · Restricted Project

Sep 16 2021

bcahoon added inline comments to D109762: [NewPM][SimpleLoopUnswitch] Add DivergenceInfo.
Sep 16 2021, 12:31 PM · Restricted Project
bcahoon added inline comments to D109762: [NewPM][SimpleLoopUnswitch] Add DivergenceInfo.
Sep 16 2021, 9:59 AM · Restricted Project

Sep 14 2021

bcahoon added inline comments to D109762: [NewPM][SimpleLoopUnswitch] Add DivergenceInfo.
Sep 14 2021, 6:47 PM · Restricted Project
bcahoon added a comment to D109762: [NewPM][SimpleLoopUnswitch] Add DivergenceInfo.

you should probably check that this doesn't affect compile times too much since we're creating some new (potentially expensive) analyses without any sort of caching

Sep 14 2021, 6:41 PM · Restricted Project
bcahoon updated the diff for D109762: [NewPM][SimpleLoopUnswitch] Add DivergenceInfo.

Added amdgpu-registered-target to test case.

Sep 14 2021, 6:37 PM · Restricted Project
bcahoon requested review of D109762: [NewPM][SimpleLoopUnswitch] Add DivergenceInfo.
Sep 14 2021, 7:44 AM · Restricted Project

Aug 18 2021

bcahoon added inline comments to D108315: [AMDGPU] Add alias.scope metadata to lowered LDS struct.
Aug 18 2021, 2:02 PM · Restricted Project

Jul 30 2021

bcahoon committed rGc4c379d633a1: [LoopStrengthReduction] Fix pointer extend asserts (authored by bcahoon).
[LoopStrengthReduction] Fix pointer extend asserts
Jul 30 2021, 2:30 PM
bcahoon closed D107185: [LoopStrengthReduction] Fix pointer to int extend asserts.
Jul 30 2021, 2:30 PM · Restricted Project
bcahoon added inline comments to D107185: [LoopStrengthReduction] Fix pointer to int extend asserts.
Jul 30 2021, 12:58 PM · Restricted Project
bcahoon updated the diff for D107185: [LoopStrengthReduction] Fix pointer to int extend asserts.

Moved checks for pointer type in ScaledReg and BaseRegs to outside the loop.

Jul 30 2021, 12:54 PM · Restricted Project
bcahoon requested review of D107185: [LoopStrengthReduction] Fix pointer to int extend asserts.
Jul 30 2021, 10:41 AM · Restricted Project

Jun 28 2021

bcahoon committed rGf9f5d415453b: [AMDGPU][GlobalISel] Legalize and select G_SBFX and G_UBFX (authored by bcahoon).
[AMDGPU][GlobalISel] Legalize and select G_SBFX and G_UBFX
Jun 28 2021, 6:13 AM
bcahoon closed D100149: [AMDGPU][GlobalISel] Legalize and select G_SBFX and G_UBFX.
Jun 28 2021, 6:13 AM · Restricted Project

Jun 26 2021

bcahoon added a comment to D100149: [AMDGPU][GlobalISel] Legalize and select G_SBFX and G_UBFX.

LGTM for AMDGPU, and I guess you haven't changed the behaviour for AArch64. What about other GlobalISel targets like MIPS and X86? Will they suddenly start seeing G_SBFX/G_UBSX where they weren't expecting them? Anyway I've added a couple more globalisel reviewers.

Jun 26 2021, 1:44 PM · Restricted Project

Jun 24 2021

bcahoon updated the diff for D100149: [AMDGPU][GlobalISel] Legalize and select G_SBFX and G_UBFX.

Rebased

Jun 24 2021, 8:33 AM · Restricted Project
bcahoon committed rG927b80978345: [GlobalISel] Describe undefined values for G_SBFX/G_UBFX operands (authored by bcahoon).
[GlobalISel] Describe undefined values for G_SBFX/G_UBFX operands
Jun 24 2021, 6:44 AM
bcahoon closed D104245: [GlobalISel] Describe undefined values for G_SBFX/G_UBFX operands.
Jun 24 2021, 6:44 AM · Restricted Project

Jun 18 2021

bcahoon added inline comments to D104245: [GlobalISel] Describe undefined values for G_SBFX/G_UBFX operands.
Jun 18 2021, 2:59 PM · Restricted Project

Jun 17 2021

bcahoon added a comment to D104245: [GlobalISel] Describe undefined values for G_SBFX/G_UBFX operands.

Thanks for doing this. I think it's important that we reach agreement on these details.

I would suggest these rules (1):

G_SBFX, G_UBFX: 0 <= lsb < lsb + width <= bitwidth (all values unsigned)

This implies that width is not allowed to be 0.

Jun 17 2021, 7:38 AM · Restricted Project
bcahoon updated the diff for D104245: [GlobalISel] Describe undefined values for G_SBFX/G_UBFX operands.

Improved description of legal values, based upon review comments.

Jun 17 2021, 7:34 AM · Restricted Project

Jun 14 2021

bcahoon requested review of D104245: [GlobalISel] Describe undefined values for G_SBFX/G_UBFX operands.
Jun 14 2021, 10:53 AM · Restricted Project

Jun 13 2021

bcahoon added inline comments to D100149: [AMDGPU][GlobalISel] Legalize and select G_SBFX and G_UBFX.
Jun 13 2021, 6:31 PM · Restricted Project
bcahoon updated the diff for D100149: [AMDGPU][GlobalISel] Legalize and select G_SBFX and G_UBFX.

Addressed review comments. Fixed doxygen comment, and a check for width <= 32. Also, when converting the G_SBFX/G_UBFX to a shift sequence for the sign extend, clarify that the expectation is that the width range is between 1 and 64-Offset.

Jun 13 2021, 6:28 PM · Restricted Project

Jun 8 2021

bcahoon added a reverting change for rG211e584fa2a4: Revert "[AMDGPU] Add gfx1013 target": rG294efbbd3e3d: Reland "[AMDGPU] Add gfx1013 target".
Jun 8 2021, 6:16 PM
bcahoon committed rG294efbbd3e3d: Reland "[AMDGPU] Add gfx1013 target" (authored by bcahoon).
Reland "[AMDGPU] Add gfx1013 target"
Jun 8 2021, 6:16 PM
bcahoon added a reverting change for rGea10a86984ea: [AMDGPU] Add gfx1013 target: rG211e584fa2a4: Revert "[AMDGPU] Add gfx1013 target".
Jun 8 2021, 1:42 PM
bcahoon committed rG211e584fa2a4: Revert "[AMDGPU] Add gfx1013 target" (authored by bcahoon).
Revert "[AMDGPU] Add gfx1013 target"
Jun 8 2021, 1:42 PM
bcahoon added a reverting change for D103663: [AMDGPU] Add gfx1013 target: rG211e584fa2a4: Revert "[AMDGPU] Add gfx1013 target".
Jun 8 2021, 1:42 PM · Restricted Project, Restricted Project, Restricted Project, Restricted Project
bcahoon added inline comments to D103663: [AMDGPU] Add gfx1013 target.
Jun 8 2021, 10:21 AM · Restricted Project, Restricted Project, Restricted Project, Restricted Project
bcahoon committed rGea10a86984ea: [AMDGPU] Add gfx1013 target (authored by bcahoon).
[AMDGPU] Add gfx1013 target
Jun 8 2021, 9:56 AM