[PowerPC][XCOFF] Create 8 and 16 byte aligned constant csects.

[sfertile]

Summary

Fixes issue where late materialized constants can be more strictly aligned than their containing csect, whose alignment can't be updated after emitting the .csect asm directive. Add rodata csects for 8 and 16 byte aligned constants, and map constant to those csects based on their alignment.

[sfertile]

ping.

[hubert.reinterpretcast]

llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp

2419

s/then/than/;

2426

Please fix formatting.

llvm/test/CodeGen/PowerPC/aix-rodata-align.ll

8

Would an XCOFF output case be reasonable to test here?

[sfertile]

Spelling and formatting fixes, and added coverage for the XCOFF object writing.

[hubert.reinterpretcast]

LGTM; thanks!

llvm/include/llvm/MC/MCObjectFileInfo.h

protected:
   MCSection *SXDataSection = nullptr;
   MCSection *GEHContSection = nullptr;
   MCSection *GFIDsSection = nullptr;
   MCSection *GIATsSection = nullptr;
   MCSection *GLJMPSection = nullptr;
 
   // XCOFF specific sections
   MCSection *TOCBaseSection = nullptr;
+  MCSection *ReadOnly8Section = nullptr;
+  MCSection *ReadOnly16Section = nullptr;
 
 public:
   void initMCObjectFileInfo(MCContext &MCCtx, bool PIC,
                             bool LargeCodeModel = false);
   MCContext &getContext() const { return *Ctx; }
 
   bool getSupportsWeakOmittedEHFrame() const {
     return SupportsWeakOmittedEHFrame;

llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp

bool TargetLoweringObjectFileXCOFF::shouldPutJumpTableInFunctionSection(
   return false;
 }
 
 /// Given a mergeable constant with the specified size and relocation
 /// information, return a section that it should be placed in.
 MCSection *TargetLoweringObjectFileXCOFF::getSectionForConstant(
     const DataLayout &DL, SectionKind Kind, const Constant *C,
     Align &Alignment) const {
-  //TODO: Enable emiting constant pool to unique sections when we support it.
+  // TODO: Enable emiting constant pool to unique sections when we support it.
+  if (Alignment > Align(16))
+    report_fatal_error("Alignments greater than 16 not yet supported.");
+
+  if (Alignment == Align(8)) {
+    assert(ReadOnly8Section && "Section should always be initialized.");
+    return ReadOnly8Section;
+  }
+
+  if (Alignment == Align(16)) {
+    assert(ReadOnly16Section && "Section should always be initialized.");
+    return ReadOnly16Section;
+  }
+
   return ReadOnlySection;
 }
 
 void TargetLoweringObjectFileXCOFF::Initialize(MCContext &Ctx,
                                                const TargetMachine &TgtM) {
   TargetLoweringObjectFile::Initialize(Ctx, TgtM);
   TTypeEncoding =
       dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_datarel |

llvm/lib/MC/MCObjectFileInfo.cpp

DataSection = Ctx->getXCOFFSection(
       ".data", SectionKind::getData(),
       XCOFF::CsectProperties(XCOFF::StorageMappingClass::XMC_RW, XCOFF::XTY_SD),
       /* MultiSymbolsAllowed*/ true);
 
   ReadOnlySection = Ctx->getXCOFFSection(
       ".rodata", SectionKind::getReadOnly(),
       XCOFF::CsectProperties(XCOFF::StorageMappingClass::XMC_RO, XCOFF::XTY_SD),
       /* MultiSymbolsAllowed*/ true);
+  ReadOnlySection->setAlignment(Align(4));
+
+  ReadOnly8Section = Ctx->getXCOFFSection(
+      ".rodata.8", SectionKind::getReadOnly(),
+      XCOFF::CsectProperties(XCOFF::StorageMappingClass::XMC_RO, XCOFF::XTY_SD),
+      /* MultiSymbolsAllowed*/ true);
+  ReadOnly8Section->setAlignment(Align(8));
+
+  ReadOnly16Section = Ctx->getXCOFFSection(
+      ".rodata.16", SectionKind::getReadOnly(),
+      XCOFF::CsectProperties(XCOFF::StorageMappingClass::XMC_RO, XCOFF::XTY_SD),
+      /* MultiSymbolsAllowed*/ true);
+  ReadOnly16Section->setAlignment(Align(16));
 
   TLSDataSection = Ctx->getXCOFFSection(
       ".tdata", SectionKind::getThreadData(),
       XCOFF::CsectProperties(XCOFF::StorageMappingClass::XMC_TL, XCOFF::XTY_SD),
       /* MultiSymbolsAllowed*/ true);
 
   TOCBaseSection = Ctx->getXCOFFSection(
       "TOC", SectionKind::getData(),

llvm/test/CodeGen/PowerPC/aix-constant-align.ll

+; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr7 < %s | \
+; RUN:   FileCheck %s --check-prefixes=CHECK,CHECK32
+
+; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr7 < %s | \
+; RUN:   FileCheck %s --check-prefixes=CHECK,CHECK64
+
+
+@NOT_PI = constant double 3.000000e+00, align 8
+
+define double @PIDouble() #0 {
+  entry:
+    ret double 3.141590e+00
+}
+
+define float @PIfloat() #0 {
+  entry:
+    ret float 0x400921FA00000000
+}
+
+; CHECK:         .csect .rodata.8[RO],3
+; CHECK-NEXT:    .align  3
+; CHECK-NEXT:  L..CPI0_0:
+; CHECK32-NEXT:  .vbyte  4, 1074340345
+; CHECK32-NEXT:  .vbyte  4, 4028335726
+; CHECK64-NEXT:  .vbyte  8, 0x400921f9f01b866e
+
+
+; CHECK:         .csect .rodata[RO],2
+; CHECK-NEXT:    .align  2
+; CHECK-NEXT:  L..CPI1_0:
+; CHECK-NEXT:    .vbyte  4, 0x40490fd0
+
+; CHECK:         .csect NOT_PI[RO],3

llvm/test/CodeGen/PowerPC/aix-rodata-align.ll

+; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr7 \
+; RUN:     -mattr=+altivec -data-sections=false < %s | \
+; RUN:   FileCheck %s
+
+; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr7 \
+; RUN:     -mattr=+altivec -data-sections=false < %s | \
+; RUN:   FileCheck %s
+
+; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr7 \
+; RUN:     -mattr=+altivec -data-sections=false -filetype=obj -o %t.o < %s
+; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=OBJ %s
+
+define <16 x i8> @test() {
+entry:
+  ret <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>
+}
+; CHECK:        .csect .rodata.16[RO],4
+; CHECK-NEXT:   .align  4
+; CHECK-NEXT: L..CPI0_0:
+; CHECK-NEXT:   .byte   0                               # 0x0
+; CHECK-NEXT:   .byte   1                               # 0x1
+; CHECK-NEXT:   .byte   2                               # 0x2
+; CHECK-NEXT:   .byte   3                               # 0x3
+; CHECK-NEXT:   .byte   4                               # 0x4
+; CHECK-NEXT:   .byte   5                               # 0x5
+; CHECK-NEXT:   .byte   6                               # 0x6
+; CHECK-NEXT:   .byte   7                               # 0x7
+; CHECK-NEXT:   .byte   8                               # 0x8
+; CHECK-NEXT:   .byte   9                               # 0x9
+; CHECK-NEXT:   .byte   10                              # 0xa
+; CHECK-NEXT:   .byte   11                              # 0xb
+; CHECK-NEXT:   .byte   12                              # 0xc
+; CHECK-NEXT:   .byte   13                              # 0xd
+; CHECK-NEXT:   .byte   14                              # 0xe
+; CHECK-NEXT:   .byte   15                              # 0xf
+
+; OBJ-LABEL: <.rodata.16>:
+; OBJ-NEXT:    00 01 02 03
+; OBJ-NEXT:    04 05 06 07
+; OBJ-NEXT:    08 09 0a 0b
+; OBJ-NEXT:    0c 0d 0e 0f

llvm/test/CodeGen/PowerPC/aix-space.ll

 ; RUN: llc -verify-machineinstrs -O0 -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -O0 -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s
 
-@a = common global double 0.000000e+00, align 8
+@vi = global <4 x i32> zeroinitializer, section "custom_section", align 16
+@f = global float 0x400921E480000000, section "custom_section", align 16
 
-; Get some constants into the constant pool that need spacing for alignment
-define void @e() {
-entry:
-  %0 = load double, double* @a, align 8
-  %mul = fmul double 1.500000e+00, %0
-  store double %mul, double* @a, align 8
-  %mul1 = fmul double 0x3F9C71C71C71C71C, %0
-  store double %mul1, double* @a, align 8
-  ret void
-}
-
-; CHECK:      .space 4
+; CHECK:      .space 16
 ; CHECK-NOT:  .zero