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[RISCV] Add support for bitcasts between scalars and fixed-length vectors
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Authored by frasercrmck on Mar 31 2021, 9:26 AM.

Details

Summary

This patch supports bitcasts from scalar types to fixed-length vectors
and vice versa. It custom-lowers and custom-legalizes them to
EXTRACT_VECTOR_ELT/INSERT_VECTOR_ELT operations, using a single-element
vectors to hold the scalar where appropriate.

Previously, some of these would fail to select, others would be expanded
through stack loads and stores. Effort was made to ensure the codegen
avoids the stack for both legal and illegal scalar types.

Some of the codegen could be improved, but on first glance it looks like
a general optimization of EXTRACT_VECTOR_ELT when extracting an i64
element on RV32.

Diff Detail

Event Timeline

frasercrmck created this revision.Mar 31 2021, 9:26 AM
frasercrmck requested review of this revision.Mar 31 2021, 9:26 AM
Herald added a project: Restricted Project. · View Herald TranscriptMar 31 2021, 9:26 AM
craig.topper added inline comments.Mar 31 2021, 10:47 AM
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
3993

This fails for this test case on RV32 with fixed length vectors enabled.

define i64 @foo(double %x) {                                                                                                                                                                                                                                                           
  %a = bitcast double %x to i64                                                                                                                                                                                                                                                        
  ret i64 %a                                                                                                                                                                                                                                                                           
}
frasercrmck added inline comments.Apr 1 2021, 1:19 AM
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
3993

Yes of course, that was silly of me. I wish we could be more fine-grained when selecting Custom actions. We can probably just remove the assert and ensure the lines below work correctly, allowing other bitcasts to fall through.

  • prevent crashes during result legalization
frasercrmck marked an inline comment as done.Apr 1 2021, 2:12 AM
frasercrmck added inline comments.
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
1506

I have a feeling this assert is similarly unsafe, but I couldn't get a test case from an illegal scalar type to a legal result type. Is there a way to break it, @craig.topper?

craig.topper added inline comments.Apr 1 2021, 5:20 PM
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
1506
define float @foo(i32 %x) {
  %a = bitcast i32 %x to float
  ret float %a
}

Compile with -mtriple=riscv32 -target-abi=ilp32f -mattr=experimental-v,+f -riscv-v-vector-bits-min=128

  • remove assertion about when bitcasts are custom-legalized
frasercrmck marked an inline comment as done.Apr 5 2021, 3:12 AM
frasercrmck added inline comments.
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
1506

Ah yes of course, thanks. I had forgotten to use -target-abi so the bitcast was removed too early.

This revision is now accepted and ready to land.Apr 5 2021, 8:48 AM
frasercrmck retitled this revision from [RISCV] Add support for bitcasts between scalar and fixed-length vectors to [RISCV] Add support for bitcasts between scalars and fixed-length vectors.Apr 5 2021, 9:28 AM
This revision was automatically updated to reflect the committed changes.
frasercrmck marked an inline comment as done.