This is an archive of the discontinued LLVM Phabricator instance.

[RISCV] Preserve fixed-length VL on insert_vector_elt in more cases
ClosedPublic

Authored by frasercrmck on Mar 3 2021, 1:53 AM.

Details

Summary

This patch fixes up one case where the fixed-length-vector VL was
dropped (falling back to VLMAX) when inserting vector elements, as the
code would lower via ISD::INSERT_VECTOR_ELT (at index 0) which loses the
fixed-length vector information.

To this end, a custom node, VMV_S_XF_VL, was introduced to carry the VL
operand through to the final instruction. This node wraps the RVV
vmv.s.x and vmv.s.f instructions, which were being selected by
insert_vector_elt anyway.

There should be no observable difference in scalable-vector codegen.

There is still one outstanding drop from fixed-length VL to VLMAX, when
an i64 element is inserted into a vector on RV32; the splat (which is
custom legalized) has no notion of the original fixed-length vector
type.

Diff Detail

Event Timeline

frasercrmck created this revision.Mar 3 2021, 1:53 AM
frasercrmck requested review of this revision.Mar 3 2021, 1:53 AM
Herald added a project: Restricted Project. · View Herald TranscriptMar 3 2021, 1:53 AM
frasercrmck added inline comments.Mar 3 2021, 1:57 AM
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
13

Still using VLMAX here, because we're splatting an i64 using the vector container type. I suppose we either need a custom node or must emit something in the fixed-length type and converting back to the scalable type. I tried that with build_vector and splat_vector but neither worked. build_vector expanded itself, and splat_vector doesn't work on fixed-length vectors (and I'm not sure we want to).

Do you have any ideas, @craig.topper?

craig.topper added inline comments.Mar 3 2021, 9:33 AM
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
13

Nothing great beyond replicating the sequence in lowerSPLATVECTOR using RISCVISD::*_VL nodes.

I'm looking at type legalizing the vmv_v_x intrinsic for i64 on RV32 which has the same problem.

This revision is now accepted and ready to land.Mar 3 2021, 9:35 AM
This revision was landed with ongoing or failed builds.Mar 4 2021, 1:27 AM
This revision was automatically updated to reflect the committed changes.
frasercrmck added inline comments.Mar 4 2021, 1:30 AM
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
13

Yeah, perhaps that's just what we'll have to do. As a free function to emit the sequence in place? Because I believe build_vector automatically legalizes itself in an unhelpful way, and splat_vector could potentially open up a can of worms?