[SVE] Replace / operator in TypeSize/ElementCount with divideCoefficientBy

[david-arm]

Summary

After some recent upstream discussion we decided that it was best
to avoid having the / operator for both ElementCount and TypeSize,
since this could give the impression that these classes can be used
in the same way as basic integer integer types. However, division
for scalable types is a bit odd because we are only dividing the
minimum quantity by a value, as opposed to something like:

(MinSize * Vscale) / SomeValue

This is why when performing division it's important the caller
first establishes whether the operation makes sense, perhaps by
calling isKnownMultipleOf() prior to division. The caller must now
explictly call divideCoefficientBy() on the class to perform the operation.

[sdesmalen]

llvm/include/llvm/Support/TypeSize.h

66

As we discussed in the SVE sync-up call, mul isn't strictly needed but rather added for consistency.
That raises the question whether operator- and operator+ also need to have a sub and add functions, as those are not "mathematically correct" either given they only support adding either 2 scalable, or 2 fixed-sized sizes, and they assert otherwise.

252

Given the particular reasons for adding these in favour of the overloaded operators, these functions need a clear description that explains why we've done so, and why the results may not be entirely arithmatically correct when uses of this function assume vscale to be some specific value at compile-time.

305

Please add a description for this method.

[ctetreau]

llvm/include/llvm/Support/TypeSize.h

66

I think given the outcome of the call today, operator* can probably stay.

If we're going to document the header that "if it behaves the same as in real math, then it's an operator. If not, it's a named function", then this multiply is fine.

69–78

I would suggest renaming this to something more self-documenting. Perhaps coefficientDiv? This has the added benefit of making it seem less strange that it's a named divide rather than operator/

240–252

Same comment as ElementCount

[david-arm]

• Reverted the operator* change.
• Added comments to the new functions.

[sdesmalen]

llvm/include/llvm/Support/TypeSize.h

69–78

Agree that the use of coefficient is a good addition. Perhaps this is getting into bike-shedding territory, but then I'd probably prefer the more verbose divideCoefficientBy as this reads a bit more intuitive to me (and follows a natural way of phrasing similar to isKnownMultipleOf). Any thoughts?

[paulwalker-arm]

I'm not a great fan of the coefficientDiv name but once in I doubt I'll give it a second thought. That said, because by far the most common usage is coefficientDiv(2), whose intent is clearly to knowingly split something into two equal parts I'm wondering if adding a halve() utility function will keep the main usage short and meaningful and then there's even less reason to care about the name of coefficientDiv.

llvm/include/llvm/Support/TypeSize.h

86–89

I don't think it's a good idea to promote incompatible usages of this function. Let's keep the messaging simple with only a true result being something that is meaningful, which is inline with the other isKnown methods.

306–309

As above.

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

19524–19525

Should this use isKnownMultipleOf to match the coefficientDiv you've introduced?

llvm/lib/CodeGen/TargetLoweringBase.cpp

835–836

SVT.getHalfNumVectorElementsVT(Context) ?

llvm/unittests/CodeGen/ScalableVectorMVTsTest.cpp

64

Comment needs updating, I'd just drop the overloaded '*' and '/' part.

[david-arm]

I think that introducing a halve() function makes sense and I'll replace div(2) with halve(), unless someone strongly objects? I don't have strong feelings about the name to be honest, I'm personally happy enough to stick with coefficientDiv. @ctetreau any thoughts on Sander's suggestion of divideCoefficientBy?

[david-arm]

• Introduced a new halve() function to replace the common case of coefficientDiv(2).
• Updated the comments about isKnownMultipleOf.

[ctetreau]

In D87700#2290260, @david-arm wrote:

... thoughts on Sander's suggestion of divideCoefficientBy?

I think the important thing is that the function has "coefficient" in the name. I prefer my name because it's shorter, but if more people prefer Sander's suggestion that's fine.

My general philosophy is "the name should imply what the function does" and not "the name should read like an english sentence". We're not COBOL programmers after all :)

[ctetreau]

I'm not in love with the halve function. I count 8 places where it's used in real code in this patch, which really isn't that much. I think having it in there will establish a precedent and encourage people to add a million "common case" helpers (why not double? quarter/quadruple? next/prev power of 2?) for constructing different sized ElementCounts.

Really, EC.halve() isn't that much less verbose than EC.coefficientDiv(2), and I suspect it will usually appear on its own line as an assignment since VectorType already has getHalfElementsVectorType.

[paulwalker-arm]

I think the precedent has already been set as VectorType and ValueType already deem doubling and halving to be special enough to have explicit operations, albeit they save more effort that what's being saved here. Personally I just think

ElementCount.halve()

is more meaningful/readable than

assert(ElementCount.isKnownMultiple(2));
ElementCount.coefficientDiv(2);

Whereas ElementCount * 2 is already meaningful enough.

[ctetreau]

I just wanted to voice my concerns for halve(). If nobody else has an opinion on the subject, then I'll not hold the review up over it.

[ctetreau]

I'm fine with the substance of this patch. Once we come to an agreement about what color the bikeshed should be, I think it's good to go.

[paulwalker-arm]

@david-arm The main priority is to remove the operator overloads so if universally using divideCoefficientBy pleases the most people then let's just do that.

llvm/unittests/CodeGen/ScalableVectorMVTsTest.cpp

66–67

If halve is kept then it makes sense to add an explicit test for it here.

66–67

Oops, please ignore what looks like a stale review comment :(

[sdesmalen]

I'm happy colour of the bikeshed. Please re-run clang-format on it though.

llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

2640

clang-format?

[paulwalker-arm]

Formatting issues aside this LGTM.

clang/lib/CodeGen/CGBuiltin.cpp

Value *CodeGenFunction::EmitCommonNeonBuiltinExpr(
   case NEON::BI__builtin_neon_splat_lane_v:
   case NEON::BI__builtin_neon_splat_laneq_v:
   case NEON::BI__builtin_neon_splatq_lane_v:
   case NEON::BI__builtin_neon_splatq_laneq_v: {
     auto NumElements = VTy->getElementCount();
     if (BuiltinID == NEON::BI__builtin_neon_splatq_lane_v)
       NumElements = NumElements * 2;
     if (BuiltinID == NEON::BI__builtin_neon_splat_laneq_v)
-      NumElements = NumElements / 2;
+      NumElements = NumElements.divideCoefficientBy(2);
 
     Ops[0] = Builder.CreateBitCast(Ops[0], VTy);
     return EmitNeonSplat(Ops[0], cast<ConstantInt>(Ops[1]), NumElements);
   }
   case NEON::BI__builtin_neon_vpadd_v:
   case NEON::BI__builtin_neon_vpaddq_v:
     // We don't allow fp/int overloading of intrinsics.
     if (VTy->getElementType()->isFloatingPointTy() &&
Value *CodeGenFunction::EmitAArch64SVEBuiltinExpr(unsigned BuiltinID,
   case SVE::BI__builtin_sve_svtbl2_u64:
   case SVE::BI__builtin_sve_svtbl2_s64:
   case SVE::BI__builtin_sve_svtbl2_f16:
   case SVE::BI__builtin_sve_svtbl2_bf16:
   case SVE::BI__builtin_sve_svtbl2_f32:
   case SVE::BI__builtin_sve_svtbl2_f64: {
     SVETypeFlags TF(Builtin->TypeModifier);
     auto VTy = cast<llvm::VectorType>(getSVEType(TF));
-    auto TupleTy = llvm::VectorType::get(VTy->getElementType(),
-                                         VTy->getElementCount() * 2);
+    auto TupleTy = llvm::VectorType::getDoubleElementsVectorType(VTy);
     Function *FExtr =
         CGM.getIntrinsic(Intrinsic::aarch64_sve_tuple_get, {VTy, TupleTy});
     Value *V0 = Builder.CreateCall(FExtr, {Ops[0], Builder.getInt32(0)});
     Value *V1 = Builder.CreateCall(FExtr, {Ops[0], Builder.getInt32(1)});
     Function *F = CGM.getIntrinsic(Intrinsic::aarch64_sve_tbl2, VTy);
     return Builder.CreateCall(F, {V0, V1, Ops[1]});
   }
   }

llvm/include/llvm/CodeGen/ValueTypes.h

#endif
 
     // Return a VT for a vector type with the same element type but
     // half the number of elements. The type returned may be an
     // extended type.
     EVT getHalfNumVectorElementsVT(LLVMContext &Context) const {
       EVT EltVT = getVectorElementType();
       auto EltCnt = getVectorElementCount();
       assert(EltCnt.isKnownEven() && "Splitting vector, but not in half!");
-      return EVT::getVectorVT(Context, EltVT, EltCnt / 2);
+      return EVT::getVectorVT(Context, EltVT, EltCnt.divideCoefficientBy(2));
+    }
+
+    // Return a VT for a vector type with the same element type but
+    // double the number of elements. The type returned may be an
+    // extended type.
+    EVT getDoubleNumVectorElementsVT(LLVMContext &Context) const {
+      EVT EltVT = getVectorElementType();
+      auto EltCnt = getVectorElementCount();
+      return EVT::getVectorVT(Context, EltVT, EltCnt * 2);
     }
 
     /// Returns true if the given vector is a power of 2.
     bool isPow2VectorType() const {
       unsigned NElts = getVectorMinNumElements();
       return !(NElts & (NElts - 1));
     }
 

llvm/include/llvm/IR/DerivedTypes.h

public:
   }
 
   /// This static method returns a VectorType with half as many elements as the
   /// input type and the same element type.
   static VectorType *getHalfElementsVectorType(VectorType *VTy) {
     auto EltCnt = VTy->getElementCount();
     assert(EltCnt.isKnownEven() &&
            "Cannot halve vector with odd number of elements.");
-    return VectorType::get(VTy->getElementType(), EltCnt/2);
+    return VectorType::get(VTy->getElementType(),
+                           EltCnt.divideCoefficientBy(2));
   }
 
   /// This static method returns a VectorType with twice as many elements as the
   /// input type and the same element type.
   static VectorType *getDoubleElementsVectorType(VectorType *VTy) {
     auto EltCnt = VTy->getElementCount();
     assert((EltCnt.getKnownMinValue() * 2ull) <= UINT_MAX &&
            "Too many elements in vector");

llvm/include/llvm/Support/MachineValueType.h

public:
     }
 
     /// Return a VT for a vector type with the same element type but
     /// half the number of elements.
     MVT getHalfNumVectorElementsVT() const {
       MVT EltVT = getVectorElementType();
       auto EltCnt = getVectorElementCount();
       assert(EltCnt.isKnownEven() && "Splitting vector, but not in half!");
-      return getVectorVT(EltVT, EltCnt / 2);
+      return getVectorVT(EltVT, EltCnt.divideCoefficientBy(2));
     }
 
     /// Returns true if the given vector is a power of 2.
     bool isPow2VectorType() const {
       unsigned NElts = getVectorNumElements();
       return !(NElts & (NElts - 1));
     }
 

llvm/include/llvm/Support/TypeSize.h

private:
   ElementCount(unsigned Min, bool Scalable) : Min(Min), Scalable(Scalable) {}
 
 public:
   ElementCount() = default;
 
   ElementCount operator*(unsigned RHS) {
     return { Min * RHS, Scalable };
   }
-  ElementCount operator/(unsigned RHS) {
-    assert(Min % RHS == 0 && "Min is not a multiple of RHS.");
-    return { Min / RHS, Scalable };
-  }
 
   friend ElementCount operator-(const ElementCount &LHS,
                                 const ElementCount &RHS) {
     assert(LHS.Scalable == RHS.Scalable &&
            "Arithmetic using mixed scalable and fixed types");
     return {LHS.Min - RHS.Min, LHS.Scalable};
   }
 
   bool operator==(const ElementCount& RHS) const {
     return Min == RHS.Min && Scalable == RHS.Scalable;
   }
   bool operator!=(const ElementCount& RHS) const {
     return !(*this == RHS);
   }
   bool operator==(unsigned RHS) const { return Min == RHS && !Scalable; }
   bool operator!=(unsigned RHS) const { return !(*this == RHS); }
 
   ElementCount &operator*=(unsigned RHS) {
     Min *= RHS;
     return *this;
   }
 
-  ElementCount &operator/=(unsigned RHS) {
-    Min /= RHS;
-    return *this;
+  /// We do not provide the '/' operator here because division for polynomial
+  /// types does not work in the same way as for normal integer types. We can
+  /// only divide the minimum value (or coefficient) by RHS, which is not the
+  /// same as
+  ///   (Min * Vscale) / RHS
+  /// The caller is recommended to use this function in combination with
+  /// isKnownMultipleOf(RHS), which lets the caller know if it's possible to
+  /// perform a lossless divide by RHS.
+  ElementCount divideCoefficientBy(unsigned RHS) const {
+    return ElementCount(Min / RHS, Scalable);
   }
 
   ElementCount NextPowerOf2() const {
     return {(unsigned)llvm::NextPowerOf2(Min), Scalable};
   }
 
+  /// This function tells the caller whether the element count is known at
+  /// compile time to be a multiple of the scalar value RHS.
   bool isKnownMultipleOf(unsigned RHS) const {
     return Min % RHS == 0;
   }
 
   static ElementCount getFixed(unsigned Min) { return {Min, false}; }
   static ElementCount getScalable(unsigned Min) { return {Min, true}; }
   static ElementCount get(unsigned Min, bool Scalable) {
     return {Min, Scalable};
   }
 
   /// Printing function.
public:
   // Convenience operators to obtain relative sizes independently of
   // the scalable flag.
   TypeSize operator*(unsigned RHS) const {
     return { MinSize * RHS, IsScalable };
   }
 
   friend TypeSize operator*(const unsigned LHS, const TypeSize &RHS) {
     return { LHS * RHS.MinSize, RHS.IsScalable };
   }
 
-  TypeSize operator/(unsigned RHS) const {
-    return { MinSize / RHS, IsScalable };
+  /// We do not provide the '/' operator here because division for polynomial
+  /// types does not work in the same way as for normal integer types. We can
+  /// only divide the minimum value (or coefficient) by RHS, which is not the
+  /// same as
+  ///   (MinSize * Vscale) / RHS
+  /// The caller is recommended to use this function in combination with
+  /// isKnownMultipleOf(RHS), which lets the caller know if it's possible to
+  /// perform a lossless divide by RHS.
+  TypeSize divideCoefficientBy(uint64_t RHS) const {
+    return {MinSize / RHS, IsScalable};
   }
 
   TypeSize &operator-=(TypeSize RHS) {
     assert(IsScalable == RHS.IsScalable &&
            "Subtraction using mixed scalable and fixed types");
     MinSize -= RHS.MinSize;
     return *this;
   }
 
   TypeSize &operator+=(TypeSize RHS) {
     assert(IsScalable == RHS.IsScalable &&
            "Addition using mixed scalable and fixed types");
     MinSize += RHS.MinSize;
     return *this;
   }
 
   friend TypeSize operator-(const TypeSize &LHS, const TypeSize &RHS) {
     assert(LHS.IsScalable == RHS.IsScalable &&
            "Arithmetic using mixed scalable and fixed types");
     return {LHS.MinSize - RHS.MinSize, LHS.IsScalable};
   }
 
-  friend TypeSize operator/(const TypeSize &LHS, const TypeSize &RHS) {
-    assert(LHS.IsScalable == RHS.IsScalable &&
-           "Arithmetic using mixed scalable and fixed types");
-    return {LHS.MinSize / RHS.MinSize, LHS.IsScalable};
-  }
-
-  friend TypeSize operator%(const TypeSize &LHS, const TypeSize &RHS) {
-    assert(LHS.IsScalable == RHS.IsScalable &&
-           "Arithmetic using mixed scalable and fixed types");
-    return {LHS.MinSize % RHS.MinSize, LHS.IsScalable};
-  }
-
   // Return the minimum size with the assumption that the size is exact.
   // Use in places where a scalable size doesn't make sense (e.g. non-vector
   // types, or vectors in backends which don't support scalable vectors).
   uint64_t getFixedSize() const {
     assert(!IsScalable && "Request for a fixed size on a scalable object");
     return MinSize;
   }
 
public:
   }
 
   // Returns true if the type size is non-zero.
   bool isNonZero() const { return MinSize != 0; }
 
   // Returns true if the type size is zero.
   bool isZero() const { return MinSize == 0; }
 
+  /// This function tells the caller whether the type size is known at
+  /// compile time to be a multiple of the scalar value RHS.
+  bool isKnownMultipleOf(uint64_t RHS) const { return MinSize % RHS == 0; }
+
   // Casts to a uint64_t if this is a fixed-width size.
   //
   // This interface is deprecated and will be removed in a future version
   // of LLVM in favour of upgrading uses that rely on this implicit conversion
   // to uint64_t. Calls to functions that return a TypeSize should use the
   // proper interfaces to TypeSize.
   // In practice this is mostly calls to MVT/EVT::getSizeInBits().
   //
   // To determine how to upgrade the code:
#endif
   friend TypeSize operator*(const int LHS, const TypeSize &RHS) {
     return { LHS * RHS.MinSize, RHS.IsScalable };
   }
 
   friend TypeSize operator*(const int64_t LHS, const TypeSize &RHS) {
     return { LHS * RHS.MinSize, RHS.IsScalable };
   }
 
-  TypeSize operator/(uint64_t RHS) const {
-    return { MinSize / RHS, IsScalable };
-  }
-
-  TypeSize operator/(int RHS) const {
-    return { MinSize / RHS, IsScalable };
-  }
-
-  TypeSize operator/(int64_t RHS) const {
-    return { MinSize / RHS, IsScalable };
-  }
-
   TypeSize NextPowerOf2() const {
     return TypeSize(llvm::NextPowerOf2(MinSize), IsScalable);
   }
 };
 
 /// Returns a TypeSize with a known minimum size that is the next integer
 /// (mod 2**64) that is greater than or equal to \p Value and is a multiple
 /// of \p Align. \p Align must be non-zero.

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

if ((SrcNumElts % DestNumElts) == 0) {
         SDLoc DL(N);
         SDValue NewIndex = DAG.getVectorIdxConstant(ExtIdx * SrcDestRatio, DL);
         SDValue NewExtract = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, NewExtVT,
                                          V.getOperand(0), NewIndex);
         return DAG.getBitcast(NVT, NewExtract);
       }
     }
     if ((DestNumElts % SrcNumElts) == 0) {
       unsigned DestSrcRatio = DestNumElts / SrcNumElts;
-      if ((NVT.getVectorMinNumElements() % DestSrcRatio) == 0) {
-        ElementCount NewExtEC = NVT.getVectorElementCount() / DestSrcRatio;
+      if (NVT.getVectorElementCount().isKnownMultipleOf(DestSrcRatio)) {
+        ElementCount NewExtEC =
+            NVT.getVectorElementCount().divideCoefficientBy(DestSrcRatio);
         EVT ScalarVT = SrcVT.getScalarType();
         if ((ExtIdx % DestSrcRatio) == 0) {
           SDLoc DL(N);
           unsigned IndexValScaled = ExtIdx / DestSrcRatio;
           EVT NewExtVT =
               EVT::getVectorVT(*DAG.getContext(), ScalarVT, NewExtEC);
           if (TLI.isOperationLegalOrCustom(ISD::EXTRACT_SUBVECTOR, NewExtVT)) {
             SDValue NewIndex = DAG.getVectorIdxConstant(IndexValScaled, DL);
if ((N0.isUndef() || N0SrcSVT == N1SrcSVT) &&
       unsigned EltSizeInBits = VT.getScalarSizeInBits();
       if ((EltSizeInBits % N1SrcSVT.getSizeInBits()) == 0) {
         unsigned Scale = EltSizeInBits / N1SrcSVT.getSizeInBits();
         NewVT = EVT::getVectorVT(Ctx, N1SrcSVT, NumElts * Scale);
         NewIdx = DAG.getVectorIdxConstant(InsIdx * Scale, DL);
       } else if ((N1SrcSVT.getSizeInBits() % EltSizeInBits) == 0) {
         unsigned Scale = N1SrcSVT.getSizeInBits() / EltSizeInBits;
         if (NumElts.isKnownMultipleOf(Scale) && (InsIdx % Scale) == 0) {
-          NewVT = EVT::getVectorVT(Ctx, N1SrcSVT, NumElts / Scale);
+          NewVT = EVT::getVectorVT(Ctx, N1SrcSVT,
+                                   NumElts.divideCoefficientBy(Scale));
           NewIdx = DAG.getVectorIdxConstant(InsIdx / Scale, DL);
         }
       }
       if (NewIdx && hasOperation(ISD::INSERT_SUBVECTOR, NewVT)) {
         SDValue Res = DAG.getBitcast(NewVT, N0Src);
         Res = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, NewVT, Res, N1Src, NewIdx);
         return DAG.getBitcast(VT, Res);
       }

llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

SDValue DAGTypeLegalizer::SplitVecOp_TruncateHelper(SDNode *N) {
   // Truncate them to 1/2 the element size.
   //
   // This assumes the number of elements is a power of two; any vector that
   // isn't should be widened, not split.
   EVT HalfElementVT = IsFloat ?
     EVT::getFloatingPointVT(InElementSize/2) :
     EVT::getIntegerVT(*DAG.getContext(), InElementSize/2);
   EVT HalfVT = EVT::getVectorVT(*DAG.getContext(), HalfElementVT,
-                                NumElements/2);
+                                NumElements.divideCoefficientBy(2));
 
   SDValue HalfLo;
   SDValue HalfHi;
   SDValue Chain;
   if (N->isStrictFPOpcode()) {
     HalfLo = DAG.getNode(N->getOpcode(), DL, {HalfVT, MVT::Other},
                          {N->getOperand(0), InLoVec});
     HalfHi = DAG.getNode(N->getOpcode(), DL, {HalfVT, MVT::Other},
                          {N->getOperand(0), InHiVec});
if (!LdTy.isVector())  {
     ConcatOps[--Idx] = BuildVectorFromScalar(DAG, LdTy, LdOps, i + 1, End);
   }
 
   ConcatOps[--Idx] = LdOps[i];
   for (--i; i >= 0; --i) {
     EVT NewLdTy = LdOps[i].getValueType();
     if (NewLdTy != LdTy) {
       // Create a larger vector.
+      TypeSize LdTySize = LdTy.getSizeInBits();
+      TypeSize NewLdTySize = NewLdTy.getSizeInBits();
+      assert(NewLdTySize.isScalable() == LdTySize.isScalable() &&
+             NewLdTySize.isKnownMultipleOf(LdTySize.getKnownMinSize()));
       unsigned NumOps =
-          (NewLdTy.getSizeInBits() / LdTy.getSizeInBits()).getKnownMinSize();
-      assert(
-          (NewLdTy.getSizeInBits() % LdTy.getSizeInBits()).getKnownMinSize() ==
-          0);
+          NewLdTySize.getKnownMinSize() / LdTySize.getKnownMinSize();
       SmallVector<SDValue, 16> WidenOps(NumOps);
       unsigned j = 0;
       for (; j != End-Idx; ++j)
         WidenOps[j] = ConcatOps[Idx+j];
       for (; j != NumOps; ++j)
         WidenOps[j] = DAG.getUNDEF(LdTy);
 
       ConcatOps[End-1] = DAG.getNode(ISD::CONCAT_VECTORS, dl, NewLdTy,
                                      WidenOps);
       Idx = End - 1;
       LdTy = NewLdTy;
     }
     ConcatOps[--Idx] = LdOps[i];
   }
 
   if (WidenWidth == LdTy.getSizeInBits() * (End - Idx))
     return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT,
                        makeArrayRef(&ConcatOps[Idx], End - Idx));
 
   // We need to fill the rest with undefs to build the vector.
-  unsigned NumOps = (WidenWidth / LdTy.getSizeInBits()).getKnownMinSize();
+  unsigned NumOps =
+      WidenWidth.getKnownMinSize() / LdTy.getSizeInBits().getKnownMinSize();
   SmallVector<SDValue, 16> WidenOps(NumOps);
   SDValue UndefVal = DAG.getUNDEF(LdTy);
   {
     unsigned i = 0;
     for (; i != End-Idx; ++i)
       WidenOps[i] = ConcatOps[Idx+i];
     for (; i != NumOps; ++i)
       WidenOps[i] = UndefVal;

llvm/lib/CodeGen/TargetLoweringBase.cpp

if (VT.isSimple()) {
 
     assert((LA == TypeLegal || LA == TypeSoftenFloat ||
             LA == TypeSoftPromoteHalf ||
             (NVT.isVector() ||
              ValueTypeActions.getTypeAction(NVT) != TypePromoteInteger)) &&
            "Promote may not follow Expand or Promote");
 
     if (LA == TypeSplitVector)
-      return LegalizeKind(LA,
-                          EVT::getVectorVT(Context, SVT.getVectorElementType(),
-                                           SVT.getVectorElementCount() / 2));
+      return LegalizeKind(LA, EVT(SVT).getHalfNumVectorElementsVT(Context));
     if (LA == TypeScalarizeVector)
       return LegalizeKind(LA, SVT.getVectorElementType());
     return LegalizeKind(LA, NVT);
   }
 
   // Handle Extended Scalar Types.
   if (!VT.isVector()) {
     assert(VT.isInteger() && "Float types must be simple");
     unsigned BitSize = VT.getSizeInBits();
     // First promote to a power-of-two size, then expand if necessary.
if (EltVT.isInteger()) {
 
     // Examine the element type.
     LegalizeKind LK = getTypeConversion(Context, EltVT);
 
     // If type is to be expanded, split the vector.
     //  <4 x i140> -> <2 x i140>
     if (LK.first == TypeExpandInteger)
       return LegalizeKind(TypeSplitVector,
-                          EVT::getVectorVT(Context, EltVT, NumElts / 2));
+                          VT.getHalfNumVectorElementsVT(Context));
 
     // Promote the integer element types until a legal vector type is found
     // or until the element integer type is too big. If a legal type was not
     // found, fallback to the usual mechanism of widening/splitting the
     // vector.
     EVT OldEltVT = EltVT;
     while (true) {
       // Increase the bitwidth of the element to the next pow-of-two
TargetLoweringBase::getTypeConversion(LLVMContext &Context, EVT VT) const {
 
   // Widen odd vectors to next power of two.
   if (!VT.isPow2VectorType()) {
     EVT NVT = VT.getPow2VectorType(Context);
     return LegalizeKind(TypeWidenVector, NVT);
   }
 
   // Vectors with illegal element types are expanded.
-  EVT NVT = EVT::getVectorVT(Context, EltVT, VT.getVectorElementCount() / 2);
+  EVT NVT = EVT::getVectorVT(Context, EltVT,
+                             VT.getVectorElementCount().divideCoefficientBy(2));
   return LegalizeKind(TypeSplitVector, NVT);
 }
 
 static unsigned getVectorTypeBreakdownMVT(MVT VT, MVT &IntermediateVT,
                                           unsigned &NumIntermediates,
                                           MVT &RegisterVT,
                                           TargetLoweringBase *TLI) {
   // Figure out the right, legal destination reg to copy into.
if (!isPowerOf2_32(EC.getKnownMinValue())) {
     EC = ElementCount::getFixed(1);
   }
 
   // Divide the input until we get to a supported size. This will
   // always end up with an EC that represent a scalar or a scalable
   // scalar.
   while (EC.getKnownMinValue() > 1 &&
          !TLI->isTypeLegal(MVT::getVectorVT(EltTy, EC))) {
-    EC /= 2;
+    EC = EC.divideCoefficientBy(2);
     NumVectorRegs <<= 1;
   }
 
   NumIntermediates = NumVectorRegs;
 
   MVT NewVT = MVT::getVectorVT(EltTy, EC);
   if (!TLI->isTypeLegal(NewVT))
     NewVT = EltTy;
if (!isPowerOf2_32(EltCnt.getKnownMinValue())) {
     NumVectorRegs = EltCnt.getKnownMinValue();
     EltCnt = ElementCount::getFixed(1);
   }
 
   // Divide the input until we get to a supported size.  This will always
   // end with a scalar if the target doesn't support vectors.
   while (EltCnt.getKnownMinValue() > 1 &&
          !isTypeLegal(EVT::getVectorVT(Context, EltTy, EltCnt))) {
-    EltCnt /= 2;
+    EltCnt = EltCnt.divideCoefficientBy(2);
     NumVectorRegs <<= 1;
   }
 
   NumIntermediates = NumVectorRegs;
 
   EVT NewVT = EVT::getVectorVT(Context, EltTy, EltCnt);
   if (!isTypeLegal(NewVT))
     NewVT = EltTy;

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

static std::map<unsigned, std::pair<unsigned, unsigned>> IntrinsicMap = {
       {Intrinsic::aarch64_sve_ld2, {2, AArch64ISD::SVE_LD2_MERGE_ZERO}},
       {Intrinsic::aarch64_sve_ld3, {3, AArch64ISD::SVE_LD3_MERGE_ZERO}},
       {Intrinsic::aarch64_sve_ld4, {4, AArch64ISD::SVE_LD4_MERGE_ZERO}}};
 
   std::tie(N, Opcode) = IntrinsicMap[Intrinsic];
   assert(VT.getVectorElementCount().getKnownMinValue() % N == 0 &&
          "invalid tuple vector type!");
 
-  EVT SplitVT = EVT::getVectorVT(*DAG.getContext(), VT.getVectorElementType(),
-                                 VT.getVectorElementCount() / N);
+  EVT SplitVT =
+      EVT::getVectorVT(*DAG.getContext(), VT.getVectorElementType(),
+                       VT.getVectorElementCount().divideCoefficientBy(N));
   assert(isTypeLegal(SplitVT));
 
   SmallVector<EVT, 5> VTs(N, SplitVT);
   VTs.push_back(MVT::Other); // Chain
   SDVTList NodeTys = DAG.getVTList(VTs);
 
   SDValue PseudoLoad = DAG.getNode(Opcode, DL, NodeTys, LoadOps);
   SmallVector<SDValue, 4> PseudoLoadOps;
if (Opc == AArch64ISD::UUNPKHI || Opc == AArch64ISD::UUNPKLO) {
     SDValue ExtOp = Src->getOperand(0);
     auto VT = cast<VTSDNode>(N->getOperand(1))->getVT();
     EVT EltTy = VT.getVectorElementType();
     (void)EltTy;
 
     assert((EltTy == MVT::i8 || EltTy == MVT::i16 || EltTy == MVT::i32) &&
            "Sign extending from an invalid type");
 
-    EVT ExtVT = EVT::getVectorVT(*DAG.getContext(),
-                                 VT.getVectorElementType(),
-                                 VT.getVectorElementCount() * 2);
+    EVT ExtVT = VT.getDoubleNumVectorElementsVT(*DAG.getContext());
 
     SDValue Ext = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, ExtOp.getValueType(),
                               ExtOp, DAG.getValueType(ExtVT));
 
     return DAG.getNode(SOpc, DL, N->getValueType(0), Ext);
   }
 
   // SVE load nodes (e.g. AArch64ISD::GLD1) are straightforward candidates

llvm/unittests/CodeGen/ScalableVectorMVTsTest.cpp

TEST(ScalableVectorMVTsTest, HelperFuncs) {
   // Create with inline llvm::ElementCount
   EVT Vnx2i64 = EVT::getVectorVT(Ctx, MVT::i64, ElementCount::getScalable(2));
   ASSERT_TRUE(Vnx2i64.isScalableVector());
 
   // Check that changing scalar types/element count works
   EXPECT_EQ(Vnx2i32.widenIntegerVectorElementType(Ctx), Vnx2i64);
   EXPECT_EQ(Vnx4i32.getHalfNumVectorElementsVT(Ctx), Vnx2i32);
 
-  // Check that overloaded '*' and '/' operators work
+  // Check that operators work
   EXPECT_EQ(EVT::getVectorVT(Ctx, MVT::i64, EltCnt * 2), MVT::nxv4i64);
-  EXPECT_EQ(EVT::getVectorVT(Ctx, MVT::i64, EltCnt / 2), MVT::nxv1i64);
+  EXPECT_EQ(EVT::getVectorVT(Ctx, MVT::i64, EltCnt.divideCoefficientBy(2)),
+            MVT::nxv1i64);
 
   // Check that float->int conversion works
   EVT Vnx2f64 = EVT::getVectorVT(Ctx, MVT::f64, ElementCount::getScalable(2));
   EXPECT_EQ(Vnx2f64.changeTypeToInteger(), Vnx2i64);
 
   // Check fields inside llvm::ElementCount
   EltCnt = Vnx4i32.getVectorElementCount();
   EXPECT_EQ(EltCnt.getKnownMinValue(), 4U);

llvm/unittests/IR/VectorTypesTest.cpp

TEST(VectorTypesTest, FixedLength) {
   EXPECT_EQ(V8Int16Ty->getElementType()->getScalarSizeInBits(), 16U);
 
   auto EltCnt = ElementCount::getFixed(4);
   auto *V4Int64Ty = dyn_cast<FixedVectorType>(VectorType::get(Int64Ty, EltCnt));
   ASSERT_NE(nullptr, V4Int64Ty);
   EXPECT_EQ(V4Int64Ty->getNumElements(), 4U);
   EXPECT_EQ(V4Int64Ty->getElementType()->getScalarSizeInBits(), 64U);
 
-  auto *V2Int64Ty =
-      dyn_cast<FixedVectorType>(VectorType::get(Int64Ty, EltCnt / 2));
+  auto *V2Int64Ty = dyn_cast<FixedVectorType>(
+      VectorType::get(Int64Ty, EltCnt.divideCoefficientBy(2)));
   ASSERT_NE(nullptr, V2Int64Ty);
   EXPECT_EQ(V2Int64Ty->getNumElements(), 2U);
   EXPECT_EQ(V2Int64Ty->getElementType()->getScalarSizeInBits(), 64U);
 
   auto *V8Int64Ty =
       dyn_cast<FixedVectorType>(VectorType::get(Int64Ty, EltCnt * 2));
   ASSERT_NE(nullptr, V8Int64Ty);
   EXPECT_EQ(V8Int64Ty->getNumElements(), 8U);
TEST(VectorTypesTest, Scalable) {
 
   auto EltCnt = ElementCount::getScalable(4);
   auto *ScV4Int64Ty =
       dyn_cast<ScalableVectorType>(VectorType::get(Int64Ty, EltCnt));
   ASSERT_NE(nullptr, ScV4Int64Ty);
   EXPECT_EQ(ScV4Int64Ty->getMinNumElements(), 4U);
   EXPECT_EQ(ScV4Int64Ty->getElementType()->getScalarSizeInBits(), 64U);
 
-  auto *ScV2Int64Ty =
-      dyn_cast<ScalableVectorType>(VectorType::get(Int64Ty, EltCnt / 2));
+  auto *ScV2Int64Ty = dyn_cast<ScalableVectorType>(
+      VectorType::get(Int64Ty, EltCnt.divideCoefficientBy(2)));
   ASSERT_NE(nullptr, ScV2Int64Ty);
   EXPECT_EQ(ScV2Int64Ty->getMinNumElements(), 2U);
   EXPECT_EQ(ScV2Int64Ty->getElementType()->getScalarSizeInBits(), 64U);
 
   auto *ScV8Int64Ty =
       dyn_cast<ScalableVectorType>(VectorType::get(Int64Ty, EltCnt * 2));
   ASSERT_NE(nullptr, ScV8Int64Ty);
   EXPECT_EQ(ScV8Int64Ty->getMinNumElements(), 8U);