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fpetrogalli (Francesco Petrogalli)
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User Since
Oct 12 2016, 4:50 AM (180 w, 6 d)

Recent Activity

Yesterday

fpetrogalli committed rG751d5332bd63: [llvm][IR][CastInst] Update `castIsValid` for scalable vectors. (authored by fpetrogalli).
[llvm][IR][CastInst] Update `castIsValid` for scalable vectors.
Mon, Mar 30, 2:44 PM
fpetrogalli closed D76738: [llvm][IR][CastInst] Update `castIsValid` for scalable vectors..
Mon, Mar 30, 2:44 PM · Restricted Project
fpetrogalli updated the diff for D76738: [llvm][IR][CastInst] Update `castIsValid` for scalable vectors..

Rebase on top of master.

Mon, Mar 30, 1:37 PM · Restricted Project

Fri, Mar 27

fpetrogalli added a comment to D76738: [llvm][IR][CastInst] Update `castIsValid` for scalable vectors..
Fri, Mar 27, 3:59 PM · Restricted Project
fpetrogalli committed rG4b3d94051ca2: [llvm][Type] Return fixed size for scalar types. [NFC] (authored by fpetrogalli).
[llvm][Type] Return fixed size for scalar types. [NFC]
Fri, Mar 27, 3:27 PM
fpetrogalli closed D76892: [llvm][Type] Return fixed size for scalar types. [NFC].
Fri, Mar 27, 3:27 PM · Restricted Project
fpetrogalli updated the diff for D76738: [llvm][IR][CastInst] Update `castIsValid` for scalable vectors..

Rebasing on top of master. [NFC]

Fri, Mar 27, 2:52 PM · Restricted Project
fpetrogalli updated the diff for D76892: [llvm][Type] Return fixed size for scalar types. [NFC].

Fixed the typo in the comment.

Fri, Mar 27, 2:52 PM · Restricted Project
fpetrogalli committed rGc66d1f38f6f1: [llvm][Support] Add isZero method for TypeSize. [NFC] (authored by fpetrogalli).
[llvm][Support] Add isZero method for TypeSize. [NFC]
Fri, Mar 27, 2:20 PM
fpetrogalli closed D76748: [llvm][Support] Add isZero method for TypeSize. [NFC].
Fri, Mar 27, 2:19 PM · Restricted Project
fpetrogalli updated the diff for D76738: [llvm][IR][CastInst] Update `castIsValid` for scalable vectors..

I have further simplified the code according to your comments.

Fri, Mar 27, 2:17 PM · Restricted Project

Thu, Mar 26

fpetrogalli added a comment to D76738: [llvm][IR][CastInst] Update `castIsValid` for scalable vectors..

Last but not least, I have renamed [Src|Dst]Length into [Src|Dst]EC as the variables now hold ElementCount and not unsigned.

Thu, Mar 26, 4:20 PM · Restricted Project
fpetrogalli updated the diff for D76738: [llvm][IR][CastInst] Update `castIsValid` for scalable vectors..

thank you for your review!

Thu, Mar 26, 4:20 PM · Restricted Project
fpetrogalli created D76892: [llvm][Type] Return fixed size for scalar types. [NFC].
Thu, Mar 26, 4:20 PM · Restricted Project
fpetrogalli added inline comments to D76738: [llvm][IR][CastInst] Update `castIsValid` for scalable vectors..
Thu, Mar 26, 2:42 PM · Restricted Project
fpetrogalli added inline comments to D76748: [llvm][Support] Add isZero method for TypeSize. [NFC].
Thu, Mar 26, 2:08 PM · Restricted Project
fpetrogalli added a reviewer for D76748: [llvm][Support] Add isZero method for TypeSize. [NFC]: efriedma.

LGTM, thanks!

While this patch is quite trivial, for other patches, you may want to add a few more reviewers.

Thu, Mar 26, 2:08 PM · Restricted Project
fpetrogalli added a reviewer for D76738: [llvm][IR][CastInst] Update `castIsValid` for scalable vectors.: efriedma.
Thu, Mar 26, 12:29 PM · Restricted Project

Wed, Mar 25

fpetrogalli retitled D76738: [llvm][IR][CastInst] Update `castIsValid` for scalable vectors. from [llvm] Use correct type in variable declaration. [NFC] to [llvm][IR][CastInst] Update `castIsValid` for scalable vectors..
Wed, Mar 25, 8:35 PM · Restricted Project
fpetrogalli updated the diff for D76738: [llvm][IR][CastInst] Update `castIsValid` for scalable vectors..

I have updated the whole method CastInst::castISValid to correctly
support scalable vectors.

Wed, Mar 25, 8:35 PM · Restricted Project

Tue, Mar 24

fpetrogalli updated the diff for D76748: [llvm][Support] Add isZero method for TypeSize. [NFC].

I removed an instance of the isNonZero method, as the patch relates
only to the isZero method. I'll create a separate patch for that.

Tue, Mar 24, 8:15 PM · Restricted Project
fpetrogalli created D76748: [llvm][Support] Add isZero method for TypeSize. [NFC].
Tue, Mar 24, 7:42 PM · Restricted Project
fpetrogalli created D76738: [llvm][IR][CastInst] Update `castIsValid` for scalable vectors..
Tue, Mar 24, 3:52 PM · Restricted Project

Thu, Mar 19

fpetrogalli added inline comments to D75751: [AArch64][SVE] Implement structured load intrinsics.
Thu, Mar 19, 5:21 AM · Restricted Project
fpetrogalli added a comment to D75674: [AArch64][SVE] Implement vector tuple intrinsics.

I think that in this patch we are missing tests that check the output code in situations in which the tuple.get operates on tuple that are passed to the definition of the function, as in the following example:

Thu, Mar 19, 5:21 AM · Restricted Project
fpetrogalli accepted D76421: [AArch64][SVE] Rename intrinsics for gather prefetch [NFC].

Thank you @andwar , this makes totally sense to me. Ship it!

Thu, Mar 19, 4:49 AM · Restricted Project

Wed, Mar 18

fpetrogalli added inline comments to D75751: [AArch64][SVE] Implement structured load intrinsics.
Wed, Mar 18, 7:00 PM · Restricted Project
fpetrogalli added inline comments to D75751: [AArch64][SVE] Implement structured load intrinsics.
Wed, Mar 18, 8:08 AM · Restricted Project
fpetrogalli committed rG9bdcd9bf4438: [llvm][SVE] Addressing mode for FF/NF loads. (authored by fpetrogalli).
[llvm][SVE] Addressing mode for FF/NF loads.
Wed, Mar 18, 5:57 AM
fpetrogalli closed D76209: [llvm][SVE] Addressing mode for FF/NF loads..
Wed, Mar 18, 5:57 AM · Restricted Project

Tue, Mar 17

fpetrogalli updated the diff for D76209: [llvm][SVE] Addressing mode for FF/NF loads..

Cosmetic changes to the formatting of the codegen pattern defs. NFC

Tue, Mar 17, 7:59 PM · Restricted Project
fpetrogalli updated subscribers of D75580: [llvm][CodeGen][SVE] Implement IR intrinsics for gather prefetch..

Hello! Thanks for this patch. In release builds, I'm seeing lots of warnings that:

In file included from ../lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp:9:
../lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h:850:13: warning: unused function 'isValidImmForSVEVecImmAddrMode' [-Wunused-function]
static bool isValidImmForSVEVecImmAddrMode(unsigned OffsetInBytes,
            ^

Also, there's one instance:

../lib/Target/AArch64/AArch64ISelLowering.cpp:12714:21: warning: unused variable 'OffsetConst' [-Wunused-variable]
    ConstantSDNode *OffsetConst = dyn_cast<ConstantSDNode>(Offset.getNode());
                    ^

Can you please take a look?

Tue, Mar 17, 7:27 PM · Restricted Project
fpetrogalli updated the diff for D76209: [llvm][SVE] Addressing mode for FF/NF loads..

I have added CHECK-NEXT where needed.

Tue, Mar 17, 8:31 AM · Restricted Project
fpetrogalli updated the diff for D76209: [llvm][SVE] Addressing mode for FF/NF loads..

Thank you for your review @andwar.

Tue, Mar 17, 8:00 AM · Restricted Project

Mon, Mar 16

fpetrogalli added a comment to D75751: [AArch64][SVE] Implement structured load intrinsics.

thank you for working on this. I am basing the addressing mode optimization for ldN on this patch, I just wanted to point out a couple of minor remarks!

Mon, Mar 16, 3:19 PM · Restricted Project
fpetrogalli added a comment to D76209: [llvm][SVE] Addressing mode for FF/NF loads..

Thank you for the review @andwar !

Mon, Mar 16, 1:07 PM · Restricted Project
fpetrogalli updated the diff for D76209: [llvm][SVE] Addressing mode for FF/NF loads..

Remove unused parameter from test case, and remove empty line.

Mon, Mar 16, 1:07 PM · Restricted Project
fpetrogalli committed rG0f2b68d9c70e: Implement IR intrinsics for gather prefetch. (authored by fpetrogalli).
Implement IR intrinsics for gather prefetch.
Mon, Mar 16, 12:03 PM
fpetrogalli closed D75580: [llvm][CodeGen][SVE] Implement IR intrinsics for gather prefetch..
Mon, Mar 16, 12:02 PM · Restricted Project

Sun, Mar 15

fpetrogalli created D76209: [llvm][SVE] Addressing mode for FF/NF loads..
Sun, Mar 15, 9:42 PM · Restricted Project

Fri, Mar 13

fpetrogalli added a comment to D75580: [llvm][CodeGen][SVE] Implement IR intrinsics for gather prefetch..

Thanks you for addressing my comments @fpetrogalli !

A one final nice-to-have (not a blocker!). Could this snippet from legalizeSVEGatherPrefetchOffsVec be extracted into a separate function:

// Not an unpacked vector, bail out.
if (Offset.getValueType().getSimpleVT().SimpleTy != MVT::nxv2i32)
  return SDValue();
 
// Extend the unpacked offset vector to 64-bit lanes.
SDLoc DL(N);
Offset = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::nxv2i64, Offset);

and re-used by performGatherLoadCombine and performScatterStoreCombine? We can do it in a separate patch too.

Fri, Mar 13, 11:50 AM · Restricted Project
fpetrogalli added inline comments to D75580: [llvm][CodeGen][SVE] Implement IR intrinsics for gather prefetch..
Fri, Mar 13, 8:34 AM · Restricted Project
fpetrogalli updated the diff for D75580: [llvm][CodeGen][SVE] Implement IR intrinsics for gather prefetch..

I have reorder the operands as requested by @sdesmalen.

Fri, Mar 13, 8:33 AM · Restricted Project

Thu, Mar 12

fpetrogalli updated the diff for D75580: [llvm][CodeGen][SVE] Implement IR intrinsics for gather prefetch..

Thank you for your reviews.

Thu, Mar 12, 3:45 PM · Restricted Project
fpetrogalli updated the summary of D75580: [llvm][CodeGen][SVE] Implement IR intrinsics for gather prefetch..
Thu, Mar 12, 3:45 PM · Restricted Project
fpetrogalli added inline comments to D75580: [llvm][CodeGen][SVE] Implement IR intrinsics for gather prefetch..
Thu, Mar 12, 3:45 PM · Restricted Project

Wed, Mar 11

fpetrogalli committed rG4dde9e9b023f: [llvm][CodeGen] IR intrinsics for SVE2 contiguous conflict detection… (authored by fpetrogalli).
[llvm][CodeGen] IR intrinsics for SVE2 contiguous conflict detection…
Wed, Mar 11, 11:55 AM
fpetrogalli closed D75862: [llvm][CodeGen] IR intrinsics for SVE2 contiguous conflict detection instructions..
Wed, Mar 11, 11:54 AM · Restricted Project

Tue, Mar 10

fpetrogalli removed a reviewer for D75862: [llvm][CodeGen] IR intrinsics for SVE2 contiguous conflict detection instructions.: rengolin.
Tue, Mar 10, 7:32 AM · Restricted Project

Mon, Mar 9

fpetrogalli created D75862: [llvm][CodeGen] IR intrinsics for SVE2 contiguous conflict detection instructions..
Mon, Mar 9, 10:13 AM · Restricted Project
fpetrogalli updated the summary of D75580: [llvm][CodeGen][SVE] Implement IR intrinsics for gather prefetch..
Mon, Mar 9, 8:03 AM · Restricted Project
fpetrogalli updated the diff for D75580: [llvm][CodeGen][SVE] Implement IR intrinsics for gather prefetch..

Hi @sdesmalen and @andwar,

Mon, Mar 9, 8:03 AM · Restricted Project
fpetrogalli added a comment to D75580: [llvm][CodeGen][SVE] Implement IR intrinsics for gather prefetch..

Hi @fpetrogalli, thank you for working on this!

My main points:

  • ACLE allows scalar indices that may be out of range for PRFH <prfop>, <Pg>, [<Zn>.S{, #<imm>}]. Will we be able to cater for those with your approach?
Mon, Mar 9, 8:03 AM · Restricted Project

Wed, Mar 4

fpetrogalli added a comment to D75291: Rename "llvm-gsym" and "llvm-gsymutil" to "gsymutil"..

Hello @clayborg ,

this patch is breaking shared libs builds (cmake path/to/llvm -DBUILD_SHARED_LIBS=ON).

Could you please fix it?

Regards,

Francesco

-DBUILD_SHARED_LIBS=ON build is good.

Wed, Mar 4, 3:11 PM · debug-info, Restricted Project
fpetrogalli added inline comments to D75580: [llvm][CodeGen][SVE] Implement IR intrinsics for gather prefetch..
Wed, Mar 4, 7:19 AM · Restricted Project

Tue, Mar 3

fpetrogalli created D75580: [llvm][CodeGen][SVE] Implement IR intrinsics for gather prefetch..
Tue, Mar 3, 4:07 PM · Restricted Project
fpetrogalli added a comment to D75291: Rename "llvm-gsym" and "llvm-gsymutil" to "gsymutil"..

this patch is breaking shared libs builds (cmake path/to/llvm -DBUILD_SHARED_LIBS=ON).

Tue, Mar 3, 4:07 PM · debug-info, Restricted Project
fpetrogalli committed rG779e2c7a1a26: [llvm][CodeGen][SVE] Constrain prefetch intrinsic argument to immediate values. (authored by fpetrogalli).
[llvm][CodeGen][SVE] Constrain prefetch intrinsic argument to immediate values.
Tue, Mar 3, 7:26 AM
fpetrogalli closed D75482: [llvm][CodeGen][SVE] Constrain prefetch intrinsic argument to immediate values..
Tue, Mar 3, 7:26 AM · Restricted Project

Mon, Mar 2

fpetrogalli created D75482: [llvm][CodeGen][SVE] Constrain prefetch intrinsic argument to immediate values..
Mon, Mar 2, 2:56 PM · Restricted Project
fpetrogalli accepted D75350: [OpenMP] Allow const parameters in declare simd linear clause.

LGTM, thank you @huntergr !

Mon, Mar 2, 6:37 AM · Restricted Project

Feb 28 2020

fpetrogalli accepted D75354: Add InjectTLIMappings pass to new pass manager .

As @pjeeva01 said, I need to add a test to see if the vectorized function is called in presence of the vector library option.

Feb 28 2020, 11:12 AM · Restricted Project
fpetrogalli added inline comments to D75350: [OpenMP] Allow const parameters in declare simd linear clause.
Feb 28 2020, 9:55 AM · Restricted Project
fpetrogalli added a comment to D75354: Add InjectTLIMappings pass to new pass manager .

My bad, vectorization is what needs to be tested, not the generation of the attribute.

Feb 28 2020, 9:01 AM · Restricted Project
fpetrogalli added a comment to D75354: Add InjectTLIMappings pass to new pass manager .

Since the InjectTLIMappings pass impacts mappings of scalar math functions to their vector counterparts in all three of the currently supported vector libraries, I would like to suggest adding a test case for each one of them. In other words, testing in the presence of -fveclib=Accelerate, -fveclib=SVML, and -fveclib=MASSV libraries.

Feb 28 2020, 9:01 AM · Restricted Project
fpetrogalli added a comment to D75354: Add InjectTLIMappings pass to new pass manager .

Hi @masoud.ataei , thank you for taking care of this.

Feb 28 2020, 8:42 AM · Restricted Project
fpetrogalli added inline comments to D75350: [OpenMP] Allow const parameters in declare simd linear clause.
Feb 28 2020, 7:05 AM · Restricted Project

Feb 25 2020

fpetrogalli abandoned D27250: [OpenMP] TargetLibraryInfo from "declare simd"..
Feb 25 2020, 2:26 PM
fpetrogalli abandoned D27249: [LoopVectorize] Use OpenMP vector routines..
Feb 25 2020, 9:15 AM
fpetrogalli accepted D74944: [LoopVectorize] Fix cost for calls to functions that have vector versions.

Hello @nemanjai , thank you for the exhaustive explanation.

Feb 25 2020, 7:57 AM · Restricted Project

Feb 24 2020

fpetrogalli added inline comments to D74581: [llvm][CodeGen][aarch64] Add contiguous prefetch intrinsics for SVE..
Feb 24 2020, 2:02 PM · Restricted Project
fpetrogalli committed rG3d65dd1e668e: [ReleaseNotes] Mention the `vector-function-abi-variant` attribute. (authored by fpetrogalli).
[ReleaseNotes] Mention the `vector-function-abi-variant` attribute.
Feb 24 2020, 9:44 AM
fpetrogalli closed D74969: [ReleaseNotes] Mention the `vector-function-abi-variant` attribute..
Feb 24 2020, 9:44 AM · Restricted Project
fpetrogalli added a comment to D74944: [LoopVectorize] Fix cost for calls to functions that have vector versions.

Hi @nemanjai ,

thank you for updating the code.

Sorry for being picky, I think you should add another test. Your code need to work also for the vector-function-avi-variant attribute and not just for the -vector-library= option.

Kind regards,

Francesco

Will do. Note also that this will be the only such test case as far as I can tell, so we might want to add some more coverage there as well independent of this patch.

Feb 24 2020, 8:31 AM · Restricted Project
fpetrogalli added reviewers for D74969: [ReleaseNotes] Mention the `vector-function-abi-variant` attribute.: jdoerfert, andwar.

Adding @jdoerfert and @andwar who has been involved in the technicalities related to this attribute.

Feb 24 2020, 7:53 AM · Restricted Project

Feb 21 2020

fpetrogalli added a comment to D74941: [OpenMP] `omp begin/end declare variant` - part 1, parsing.

thank you for working on this.

Feb 21 2020, 2:11 PM · Restricted Project, Restricted Project
fpetrogalli added a comment to D74808: [MachO][NFC] Extract all CPU_(SUB_)TYPE logic to libObject.

Hi @thegameg, this commit is breaking the shared libs builds. Could you please make sure you code works when configuring with -DBUILD_SHARED_LIBS=On?

Feb 21 2020, 1:15 PM · Restricted Project
fpetrogalli committed rG33bf1196475c: [llvm][CodeGen][aarch64] Add contiguous prefetch intrinsics for SVE. (authored by fpetrogalli).
[llvm][CodeGen][aarch64] Add contiguous prefetch intrinsics for SVE.
Feb 21 2020, 12:31 PM
fpetrogalli closed D74581: [llvm][CodeGen][aarch64] Add contiguous prefetch intrinsics for SVE..
Feb 21 2020, 12:31 PM · Restricted Project
fpetrogalli updated the diff for D74581: [llvm][CodeGen][aarch64] Add contiguous prefetch intrinsics for SVE..

Address code review from @sdesmalen.

Feb 21 2020, 12:31 PM · Restricted Project
fpetrogalli added inline comments to D74581: [llvm][CodeGen][aarch64] Add contiguous prefetch intrinsics for SVE..
Feb 21 2020, 12:31 PM · Restricted Project
fpetrogalli committed rGe2ed1d14d6c2: [llvm][aarch64] SVE addressing modes. (authored by fpetrogalli).
[llvm][aarch64] SVE addressing modes.
Feb 21 2020, 12:04 PM
fpetrogalli closed D74254: [llvm][aarch64] SVE addressing modes..
Feb 21 2020, 12:04 PM · Restricted Project
fpetrogalli added inline comments to D74254: [llvm][aarch64] SVE addressing modes..
Feb 21 2020, 12:04 PM · Restricted Project
fpetrogalli updated the diff for D74254: [llvm][aarch64] SVE addressing modes..

Update code as requested by @sdesmalen.

Feb 21 2020, 12:04 PM · Restricted Project
fpetrogalli added a comment to D74944: [LoopVectorize] Fix cost for calls to functions that have vector versions.

thank you for updating the code.

Feb 21 2020, 11:54 AM · Restricted Project
fpetrogalli added inline comments to D74254: [llvm][aarch64] SVE addressing modes..
Feb 21 2020, 11:36 AM · Restricted Project
fpetrogalli retitled D74581: [llvm][CodeGen][aarch64] Add contiguous prefetch intrinsics for SVE. from [llvm][CodeGen][aarch64] Add continuous prefetch intrinsics for SVE. to [llvm][CodeGen][aarch64] Add contiguous prefetch intrinsics for SVE..
Feb 21 2020, 11:20 AM · Restricted Project
fpetrogalli committed rG31ec721516b5: [llvm][CodeGen] DAG Combiner folds for vscale. (authored by fpetrogalli).
[llvm][CodeGen] DAG Combiner folds for vscale.
Feb 21 2020, 10:06 AM
fpetrogalli closed D74782: [llvm][CodeGen] DAG Combiner folds for vscale..
Feb 21 2020, 10:05 AM · Restricted Project
fpetrogalli updated the summary of D74782: [llvm][CodeGen] DAG Combiner folds for vscale..
Feb 21 2020, 10:05 AM · Restricted Project
fpetrogalli updated the diff for D74782: [llvm][CodeGen] DAG Combiner folds for vscale..

Hi @andwar, I have updated the comments. I have also fixed the sve-gep.ll test, as the changes in the combiner are now folding the multiplying constant inside the vscale node.

Feb 21 2020, 10:05 AM · Restricted Project
fpetrogalli updated the summary of D74782: [llvm][CodeGen] DAG Combiner folds for vscale..
Feb 21 2020, 9:37 AM · Restricted Project
fpetrogalli accepted D74959: [VectorUtils] Move ToVectorTy to VectorUtils.h (NFC)..

LGTM, thank you @fhahn !

Feb 21 2020, 9:00 AM · Restricted Project
fpetrogalli added a comment to D74944: [LoopVectorize] Fix cost for calls to functions that have vector versions.

Hi @nemanjai , thank you for pointing this out! I didn't realize that my code was creating this problem.

Feb 21 2020, 8:50 AM · Restricted Project
fpetrogalli added a reviewer for D74969: [ReleaseNotes] Mention the `vector-function-abi-variant` attribute.: kristof.beyls.
Feb 21 2020, 8:24 AM · Restricted Project
fpetrogalli created D74969: [ReleaseNotes] Mention the `vector-function-abi-variant` attribute..
Feb 21 2020, 8:23 AM · Restricted Project
fpetrogalli added inline comments to D74959: [VectorUtils] Move ToVectorTy to VectorUtils.h (NFC)..
Feb 21 2020, 7:18 AM · Restricted Project

Feb 20 2020

fpetrogalli committed rG0c8fa6db90ae: [llvm][build] Fix shared lib builds. [NFC] (authored by fpetrogalli).
[llvm][build] Fix shared lib builds. [NFC]
Feb 20 2020, 11:43 AM

Feb 19 2020

fpetrogalli added inline comments to D74581: [llvm][CodeGen][aarch64] Add contiguous prefetch intrinsics for SVE..
Feb 19 2020, 2:49 PM · Restricted Project