IR: Invert convergent attribute handling

[arsenm]

Summary

While we're planning to fix the convergent definition in D68994, I thought
this would be an opportunity to fix another design flaw in the convergent
attribute.

Invert the direction of the convergent attribute by removing it, and
adding the noconvergent attribute. The current convergent attribute is
currently odd, as adding it is required for correctness. There is a
burden on frontends in environments that care about convergent
operations to add the attribute just in case it is needed. This has
proven to be somewhat problematic, and different frontend projects
have consistently run into problems related to this. OpenMP and SYCL
for example are currently not assuming convergent by default.

The backwards definition also did not provide a way to directly
specify non-convergent functions in some cases. There is no way to
specify a negative attribute, so when convergent needs to be assumed,
there was no way to opt-out. By inverting this, user attribute usage
is more flexible.

Assume the old convergent semantics by default, so an undecorated
function is correct with respect to convergence. For compatbility
purposes, the old attribute can simply be ignored. The new
noconvergent attribute produces the old default behavior.

Infer the noconvergent attribute, which is similar to nounwind.

The main risk of this change is negative tests in control flow
passes. They may no longer trigger due to not having noconvergent, and
not for what they truly intended to test. I've speculatively added
noconvergent to JumpThreading tests and a handful of others, but other
passes may be relevant.

For now this is just trying to change the IR attribute handling. The
MachineInstr flag and intrinsic decoration are still in the positive
direction. IntrConvergent should probably be inverted, but I think
having the MI flag be positive is probably fine.

The source language attribute for convergent is now a no-op. It could
arguably try to enable convergence in a non-SPMD language, but using
this would probably be very error prone. A user facing noconvergent
attribute is probably the next step.

[mehdi_amini]

I think this is the kind of thing to document on this page: https://llvm.org/docs/Frontend/PerformanceTips.html

[arsenm]

Add section to frontend performance tips documentation

[rjmccall]

This certainly seems like a more tractable representation, although I suppose it'd be a thorn in the side of (IR-level) outlining.

A note on spelling: the no prefix seems to be used largely with verbs; it's weird to use it here with an adjective, especially since noncovergent is just a letter away.

clang/lib/CodeGen/CGObjCMac.cpp

4259

I don't think GPU thread convergence is a concept that could ever really be applied to a program containing ObjC exceptions, so while this seems correct, it also seems pointless.

clang/lib/CodeGen/CGStmt.cpp

1949

The comment here seems to no longer match the code.

[rjmccall]

In D69498#1723553, @rjmccall wrote:

This certainly seems like a more tractable representation, although I suppose it'd be a thorn in the side of (IR-level) outlining.

Sorry, I mis-clicked and sent this review while I was still editing it.

I agree that this is a theoretically better representation for targets that care about convergence, since it biases compilation towards the more conservative assumption. On the other hand, since the default language mode is apparently to assume non-convergence of user functions, and since the vast majority of targets do not include convergence as a meaningful concept, you're also just gratuitously breaking a ton of existing test cases, as well as adding compile time for manipulating this attribute. Perhaps there should be a global metadata, or something in the increasingly-misnamed "data layout" string, which says that convergence is meaningful, and we should only add the attribute in appropriately-annotated modules?

[arsenm]

In D69498#1723606, @rjmccall wrote:

A note on spelling: the no prefix seems to be used largely with verbs; it's weird to use it here with an adjective, especially since noncovergent is just a letter away.

I don't think it reads any different to me than, say nofree->no free calls. noconvergent-> no convergent operations. nonconvergent sounds odder to me

In D69498#1723553, @rjmccall wrote:

This certainly seems like a more tractable representation, although I suppose it'd be a thorn in the side of (IR-level) outlining.

Sorry, I mis-clicked and sent this review while I was still editing it.

I agree that this is a theoretically better representation for targets that care about convergence, since it biases compilation towards the more conservative assumption. On the other hand, since the default language mode is apparently to assume non-convergence of user functions, and since the vast majority of targets do not include convergence as a meaningful concept, you're also just gratuitously breaking a ton of existing test cases, as well as adding compile time for manipulating this attribute. Perhaps there should be a global metadata, or something in the increasingly-misnamed "data layout" string, which says that convergence is meaningful, and we should only add the attribute in appropriately-annotated modules?

The default language mode for the non-parallel languages. The set of languages not setting this does need to grow (SYCL and OpenMP device code are both currently broken).

I don't think there are other attributes with weird connections to some global construct. Part of the point of attributes is that they are function level context. I don't really understand the compile time concern; the cost of the attribute is one bit in a bitset. We have quite a few attributes already that will be inferred for a large percentage of functions anyway. The case that's really important to add in frontend is external declarations and other opaque cases, others will be inferred anyway. You could make the same argument with nounwind, since most languages don't have exceptions.

clang/lib/CodeGen/CGObjCMac.cpp

4259

It doesn't apply, so this needs to be explicitly marked as not having it. This bypasses the place that emits the language assumed default attribute so this is needed. A handful of tests do fail without this from control flow changes not happening

[jdoerfert]

Before we get lost in review details let's make sure we agree that his is the right path. I mean, transition from convergent to noconvergent (or a similar spelling).
I do support this by the way.

In D69498#1723606, @rjmccall wrote:

[...] Perhaps there should be a global metadata, or something in the increasingly-misnamed "data layout" string, which says that convergence is meaningful, and we should only add the attribute in appropriately-annotated modules?

I see what you mean but I think it would be "a hack" to teach the lookup methods, e.g., isNoConvergent, to also look into the datalayout (or any other place). Instead, front-ends should emit noconvergent as one of their default arguments if that is the behavior they want. This should be essentially free after they update their code. Neither idea will fix the "old IR" problem anyway but we could make the deduction add noconvergent to all functions that are not convergent if convergent was found in the module.

[rjmccall]

The kind of tracking that you're doing of convergent operations is one example of a basically limitless set of "taint" analyses, of which half a dozen already exist in LLVM. I object to the idea that an arbitrary number of unrelated tests need to be changed every time somebody invents a new taint analysis. I also object to the idea that frontends have a responsibility to proactively compensate for every new weird target-specific representation change just to get the optimizer to perform standard transformations that fully respect the documented semantics of LLVM IR. The basic problem at the root of convergence analysis — that code layout is essentially part of GPU program semantics because of its impact on GPU thread groups — is in fact a very special property of GPU targets that is not in any way unreasonable to ask those targets to be explicit about.

[rjmccall]

If you can come up with a way to make this change that doesn't require changes to non-GPU frontends or tests, I agree that treating functions as convergent by default makes sense for GPU targets.

[jdoerfert]

@rjmccall Thanks for the quick response! I tried to describe my view below. To avoid confusion on my side, could you maybe describe what you think when/which attribute should be created, derived, and used during the optimization pipeline?

In D69498#1724232, @rjmccall wrote:

The kind of tracking that you're doing of convergent operations is one example of a basically limitless set of "taint" analyses, of which half a dozen already exist in LLVM.

Yes, there are a lot, and to make things worse I added another one to rule them all. So at least in the middle-term there should be only one "(non)convergent" analysis.

I object to the idea that an arbitrary number of unrelated tests need to be changed every time somebody invents a new taint analysis.

Maybe the problem is that I don't understand why the effect on the test is so bad, given that it is the same as any new default attribute has (= very minimal and mechanical).
Or maybe I have less of an issue with these changes because I expect other attributes to be added as default soon and they will have a similar effect on the tests.
(To mention one with a made up name: forward_process_guarantee for functions that carry this property instead of pretending all do throughout the middle-end and hoping the front-ends deal with it accordingly.)

I also object to the idea that frontends have a responsibility to proactively compensate for every new weird target-specific representation change just to get the optimizer to perform standard transformations that fully respect the documented semantics of LLVM IR.

I generally agree and this has to be announced properly, but I don't think will require "much change" (there are default attribute sets already I suppose).
It is also, arguably, in the interest of many/all frontends to be able to produce correct (GPU) parallel code by minimizing the chance of accidental errors.
Finally, we basically have that situation you object to already, every time we fix an "error" in the IR semantics which allowed a transformation in the general case (forward process comes to mind again, dereferenceable_globally as well D61652, ...).

In D69498#1724245, @rjmccall wrote:

If you can come up with a way to make this change that doesn't require changes to non-GPU frontends or tests, I agree that treating functions as convergent by default makes sense for GPU targets.

Do you object noconvergent as an alternative to convergent?
If not, the one "problem" that pops up with having it not as a default attribute is that the middle-end would then need to check the target in addition to the noconvergent attribute, right?

[arsenm]

I think the question should be what the IR policy is for properties that are required for correctness and not necessarily what most users will use. There's a general trend towards functions being correct by default, and attributes adding optimization possibilities. convergent (and the broken noduplicate) are exceptional by inverting this. I think strictfp is also wrong in this sense, and should possibly also be fixed.

[kariddi]

One thing to probably note is that its not only a "target specific" issue, but a language specific issue as well (IMHO). OpenCL, CUDA, SYCL are all languages (to name a few) that have a concept of "convergence" and its not related only to the fact that they mostly run on a GPU, but to their programming model as well with respect to accessing textures and SIMD-wide communication and decision making (ballot)

Considering that Clang has support for these languages it kind of makes sense to me that the frontend is taking care of implementing the supported languages correctly by applying the proper attributes.

Now, its debatable that "convergent" is enough to cover all the cases we need ... and CUDA for example is running away from "ballot()" and such and moving to versions that have an explicit mask of the threads involved in the transaction for that reason. Even the new version with the "dynamic instances" of the mentioned proposal might not be enough ... but that's discussion for the other RFC ...

[nhaehnle]

As you know, I am very much in favor of this change, and really anything that re-establishes the rule that code is treated maximally conservatively when there are no attributes or metadata.

There is one slight concern here because what we arguably need in SIMT targets is two attributes, which I'm going to call allowconvergence and allowdivergence for now. Convergent operations are operations that communicate with some set of other threads that is implicitly affected by where the operation is in control flow. If we have as a baseline that this set of threads must not be changed at all by transforms, then there are two directions in which this can be relaxed:

• It may be correct to transform code in a way that may cause more threads to communicate. This applies e.g. to OpenCL uniform barriers and could be expressed as allowconvergence.
• It may be correct to transform code in a way that may cause fewer threads to communicate. This applies to readanylane-style operations (which are implicit e.g. in some of our buffer and image intrinsics) and could be expressed as allowdivergence.

Though non-SIMT targets may not want to add two attributes everywhere. Perhaps a viable path forward is to take this change towards noconvergent now if we can still add allowconvergence and allowdivergence later; noconvergent would then simply be the union of those two attributes in the end.

[rjmccall]

In D69498#1724625, @kariddi wrote:

One thing to probably note is that its not only a "target specific" issue, but a language specific issue as well (IMHO). OpenCL, CUDA, SYCL are all languages (to name a few) that have a concept of "convergence" and its not related only to the fact that they mostly run on a GPU, but to their programming model as well with respect to accessing textures and SIMD-wide communication and decision making (ballot)

Considering that Clang has support for these languages it kind of makes sense to me that the frontend is taking care of implementing the supported languages correctly by applying the proper attributes.

It absolutely makes sense for Clang as a GPU-programming frontend to set attributes appropriately when targeting the GPU. I'm objecting to making "convergence" and related "code layout is semantics" properties a universal part of the IR semantics that literally every frontend has to know about in order to get reasonable behavior from LLVM. I know that doing so makes sense to GPU backend developers because you mostly work exclusively on GPU toolchains, but AFAIK there are half a dozen GPU frontends and they're all forks of Clang, whereas there are dozens of LLVM frontends out there that don't care about targeting the GPU and quite possibly never will. (And even if they do target GPUs, they often will not care about exposing thread groups; many programming environments are just interested in taking advantage of the GPU's parallel-computation power and have no interest in inter-thread interference.)

John.

[kariddi]

In D69498#1725528, @rjmccall wrote:

It absolutely makes sense for Clang as a GPU-programming frontend to set attributes appropriately when targeting the GPU. I'm objecting to making "convergence" and related "code layout is semantics" properties a universal part of the IR semantics that literally every frontend has to know about in order to get reasonable behavior from LLVM. I know that doing so makes sense to GPU backend developers because you mostly work exclusively on GPU toolchains, but AFAIK there are half a dozen GPU frontends and they're all forks of Clang, whereas there are dozens of LLVM frontends out there that don't care about targeting the GPU and quite possibly never will. (And even if they do target GPUs, they often will not care about exposing thread groups; many programming environments are just interested in taking advantage of the GPU's parallel-computation power and have no interest in inter-thread interference.)

John.

I agree that the issue with making it "transparent" as a concept to whoever is not interested in programming models that have the concept of SIMD-wide execution is an open issue (not only related to this patch, but in general to the convergent idea as a whole, where writing a llvm pass that maintains convergence now is an extra burden to the developer of such pass that wasn't there before and that is probably completely orthogonal to the interest of the pass writer probably targeting C/C++ or other non-parallel languages). I opened some discussions going on the other related RFC for extending the concept of convergent to avoid hoisting as well regarding how are we gonna avoid burdening the LLVM community and maintain the invariants we want with respect to this concept.
I have no idea what the impact of the convergent attribute is in Clang (with the exception of adding the flag itself), but a lot of the heavy-lifting I know its in LVLM itself.

That said I just want to point out that some of these languages run on CPUs as well (like openCL ) and they share the same properties with respect to instructions that read execution masks of neighboring threads and making sure threads stay converged when executing them. It's certainly unfortunate that LLVM has some deficiencies in supporting these concepts and that the so far proposed solutions are not burden free for the rest of the community. :-/

[mehdi_amini]

Maybe we can start by looking into the motivation for this patch:

There is a burden on frontends in environments that care about convergent operations to add the attribute just in case it is needed. This has proven to be somewhat problematic, and different frontend projects have consistently run into problems related to this.

Can you clarify what kind of problems? Do you have concrete examples?

[jdoerfert]

In D69498#1725819, @mehdi_amini wrote:

Maybe we can start by looking into the motivation for this patch:

There is a burden on frontends in environments that care about convergent operations to add the attribute just in case it is needed. This has proven to be somewhat problematic, and different frontend projects have consistently run into problems related to this.

Can you clarify what kind of problems? Do you have concrete examples?

The frontend has to put convergent on everything that is not known to be non-convergent right now. That is, the front-end and all function generating constructs need to know about convergent to preserve correctness. Dropping convergent is also not sound. Frontends in the past put convergent only on barriers or similar calls but not on all functions that might transitively call barriers, leading to subtle bugs.

[arsenm]

In D69498#1725819, @mehdi_amini wrote:

Maybe we can start by looking into the motivation for this patch:

There is a burden on frontends in environments that care about convergent operations to add the attribute just in case it is needed. This has proven to be somewhat problematic, and different frontend projects have consistently run into problems related to this.

Can you clarify what kind of problems? Do you have concrete examples?

Basically no frontend has gotten this right, including clang and non-clang frontends. There's a gradual discovery process that it's necessary in the first place, and then a long tail of contexts where it's discovered it's missing. As I mentioned before, SYCL and OpenMP are both still broken in this regard. For example in clang, convergent wasn't initially added to all functions, and then it was discovered that transforms on indirect callers violated it. Then later it was discovered this was broken for inline asm. Then some specific intrinsic call sites were a problem. Then there are special cases that don't necessarily go through the standard user function codegen paths which don't get the default attributes. Some odd places where IR is compiled into the user library that didn't have convergent added. The discovery of convergent violations is painful; more painful than discovering that control flow didn't optimize the way you expected. It requires eternal vigilance and all developers to be aware of it.

The short version is the fact that most developers aren't aware of and don't understand the subtleties of convergence, and making sure the front-end does something in all contexts requires a lot of diligence. It's very easy to introduce these difficult to debug bugs when calls are broken by default.

[mehdi_amini]

In D69498#1725867, @jdoerfert wrote:

In D69498#1725819, @mehdi_amini wrote:

Maybe we can start by looking into the motivation for this patch:

There is a burden on frontends in environments that care about convergent operations to add the attribute just in case it is needed. This has proven to be somewhat problematic, and different frontend projects have consistently run into problems related to this.

Can you clarify what kind of problems? Do you have concrete examples?

The frontend has to put convergent on everything that is not known to be non-convergent right now. That is, the front-end and all function generating constructs need to know about convergent to preserve correctness.

Right, but that does not seem like a problem to me so far: a GPU frontend must add a gpu-specific attribute on every function seems like a reasonable constraint to me.

Frontends in the past put convergent only on barriers or similar calls but not on all functions that might transitively call barriers, leading to subtle bugs.

Right, but it seems like trying to fix bugs in the frontend at the LLVM does not seems necessarily right: it looks like a big hammer.

In D69498#1725877, @arsenm wrote:

Basically no frontend has gotten this right, including clang and non-clang frontends. There's a gradual discovery process that it's necessary in the first place, and then a long tail of contexts where it's discovered it's missing. As I mentioned before, SYCL and OpenMP are both still broken in this regard. For example in clang, convergent wasn't initially added to all functions, and then it was discovered that transforms on indirect callers violated it.

The rule seems fairly straightforward for the frontend: the attributes must be always added everywhere if you're using SIMT.
Originally it likely wasn't thought through for convergent, but at this point this seems behind us.

Then later it was discovered this was broken for inline asm.

Can you clarify what you mean here and how this change would fix it?

Then some specific intrinsic call sites were a problem.

Same, I'm not sure I understand this one.

Then there are special cases that don't necessarily go through the standard user function codegen paths which don't get the default attributes.

Some odd places where IR is compiled into the user library that didn't have convergent added.

Bug in the user library? Again I'm not sure why it justifies a change in LLVM.

The short version is the fact that most developers aren't aware of and don't understand the subtleties of convergence, and making sure the front-end does something in all contexts requires a lot of diligence. It's very easy to introduce these difficult to debug bugs when calls are broken by default.

The fact that most developers aren't aware of convergence means a lot of potential bugs in LLVM because passes and transformations won't honor the convergent semantics, but the default for the attribute won't change that.
As of the frontend, it seems to me that this is just about structuring the code-path for function emission to define the right set of default attribute. It isn't clear to me why a refactoring of the frontend isn't a better course of actions here.

[JonChesterfield]

Requiring the presence of an attribute for correctness is a bad thing. OpenMP was missing this annotation in a number of places and is probably still missing it elsewhere. I wouldn't bet on handwritten bitcode libraries getting it right everywhere either. An optimisation pass accidentally dropping the attribute seems a plausible failure mode as well.

Strongly in favour of replacing convergent with no{n}convergent in the IR.

Not as convinced it should be inserted by the front end. The attribute is needed before any CFG rewrites and as far as I know they all occur downstream of the front end. That suggests an IR pass that walks over all functions, intrinsic calls, inline asm and so forth and marks them as appropriate. Standard C++/x86 and similar don't need to run the pass, OpenCL/x86 probably does. I'd suggest running it manually across handwritten bitcode as a sanity check as well.

Of course, if a front end targeting gpus wants to change control flow (julia may do this, mlir does, I sincerely hope clang doesn't) and use this attribute to control the process, then that front end picks up the responsibility for inserting the attribute where it wants it.

[jdoerfert]

In D69498#1726610, @mehdi_amini wrote:

The short version is the fact that most developers aren't aware of and don't understand the subtleties of convergence, and making sure the front-end does something in all contexts requires a lot of diligence. It's very easy to introduce these difficult to debug bugs when calls are broken by default.

The fact that most developers aren't aware of convergence means a lot of potential bugs in LLVM because passes and transformations won't honor the convergent semantics, but the default for the attribute won't change that.

While you are right, a default non-convergent behavior will not make all bug sources disappear, it will make *a lot of bug sources disappear*. Let me quote @arsenm here because this is so important: "Basically no frontend has gotten this right, including clang and non-clang frontends." For me, that statement alone is reason to change the status quo.

As of the frontend, it seems to me that this is just about structuring the code-path for function emission to define the right set of default attribute. It isn't clear to me why a refactoring of the frontend isn't a better course of actions here.

Whatever we do, there will be consequences for current and future front-ends. At the end of the day, the underlying question we need to answer here is: Do we want to have "optimization with opt-in soundness" or "soundness with opt-in optimizations", and I would choose the latter any time.

[mehdi_amini]

In D69498#1727080, @jdoerfert wrote:

Let me quote @arsenm here because this is so important: "Basically no frontend has gotten this right, including clang and non-clang frontends." For me, that statement alone is reason to change the status quo.

I am not convinced by this: this seems overly simplistic. The fact that convergent wasn't rolled out properly in frontend can also been as an artifact of the past. There is a logical gap between this and concluding that the only solution is to change the default. For instance someone mentioned a pass that could be inserted as the very beginning of the pipeline by any GPU compiler and add the convergent attribute everywhere.

As of the frontend, it seems to me that this is just about structuring the code-path for function emission to define the right set of default attribute. It isn't clear to me why a refactoring of the frontend isn't a better course of actions here.

Whatever we do, there will be consequences for current and future front-ends. At the end of the day, the underlying question we need to answer here is: Do we want to have "optimization with opt-in soundness" or "soundness with opt-in optimizations", and I would choose the latter any time.

This view seems appropriate to me only if you consider a GPU (or SIMT) compiler alone. Another view (which seems to be what @rjmccall has) is that SIMT/GPU is a marginal use-case and "soundness" is already existing for most LLVM use-cases.

[arsenm]

In D69498#1727419, @mehdi_amini wrote:

In D69498#1727080, @jdoerfert wrote:

Let me quote @arsenm here because this is so important: "Basically no frontend has gotten this right, including clang and non-clang frontends." For me, that statement alone is reason to change the status quo.

I am not convinced by this: this seems overly simplistic. The fact that convergent wasn't rolled out properly in frontend can also been as an artifact of the past. There is a logical gap between this and concluding that the only solution is to change the default. For instance someone mentioned a pass that could be inserted as the very beginning of the pipeline by any GPU compiler and add the convergent attribute everywhere.

Avoiding human error is fundamental to good design. If you have to have an additional IR pass, then there's already a phase where the IR is broken and something could legally break the IR.

As of the frontend, it seems to me that this is just about structuring the code-path for function emission to define the right set of default attribute. It isn't clear to me why a refactoring of the frontend isn't a better course of actions here.

Whatever we do, there will be consequences for current and future front-ends. At the end of the day, the underlying question we need to answer here is: Do we want to have "optimization with opt-in soundness" or "soundness with opt-in optimizations", and I would choose the latter any time.

This view seems appropriate to me only if you consider a GPU (or SIMT) compiler alone. Another view (which seems to be what @rjmccall has) is that SIMT/GPU is a marginal use-case and "soundness" is already existing for most LLVM use-cases.

I think this is a concerning argument. Declaring that GPUs are a "marginal" use case and LLVM only follows its design principles in cases where it benefits C++ x86/ARM users is an issue. In that case LLVM is no longer trying to be the compiler infrastructure for everyone that it tries to be. Soundness for most doesn't sound like a good design. I've proposed attributes in the past that were shot down for not following a correct by-default design and to me it seems like a problem if this principle isn't going to be universally followed. It's additionally concerning since most GPUs uses LLVM in some fashion if they're going to be declared a second class use case.

[jdoerfert]

In D69498#1727419, @mehdi_amini wrote:

In D69498#1727080, @jdoerfert wrote:

Let me quote @arsenm here because this is so important: "Basically no frontend has gotten this right, including clang and non-clang frontends." For me, that statement alone is reason to change the status quo.

I am not convinced by this: this seems overly simplistic. The fact that convergent wasn't rolled out properly in frontend can also been as an artifact of the past.

Evidence suggest this problem will resurface over and over again, calling it an artifact of the past is dangerous and not helpful.

There is a logical gap between this and concluding that the only solution is to change the default.

There is no gap. Making the default restrictive but sound will prevent various kinds of errors we have seen in the past.
Assuming we could somehow "not repeat the errors in the future" is in my opinion the unrealistic view.

For instance someone mentioned a pass that could be inserted as the very beginning of the pipeline by any GPU compiler and add the convergent attribute everywhere.

I talked to @hfinkel earlier about this and his idea was to use a pass (or IRBuilder mode, or sth.) to do the opposite: opt-into a "subset" of LLVM-IR behaviors.
The idea is that if you want just a low-level C for CPUs, you run this pass or enable this mode and you get the appropriate LLVM-IR. That would for this patch mean
you get noconvergent everywhere but in the future you could get other attributes/changes as well.

As of the frontend, it seems to me that this is just about structuring the code-path for function emission to define the right set of default attribute. It isn't clear to me why a refactoring of the frontend isn't a better course of actions here.

Whatever we do, there will be consequences for current and future front-ends. At the end of the day, the underlying question we need to answer here is: Do we want to have "optimization with opt-in soundness" or "soundness with opt-in optimizations", and I would choose the latter any time.

This view seems appropriate to me only if you consider a GPU (or SIMT) compiler alone. Another view (which seems to be what @rjmccall has) is that SIMT/GPU is a marginal use-case and "soundness" is already existing for most LLVM use-cases.

I'm strongly opposing the idea to marginalize GPU, or any accelerator, targets. This is not only splitting the community by making it hostile towards some who have to work around whatever is deemed "the main use-case", it is also arguably a position of the past for many of us. Convenience for people that do not care about accelerators is a goal we should have in mind for sure, but it should not oppose a reasonable and sound support of accelerators.

[mehdi_amini]

In D69498#1727546, @jdoerfert wrote:

In D69498#1727419, @mehdi_amini wrote:

In D69498#1727080, @jdoerfert wrote:

Let me quote @arsenm here because this is so important: "Basically no frontend has gotten this right, including clang and non-clang frontends." For me, that statement alone is reason to change the status quo.

I am not convinced by this: this seems overly simplistic. The fact that convergent wasn't rolled out properly in frontend can also been as an artifact of the past.

Evidence suggest this problem will resurface over and over again, calling it an artifact of the past is dangerous and not helpful.

Can you provide the "evidence"? So far the only thing I have seen is historical and closely tied to how convergence was rolled out AFAICT.

There is a logical gap between this and concluding that the only solution is to change the default.

There is no gap.

Bluntly contradicting what I wrote without apparently trying to understand my point or trying to explain your point with respect to what I'm trying to explain is not gonna get me to agree with you magically, I'm not sure what you expect here other than shutting down the discussion and leaving us in a frustrating disagreement and lack of understanding with this?

[dexonsmith]

In D69498#1723606, @rjmccall wrote:

Perhaps there should be a global metadata, or something in the increasingly-misnamed "data layout" string, which says that convergence is meaningful, and we should only add the attribute in appropriately-annotated modules?

Just wanted to resurface these alternatives from John. Given that some targets want a fundamentally different default from what most frontends expect, I think we ought to find some way to encode the difference.

[rjmccall]

As I've said before, I absolutely view this polarity flip as good for GPU compilers, and I don't mind Clang needing to take some patches to update how we operate when targeting the GPU and to update some GPU-specific tests. I do not think we should view GPU targets as "marginal". But I do think that GPUs have different base semantics from CPUs (under normal, non-vector-transformed rules) and that it's not appropriate to unconditionally make those weaker GPU semantics the base semantics of LLVM IR.

[arsenm]

In D69498#1727626, @mehdi_amini wrote:

In D69498#1727546, @jdoerfert wrote:

In D69498#1727419, @mehdi_amini wrote:

In D69498#1727080, @jdoerfert wrote:

Let me quote @arsenm here because this is so important: "Basically no frontend has gotten this right, including clang and non-clang frontends." For me, that statement alone is reason to change the status quo.

I am not convinced by this: this seems overly simplistic. The fact that convergent wasn't rolled out properly in frontend can also been as an artifact of the past.

Evidence suggest this problem will resurface over and over again, calling it an artifact of the past is dangerous and not helpful.

Can you provide the "evidence"? So far the only thing I have seen is historical and closely tied to how convergence was rolled out AFAICT.

I'm not sure what other evidence could exist for how something is handled in practice besides historical record. The current design requires a higher awareness at all times to avoid subtlety breaking code, which I think is fundamentally more error prone.

[jdoerfert]

In D69498#1727626, @mehdi_amini wrote:

In D69498#1727546, @jdoerfert wrote:

In D69498#1727419, @mehdi_amini wrote:

In D69498#1727080, @jdoerfert wrote:

Let me quote @arsenm here because this is so important: "Basically no frontend has gotten this right, including clang and non-clang frontends." For me, that statement alone is reason to change the status quo.

I am not convinced by this: this seems overly simplistic. The fact that convergent wasn't rolled out properly in frontend can also been as an artifact of the past.

Evidence suggest this problem will resurface over and over again, calling it an artifact of the past is dangerous and not helpful.

Can you provide the "evidence"? So far the only thing I have seen is historical and closely tied to how convergence was rolled out AFAICT.

Recently, as mentioned a few times before, OpenMP target offloading gets/got it wrong long after convergence was rolled out.
r238264 introduced convergent in 2015, r315094 fixed it in part for OpenCL in 2017 (with the idea to remove noduplicate which was also broken!) a year after OpenCL support was started.

There is a logical gap between this and concluding that the only solution is to change the default.

There is no gap.

Bluntly contradicting what I wrote without apparently trying to understand my point or trying to explain your point with respect to what I'm trying to explain is not gonna get me to agree with you magically, I'm not sure what you expect here other than shutting down the discussion and leaving us in a frustrating disagreement and lack of understanding with this?

You removed my explanation that directly follows my statement. Please do not use my quotes out of context like this to blame me.

To reiterate what actually followed my above quote: If we have a "by default unsound behavior" we will by design have cases we miss, e.g., anything new not added with this special case in mind. So changing the default to the "by construction sound" case, is in my opinion the only way to prevent that. That being said, I already agreed that this might not be necessary for every target, e.g., based on the data layout. However, I do try to bring forward reasons why a "split in semantics" on this level will hurt us as a community and maintainers of the IR continuously.

[tra]

Would I be too far off the mark to summarize the situation this way?

• current default for unattributed functions is unsound for GPU back-ends, but is fine for most of the other back-ends.
• it's easy to unintentionally end up using/mis-optimizing unattributed functions for back-ends where that care about convergence.
• making functions convergent by default everywhere is correct, but is overly pessimistic for back-ends that do not need it. Such back-ends will need to add explicit attributes in order to maintain current level of optimizations. In a way it's the other side of the current situation -- default is not good for some back-ends and we have to add attributes everywhere to make things work. Flipping the default improves correctness-by-default, but places logistical burden on back- and front-ends that may not care about convergence otherwise.

Perhaps we can deal with that by providing a way to specify per-module default for the assumed convergence of the functions and then checking in the back-end (only those that do care about convergence) that the default convergence is explicitly set (and, perhaps, set to something specific?) via function/module attributes or CLI.

This way the unintentional use of vanilla IR w/o attributes with NVPTX back-end will produce an error complaining that default convergence is not set and we don't know if the IR is still sound. If necessary, the user can set appropriate convergence wholesale via CLI or module attribute. The burden on platforms that don't care about convergence will be limited to setting the default and applying attributes on entities that do not match the default assumption (there may be none of those).

One pitfall of this approach is that we may run optimizations based on wrong assumptions and end up miscompiling things before we know what those assumptions will be (e.g. opt vs llc). Perhaps we can document the default assumption to be nonconvergent and always set a module attribute indicating the assumption used. This assumption will percolate through the optimization pipeline. If its the wrong one we would be able to reject / warn about it in the passes for the back-ends that have different preference.

Would something like that be a reasonable compromise?

[arsenm]

In D69498#1728039, @tra wrote:

Perhaps we can deal with that by providing a way to specify per-module default for the assumed convergence of the functions and then checking in the back-end (only those that do care about convergence) that the default convergence is explicitly set (and, perhaps, set to something specific?) via function/module attributes or CLI.

This way the unintentional use of vanilla IR w/o attributes with NVPTX back-end will produce an error complaining that default convergence is not set and we don't know if the IR is still sound. If necessary, the user can set appropriate convergence wholesale via CLI or module attribute. The burden on platforms that don't care about convergence will be limited to setting the default and applying attributes on entities that do not match the default assumption (there may be none of those).

Convergent can be correctly stripped in many cases (and noconvergent inferred in the same cases), so erroring if a function isn't convergent won't really work

[arsenm]

As far as optimization inhibition is concerned, noconvergent will be inferred for all functions that don't call convergent intrinsics (i.e. the state of the world for all functions on all CPU targets). The frontend needing to do something for optimization comes up in relation to calling external declarations which won't be inferred in non-LTO contexts (plus inline asm and indirect calls, the other opaque call types). IMO the mild inconvenience of needing to add another attribute to optimize external call declarations is not unreasonable. This is already the situation for nounwind with languages that don't have exceptions. I don't see what real benefit there is to inventing some new inconsistent, target-specific IR construct to avoid frontends needing to add an attribute that behaves nearly identically to nounwind

[Anastasia]

In D69498#1725692, @kariddi wrote:

In D69498#1725528, @rjmccall wrote:

It absolutely makes sense for Clang as a GPU-programming frontend to set attributes appropriately when targeting the GPU. I'm objecting to making "convergence" and related "code layout is semantics" properties a universal part of the IR semantics that literally every frontend has to know about in order to get reasonable behavior from LLVM. I know that doing so makes sense to GPU backend developers because you mostly work exclusively on GPU toolchains, but AFAIK there are half a dozen GPU frontends and they're all forks of Clang, whereas there are dozens of LLVM frontends out there that don't care about targeting the GPU and quite possibly never will. (And even if they do target GPUs, they often will not care about exposing thread groups; many programming environments are just interested in taking advantage of the GPU's parallel-computation power and have no interest in inter-thread interference.)

John.

I agree that the issue with making it "transparent" as a concept to whoever is not interested in programming models that have the concept of SIMD-wide execution is an open issue (not only related to this patch, but in general to the convergent idea as a whole, where writing a llvm pass that maintains convergence now is an extra burden to the developer of such pass that wasn't there before and that is probably completely orthogonal to the interest of the pass writer probably targeting C/C++ or other non-parallel languages). I opened some discussions going on the other related RFC for extending the concept of convergent to avoid hoisting as well regarding how are we gonna avoid burdening the LLVM community and maintain the invariants we want with respect to this concept.
I have no idea what the impact of the convergent attribute is in Clang (with the exception of adding the flag itself), but a lot of the heavy-lifting I know its in LVLM itself.

That said I just want to point out that some of these languages run on CPUs as well (like openCL ) and they share the same properties with respect to instructions that read execution masks of neighboring threads and making sure threads stay converged when executing them. It's certainly unfortunate that LLVM has some deficiencies in supporting these concepts and that the so far proposed solutions are not burden free for the rest of the community. :-/

Aside from functionality issues with inter-thread interference, there is another very related aspect - optimizing for SIMT execution. This topic hasn't been discussed much yet but optimizing for single threaded execution doesn't always yield optimal result when run in SIMT style. For example divergent code regions can significantly slow down execution of multiple threads even if they have small instruction count. I think the biggest gap in LLVM is absence of a way to represent SIMT concept in general i.e. by adding special annotations to functions that run in SIMT mode or adding annotation to the whole module. This can be useful not only to correctly implement convergent but to potentially setup separate optimization pass pipeline for GPU-like targets to allow excluding harmful transformations and potentially add more passes to middle end that are targeting SIMT. Currently there is no solution to this at middle end and therefore each backend ends up adding the same logic during lowering phases instead. However, adding the concept of SIMT seems like a large architectural change and might not be something we can do quickly. Potentially we can identify some small steps towards this goal that can be done now to at least to support the convergent for SIMT targets correctly without affecting much non-SIMT community.

[mehdi_amini]

In D69498#1727650, @dexonsmith wrote:

In D69498#1723606, @rjmccall wrote:

Perhaps there should be a global metadata, or something in the increasingly-misnamed "data layout" string, which says that convergence is meaningful, and we should only add the attribute in appropriately-annotated modules?

Just wanted to resurface these alternatives from John. Given that some targets want a fundamentally different default from what most frontends expect, I think we ought to find some way to encode the difference.

Just thought about a slight variation on this: what about adding a flag on the datalayout (or a module flag) but not use it in the transformations/analyses, instead use it only when creating Function by always setting the convergent attribute when the flag is present? This would require to always have a Module passed to the Function constructor though (the C API already does, we would just need to update the C++ users).

So creating a Function in a Module with this flag would have the convergent attribute set on creation (can be unset explicitly).

[rjmccall]

In D69498#1731265, @mehdi_amini wrote:

In D69498#1727650, @dexonsmith wrote:

In D69498#1723606, @rjmccall wrote:

Perhaps there should be a global metadata, or something in the increasingly-misnamed "data layout" string, which says that convergence is meaningful, and we should only add the attribute in appropriately-annotated modules?

Just wanted to resurface these alternatives from John. Given that some targets want a fundamentally different default from what most frontends expect, I think we ought to find some way to encode the difference.

Just thought about a slight variation on this: what about adding a flag on the datalayout (or a module flag) but not use it in the transformations/analyses, instead use it only when creating Function by always setting the convergent attribute when the flag is present? This would require to always have a Module passed to the Function constructor though (the C API already does, we would just need to update the C++ users).

So creating a Function in a Module with this flag would have the convergent attribute set on creation (can be unset explicitly).

That works for me.

[arsenm]

In D69498#1731265, @mehdi_amini wrote:

In D69498#1727650, @dexonsmith wrote:

In D69498#1723606, @rjmccall wrote:

Perhaps there should be a global metadata, or something in the increasingly-misnamed "data layout" string, which says that convergence is meaningful, and we should only add the attribute in appropriately-annotated modules?

Just wanted to resurface these alternatives from John. Given that some targets want a fundamentally different default from what most frontends expect, I think we ought to find some way to encode the difference.

Just thought about a slight variation on this: what about adding a flag on the datalayout (or a module flag) but not use it in the transformations/analyses, instead use it only when creating Function by always setting the convergent attribute when the flag is present? This would require to always have a Module passed to the Function constructor though (the C API already does, we would just need to update the C++ users).

So creating a Function in a Module with this flag would have the convergent attribute set on creation (can be unset explicitly).

This sounds almost too low level. The bitcode loading of a function shouldn’t be adding attributes to non-intrinsics, otherwise it’s changing the meaning of the program and not preserving the input

[mehdi_amini]

In D69498#1735763, @arsenm wrote:

In D69498#1731265, @mehdi_amini wrote:

Just thought about a slight variation on this: what about adding a flag on the datalayout (or a module flag) but not use it in the transformations/analyses, instead use it only when creating Function by always setting the convergent attribute when the flag is present? This would require to always have a Module passed to the Function constructor though (the C API already does, we would just need to update the C++ users).

So creating a Function in a Module with this flag would have the convergent attribute set on creation (can be unset explicitly).

This sounds almost too low level. The bitcode loading of a function shouldn’t be adding attributes to non-intrinsics, otherwise it’s changing the meaning of the program and not preserving the input

You're right, but I thought loading a function from bitcode would be 1) create the function (it may get a default convergent attribute added) and 2) set the exact attributes (which would override the default)

[mehdi_amini]

Talked with Matt at the last social, they thought I was strongly opposed to this: I am not, and I told them I would clarify here:

I don't buy the argument of "frontend projects have consistently run into problems related to this", I think this is not a good justification for this change. But this change seems like it can be motivated without this argument.
I also have been trying to help brainstorming alternatives just to see if we could get something that would fit what Matt is looking to achieve while getting past @rjmccall concerns, not because I am against this change.

[JonChesterfield]

I've managed to write a bug in some freestanding c++ compiled for amdgpu by forgetting the convergent attribute in strategic places. Took a while to debug that. OpenMP does now set the current attribute correctly, I think. I wonder if anyone has audited all the rocm device code to verify it is correctly annotated.

The trailing comments above are 'that works for me' and 'not strongly opposed'. @sameerds is this something you're looking at picking up? Patch has probably rotted a bit.

[sameerds]

The way I see it, the notion of convergence is relevant only to a certain class of targets (usually represented by GPUs) and it only affects certain optimizations. Then why not have only these optimizations check TTI to see if convergence matters? TTI.hasBranchDivergence() seems like a sufficient proxy for this information.

1. convergent becomes the default in LLVM IR, but it does not affect optimizations on non-GPU targets.
2. This is not a reinterpretation of the same IR on different targets. The notional execution model of LLVM IR will say that all function calls are convergent. Targets that only care about one thread at a time represent the degenerate case where all executions are convergent anyway.

This recasts the whole question to be one about combining optimizations with target-specific information. The only changes required are in transforms that check CallInst::isConvergent(). These should now also check TTI, possibly adding a dependency on the TTI analysis where it didn't exist earlier.

[foad]

In D69498#2703317, @sameerds wrote:

The way I see it, the notion of convergence is relevant only to a certain class of targets (usually represented by GPUs) and it only affects certain optimizations. Then why not have only these optimizations check TTI to see if convergence matters? TTI.hasBranchDivergence() seems like a sufficient proxy for this information.

1. convergent becomes the default in LLVM IR, but it does not affect optimizations on non-GPU targets.
2. This is not a reinterpretation of the same IR on different targets. The notional execution model of LLVM IR will say that all function calls are convergent. Targets that only care about one thread at a time represent the degenerate case where all executions are convergent anyway.

This recasts the whole question to be one about combining optimizations with target-specific information. The only changes required are in transforms that check CallInst::isConvergent(). These should now also check TTI, possibly adding a dependency on the TTI analysis where it didn't exist earlier.

@sameerds I agree with your conclusions but I would describe the situation a little differently. As I understand it, the optimizations that check isConvergent really only care about moving convergent calls past control flow that might be divergent. !hasBranchDivergence is a promise that there are no possible sources of divergence for a target, so you can run a divergence analysis if you like but it will just tell you that everything is uniform, so all control flow is uniform, so it's OK to move isConvergent calls around.

In practice the optimizations that check isConvergent don't seem to use divergence analysis, they just pessimistically assume that any control flow might be divergent (if hasBranchDivergence). But they could and perhaps should use divergence analysis, and then it would all just fall out in the wash with no need for an explicit hasBranchDivergence test.

[sameerds]

In D69498#2704364, @foad wrote:

This recasts the whole question to be one about combining optimizations with target-specific information. The only changes required are in transforms that check CallInst::isConvergent(). These should now also check TTI, possibly adding a dependency on the TTI analysis where it didn't exist earlier.

@sameerds I agree with your conclusions but I would describe the situation a little differently. As I understand it, the optimizations that check isConvergent really only care about moving convergent calls past control flow that might be divergent. !hasBranchDivergence is a promise that there are no possible sources of divergence for a target, so you can run a divergence analysis if you like but it will just tell you that everything is uniform, so all control flow is uniform, so it's OK to move isConvergent calls around.

In practice the optimizations that check isConvergent don't seem to use divergence analysis, they just pessimistically assume that any control flow might be divergent (if hasBranchDivergence). But they could and perhaps should use divergence analysis, and then it would all just fall out in the wash with no need for an explicit hasBranchDivergence test.

Sure it is formally the same thing. But in practice, the main issue for everyone is the effect on compile time for targets that don't care about convergence/divergence. For such targets, running even the divergence analysis is an unnecessary cost. Any checks for uniform control flow will still be hidden under TTI.hasBranchDivergence() for such targets. We see that happening already in places where divergence analysis is constructed optionally.

[foad]

But in practice, the main issue for everyone is the effect on compile time for targets that don't care about convergence/divergence. For such targets, running even the divergence analysis is an unnecessary cost.

LegacyDivergenceAnalysis::runOnFunction bails out immediately if !hasBranchDivergence.

[sameerds]

I realize now that what @foad says above puts the idea in a clearer context. Essentially, any check for isConvergent() isn't happening in a vacuum. It is relevant only in the presence of divergent control flow, which in turn is relevant only when the target has divergence. Any standalone check for isConvergent() is merely making a pessimistic assumption that all the control flow incident on it is divergent. This has two consequences:

1. The meaning of the convergent attribute has always been target-dependent.
2. Dependence on TTI is not a real cost at all. We may eventually update every use of isConvergent() to depend on a check for divergence. The check for TTI is only the first step towards that.

I would propose refining the definition of the noconvergent attribute as follows:

noconvergent:

Some targets with a parallel execution model provide cross-thread operations whose outcome is affected by the presence of divergent control flow. We call such operations convergent. Optimizations that change control flow may affect the correctness of a program that uses convergent operations. In the presence of divergent control flow, such optimizations conservatively treat every call/invoke instruction as convergent by default. The noconvergent attribute relaxes this constraint as follows:

• The noconvergent attribute can be added to a call/invoke to indicate that it is not affected by changes to the control flow that reaches it.
• The noconvergent attribute can be added to a function to indicate that it does not execute any convergent operations. A call/invoke automatically inherits the noconvergent attribute if it is set on the callee.

[arsenm]

In D69498#2705441, @sameerds wrote:

I realize now that what @foad says above puts the idea in a clearer context. Essentially, any check for isConvergent() isn't happening in a vacuum. It is relevant only in the presence of divergent control flow, which in turn is relevant only when the target has divergence. Any standalone check for isConvergent() is merely making a pessimistic assumption that all the control flow incident on it is divergent. This has two consequences:

1. The meaning of the convergent attribute has always been target-dependent.
2. Dependence on TTI is not a real cost at all. We may eventually update every use of isConvergent() to depend on a check for divergence. The check for TTI is only the first step towards that.

The core IR semantics must *not* depend on target interpretation. convergent has never been target dependent, and was defined in an abstract way. Only certain targets will really care, but we cannot directly define it to mean what we want it to mean for particular targets

[sameerds]

In D69498#2706524, @arsenm wrote:

In D69498#2705441, @sameerds wrote:

I realize now that what @foad says above puts the idea in a clearer context. Essentially, any check for isConvergent() isn't happening in a vacuum. It is relevant only in the presence of divergent control flow, which in turn is relevant only when the target has divergence. Any standalone check for isConvergent() is merely making a pessimistic assumption that all the control flow incident on it is divergent. This has two consequences:

1. The meaning of the convergent attribute has always been target-dependent.
2. Dependence on TTI is not a real cost at all. We may eventually update every use of isConvergent() to depend on a check for divergence. The check for TTI is only the first step towards that.

The core IR semantics must *not* depend on target interpretation. convergent has never been target dependent, and was defined in an abstract way. Only certain targets will really care, but we cannot directly define it to mean what we want it to mean for particular targets

My bad. I should have said "the implementation of convergent" is target dependent. But even that is not precise enough. It is more correct to say that the convergent attribute can be implemented inside LLVM by depending on TTI so that it only impacts targets that have divergence. This dependence is not new; it's merely missing because the current uses of convergent pessimistically assume divergent control flow on targets.

The important point is that frontends have to do nothing special for targets that don't have divergence, because the concepts of convergence and divergence have a trivial effect on optimizations. I had already observed in a previous comment that this new definition does not amount to reinterpreting the same program differently on different targets. It is perfectly okay to say that all calls are convergent on a CPU, because all branches are trivially uniform on the CPU (this part is inspired by @foad's observation), and hence the default convergent nature of calls has no effect on optimization for CPUs. If we were to rename isConvergent() to hasConvergenceConstraints() then we can see that it trivially returns false for any target that has no divergence.

Note that my proposed definition for noconvergent makes no mention of the target. The first sentence starts with "some targets", but that's just for a helpful context. The concept of convergent calls is defined purely in terms of divergent control flow. This one sentence very nicely ties everything up:

In the presence of divergent control flow, such optimizations conservatively treat every call/invoke instruction as convergent by default.

[arsenm]

In D69498#2707100, @sameerds wrote:

1. The meaning of the convergent attribute has always been target-dependent.
2. Dependence on TTI is not a real cost at all. We may eventually update every use of isConvergent() to depend on a check for divergence. The check for TTI is only the first step towards that.

The core IR semantics must *not* depend on target interpretation. convergent has never been target dependent, and was defined in an abstract way. Only certain targets will really care, but we cannot directly define it to mean what we want it to mean for particular targets

My bad. I should have said "the implementation of convergent" is target dependent. But even that is not precise enough. It is more correct to say that the convergent attribute can be implemented inside LLVM by depending on TTI so that it only impacts targets that have divergence. This dependence is not new; it's merely missing because the current uses of convergent pessimistically assume divergent control flow on targets.

You're still saying the same thing. This needs to be defined generically. Frontends don't *have* to to anything, they'll just get the assumed convergent behavior by default. Either frontends could always add noconvergent to avoid any possible optimization hit, or we could have a pass add noconvergent depending on the target. I don't want to change the interpretation of core attributes based on the target

[sameerds]

In D69498#2708990, @arsenm wrote:

You're still saying the same thing. This needs to be defined generically. Frontends don't *have* to to anything, they'll just get the assumed convergent behavior by default. Either frontends could always add noconvergent to avoid any possible optimization hit, or we could have a pass add noconvergent depending on the target. I don't want to change the interpretation of core attributes based on the target

Like I said earlier, this not a reinterpretation base on target. I think we are not talking about the same "convergent" here. There is currently an attribute in LLVM with the spelling "c-o-n-v-e-r-g-e-n-t". It does not do what its name says. It has a prescriptive definition that says "thou shalt not add control dependences to this function". This is not what we actually need, because it fails in two ways:

1. It is actually okay add control dependences to a convergent function as long as the new branches are uniform.
2. Some times we hack a transform to avoid doing things that cannot be described as "add new control dependence", and still talk about the function having the above named attribute.

There is another important bug that obfuscates the whole discussion: most places that use "isConvergent()" should in fact first check if it really matters to the surrounding control flow. There is too much loaded onto that one attribute, without sufficient context. The definition of "noconvergent" that I am proposing starts out by first fixing the definition of convergent itself. This definition is independent of target, and only talks about the properties of the control flow that reach the callsite. To repeat, this does not reinterpret the IR in a target-defined way. Like I said, in the new definition, all function calls are convergent even on CPUs, so I don't see where the target comes in. If you still insist on talking about interpretation of core attributes, please start by deconstructing the definition that I propose so I can see what I am missing.

[mehdi_amini]

What matter isn't "convergent" in itself, it is how it restricts transformations: if you know that all the control flow is always uniform, are there still restriction on any transformation in presence of convergent instructions?

If not, then the "target approach" seems nice: as @foad and @sameerds noted we just need to have a guarantee on these targets about the uniformity of the branches, it does not require to change the convergent semantics on a target basis I think.

[arsenm]

In D69498#2709218, @sameerds wrote:

1. It is actually okay add control dependences to a convergent function as long as the new branches are uniform.
2. Some times we hack a transform to avoid doing things that cannot be described as "add new control dependence", and still talk about the function having the above named attribute.

There is another important bug that obfuscates the whole discussion: most places that use "isConvergent()" should in fact first check if it really matters to the surrounding control flow. There is too much loaded onto that one attribute, without sufficient context. The definition of "noconvergent" that I am proposing starts out by first fixing the definition of convergent itself. This definition is independent of target, and only talks about the properties of the control flow that reach the callsite. To repeat, this does not reinterpret the IR in a target-defined way. Like I said, in the new definition, all function calls are convergent even on CPUs, so I don't see where the target comes in. If you still insist on talking about interpretation of core attributes, please start by deconstructing the definition that I propose so I can see what I am missing.

Yes, the current concept of convergent is broken. I think this whole recent burst of conversation has been too focused on the current convergent situation and this patch in particular. I think we need to conceptually rebase this into the world that D85603 creates. The expected convergence behavior is not only a target property, but of the source language. The frontend ultimately has to express the intended semantics of these cross lane regions, and the convergence tokens gives this ability.

My point about not making this target dependent is we shouldn't be trying to shoehorn in TTI checks around convergent operations just to save frontends from the inconvenience of adding another attribute to function declarations. We can interprocedurally infer noconvergent like any other attribute most of the time. The convergent calls and their tokens should be interpreted the same even if the target CPU doesn't really have cross lane behavior.

[sameerds]

In D69498#2710675, @arsenm wrote:

In D69498#2709218, @sameerds wrote:

1. It is actually okay add control dependences to a convergent function as long as the new branches are uniform.
2. Some times we hack a transform to avoid doing things that cannot be described as "add new control dependence", and still talk about the function having the above named attribute.

There is another important bug that obfuscates the whole discussion: most places that use "isConvergent()" should in fact first check if it really matters to the surrounding control flow. There is too much loaded onto that one attribute, without sufficient context. The definition of "noconvergent" that I am proposing starts out by first fixing the definition of convergent itself. This definition is independent of target, and only talks about the properties of the control flow that reach the callsite. To repeat, this does not reinterpret the IR in a target-defined way. Like I said, in the new definition, all function calls are convergent even on CPUs, so I don't see where the target comes in. If you still insist on talking about interpretation of core attributes, please start by deconstructing the definition that I propose so I can see what I am missing.

Yes, the current concept of convergent is broken. I think this whole recent burst of conversation has been too focused on the current convergent situation and this patch in particular. I think we need to conceptually rebase this into the world that D85603 creates.

Actually that is exactly what this current conversation is doing. My definition of noconvergent first rebases the definition of convergent into what D85603 does. My wording is no different than the one you see here: https://reviews.llvm.org/D85603#change-WRNH9XUSSoR8

The expected convergence behavior is not only a target property, but of the source language. The frontend ultimately has to express the intended semantics of these cross lane regions, and the convergence tokens gives this ability.

That is true, and it is covered by the simple fact that we both agree that convergent needs to be the default unless specified by the frontend using noconvergent.

My point about not making this target dependent is we shouldn't be trying to shoehorn in TTI checks around convergent operations just to save frontends from the inconvenience of adding another attribute to function declarations. We can interprocedurally infer noconvergent like any other attribute most of the time. The convergent calls and their tokens should be interpreted the same even if the target CPU doesn't really have cross lane behavior.

This is not an attempt to shoehorn TTI checks for mere convenience. You missed the part about how the current use of CallInst::isConvergent() is broken. This is where the wording in D85603 inherits a major fault from the existing definition of convergent. It is wrong to say that optimizations are plain forbidden by the mere knowledge/assumption that some call is convergent. Those optimizations are forbidden only if divergent control flow is involved. The definition of convergent needs to refrain from being prescriptive about what the compiler can and cannot do. See the definition of nosync for comparison.

The convergent property merely says that the call is special, and then it is up to each optimization to decide what happens. That decision is based on whether the optimization affects divergent control flow incident on the call, and whether that effect is relevant to a convergent function. Now that's where the following reasoning comes into play:

1. Every use of isConvergent() needs to be tempered with knowledge of the control flow incident on it.
2. The only way to check for divergent control flow is to call on divergence analysis.
3. When divergence analysis is called on a target with no divergence, it returns nullptr, which is treated as equivalent to returning uniform for every query. This is not hypothetical, it's already happening whenever a transform does if (!DA) { ... }.
4. Pending an attempt to actually call DA at each of these places, a correct simplification is to assume uniform control flow when the target does not have divergence, and assume divergent control flow otherwise.

That's all there is to this. Like I keep saying, this is not a reinterpretation, nor is it a hack. From my first comment on the thread, it is an attempt to recast the whole question o be one about combining optimizations with target-specific information. Now before you balk at yet another use of the phrase "target-specific", please note that DA is totally target-specific. The "sources of divergence" must be identified by the target. So this is a perfectly legitimate place to say "target-specific". It's making the optimization "target-specific", not the attribute.

[foad]

In D69498#2705441, @sameerds wrote:

I would propose refining the definition of the noconvergent attribute as follows:

noconvergent:

Some targets with a parallel execution model provide cross-thread operations whose outcome is affected by the presence of divergent control flow. We call such operations convergent. Optimizations that change control flow may affect the correctness of a program that uses convergent operations. In the presence of divergent control flow, such optimizations conservatively treat every call/invoke instruction as convergent by default. The noconvergent attribute relaxes this constraint as follows:

• The noconvergent attribute can be added to a call/invoke to indicate that it is not affected by changes to the control flow that reaches it.
• The noconvergent attribute can be added to a function to indicate that it does not execute any convergent operations. A call/invoke automatically inherits the noconvergent attribute if it is set on the callee.

I don't have much to add to the conversation except to point out that this definition defines noconvergent in terms of divergent control flow, but the langref itself doesn't define what divergent control flow is, which makes it an incomplete spec. (Perhaps I'm just restating @arsenm's objections.) This seems unsatisfactory to me but I have no idea what to do about it. I agree with @sameerds that the current definition of convergent is too restrictive because in practice we really do want to be able to move convergent calls past uniform control flow.

[nhaehnle]

In D69498#2711396, @foad wrote:

I don't have much to add to the conversation except to point out that this definition defines noconvergent in terms of divergent control flow, but the langref itself doesn't define what divergent control flow is, which makes it an incomplete spec. (Perhaps I'm just restating @arsenm's objections.) This seems unsatisfactory to me but I have no idea what to do about it. I agree with @sameerds that the current definition of convergent is too restrictive because in practice we really do want to be able to move convergent calls past uniform control flow.

That is one of the things that D85603 addresses. I suspect Sameer was assuming the language from there in the background.

I agree with Matt that it would be best to avoid too much TTI dependence. The existing situation with the intrinsics is already a bit of a strange one. I wonder if it is possible to move to a world where isSourceOfDivergence need not be target-dependent. (This requires e.g. new attributes on function arguments as well as new information about address spaces in the data layout, plus some new attributes to define intrinsic data flow. Likely beyond the scope of this patch.)

[sameerds]

In D69498#2712706, @nhaehnle wrote:

In D69498#2711396, @foad wrote:

I don't have much to add to the conversation except to point out that this definition defines noconvergent in terms of divergent control flow, but the langref itself doesn't define what divergent control flow is, which makes it an incomplete spec. (Perhaps I'm just restating @arsenm's objections.) This seems unsatisfactory to me but I have no idea what to do about it. I agree with @sameerds that the current definition of convergent is too restrictive because in practice we really do want to be able to move convergent calls past uniform control flow.

That is one of the things that D85603 addresses. I suspect Sameer was assuming the language from there in the background.

I agree with Matt that it would be best to avoid too much TTI dependence. The existing situation with the intrinsics is already a bit of a strange one. I wonder if it is possible to move to a world where isSourceOfDivergence need not be target-dependent. (This requires e.g. new attributes on function arguments as well as new information about address spaces in the data layout, plus some new attributes to define intrinsic data flow. Likely beyond the scope of this patch.)

In general, yes, it is great to avoid dependence on TTI. But this particular instance is actually a dependence on DA. The fact that DA depends on TTI is a separate problem. But I think that's a natural fallout of the fact that LLVM is not (and should not be) in the business of defining an execution model for multiple threads. Every optimization that affects control flow needs to be able to reason about an execution model that LLVM itself does not define. So what we end up with is an approximate model in the form of information gleaned from the frontend as well as the target. Neither source is "more correct" or "less ideal" than the other.

[JonChesterfield]

I wonder if it is necessary for the exec mask to be implicit state, managed by a convergent/divergent abstraction.

We could reify it as an argument passed to kernels (where all bits are set), and adjusted by phi nodes at entry to basic blocks. Various intrinsics take and return that reified value. __ballot, a comparison op, possibly load/store.

At that point all the awkward control flow constraints are raised to data flow, and I think (but haven't really chased this into the dark corners) that solves the problems I know about. Notably, a uniform branch would be one where the exec mask value was unchanged, so the associated phi is constant folded.

Makes a mess of the human readable IR, but possibly at a lower overall complexity than continuing to handle divergence as control flow.

edit: said reified mask, if integer, would also be the value post-volta sync intrinsics take, where the developer is supposed to compute the mask across branches and pass it around everywhere. Clang could therefore provide builtins that lower to those sync intrinsics with an always correct mask automatically passed. That would make volta much easier to program.

[sameerds]

In D69498#2728451, @JonChesterfield wrote:

I wonder if it is necessary for the exec mask to be implicit state, managed by a convergent/divergent abstraction.

We could reify it as an argument passed to kernels (where all bits are set), and adjusted by phi nodes at entry to basic blocks. Various intrinsics take and return that reified value. __ballot, a comparison op, possibly load/store.

At that point all the awkward control flow constraints are raised to data flow, and I think (but haven't really chased this into the dark corners) that solves the problems I know about. Notably, a uniform branch would be one where the exec mask value was unchanged, so the associated phi is constant folded.

Makes a mess of the human readable IR, but possibly at a lower overall complexity than continuing to handle divergence as control flow.

That is essentially what the current divergence analysis (Karrenberg and Hack) does anyway. Except that since we don't know how many threads are running concurrently, the mask is a symbolic value that can either be "divergent" or "uniform". If I am looking at this the right way, you seem to be saying two separate things: the notion of divergence/uniformity is what solves the problem at hand, and separately, the notion of divergence can be turned into explicit dataflow.

edit: said reified mask, if integer, would also be the value post-volta sync intrinsics take, where the developer is supposed to compute the mask across branches and pass it around everywhere. Clang could therefore provide builtins that lower to those sync intrinsics with an always correct mask automatically passed. That would make volta much easier to program.

Additionally, the explicit mask (if we could agree on its type) would make it possible to have "dynamic uniformity". Currently we can only prove static uniformity.

clang/lib/CodeGen/CGCall.cpp

if (CodeGenOpts.StackRealignment)
       FuncAttrs.addAttribute("stackrealign");
     if (CodeGenOpts.Backchain)
       FuncAttrs.addAttribute("backchain");
 
     if (CodeGenOpts.SpeculativeLoadHardening)
       FuncAttrs.addAttribute(llvm::Attribute::SpeculativeLoadHardening);
   }
 
-  if (getLangOpts().assumeFunctionsAreConvergent()) {
-    // Conservatively, mark all functions and calls in CUDA and OpenCL as
-    // convergent (meaning, they may call an intrinsically convergent op, such
-    // as __syncthreads() / barrier(), and so can't have certain optimizations
-    // applied around them).  LLVM will remove this attribute where it safely
-    // can.
-    FuncAttrs.addAttribute(llvm::Attribute::Convergent);
+  if (!getLangOpts().assumeFunctionsAreConvergent()) {
+    // The language is assumed to not have SPMD semantics, so there should be no
+    // convergent operations anywhere in the program.
+    //
+    // Functions and calls in CUDA and OpenCL may be convergent (meaning, they
+    // may call an intrinsically convergent op, such as __syncthreads() /
+    // barrier(), and so can't have certain optimizations applied around them).
+    // LLVM will infer this attribute where it safely can.
+    FuncAttrs.addAttribute(llvm::Attribute::NoConvergent);
   }
 
   if (getLangOpts().CUDA && getLangOpts().CUDAIsDevice) {
     // Exceptions aren't supported in CUDA device code.
     FuncAttrs.addAttribute(llvm::Attribute::NoUnwind);
 
     // Respect -fcuda-flush-denormals-to-zero.
     if (CodeGenOpts.FlushDenorm)
if (TargetDecl) {
     if (TargetDecl->hasAttr<NoThrowAttr>())
       FuncAttrs.addAttribute(llvm::Attribute::NoUnwind);
     if (TargetDecl->hasAttr<NoReturnAttr>())
       FuncAttrs.addAttribute(llvm::Attribute::NoReturn);
     if (TargetDecl->hasAttr<ColdAttr>())
       FuncAttrs.addAttribute(llvm::Attribute::Cold);
     if (TargetDecl->hasAttr<NoDuplicateAttr>())
       FuncAttrs.addAttribute(llvm::Attribute::NoDuplicate);
-    if (TargetDecl->hasAttr<ConvergentAttr>())
-      FuncAttrs.addAttribute(llvm::Attribute::Convergent);
 
     if (const FunctionDecl *Fn = dyn_cast<FunctionDecl>(TargetDecl)) {
       AddAttributesFromFunctionProtoType(
           getContext(), FuncAttrs, Fn->getType()->getAs<FunctionProtoType>());
       // Don't use [[noreturn]] or _Noreturn for a call to a virtual function.
       // These attributes are not inherited by overloads.
       const CXXMethodDecl *MD = dyn_cast<CXXMethodDecl>(Fn);
       if (Fn->isNoReturn() && !(AttrOnCallSite && MD && MD->isVirtual()))

clang/lib/CodeGen/CGObjCMac.cpp

void FragileHazards::emitWriteHazard() {
 
   CGF.EmitNounwindRuntimeCall(WriteHazard, Locals);
 }
 
 void FragileHazards::emitReadHazard(CGBuilderTy &Builder) {
   assert(!Locals.empty());
   llvm::CallInst *call = Builder.CreateCall(ReadHazard, Locals);
   call->setDoesNotThrow();
+  call->setNoConvergent();
   call->setCallingConv(CGF.getRuntimeCC());
 }
 
 /// Emit read hazards in all the protected blocks, i.e. all the blocks
 /// which have been inserted since the beginning of the try.
 void FragileHazards::emitHazardsInNewBlocks() {
   if (Locals.empty()) return;
 

clang/lib/CodeGen/CGStmt.cpp

else {
     // At least put the line number on MS inline asm blobs.
     llvm::Constant *Loc = llvm::ConstantInt::get(CGF.Int32Ty,
                                         S.getAsmLoc().getRawEncoding());
     Result.setMetadata("srcloc",
                        llvm::MDNode::get(CGF.getLLVMContext(),
                                          llvm::ConstantAsMetadata::get(Loc)));
   }
 
-  if (CGF.getLangOpts().assumeFunctionsAreConvergent())
+  if (!CGF.getLangOpts().assumeFunctionsAreConvergent())
     // Conservatively, mark all inline asm blocks in CUDA or OpenCL as
     // convergent (meaning, they may call an intrinsically convergent op, such
     // as bar.sync, and so can't have certain optimizations applied around
     // them).
     Result.addAttribute(llvm::AttributeList::FunctionIndex,
-                        llvm::Attribute::Convergent);
+                        llvm::Attribute::NoConvergent);
   // Extract all of the register value results from the asm.
   if (ResultRegTypes.size() == 1) {
     RegResults.push_back(&Result);
   } else {
     for (unsigned i = 0, e = ResultRegTypes.size(); i != e; ++i) {
       llvm::Value *Tmp = CGF.Builder.CreateExtractValue(&Result, i, "asmresult");
       RegResults.push_back(Tmp);
     }

clang/lib/CodeGen/CodeGenModule.cpp

 }
 
 /// CreateRuntimeFunction - Create a new runtime function with the specified
 /// type and name.
 llvm::FunctionCallee
 CodeGenModule::CreateRuntimeFunction(llvm::FunctionType *FTy, StringRef Name,
                                      llvm::AttributeList ExtraAttrs, bool Local,
                                      bool AssumeConvergent) {
-  if (AssumeConvergent) {
+  if (!AssumeConvergent) {
     ExtraAttrs =
         ExtraAttrs.addAttribute(VMContext, llvm::AttributeList::FunctionIndex,
-                                llvm::Attribute::Convergent);
+                                llvm::Attribute::NoConvergent);
   }
 
   llvm::Constant *C =
       GetOrCreateLLVMFunction(Name, FTy, GlobalDecl(), /*ForVTable=*/false,
                               /*DontDefer=*/false, /*IsThunk=*/false,
                               ExtraAttrs);
 
   if (auto *F = dyn_cast<llvm::Function>(C)) {

clang/test/CXX/except/except.spec/p14-ir.cpp

void test() {
   // CHECK: define linkonce_odr void @_ZN2X9C2Ev(%struct.X9* %this) unnamed_addr
   // CHECK:      call void @_ZN2X6C2Ev({{.*}}) [[NUW]]
   //   FIXME: and here:
   // CHECK-NEXT: bitcast
   // CHECK-NEXT: call void @_ZN2X7C2Ev({{.*}})
   // CHECK: ret void
 }
 
-// CHECK: attributes [[NUW]] = { nounwind{{.*}} }
+// CHECK: attributes [[NUW]] = { noconvergent nounwind{{.*}} }

clang/test/CXX/special/class.dtor/p3-0x.cpp

 // CHECK: define linkonce_odr {{.*}} @_ZN2SwIiED1Ev({{.*}} [[ATTRGRP:#[0-9]+]]
 
 template <typename T>
 struct TVC : VX
 { virtual ~TVC(); };
 template <typename T>
 TVC<T>::~TVC() {}
 
-// CHECK: attributes [[ATTRGRP]] = { noinline nounwind{{.*}} }
+// CHECK: attributes [[ATTRGRP]] = { noconvergent noinline nounwind{{.*}} }

clang/test/CodeGen/2008-04-08-NoExceptions.c

 // RUN: %clang_cc1 -triple x86_64-apple-darwin -emit-llvm -o - %s | FileCheck %s
 
 void f(void);
 void g(void) {
   // CHECK: define void @g() [[NUW:#[0-9]+]]
   // CHECK-NOT: call void @f() nounwind
   f();
 }
 
 // CHECK-NOT: declare void @f() [[NUW]]
 
-// CHECK: attributes [[NUW]] = { noinline nounwind{{.*}} }
+// CHECK: attributes [[NUW]] = { noconvergent noinline nounwind{{.*}} }

clang/test/CodeGen/aarch64-tme.cpp

 // CHECK: declare void @llvm.aarch64.tcommit() #1
 // CHECK: declare void @llvm.aarch64.tcancel(i64 immarg) #1
 
 #ifdef __ARM_FEATURE_TME
 extern "C" void arm_feature_tme_defined() {}
 #endif
 // CHECK: define void @arm_feature_tme_defined()
 
-// CHECK: attributes #1 = { nounwind }
+// CHECK: attributes #1 = { noconvergent nounwind }
 

clang/test/CodeGen/address-safety-attr-flavors.cpp

 // RUN:   -disable-O0-optnone -emit-llvm -o - %s | \
 // RUN:   FileCheck -check-prefix=CHECK-HWASAN %s
 
 // RUN: %clang_cc1 -triple i386-unknown-linux -fsanitize=kernel-hwaddress \
 // RUN:   -disable-O0-optnone -emit-llvm -o - %s | \
 // RUN:   FileCheck -check-prefix=CHECK-KHWASAN %s
 
 int HasSanitizeAddress() { return 1; }
-// CHECK-NOASAN: {{Function Attrs: noinline nounwind$}}
-// CHECK-ASAN: Function Attrs: noinline nounwind sanitize_address
-// CHECK-KASAN: Function Attrs: noinline nounwind sanitize_address
-// CHECK-HWASAN: Function Attrs: noinline nounwind sanitize_hwaddress
-// CHECK-KHWASAN: Function Attrs: noinline nounwind sanitize_hwaddress
+// CHECK-NOASAN: {{Function Attrs: noconvergent noinline nounwind$}}
+// CHECK-ASAN: Function Attrs: noconvergent noinline nounwind sanitize_address
+// CHECK-KASAN: Function Attrs: noconvergent noinline nounwind sanitize_address
+// CHECK-HWASAN: Function Attrs: noconvergent noinline nounwind sanitize_hwaddress
+// CHECK-KHWASAN: Function Attrs: noconvergent noinline nounwind sanitize_hwaddress
 
 __attribute__((no_sanitize("address"))) int NoSanitizeQuoteAddress() {
   return 0;
 }
-// CHECK-NOASAN: {{Function Attrs: noinline nounwind$}}
-// CHECK-ASAN: {{Function Attrs: noinline nounwind$}}
-// CHECK-KASAN: {{Function Attrs: noinline nounwind$}}
-// CHECK-HWASAN: {{Function Attrs: noinline nounwind sanitize_hwaddress$}}
-// CHECK-KHWASAN: {{Function Attrs: noinline nounwind sanitize_hwaddress$}}
+// CHECK-NOASAN: {{Function Attrs: noconvergent noinline nounwind$}}
+// CHECK-ASAN: {{Function Attrs: noconvergent noinline nounwind$}}
+// CHECK-KASAN: {{Function Attrs: noconvergent noinline nounwind$}}
+// CHECK-HWASAN: {{Function Attrs: noconvergent noinline nounwind sanitize_hwaddress$}}
+// CHECK-KHWASAN: {{Function Attrs: noconvergent noinline nounwind sanitize_hwaddress$}}
 
 __attribute__((no_sanitize_address)) int NoSanitizeAddress() { return 0; }
-// CHECK-NOASAN: {{Function Attrs: noinline nounwind$}}
-// CHECK-ASAN: {{Function Attrs: noinline nounwind$}}
-// CHECK-KASAN: {{Function Attrs: noinline nounwind$}}
-// CHECK-HWASAN: {{Function Attrs: noinline nounwind sanitize_hwaddress$}}
-// CHECK-KHWASAN: {{Function Attrs: noinline nounwind sanitize_hwaddress$}}
+// CHECK-NOASAN: {{Function Attrs: noconvergent noinline nounwind$}}
+// CHECK-ASAN: {{Function Attrs: noconvergent noinline nounwind$}}
+// CHECK-KASAN: {{Function Attrs: noconvergent noinline nounwind$}}
+// CHECK-HWASAN: {{Function Attrs: noconvergent noinline nounwind sanitize_hwaddress$}}
+// CHECK-KHWASAN: {{Function Attrs: noconvergent noinline nounwind sanitize_hwaddress$}}
 
 __attribute__((no_sanitize("kernel-address"))) int NoSanitizeKernelAddress() {
   return 0;
 }
-// CHECK-NOASAN: {{Function Attrs: noinline nounwind$}}
-// CHECK-ASAN: {{Function Attrs: noinline nounwind$}}
-// CHECK-KASAN: {{Function Attrs: noinline nounwind$}}
-// CHECK-HWASAN: {{Function Attrs: noinline nounwind sanitize_hwaddress$}}
-// CHECK-KHWASAN: {{Function Attrs: noinline nounwind sanitize_hwaddress$}}
+// CHECK-NOASAN: {{Function Attrs: noconvergent noinline nounwind$}}
+// CHECK-ASAN: {{Function Attrs: noconvergent noinline nounwind$}}
+// CHECK-KASAN: {{Function Attrs: noconvergent noinline nounwind$}}
+// CHECK-HWASAN: {{Function Attrs: noconvergent noinline nounwind sanitize_hwaddress$}}
+// CHECK-KHWASAN: {{Function Attrs: noconvergent noinline nounwind sanitize_hwaddress$}}
 
 __attribute__((no_sanitize("hwaddress"))) int NoSanitizeHWAddress() {
   return 0;
 }
-// CHECK-NOASAN: {{Function Attrs: noinline nounwind$}}
-// CHECK-ASAN: {{Function Attrs: noinline nounwind sanitize_address$}}
-// CHECK-KASAN: {{Function Attrs: noinline nounwind sanitize_address$}}
-// CHECK-HWASAN: {{Function Attrs: noinline nounwind$}}
-// CHECK-KHWASAN: {{Function Attrs: noinline nounwind$}}
+// CHECK-NOASAN: {{Function Attrs: noconvergent noinline nounwind$}}
+// CHECK-ASAN: {{Function Attrs: noconvergent noinline nounwind sanitize_address$}}
+// CHECK-KASAN: {{Function Attrs: noconvergent noinline nounwind sanitize_address$}}
+// CHECK-HWASAN: {{Function Attrs: noconvergent noinline nounwind$}}
+// CHECK-KHWASAN: {{Function Attrs: noconvergent noinline nounwind$}}
 
 __attribute__((no_sanitize("kernel-hwaddress"))) int NoSanitizeKernelHWAddress() {
   return 0;
 }
-// CHECK-NOASAN: {{Function Attrs: noinline nounwind$}}
-// CHECK-ASAN: {{Function Attrs: noinline nounwind sanitize_address$}}
-// CHECK-KASAN: {{Function Attrs: noinline nounwind sanitize_address$}}
-// CHECK-HWASAN: {{Function Attrs: noinline nounwind$}}
-// CHECK-KHWASAN: {{Function Attrs: noinline nounwind$}}
+// CHECK-NOASAN: {{Function Attrs: noconvergent noinline nounwind$}}
+// CHECK-ASAN: {{Function Attrs: noconvergent noinline nounwind sanitize_address$}}
+// CHECK-KASAN: {{Function Attrs: noconvergent noinline nounwind sanitize_address$}}
+// CHECK-HWASAN: {{Function Attrs: noconvergent noinline nounwind$}}
+// CHECK-KHWASAN: {{Function Attrs: noconvergent noinline nounwind$}}

clang/test/CodeGen/address-safety-attr.cpp

 // Check that __cxx_global_var_init* get the sanitize_address attribute.
 int global1 = 0;
 int global2 = *(int*)((char*)&global1+1);
 // WITHOUT: @__cxx_global_var_init{{.*}}[[NOATTR]]
 // BLFILE: @__cxx_global_var_init{{.*}}[[NOATTR:#[0-9]+]]
 // BLFUNC: @__cxx_global_var_init{{.*}}[[WITH]]
 // ASAN: @__cxx_global_var_init{{.*}}[[WITH]]
 
-// WITHOUT: attributes [[NOATTR]] = { noinline nounwind{{.*}} }
+// WITHOUT: attributes [[NOATTR]] = { noconvergent noinline nounwind{{.*}} }
 
-// BLFILE: attributes [[WITH]] = { noinline nounwind sanitize_address{{.*}} }
-// BLFILE: attributes [[NOATTR]] = { noinline nounwind{{.*}} }
+// BLFILE: attributes [[WITH]] = { noconvergent noinline nounwind sanitize_address{{.*}} }
+// BLFILE: attributes [[NOATTR]] = { noconvergent noinline nounwind{{.*}} }
 
-// BLFUNC: attributes [[WITH]] = { noinline nounwind sanitize_address{{.*}} }
-// BLFUNC: attributes [[NOATTR]] = { noinline nounwind{{.*}} }
+// BLFUNC: attributes [[WITH]] = { noconvergent noinline nounwind sanitize_address{{.*}} }
+// BLFUNC: attributes [[NOATTR]] = { noconvergent noinline nounwind{{.*}} }
 
-// ASAN: attributes [[WITH]] = { noinline nounwind sanitize_address{{.*}} }
-// ASAN: attributes [[NOATTR]] = { noinline nounwind{{.*}} }
+// ASAN: attributes [[WITH]] = { noconvergent noinline nounwind sanitize_address{{.*}} }
+// ASAN: attributes [[NOATTR]] = { noconvergent noinline nounwind{{.*}} }

clang/test/CodeGen/address-space-field1.c

 // RUN: %clang_cc1 -emit-llvm -triple x86_64-apple-darwin10 < %s -o - | FileCheck %s
 // CHECK:%struct.S = type { i32, i32 }
 // CHECK:define void @test_addrspace(%struct.S addrspace(1)* %p1, %struct.S addrspace(2)* %p2) [[NUW:#[0-9]+]]
 // CHECK:  [[p1addr:%.*]] = alloca %struct.S addrspace(1)*
 // CHECK:  [[p2addr:%.*]] = alloca %struct.S addrspace(2)*
 // CHECK:  store %struct.S addrspace(1)* %p1, %struct.S addrspace(1)** [[p1addr]]
 // CHECK:  store %struct.S addrspace(2)* %p2, %struct.S addrspace(2)** [[p2addr]]
-// CHECK:  [[t0:%.*]] = load %struct.S addrspace(2)*, %struct.S addrspace(2)** [[p2addr]], align 8 
+// CHECK:  [[t0:%.*]] = load %struct.S addrspace(2)*, %struct.S addrspace(2)** [[p2addr]], align 8
 // CHECK:  [[t1:%.*]] = getelementptr inbounds %struct.S, %struct.S addrspace(2)* [[t0]], i32 0, i32 1
 // CHECK:  [[t2:%.*]] = load i32, i32 addrspace(2)* [[t1]], align 4
-// CHECK:  [[t3:%.*]] = load %struct.S addrspace(1)*, %struct.S addrspace(1)** [[p1addr]], align 8  
-// CHECK:  [[t4:%.*]] = getelementptr inbounds %struct.S, %struct.S addrspace(1)* [[t3]], i32 0, i32 0 
+// CHECK:  [[t3:%.*]] = load %struct.S addrspace(1)*, %struct.S addrspace(1)** [[p1addr]], align 8
+// CHECK:  [[t4:%.*]] = getelementptr inbounds %struct.S, %struct.S addrspace(1)* [[t3]], i32 0, i32 0
 // CHECK:  store i32 [[t2]], i32 addrspace(1)* [[t4]], align 4
-// CHECK:  [[t5:%.*]] = load %struct.S addrspace(2)*, %struct.S addrspace(2)** [[p2addr]], align 8  
-// CHECK:  [[t6:%.*]] = getelementptr inbounds %struct.S, %struct.S addrspace(2)* [[t5]], i32 0, i32 0 
-// CHECK:  [[t7:%.*]] = load i32, i32 addrspace(2)* [[t6]], align 4            
-// CHECK:  [[t8:%.*]] = load %struct.S addrspace(1)*, %struct.S addrspace(1)** [[p1addr]], align 8  
-// CHECK:  [[t9:%.*]] = getelementptr inbounds %struct.S, %struct.S addrspace(1)* [[t8]], i32 0, i32 1 
+// CHECK:  [[t5:%.*]] = load %struct.S addrspace(2)*, %struct.S addrspace(2)** [[p2addr]], align 8
+// CHECK:  [[t6:%.*]] = getelementptr inbounds %struct.S, %struct.S addrspace(2)* [[t5]], i32 0, i32 0
+// CHECK:  [[t7:%.*]] = load i32, i32 addrspace(2)* [[t6]], align 4
+// CHECK:  [[t8:%.*]] = load %struct.S addrspace(1)*, %struct.S addrspace(1)** [[p1addr]], align 8
+// CHECK:  [[t9:%.*]] = getelementptr inbounds %struct.S, %struct.S addrspace(1)* [[t8]], i32 0, i32 1
 // CHECK:  store i32 [[t7]], i32 addrspace(1)* [[t9]], align 4
 // CHECK:  ret void
 // CHECK:}
 
 // Check that we don't lose the address space when accessing a member
 // of a structure.
 
 #define __addr1    __attribute__((address_space(1)))
 #define __addr2    __attribute__((address_space(2)))
 
 typedef struct S {
   int a;
   int b;
 } S;
 
 void test_addrspace(__addr1 S* p1, __addr2 S*p2) {
   // swap
   p1->a = p2->b;
   p1->b = p2->a;
 }
 
-// CHECK: attributes [[NUW]] = { noinline nounwind{{.*}} }
+// CHECK: attributes [[NUW]] = { noconvergent noinline nounwind{{.*}} }

clang/test/CodeGen/alias.c

 // CHECKCC: define arm_aapcs_vfpcc i32 @outer(i32 %a) [[NUW]] {
 // CHECKCC: call arm_aapcs_vfpcc  i32 @inner(i32 %{{.*}})
 
 int outer_weak(int a) { return inner_weak_a(a); }
 // CHECKCC: define arm_aapcs_vfpcc i32 @outer_weak(i32 %a) [[NUW]] {
 // CHECKCC: call arm_aapcs_vfpcc  i32 @inner_weak(i32 %{{.*}})
 // CHECKCC: define internal arm_aapcs_vfpcc i32 @inner_weak(i32 %a) [[NUW]] {
 
-// CHECKBASIC: attributes [[NUW]] = { noinline nounwind{{.*}} }
+// CHECKBASIC: attributes [[NUW]] = { noconvergent noinline nounwind{{.*}} }
 
-// CHECKCC: attributes [[NUW]] = { noinline nounwind{{.*}} }
+// CHECKCC: attributes [[NUW]] = { noconvergent noinline nounwind{{.*}} }
 
 void test8_bar() {}
 void test8_foo() __attribute__((weak, alias("test8_bar")));
 void test8_zed() __attribute__((alias("test8_foo")));
 
 void test9_bar(void) { }
 void test9_zed(void) __attribute__((section("test")));
 void test9_zed(void) __attribute__((alias("test9_bar")));

clang/test/CodeGen/asm-attrs.c

 // RUN: %clang_cc1 -triple armv7-apple-darwin -emit-llvm %s -o - | FileCheck %s
 
 // CHECK: call i32 asm "foo0", {{.*}} [[READNONE:#[0-9]+]]
 // CHECK: call i32 asm "foo1", {{.*}} [[READNONE]]
 // CHECK: call i32 asm "foo2", {{.*}} [[NOATTRS:#[0-9]+]]
 // CHECK: call i32 asm sideeffect "foo3", {{.*}} [[NOATTRS]]
 // CHECK: call i32 asm "foo4", {{.*}} [[READONLY:#[0-9]+]]
 // CHECK: call i32 asm "foo5", {{.*}} [[READONLY]]
 // CHECK: call i32 asm "foo6", {{.*}} [[NOATTRS]]
 // CHECK: call void asm sideeffect "foo7", {{.*}} [[NOATTRS]]
 // CHECK: call i32 asm "foo8", {{.*}} [[READNONE]]
 
-// CHECK: attributes [[READNONE]] = { nounwind readnone }
-// CHECK: attributes [[NOATTRS]] = { nounwind }
-// CHECK: attributes [[READONLY]] = { nounwind readonly }
+// CHECK: attributes [[READNONE]] = { noconvergent nounwind readnone }
+// CHECK: attributes [[NOATTRS]] = { noconvergent nounwind }
+// CHECK: attributes [[READONLY]] = { noconvergent nounwind readonly }
 
 int g0, g1;
 
 struct S {
   int i;
 } g2;
 
 void test_attrs(int a) {

clang/test/CodeGen/attr-naked.c

 // Make sure not to generate prolog or epilog for naked functions.
 __attribute((naked)) void t3(int x) {
 // CHECK: define void @t3(i32 %0)
 // CHECK-NOT: alloca
 // CHECK-NOT: store
 // CHECK: unreachable
 }
 
-// CHECK: attributes [[NAKED_OPTNONE]] = { naked noinline nounwind optnone{{.*}} }
-// CHECK: attributes [[NAKED]] = { naked noinline nounwind{{.*}} }
+// CHECK: attributes [[NAKED_OPTNONE]] = { naked noconvergent noinline nounwind optnone{{.*}} }
+// CHECK: attributes [[NAKED]] = { naked noconvergent noinline nounwind{{.*}} }

clang/test/CodeGen/attributes.c

 
 // CHECK: call void %{{[a-z0-9]+}}() [[NOCF_CHECK_CALL:#[0-9]+]]
 typedef void (*f_t)(void);
 void t24(f_t f1) {
   __attribute__((nocf_check)) f_t p = f1;
   (*p)();
 }
 
-// CHECK: attributes [[NUW]] = { noinline nounwind{{.*}} }
-// CHECK: attributes [[NR]] = { noinline noreturn nounwind{{.*}} }
+// CHECK: attributes [[NUW]] = { noconvergent noinline nounwind{{.*}} }
+// CHECK: attributes [[NR]] = { noconvergent noinline noreturn nounwind{{.*}} }
 // CHECK: attributes [[COLDDEF]] = { cold {{.*}}}
 // CHECK: attributes [[COLDDECL]] = { cold {{.*}}}
 // CHECK: attributes [[NOCF_CHECK_FUNC]] = { nocf_check {{.*}}}
 // CHECK: attributes [[COLDSITE]] = { cold {{.*}}}
-// CHECK: attributes [[NOCF_CHECK_CALL]] = { nocf_check }
+// CHECK: attributes [[NOCF_CHECK_CALL]] = { nocf_check noconvergent }

clang/test/CodeGen/builtin-attributes.c

int f3(double x) {
   __builtin_modff(x, &e);
   __builtin_modfl(x, &e);
   __builtin_remquo(x, x, &e);
   __builtin_remquof(x, x, &e);
   __builtin_remquol(x, x, &e);
   return e;
 }
 
-// CHECK: attributes [[NUW]] = { nounwind{{.*}} }
+// CHECK: attributes [[NUW]] = { noconvergent nounwind{{.*}} }

clang/test/CodeGen/builtin-sqrt.c

 // RUN: %clang_cc1 -fmath-errno -triple x86_64-apple-darwin %s -emit-llvm -o - | FileCheck %s --check-prefix=HAS_ERRNO
 // RUN: %clang_cc1              -triple x86_64-apple-darwin %s -emit-llvm -o - | FileCheck %s --check-prefix=NO_ERRNO
 
 float foo(float X) {
   // HAS_ERRNO: call float @sqrtf(float
   // NO_ERRNO: call float @llvm.sqrt.f32(float
   return __builtin_sqrtf(X);
 }
 
 // HAS_ERRNO: declare float @sqrtf(float) [[ATTR:#[0-9]+]]
 // HAS_ERRNO-NOT: attributes [[ATTR]] = {{{.*}} readnone
 
 // NO_ERRNO: declare float @llvm.sqrt.f32(float) [[ATTR:#[0-9]+]]
-// NO_ERRNO: attributes [[ATTR]] = { nounwind readnone {{.*}}}
+// NO_ERRNO: attributes [[ATTR]] = { noconvergent nounwind readnone {{.*}}}
 

clang/test/CodeGen/complex-builtins.c

 
 // NO__ERRNO: declare { double, double } @casin(double, double) [[READNONE]]
 // NO__ERRNO: declare <2 x float> @casinf(<2 x float>) [[READNONE]]
 // NO__ERRNO: declare { x86_fp80, x86_fp80 } @casinl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 // HAS_ERRNO: declare { double, double } @casin(double, double) [[NOT_READNONE]]
 // HAS_ERRNO: declare <2 x float> @casinf(<2 x float>) [[NOT_READNONE]]
 // HAS_ERRNO: declare { x86_fp80, x86_fp80 } @casinl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 
-  __builtin_casinh(f);     __builtin_casinhf(f);    __builtin_casinhl(f); 
+  __builtin_casinh(f);     __builtin_casinhf(f);    __builtin_casinhl(f);
 
 // NO__ERRNO: declare { double, double } @casinh(double, double) [[READNONE]]
 // NO__ERRNO: declare <2 x float> @casinhf(<2 x float>) [[READNONE]]
 // NO__ERRNO: declare { x86_fp80, x86_fp80 } @casinhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 // HAS_ERRNO: declare { double, double } @casinh(double, double) [[NOT_READNONE]]
 // HAS_ERRNO: declare <2 x float> @casinhf(<2 x float>) [[NOT_READNONE]]
 // HAS_ERRNO: declare { x86_fp80, x86_fp80 } @casinhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 
-  __builtin_catan(f);      __builtin_catanf(f);     __builtin_catanl(f); 
+  __builtin_catan(f);      __builtin_catanf(f);     __builtin_catanl(f);
 
 // NO__ERRNO: declare { double, double } @catan(double, double) [[READNONE]]
 // NO__ERRNO: declare <2 x float> @catanf(<2 x float>) [[READNONE]]
 // NO__ERRNO: declare { x86_fp80, x86_fp80 } @catanl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 // HAS_ERRNO: declare { double, double } @catan(double, double) [[NOT_READNONE]]
 // HAS_ERRNO: declare <2 x float> @catanf(<2 x float>) [[NOT_READNONE]]
 // HAS_ERRNO: declare { x86_fp80, x86_fp80 } @catanl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 

 
 // NO__ERRNO: declare { double, double } @clog(double, double) [[READNONE]]
 // NO__ERRNO: declare <2 x float> @clogf(<2 x float>) [[READNONE]]
 // NO__ERRNO: declare { x86_fp80, x86_fp80 } @clogl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 // HAS_ERRNO: declare { double, double } @clog(double, double) [[NOT_READNONE]]
 // HAS_ERRNO: declare <2 x float> @clogf(<2 x float>) [[NOT_READNONE]]
 // HAS_ERRNO: declare { x86_fp80, x86_fp80 } @clogl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 
-  __builtin_cproj(f);      __builtin_cprojf(f);     __builtin_cprojl(f); 
+  __builtin_cproj(f);      __builtin_cprojf(f);     __builtin_cprojl(f);
 
 // NO__ERRNO: declare { double, double } @cproj(double, double) [[READNONE]]
 // NO__ERRNO: declare <2 x float> @cprojf(<2 x float>) [[READNONE]]
 // NO__ERRNO: declare { x86_fp80, x86_fp80 } @cprojl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 // HAS_ERRNO: declare { double, double } @cproj(double, double) [[READNONE:#[0-9]+]]
 // HAS_ERRNO: declare <2 x float> @cprojf(<2 x float>) [[READNONE]]
 // HAS_ERRNO: declare { x86_fp80, x86_fp80 } @cprojl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 

 
 // NO__ERRNO: declare { double, double } @csinh(double, double) [[READNONE]]
 // NO__ERRNO: declare <2 x float> @csinhf(<2 x float>) [[READNONE]]
 // NO__ERRNO: declare { x86_fp80, x86_fp80 } @csinhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 // HAS_ERRNO: declare { double, double } @csinh(double, double) [[NOT_READNONE]]
 // HAS_ERRNO: declare <2 x float> @csinhf(<2 x float>) [[NOT_READNONE]]
 // HAS_ERRNO: declare { x86_fp80, x86_fp80 } @csinhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 
-  __builtin_csqrt(f);      __builtin_csqrtf(f);     __builtin_csqrtl(f);  
+  __builtin_csqrt(f);      __builtin_csqrtf(f);     __builtin_csqrtl(f);
 
 // NO__ERRNO: declare { double, double } @csqrt(double, double) [[READNONE]]
 // NO__ERRNO: declare <2 x float> @csqrtf(<2 x float>) [[READNONE]]
 // NO__ERRNO: declare { x86_fp80, x86_fp80 } @csqrtl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 // HAS_ERRNO: declare { double, double } @csqrt(double, double) [[NOT_READNONE]]
 // HAS_ERRNO: declare <2 x float> @csqrtf(<2 x float>) [[NOT_READNONE]]
 // HAS_ERRNO: declare { x86_fp80, x86_fp80 } @csqrtl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 
   __builtin_ctan(f);       __builtin_ctanf(f);      __builtin_ctanl(f);
 
 // NO__ERRNO: declare { double, double } @ctan(double, double) [[READNONE]]
 // NO__ERRNO: declare <2 x float> @ctanf(<2 x float>) [[READNONE]]
 // NO__ERRNO: declare { x86_fp80, x86_fp80 } @ctanl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 // HAS_ERRNO: declare { double, double } @ctan(double, double) [[NOT_READNONE]]
 // HAS_ERRNO: declare <2 x float> @ctanf(<2 x float>) [[NOT_READNONE]]
 // HAS_ERRNO: declare { x86_fp80, x86_fp80 } @ctanl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 
-  __builtin_ctanh(f);      __builtin_ctanhf(f);     __builtin_ctanhl(f); 
+  __builtin_ctanh(f);      __builtin_ctanhf(f);     __builtin_ctanhl(f);
 
 // NO__ERRNO: declare { double, double } @ctanh(double, double) [[READNONE]]
 // NO__ERRNO: declare <2 x float> @ctanhf(<2 x float>) [[READNONE]]
 // NO__ERRNO: declare { x86_fp80, x86_fp80 } @ctanhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 // HAS_ERRNO: declare { double, double } @ctanh(double, double) [[NOT_READNONE]]
 // HAS_ERRNO: declare <2 x float> @ctanhf(<2 x float>) [[NOT_READNONE]]
 // HAS_ERRNO: declare { x86_fp80, x86_fp80 } @ctanhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 };
 
 
 // NO__ERRNO: attributes [[READNONE]] = { {{.*}}readnone{{.*}} }
-// NO__ERRNO: attributes [[NOT_READNONE]] = { nounwind "correctly{{.*}} }
+// NO__ERRNO: attributes [[NOT_READNONE]] = { noconvergent nounwind "correctly{{.*}} }
 
-// HAS_ERRNO: attributes [[NOT_READNONE]] = { nounwind "correctly{{.*}} }
+// HAS_ERRNO: attributes [[NOT_READNONE]] = { noconvergent nounwind "correctly{{.*}} }
 // HAS_ERRNO: attributes [[READNONE]] = { {{.*}}readnone{{.*}} }
 

clang/test/CodeGen/complex-libcalls.c

 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -w -S -o - -emit-llvm              %s | FileCheck %s -check-prefix=NO__ERRNO
 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -w -S -o - -emit-llvm -fmath-errno %s | FileCheck %s -check-prefix=HAS_ERRNO
 
-// Test attributes and builtin codegen of complex library calls. 
+// Test attributes and builtin codegen of complex library calls.
 
 void foo(float f) {
   cabs(f);       cabsf(f);      cabsl(f);
 
 // NO__ERRNO: declare double @cabs(double, double) [[READNONE:#[0-9]+]]
 // NO__ERRNO: declare float @cabsf(<2 x float>) [[READNONE]]
 // NO__ERRNO: declare x86_fp80 @cabsl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE:#[0-9]+]]
 // HAS_ERRNO: declare double @cabs(double, double) [[NOT_READNONE:#[0-9]+]]

 
 // NO__ERRNO: declare { double, double } @casin(double, double) [[READNONE]]
 // NO__ERRNO: declare <2 x float> @casinf(<2 x float>) [[READNONE]]
 // NO__ERRNO: declare { x86_fp80, x86_fp80 } @casinl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 // HAS_ERRNO: declare { double, double } @casin(double, double) [[NOT_READNONE]]
 // HAS_ERRNO: declare <2 x float> @casinf(<2 x float>) [[NOT_READNONE]]
 // HAS_ERRNO: declare { x86_fp80, x86_fp80 } @casinl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 
-  casinh(f);     casinhf(f);    casinhl(f); 
+  casinh(f);     casinhf(f);    casinhl(f);
 
 // NO__ERRNO: declare { double, double } @casinh(double, double) [[READNONE]]
 // NO__ERRNO: declare <2 x float> @casinhf(<2 x float>) [[READNONE]]
 // NO__ERRNO: declare { x86_fp80, x86_fp80 } @casinhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 // HAS_ERRNO: declare { double, double } @casinh(double, double) [[NOT_READNONE]]
 // HAS_ERRNO: declare <2 x float> @casinhf(<2 x float>) [[NOT_READNONE]]
 // HAS_ERRNO: declare { x86_fp80, x86_fp80 } @casinhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 
-  catan(f);      catanf(f);     catanl(f); 
+  catan(f);      catanf(f);     catanl(f);
 
 // NO__ERRNO: declare { double, double } @catan(double, double) [[READNONE]]
 // NO__ERRNO: declare <2 x float> @catanf(<2 x float>) [[READNONE]]
 // NO__ERRNO: declare { x86_fp80, x86_fp80 } @catanl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 // HAS_ERRNO: declare { double, double } @catan(double, double) [[NOT_READNONE]]
 // HAS_ERRNO: declare <2 x float> @catanf(<2 x float>) [[NOT_READNONE]]
 // HAS_ERRNO: declare { x86_fp80, x86_fp80 } @catanl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 

 
 // NO__ERRNO: declare { double, double } @clog(double, double) [[READNONE]]
 // NO__ERRNO: declare <2 x float> @clogf(<2 x float>) [[READNONE]]
 // NO__ERRNO: declare { x86_fp80, x86_fp80 } @clogl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 // HAS_ERRNO: declare { double, double } @clog(double, double) [[NOT_READNONE]]
 // HAS_ERRNO: declare <2 x float> @clogf(<2 x float>) [[NOT_READNONE]]
 // HAS_ERRNO: declare { x86_fp80, x86_fp80 } @clogl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 
-  cproj(f);      cprojf(f);     cprojl(f); 
+  cproj(f);      cprojf(f);     cprojl(f);
 
 // NO__ERRNO: declare { double, double } @cproj(double, double) [[READNONE]]
 // NO__ERRNO: declare <2 x float> @cprojf(<2 x float>) [[READNONE]]
 // NO__ERRNO: declare { x86_fp80, x86_fp80 } @cprojl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 // HAS_ERRNO: declare { double, double } @cproj(double, double) [[READNONE]]
 // HAS_ERRNO: declare <2 x float> @cprojf(<2 x float>) [[READNONE]]
 // HAS_ERRNO: declare { x86_fp80, x86_fp80 } @cprojl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 

 
 // NO__ERRNO: declare { double, double } @csinh(double, double) [[READNONE]]
 // NO__ERRNO: declare <2 x float> @csinhf(<2 x float>) [[READNONE]]
 // NO__ERRNO: declare { x86_fp80, x86_fp80 } @csinhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 // HAS_ERRNO: declare { double, double } @csinh(double, double) [[NOT_READNONE]]
 // HAS_ERRNO: declare <2 x float> @csinhf(<2 x float>) [[NOT_READNONE]]
 // HAS_ERRNO: declare { x86_fp80, x86_fp80 } @csinhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 
-  csqrt(f);      csqrtf(f);     csqrtl(f);  
+  csqrt(f);      csqrtf(f);     csqrtl(f);
 
 // NO__ERRNO: declare { double, double } @csqrt(double, double) [[READNONE]]
 // NO__ERRNO: declare <2 x float> @csqrtf(<2 x float>) [[READNONE]]
 // NO__ERRNO: declare { x86_fp80, x86_fp80 } @csqrtl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 // HAS_ERRNO: declare { double, double } @csqrt(double, double) [[NOT_READNONE]]
 // HAS_ERRNO: declare <2 x float> @csqrtf(<2 x float>) [[NOT_READNONE]]
 // HAS_ERRNO: declare { x86_fp80, x86_fp80 } @csqrtl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 
   ctan(f);       ctanf(f);      ctanl(f);
 
 // NO__ERRNO: declare { double, double } @ctan(double, double) [[READNONE]]
 // NO__ERRNO: declare <2 x float> @ctanf(<2 x float>) [[READNONE]]
 // NO__ERRNO: declare { x86_fp80, x86_fp80 } @ctanl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 // HAS_ERRNO: declare { double, double } @ctan(double, double) [[NOT_READNONE]]
 // HAS_ERRNO: declare <2 x float> @ctanf(<2 x float>) [[NOT_READNONE]]
 // HAS_ERRNO: declare { x86_fp80, x86_fp80 } @ctanl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 
-  ctanh(f);      ctanhf(f);     ctanhl(f); 
+  ctanh(f);      ctanhf(f);     ctanhl(f);
 
 // NO__ERRNO: declare { double, double } @ctanh(double, double) [[READNONE]]
 // NO__ERRNO: declare <2 x float> @ctanhf(<2 x float>) [[READNONE]]
 // NO__ERRNO: declare { x86_fp80, x86_fp80 } @ctanhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 // HAS_ERRNO: declare { double, double } @ctanh(double, double) [[NOT_READNONE]]
 // HAS_ERRNO: declare <2 x float> @ctanhf(<2 x float>) [[NOT_READNONE]]
 // HAS_ERRNO: declare { x86_fp80, x86_fp80 } @ctanhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16) [[NOT_READNONE]]
 };
 
 
 // NO__ERRNO: attributes [[READNONE]] = { {{.*}}readnone{{.*}} }
-// NO__ERRNO: attributes [[NOT_READNONE]] = { nounwind "correctly{{.*}} }
+// NO__ERRNO: attributes [[NOT_READNONE]] = { noconvergent nounwind "correctly{{.*}} }
 
-// HAS_ERRNO: attributes [[NOT_READNONE]] = { nounwind "correctly{{.*}} }
+// HAS_ERRNO: attributes [[NOT_READNONE]] = { noconvergent nounwind "correctly{{.*}} }
 // HAS_ERRNO: attributes [[READNONE]] = { {{.*}}readnone{{.*}} }
 

clang/test/CodeGen/convergent-functions.cpp

 // RUN: %clang_cc1 -triple i386-pc-win32 -emit-llvm -fconvergent-functions -o - < %s | FileCheck -check-prefix=CONVFUNC %s
 // RUN: %clang_cc1 -triple i386-pc-win32 -emit-llvm -o - < %s | FileCheck -check-prefix=NOCONVFUNC %s
 
 // Test that the -fconvergent-functions flag works
 
-// CONVFUNC: attributes #0 = { convergent {{.*}} }
-// NOCONVFUNC-NOT: convergent
+// Everything may be convergent
+// CONVFUNC-NOT: noconvergent
 void func() { }
+
+void extern_func();
+
+void call_extern() {
+  extern_func();
+}
+
+void asm_func() {
+  __asm volatile(";foo");
+}
+
+void asm_decl() __asm("llvm.maybe.convergent");
+void call_asm_decl() {
+  asm_decl();
+}
+
+// All attribute contexts should have noconvergent here
+// NOCONVFUNC: attributes #0 = { noconvergent
+// NOCONVFUNC: attributes #1 = { noconvergent
+// NOCONVFUNC: attributes #2 = { noconvergent
+// NOCONVFUNC: attributes #3 = { noconvergent
+// NOCONVFUNC-NOT: attributes

clang/test/CodeGen/exceptions-seh-finally.c

__try {
     }
   }
 }
 
 // CHECK-LABEL: define dso_local void @finally_within_finally(
 // CHECK: invoke void @might_crash(
 
 // CHECK: call void @"?fin$0@0@finally_within_finally@@"(
-// CHECK: call void @"?fin$0@0@finally_within_finally@@"({{.*}}) [ "funclet"(
+// CHECK: call void @"?fin$0@0@finally_within_finally@@"({{.*}}) #{{[0-9]+}} [ "funclet"(
 
 // CHECK-LABEL: define internal void @"?fin$0@0@finally_within_finally@@"({{[^)]*}})
 // CHECK-SAME: [[finally_attrs]]
 // CHECK: invoke void @might_crash(
 
 // CHECK: call void @"?fin$1@0@finally_within_finally@@"(
-// CHECK: call void @"?fin$1@0@finally_within_finally@@"({{.*}}) [ "funclet"(
+// CHECK: call void @"?fin$1@0@finally_within_finally@@"({{.*}}) #{{[0-9]+}} [ "funclet"(
 
 // CHECK-LABEL: define internal void @"?fin$1@0@finally_within_finally@@"({{[^)]*}})
 // CHECK-SAME: [[finally_attrs]]
 
 void cleanup_with_func(const char *);
 void finally_with_func() {
   __try {
     might_crash();
   } __finally {
     cleanup_with_func(__func__);
   }
 }
 
 // CHECK-LABEL: define internal void @"?fin$0@0@finally_with_func@@"({{[^)]*}})
 // CHECK: call void @cleanup_with_func(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @"??_C@_0BC@COAGBPGM@finally_with_func?$AA@", i{{32|64}} 0, i{{32|64}} 0))
 
 // Look for the absence of noinline. Enum attributes come first, so check that
 // a string attribute is the first to verify that no enum attributes are
 // present.
-// CHECK: attributes [[finally_attrs]] = { "{{.*}}" }
+// CHECK: attributes [[finally_attrs]] = { noconvergent "{{.*}}" }

clang/test/CodeGen/function-attributes.c

 // CHECK: call i32 @_setjmp(i32* null)
 // CHECK: [[RT_CALL]]
 // CHECK: ret void
 int _setjmp(jmp_buf);
 void f20(void) {
   _setjmp(0);
 }
 
-// CHECK: attributes [[NUW]] = { nounwind optsize{{.*}} }
-// CHECK: attributes [[AI]] = { alwaysinline nounwind optsize{{.*}} }
-// CHECK: attributes [[NUW_OS_RN]] = { nounwind optsize readnone{{.*}} }
-// CHECK: attributes [[SR]] = { nounwind optsize{{.*}} "stackrealign"{{.*}} }
-// CHECK: attributes [[RT]] = { nounwind optsize returns_twice{{.*}} }
-// CHECK: attributes [[NR]] = { noreturn optsize }
-// CHECK: attributes [[NUW_RN]] = { nounwind optsize readnone }
-// CHECK: attributes [[RT_CALL]] = { optsize returns_twice }
+// CHECK: attributes [[NUW]] = { noconvergent nounwind optsize{{.*}} }
+// CHECK: attributes [[AI]] = { alwaysinline noconvergent nounwind optsize{{.*}} }
+// CHECK: attributes [[NUW_OS_RN]] = { noconvergent nounwind optsize readnone{{.*}} }
+// CHECK: attributes [[SR]] = { noconvergent nounwind optsize{{.*}} "stackrealign"{{.*}} }
+// CHECK: attributes [[RT]] = { noconvergent nounwind optsize returns_twice{{.*}} }
+// CHECK: attributes [[NR]] = { noconvergent noreturn optsize }
+// CHECK: attributes [[NUW_RN]] = { noconvergent nounwind optsize readnone }
+// CHECK: attributes [[RT_CALL]] = { noconvergent optsize returns_twice }

clang/test/CodeGen/incomplete-function-type-2.c

void test10_bar() {
   test10_foo(test10_b);
 }
 struct test10_B {};
 void test10_foo(test10_F3 p1)
 {
   p1(0.0);
 }
 
-// CHECK: attributes [[NUW]] = { noinline nounwind{{.*}} }
+// CHECK: attributes [[NUW]] = { noconvergent noinline nounwind{{.*}} }

clang/test/CodeGen/libcall-declarations.c

 // CHECK-ERRNO: declare <2 x float> @csinhf(<2 x float>) [[NONCONST]]
 // CHECK-ERRNO: declare { double, double } @csqrt(double, double) [[NONCONST]]
 // CHECK-ERRNO: declare <2 x float> @csqrtf(<2 x float>) [[NONCONST]]
 // CHECK-ERRNO: declare { double, double } @ctan(double, double) [[NONCONST]]
 // CHECK-ERRNO: declare <2 x float> @ctanf(<2 x float>) [[NONCONST]]
 // CHECK-ERRNO: declare { double, double } @ctanh(double, double) [[NONCONST]]
 // CHECK-ERRNO: declare <2 x float> @ctanhf(<2 x float>) [[NONCONST]]
 
-// CHECK-NOERRNO: attributes [[NUWRN]] = { nounwind readnone{{.*}} }
-// CHECK-NOERRNO: attributes [[NUWRO]] = { nounwind readonly{{.*}} }
+// CHECK-NOERRNO: attributes [[NUWRN]] = { noconvergent nounwind readnone{{.*}} }
+// CHECK-NOERRNO: attributes [[NUWRO]] = { noconvergent nounwind readonly{{.*}} }
 
-// CHECK-ERRNO: attributes [[NUWRN]] = { nounwind readnone{{.*}} }
-// CHECK-ERRNO: attributes [[NUWRO]] = { nounwind readonly{{.*}} }
+// CHECK-ERRNO: attributes [[NUWRN]] = { noconvergent nounwind readnone{{.*}} }
+// CHECK-ERRNO: attributes [[NUWRO]] = { noconvergent nounwind readonly{{.*}} }

clang/test/CodeGen/libcalls-fno-builtin.c

 // CHECK: call{{.*}}@fread{{.*}} [[ATTR]]
 
 FILE *t26(const char *path, const char *mode) {
   return fopen(path, mode);
 }
 // CHECK-LABEL: t26
 // CHECK: call{{.*}}@fopen{{.*}} [[ATTR]]
 
-// CHECK: [[ATTR]] = { nobuiltin }
+// CHECK: [[ATTR]] = { nobuiltin noconvergent }

clang/test/CodeGen/libcalls.c

 // CHECK-NO: declare double @llvm.log.f64(double) [[NUW_RNI]]
 // CHECK-NO: declare x86_fp80 @llvm.log.f80(x86_fp80) [[NUW_RNI]]
 // CHECK-NO: declare float @llvm.log.f32(float) [[NUW_RNI]]
 // CHECK-YES-NOT: declare double @log(double) [[NUW_RN]]
 // CHECK-YES-NOT: declare x86_fp80 @logl(x86_fp80) [[NUW_RN]]
 // CHECK-YES-NOT: declare float @logf(float) [[NUW_RN]]
 }
 
-// CHECK-NO-DAG: attributes [[NUW_RN]] = { nounwind readnone{{.*}} }
-// CHECK-NO-DAG: attributes [[NUW_RNI]] = { nounwind readnone speculatable willreturn }
+// CHECK-NO-DAG: attributes [[NUW_RN]] = { noconvergent nounwind readnone{{.*}} }
+// CHECK-NO-DAG: attributes [[NUW_RNI]] = { noconvergent nounwind readnone speculatable willreturn }

clang/test/CodeGen/math-builtins.c

// HAS_ERRNO-NOT: @huge
 
   __builtin_inf();    __builtin_inff();   __builtin_infl(); __builtin_inff128();
 
 // NO__ERRNO-NOT: .inf
 // NO__ERRNO-NOT: @inf
 // HAS_ERRNO-NOT: .inf
 // HAS_ERRNO-NOT: @inf
 
-  __builtin_ldexp(f,f);    __builtin_ldexpf(f,f);   __builtin_ldexpl(f,f);  
+  __builtin_ldexp(f,f);    __builtin_ldexpf(f,f);   __builtin_ldexpl(f,f);
 
 // NO__ERRNO: declare double @ldexp(double, i32) [[READNONE]]
 // NO__ERRNO: declare float @ldexpf(float, i32) [[READNONE]]
 // NO__ERRNO: declare x86_fp80 @ldexpl(x86_fp80, i32) [[READNONE]]
 // HAS_ERRNO: declare double @ldexp(double, i32) [[NOT_READNONE]]
 // HAS_ERRNO: declare float @ldexpf(float, i32) [[NOT_READNONE]]
 // HAS_ERRNO: declare x86_fp80 @ldexpl(x86_fp80, i32) [[NOT_READNONE]]
 
-  __builtin_modf(f,d);       __builtin_modff(f,fp);      __builtin_modfl(f,l); 
+  __builtin_modf(f,d);       __builtin_modff(f,fp);      __builtin_modfl(f,l);
 
 // NO__ERRNO: declare double @modf(double, double*) [[NOT_READNONE]]
 // NO__ERRNO: declare float @modff(float, float*) [[NOT_READNONE]]
 // NO__ERRNO: declare x86_fp80 @modfl(x86_fp80, x86_fp80*) [[NOT_READNONE]]
 // HAS_ERRNO: declare double @modf(double, double*) [[NOT_READNONE]]
 // HAS_ERRNO: declare float @modff(float, float*) [[NOT_READNONE]]
 // HAS_ERRNO: declare x86_fp80 @modfl(x86_fp80, x86_fp80*) [[NOT_READNONE]]
 

 
 // NO__ERRNO: declare double @acos(double) [[READNONE]]
 // NO__ERRNO: declare float @acosf(float) [[READNONE]]
 // NO__ERRNO: declare x86_fp80 @acosl(x86_fp80) [[READNONE]]
 // HAS_ERRNO: declare double @acos(double) [[NOT_READNONE]]
 // HAS_ERRNO: declare float @acosf(float) [[NOT_READNONE]]
 // HAS_ERRNO: declare x86_fp80 @acosl(x86_fp80) [[NOT_READNONE]]
 
-  __builtin_acosh(f);      __builtin_acoshf(f);     __builtin_acoshl(f);  
+  __builtin_acosh(f);      __builtin_acoshf(f);     __builtin_acoshl(f);
 
 // NO__ERRNO: declare double @acosh(double) [[READNONE]]
 // NO__ERRNO: declare float @acoshf(float) [[READNONE]]
 // NO__ERRNO: declare x86_fp80 @acoshl(x86_fp80) [[READNONE]]
 // HAS_ERRNO: declare double @acosh(double) [[NOT_READNONE]]
 // HAS_ERRNO: declare float @acoshf(float) [[NOT_READNONE]]
 // HAS_ERRNO: declare x86_fp80 @acoshl(x86_fp80) [[NOT_READNONE]]
 
-  __builtin_asin(f);       __builtin_asinf(f);      __builtin_asinl(f); 
+  __builtin_asin(f);       __builtin_asinf(f);      __builtin_asinl(f);
 
 // NO__ERRNO: declare double @asin(double) [[READNONE]]
 // NO__ERRNO: declare float @asinf(float) [[READNONE]]
 // NO__ERRNO: declare x86_fp80 @asinl(x86_fp80) [[READNONE]]
 // HAS_ERRNO: declare double @asin(double) [[NOT_READNONE]]
 // HAS_ERRNO: declare float @asinf(float) [[NOT_READNONE]]
 // HAS_ERRNO: declare x86_fp80 @asinl(x86_fp80) [[NOT_READNONE]]
 

 
 // NO__ERRNO: declare double @atan(double) [[READNONE]]
 // NO__ERRNO: declare float @atanf(float) [[READNONE]]
 // NO__ERRNO: declare x86_fp80 @atanl(x86_fp80) [[READNONE]]
 // HAS_ERRNO: declare double @atan(double) [[NOT_READNONE]]
 // HAS_ERRNO: declare float @atanf(float) [[NOT_READNONE]]
 // HAS_ERRNO: declare x86_fp80 @atanl(x86_fp80) [[NOT_READNONE]]
 
-  __builtin_atanh(f);      __builtin_atanhf(f);     __builtin_atanhl(f); 
+  __builtin_atanh(f);      __builtin_atanhf(f);     __builtin_atanhl(f);
 
 // NO__ERRNO: declare double @atanh(double) [[READNONE]]
 // NO__ERRNO: declare float @atanhf(float) [[READNONE]]
 // NO__ERRNO: declare x86_fp80 @atanhl(x86_fp80) [[READNONE]]
 // HAS_ERRNO: declare double @atanh(double) [[NOT_READNONE]]
 // HAS_ERRNO: declare float @atanhf(float) [[NOT_READNONE]]
 // HAS_ERRNO: declare x86_fp80 @atanhl(x86_fp80) [[NOT_READNONE]]
 

 
 // NO__ERRNO: declare double @llvm.ceil.f64(double) [[READNONE_INTRINSIC]]
 // NO__ERRNO: declare float @llvm.ceil.f32(float) [[READNONE_INTRINSIC]]
 // NO__ERRNO: declare x86_fp80 @llvm.ceil.f80(x86_fp80) [[READNONE_INTRINSIC]]
 // HAS_ERRNO: declare double @llvm.ceil.f64(double) [[READNONE_INTRINSIC]]
 // HAS_ERRNO: declare float @llvm.ceil.f32(float) [[READNONE_INTRINSIC]]
 // HAS_ERRNO: declare x86_fp80 @llvm.ceil.f80(x86_fp80) [[READNONE_INTRINSIC]]
 
-  __builtin_cos(f);        __builtin_cosf(f);       __builtin_cosl(f); 
+  __builtin_cos(f);        __builtin_cosf(f);       __builtin_cosl(f);
 
 // NO__ERRNO: declare double @llvm.cos.f64(double) [[READNONE_INTRINSIC]]
 // NO__ERRNO: declare float @llvm.cos.f32(float) [[READNONE_INTRINSIC]]
 // NO__ERRNO: declare x86_fp80 @llvm.cos.f80(x86_fp80) [[READNONE_INTRINSIC]]
 // HAS_ERRNO: declare double @cos(double) [[NOT_READNONE]]
 // HAS_ERRNO: declare float @cosf(float) [[NOT_READNONE]]
 // HAS_ERRNO: declare x86_fp80 @cosl(x86_fp80) [[NOT_READNONE]]
 

 
 // NO__ERRNO: declare double @llvm.exp.f64(double) [[READNONE_INTRINSIC]]
 // NO__ERRNO: declare float @llvm.exp.f32(float) [[READNONE_INTRINSIC]]
 // NO__ERRNO: declare x86_fp80 @llvm.exp.f80(x86_fp80) [[READNONE_INTRINSIC]]
 // HAS_ERRNO: declare double @exp(double) [[NOT_READNONE]]
 // HAS_ERRNO: declare float @expf(float) [[NOT_READNONE]]
 // HAS_ERRNO: declare x86_fp80 @expl(x86_fp80) [[NOT_READNONE]]
 
-  __builtin_exp2(f);       __builtin_exp2f(f);      __builtin_exp2l(f); 
+  __builtin_exp2(f);       __builtin_exp2f(f);      __builtin_exp2l(f);
 
 // NO__ERRNO: declare double @llvm.exp2.f64(double) [[READNONE_INTRINSIC]]
 // NO__ERRNO: declare float @llvm.exp2.f32(float) [[READNONE_INTRINSIC]]
 // NO__ERRNO: declare x86_fp80 @llvm.exp2.f80(x86_fp80) [[READNONE_INTRINSIC]]
 // HAS_ERRNO: declare double @exp2(double) [[NOT_READNONE]]
 // HAS_ERRNO: declare float @exp2f(float) [[NOT_READNONE]]
 // HAS_ERRNO: declare x86_fp80 @exp2l(x86_fp80) [[NOT_READNONE]]
 

 
 // NO__ERRNO: declare double @hypot(double, double) [[READNONE]]
 // NO__ERRNO: declare float @hypotf(float, float) [[READNONE]]
 // NO__ERRNO: declare x86_fp80 @hypotl(x86_fp80, x86_fp80) [[READNONE]]
 // HAS_ERRNO: declare double @hypot(double, double) [[NOT_READNONE]]
 // HAS_ERRNO: declare float @hypotf(float, float) [[NOT_READNONE]]
 // HAS_ERRNO: declare x86_fp80 @hypotl(x86_fp80, x86_fp80) [[NOT_READNONE]]
 
-  __builtin_ilogb(f);      __builtin_ilogbf(f);     __builtin_ilogbl(f); 
+  __builtin_ilogb(f);      __builtin_ilogbf(f);     __builtin_ilogbl(f);
 
 // NO__ERRNO: declare i32 @ilogb(double) [[READNONE]]
 // NO__ERRNO: declare i32 @ilogbf(float) [[READNONE]]
 // NO__ERRNO: declare i32 @ilogbl(x86_fp80) [[READNONE]]
 // HAS_ERRNO: declare i32 @ilogb(double) [[NOT_READNONE]]
 // HAS_ERRNO: declare i32 @ilogbf(float) [[NOT_READNONE]]
 // HAS_ERRNO: declare i32 @ilogbl(x86_fp80) [[NOT_READNONE]]
 

 
 // NO__ERRNO: declare double @sinh(double) [[READNONE]]
 // NO__ERRNO: declare float @sinhf(float) [[READNONE]]
 // NO__ERRNO: declare x86_fp80 @sinhl(x86_fp80) [[READNONE]]
 // HAS_ERRNO: declare double @sinh(double) [[NOT_READNONE]]
 // HAS_ERRNO: declare float @sinhf(float) [[NOT_READNONE]]
 // HAS_ERRNO: declare x86_fp80 @sinhl(x86_fp80) [[NOT_READNONE]]
 
-  __builtin_sqrt(f);       __builtin_sqrtf(f);      __builtin_sqrtl(f); 
+  __builtin_sqrt(f);       __builtin_sqrtf(f);      __builtin_sqrtl(f);
 
 // NO__ERRNO: declare double @llvm.sqrt.f64(double) [[READNONE_INTRINSIC]]
 // NO__ERRNO: declare float @llvm.sqrt.f32(float) [[READNONE_INTRINSIC]]
 // NO__ERRNO: declare x86_fp80 @llvm.sqrt.f80(x86_fp80) [[READNONE_INTRINSIC]]
 // HAS_ERRNO: declare double @sqrt(double) [[NOT_READNONE]]
 // HAS_ERRNO: declare float @sqrtf(float) [[NOT_READNONE]]
 // HAS_ERRNO: declare x86_fp80 @sqrtl(x86_fp80) [[NOT_READNONE]]
 

 // HAS_ERRNO: declare double @llvm.trunc.f64(double) [[READNONE_INTRINSIC]]
 // HAS_ERRNO: declare float @llvm.trunc.f32(float) [[READNONE_INTRINSIC]]
 // HAS_ERRNO: declare x86_fp80 @llvm.trunc.f80(x86_fp80) [[READNONE_INTRINSIC]]
 };
 
 
 // NO__ERRNO: attributes [[READNONE]] = { {{.*}}readnone{{.*}} }
 // NO__ERRNO: attributes [[READNONE_INTRINSIC]] = { {{.*}}readnone{{.*}} }
-// NO__ERRNO: attributes [[NOT_READNONE]] = { nounwind "correctly{{.*}} }
+// NO__ERRNO: attributes [[NOT_READNONE]] = { noconvergent nounwind "correctly{{.*}} }
 // NO__ERRNO: attributes [[PURE]] = { {{.*}}readonly{{.*}} }
 
-// HAS_ERRNO: attributes [[NOT_READNONE]] = { nounwind "correctly{{.*}} }
+// HAS_ERRNO: attributes [[NOT_READNONE]] = { noconvergent nounwind "correctly{{.*}} }
 // HAS_ERRNO: attributes [[READNONE_INTRINSIC]] = { {{.*}}readnone{{.*}} }
 // HAS_ERRNO: attributes [[PURE]] = { {{.*}}readonly{{.*}} }
 // HAS_ERRNO: attributes [[READNONE]] = { {{.*}}readnone{{.*}} }
 
 // HAS_ERRNO_GNU: attributes [[READNONE_INTRINSIC]] = { {{.*}}readnone{{.*}} }
 // HAS_ERRNO_ANDROID: attributes [[READNONE_INTRINSIC]] = { {{.*}}readnone{{.*}} }
 // HAS_ERRNO_WIN: attributes [[READNONE_INTRINSIC]] = { {{.*}}readnone{{.*}} }
 

clang/test/CodeGen/math-libcalls.c

 
 // NO__ERRNO: declare double @frexp(double, i32*) [[NOT_READNONE:#[0-9]+]]
 // NO__ERRNO: declare float @frexpf(float, i32*) [[NOT_READNONE]]
 // NO__ERRNO: declare x86_fp80 @frexpl(x86_fp80, i32*) [[NOT_READNONE]]
 // HAS_ERRNO: declare double @frexp(double, i32*) [[NOT_READNONE]]
 // HAS_ERRNO: declare float @frexpf(float, i32*) [[NOT_READNONE]]
 // HAS_ERRNO: declare x86_fp80 @frexpl(x86_fp80, i32*) [[NOT_READNONE]]
 
-  ldexp(f,f);    ldexpf(f,f);   ldexpl(f,f);  
+  ldexp(f,f);    ldexpf(f,f);   ldexpl(f,f);
 
 // NO__ERRNO: declare double @ldexp(double, i32) [[READNONE]]
 // NO__ERRNO: declare float @ldexpf(float, i32) [[READNONE]]
 // NO__ERRNO: declare x86_fp80 @ldexpl(x86_fp80, i32) [[READNONE]]
 // HAS_ERRNO: declare double @ldexp(double, i32) [[NOT_READNONE]]
 // HAS_ERRNO: declare float @ldexpf(float, i32) [[NOT_READNONE]]
 // HAS_ERRNO: declare x86_fp80 @ldexpl(x86_fp80, i32) [[NOT_READNONE]]
 
-  modf(f,d);       modff(f,fp);      modfl(f,l); 
+  modf(f,d);       modff(f,fp);      modfl(f,l);
 
 // NO__ERRNO: declare double @modf(double, double*) [[NOT_READNONE]]
 // NO__ERRNO: declare float @modff(float, float*) [[NOT_READNONE]]
 // NO__ERRNO: declare x86_fp80 @modfl(x86_fp80, x86_fp80*) [[NOT_READNONE]]
 // HAS_ERRNO: declare double @modf(double, double*) [[NOT_READNONE]]
 // HAS_ERRNO: declare float @modff(float, float*) [[NOT_READNONE]]
 // HAS_ERRNO: declare x86_fp80 @modfl(x86_fp80, x86_fp80*) [[NOT_READNONE]]
 
-  nan(c);        nanf(c);       nanl(c);  
+  nan(c);        nanf(c);       nanl(c);
 
 // NO__ERRNO: declare double @nan(i8*) [[READONLY:#[0-9]+]]
 // NO__ERRNO: declare float @nanf(i8*) [[READONLY]]
 // NO__ERRNO: declare x86_fp80 @nanl(i8*) [[READONLY]]
 // HAS_ERRNO: declare double @nan(i8*) [[READONLY:#[0-9]+]]
 // HAS_ERRNO: declare float @nanf(i8*) [[READONLY]]
 // HAS_ERRNO: declare x86_fp80 @nanl(i8*) [[READONLY]]
 

 
 // NO__ERRNO: declare double @acos(double) [[READNONE]]
 // NO__ERRNO: declare float @acosf(float) [[READNONE]]
 // NO__ERRNO: declare x86_fp80 @acosl(x86_fp80) [[READNONE]]
 // HAS_ERRNO: declare double @acos(double) [[NOT_READNONE]]
 // HAS_ERRNO: declare float @acosf(float) [[NOT_READNONE]]
 // HAS_ERRNO: declare x86_fp80 @acosl(x86_fp80) [[NOT_READNONE]]
 
-  acosh(f);      acoshf(f);     acoshl(f);  
+  acosh(f);      acoshf(f);     acoshl(f);
 
 // NO__ERRNO: declare double @acosh(double) [[READNONE]]
 // NO__ERRNO: declare float @acoshf(float) [[READNONE]]
 // NO__ERRNO: declare x86_fp80 @acoshl(x86_fp80) [[READNONE]]
 // HAS_ERRNO: declare double @acosh(double) [[NOT_READNONE]]
 // HAS_ERRNO: declare float @acoshf(float) [[NOT_READNONE]]
 // HAS_ERRNO: declare x86_fp80 @acoshl(x86_fp80) [[NOT_READNONE]]
 
-  asin(f);       asinf(f);      asinl(f); 
+  asin(f);       asinf(f);      asinl(f);
 
 // NO__ERRNO: declare double @asin(double) [[READNONE]]
 // NO__ERRNO: declare float @asinf(float) [[READNONE]]
 // NO__ERRNO: declare x86_fp80 @asinl(x86_fp80) [[READNONE]]
 // HAS_ERRNO: declare double @asin(double) [[NOT_READNONE]]
 // HAS_ERRNO: declare float @asinf(float) [[NOT_READNONE]]
 // HAS_ERRNO: declare x86_fp80 @asinl(x86_fp80) [[NOT_READNONE]]
 

 
 // NO__ERRNO: declare double @atan(double) [[READNONE]]
 // NO__ERRNO: declare float @atanf(float) [[READNONE]]
 // NO__ERRNO: declare x86_fp80 @atanl(x86_fp80) [[READNONE]]
 // HAS_ERRNO: declare double @atan(double) [[NOT_READNONE]]
 // HAS_ERRNO: declare float @atanf(float) [[NOT_READNONE]]
 // HAS_ERRNO: declare x86_fp80 @atanl(x86_fp80) [[NOT_READNONE]]
 
-  atanh(f);      atanhf(f);     atanhl(f); 
+  atanh(f);      atanhf(f);     atanhl(f);
 
 // NO__ERRNO: declare double @atanh(double) [[READNONE]]
 // NO__ERRNO: declare float @atanhf(float) [[READNONE]]
 // NO__ERRNO: declare x86_fp80 @atanhl(x86_fp80) [[READNONE]]
 // HAS_ERRNO: declare double @atanh(double) [[NOT_READNONE]]
 // HAS_ERRNO: declare float @atanhf(float) [[NOT_READNONE]]
 // HAS_ERRNO: declare x86_fp80 @atanhl(x86_fp80) [[NOT_READNONE]]
 

 
 // NO__ERRNO: declare double @llvm.ceil.f64(double) [[READNONE_INTRINSIC]]
 // NO__ERRNO: declare float @llvm.ceil.f32(float) [[READNONE_INTRINSIC]]
 // NO__ERRNO: declare x86_fp80 @llvm.ceil.f80(x86_fp80) [[READNONE_INTRINSIC]]
 // HAS_ERRNO: declare double @llvm.ceil.f64(double) [[READNONE_INTRINSIC]]
 // HAS_ERRNO: declare float @llvm.ceil.f32(float) [[READNONE_INTRINSIC]]
 // HAS_ERRNO: declare x86_fp80 @llvm.ceil.f80(x86_fp80) [[READNONE_INTRINSIC]]
 
-  cos(f);        cosf(f);       cosl(f); 
+  cos(f);        cosf(f);       cosl(f);
 
 // NO__ERRNO: declare double @llvm.cos.f64(double) [[READNONE_INTRINSIC]]
 // NO__ERRNO: declare float @llvm.cos.f32(float) [[READNONE_INTRINSIC]]
 // NO__ERRNO: declare x86_fp80 @llvm.cos.f80(x86_fp80) [[READNONE_INTRINSIC]]
 // HAS_ERRNO: declare double @cos(double) [[NOT_READNONE]]
 // HAS_ERRNO: declare float @cosf(float) [[NOT_READNONE]]
 // HAS_ERRNO: declare x86_fp80 @cosl(x86_fp80) [[NOT_READNONE]]
 

 
 // NO__ERRNO: declare double @llvm.exp.f64(double) [[READNONE_INTRINSIC]]
 // NO__ERRNO: declare float @llvm.exp.f32(float) [[READNONE_INTRINSIC]]
 // NO__ERRNO: declare x86_fp80 @llvm.exp.f80(x86_fp80) [[READNONE_INTRINSIC]]
 // HAS_ERRNO: declare double @exp(double) [[NOT_READNONE]]
 // HAS_ERRNO: declare float @expf(float) [[NOT_READNONE]]
 // HAS_ERRNO: declare x86_fp80 @expl(x86_fp80) [[NOT_READNONE]]
 
-  exp2(f);       exp2f(f);      exp2l(f); 
+  exp2(f);       exp2f(f);      exp2l(f);
 
 // NO__ERRNO: declare double @llvm.exp2.f64(double) [[READNONE_INTRINSIC]]
 // NO__ERRNO: declare float @llvm.exp2.f32(float) [[READNONE_INTRINSIC]]
 // NO__ERRNO: declare x86_fp80 @llvm.exp2.f80(x86_fp80) [[READNONE_INTRINSIC]]
 // HAS_ERRNO: declare double @exp2(double) [[NOT_READNONE]]
 // HAS_ERRNO: declare float @exp2f(float) [[NOT_READNONE]]
 // HAS_ERRNO: declare x86_fp80 @exp2l(x86_fp80) [[NOT_READNONE]]
 

 
 // NO__ERRNO: declare double @hypot(double, double) [[READNONE]]
 // NO__ERRNO: declare float @hypotf(float, float) [[READNONE]]
 // NO__ERRNO: declare x86_fp80 @hypotl(x86_fp80, x86_fp80) [[READNONE]]
 // HAS_ERRNO: declare double @hypot(double, double) [[NOT_READNONE]]
 // HAS_ERRNO: declare float @hypotf(float, float) [[NOT_READNONE]]
 // HAS_ERRNO: declare x86_fp80 @hypotl(x86_fp80, x86_fp80) [[NOT_READNONE]]
 
-  ilogb(f);      ilogbf(f);     ilogbl(f); 
+  ilogb(f);      ilogbf(f);     ilogbl(f);
 
 // NO__ERRNO: declare i32 @ilogb(double) [[READNONE]]
 // NO__ERRNO: declare i32 @ilogbf(float) [[READNONE]]
 // NO__ERRNO: declare i32 @ilogbl(x86_fp80) [[READNONE]]
 // HAS_ERRNO: declare i32 @ilogb(double) [[NOT_READNONE]]
 // HAS_ERRNO: declare i32 @ilogbf(float) [[NOT_READNONE]]
 // HAS_ERRNO: declare i32 @ilogbl(x86_fp80) [[NOT_READNONE]]
 

 
 // NO__ERRNO: declare double @sinh(double) [[READNONE]]
 // NO__ERRNO: declare float @sinhf(float) [[READNONE]]
 // NO__ERRNO: declare x86_fp80 @sinhl(x86_fp80) [[READNONE]]
 // HAS_ERRNO: declare double @sinh(double) [[NOT_READNONE]]
 // HAS_ERRNO: declare float @sinhf(float) [[NOT_READNONE]]
 // HAS_ERRNO: declare x86_fp80 @sinhl(x86_fp80) [[NOT_READNONE]]
 
-  sqrt(f);       sqrtf(f);      sqrtl(f); 
+  sqrt(f);       sqrtf(f);      sqrtl(f);
 
 // NO__ERRNO: declare double @llvm.sqrt.f64(double) [[READNONE_INTRINSIC]]
 // NO__ERRNO: declare float @llvm.sqrt.f32(float) [[READNONE_INTRINSIC]]
 // NO__ERRNO: declare x86_fp80 @llvm.sqrt.f80(x86_fp80) [[READNONE_INTRINSIC]]
 // HAS_ERRNO: declare double @sqrt(double) [[NOT_READNONE]]
 // HAS_ERRNO: declare float @sqrtf(float) [[NOT_READNONE]]
 // HAS_ERRNO: declare x86_fp80 @sqrtl(x86_fp80) [[NOT_READNONE]]
 

 // HAS_ERRNO: declare double @llvm.trunc.f64(double) [[READNONE_INTRINSIC]]
 // HAS_ERRNO: declare float @llvm.trunc.f32(float) [[READNONE_INTRINSIC]]
 // HAS_ERRNO: declare x86_fp80 @llvm.trunc.f80(x86_fp80) [[READNONE_INTRINSIC]]
 };
 
 
 // NO__ERRNO: attributes [[READNONE]] = { {{.*}}readnone{{.*}} }
 // NO__ERRNO: attributes [[READNONE_INTRINSIC]] = { {{.*}}readnone{{.*}} }
-// NO__ERRNO: attributes [[NOT_READNONE]] = { nounwind "correctly{{.*}} }
+// NO__ERRNO: attributes [[NOT_READNONE]] = { noconvergent nounwind "correctly{{.*}} }
 // NO__ERRNO: attributes [[READONLY]] = { {{.*}}readonly{{.*}} }
 
-// HAS_ERRNO: attributes [[NOT_READNONE]] = { nounwind "correctly{{.*}} }
+// HAS_ERRNO: attributes [[NOT_READNONE]] = { noconvergent nounwind "correctly{{.*}} }
 // HAS_ERRNO: attributes [[READNONE_INTRINSIC]] = { {{.*}}readnone{{.*}} }
 // HAS_ERRNO: attributes [[READONLY]] = { {{.*}}readonly{{.*}} }
 // HAS_ERRNO: attributes [[READNONE]] = { {{.*}}readnone{{.*}} }
 
 // HAS_ERRNO_GNU: attributes [[READNONE_INTRINSIC]] = { {{.*}}readnone{{.*}} }
 // HAS_ERRNO_WIN: attributes [[READNONE_INTRINSIC]] = { {{.*}}readnone{{.*}} }

clang/test/CodeGen/memtag-attr.cpp

 // Make sure the sanitize_memtag attribute is emitted when using MemTag sanitizer.
 // Make sure __attribute__((no_sanitize("memtag")) disables instrumentation.
 
 // RUN: %clang_cc1 -triple aarch64-unknown-linux -disable-O0-optnone \
 // RUN:   -emit-llvm -o - %s | FileCheck -check-prefix=CHECK-NO %s
 
 // RUN: %clang_cc1 -triple aarch64-unknown-linux -fsanitize=memtag \
 // RUN:   -disable-O0-optnone -emit-llvm -o - %s | \
 // RUN:   FileCheck -check-prefix=CHECK-MEMTAG %s
 
 int HasSanitizeMemTag() { return 1; }
-// CHECK-NO: {{Function Attrs: noinline nounwind$}}
-// CHECK-MEMTAG: Function Attrs: noinline nounwind sanitize_memtag
+// CHECK-NO: {{Function Attrs: noconvergent noinline nounwind$}}
+// CHECK-MEMTAG: Function Attrs: noconvergent noinline nounwind sanitize_memtag
 
 __attribute__((no_sanitize("memtag"))) int NoSanitizeQuoteAddress() {
   return 0;
 }
-// CHECK-NO: {{Function Attrs: noinline nounwind$}}
-// CHECK-MEMTAG: {{Function Attrs: noinline nounwind$}}
+// CHECK-NO: {{Function Attrs: noconvergent noinline nounwind$}}
+// CHECK-MEMTAG: {{Function Attrs: noconvergent noinline nounwind$}}

clang/test/CodeGen/micromips-attr.c

 // RUN: %clang_cc1 -triple mips-linux-gnu -emit-llvm  -o  - %s | FileCheck %s
 
 void __attribute__((micromips)) foo (void) {}
 
 // CHECK: define void @foo() [[MICROMIPS:#[0-9]+]]
 
 void __attribute__((nomicromips)) nofoo (void) {}
 
 // CHECK: define void @nofoo() [[NOMICROMIPS:#[0-9]+]]
 
-// CHECK: attributes [[MICROMIPS]] = { noinline nounwind {{.*}} "micromips" {{.*}} }
-// CHECK: attributes [[NOMICROMIPS]]  = { noinline nounwind {{.*}} "nomicromips" {{.*}} }
+// CHECK: attributes [[MICROMIPS]] = { {{.*}} noinline nounwind {{.*}} "micromips" {{.*}} }
+// CHECK: attributes [[NOMICROMIPS]]  = { {{.*}} nounwind {{.*}} "nomicromips" {{.*}} }

clang/test/CodeGen/mips-constraint-regs.c

__asm__ __volatile__(
       "mtlo %2 \n\t\t"
       : "=x" (ll_result)
         : "r" (i_hi), "r" (i_lo)
           : );
 
   return 0;
 }
 
-// CHECK: attributes [[NUW]] = { nounwind }
+// CHECK: attributes [[NUW]] = { noconvergent nounwind }

clang/test/CodeGen/mips-vector-arg.c

 // O32: declare i32 @test_v4i32_2(i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 signext, i32, i32 inreg, i32 inreg, i32 inreg, i32 inreg)
 // N64: define void @test_v4i32(i64 inreg %a1.coerce0, i64 inreg %a1.coerce1, i32 signext %a2, i64 %0, i64 inreg %a3.coerce0, i64 inreg %a3.coerce1) local_unnamed_addr [[NUW]]
 // N64: declare signext i32 @test_v4i32_2(i64 inreg, i64 inreg, i32 signext, i64, i64 inreg, i64 inreg)
 extern test_v4i32_2(v4i32, int, v4i32);
 void test_v4i32(v4i32 a1, int a2, v4i32 a3) {
   test_v4i32_2(a3, a2, a1);
 }
 
-// O32: attributes [[NUW]] = { nounwind{{.*}} }
+// O32: attributes [[NUW]] = { noconvergent nounwind{{.*}} }
 
-// N64: attributes [[NUW]] = { nounwind{{.*}} }
+// N64: attributes [[NUW]] = { noconvergent nounwind{{.*}} }

clang/test/CodeGen/mips16-attr.c

 // RUN: %clang_cc1 -triple mipsel-linux-gnu -emit-llvm  -o  - %s | FileCheck %s
 void __attribute__((mips16)) foo (void) {
 
 }
 
 // CHECK: define void @foo() [[MIPS16:#[0-9]+]]
 
 void __attribute__((nomips16)) nofoo (void) {
 
 }
 
 // CHECK: define void @nofoo() [[NOMIPS16:#[0-9]+]]
 
-// CHECK: attributes [[MIPS16]] = { noinline nounwind {{.*}} "mips16" {{.*}} }
+// CHECK: attributes [[MIPS16]] = { noconvergent noinline nounwind {{.*}} "mips16" {{.*}} }
 
-// CHECK: attributes [[NOMIPS16]]  = { noinline nounwind {{.*}} "nomips16" {{.*}} }
+// CHECK: attributes [[NOMIPS16]]  = { noconvergent noinline nounwind {{.*}} "nomips16" {{.*}} }
 

clang/test/CodeGen/mrtd.c

 // CHECK: define void @qux(i32 %arg, ...)
 
 void quux(int a1, int a2, int a3) {
   qux(a1, a2, a3);
 }
 // CHECK-LABEL: define x86_stdcallcc void @quux
 // CHECK: call void (i32, ...) @qux
 
-// CHECK: attributes [[NUW]] = { noinline nounwind{{.*}} }
+// CHECK: attributes [[NUW]] = { noconvergent noinline nounwind{{.*}} }

clang/test/CodeGen/ms-declspecs.c

 // CHECK: call void @f20_t() [[NR:#[0-9]+]]
 __declspec(noreturn) void f20_t(void);
 void f20(void) { f20_t(); }
 
 __declspec(noalias) void noalias_callee(int *x);
 // CHECK: call void @noalias_callee({{.*}}) [[NA:#[0-9]+]]
 void noalias_caller(int *x) { noalias_callee(x); }
 
-// CHECK: attributes [[NAKED]] = { naked noinline nounwind{{.*}} }
-// CHECK: attributes [[NUW]] = { nounwind{{.*}} }
-// CHECK: attributes [[NI]] = { noinline nounwind{{.*}} }
-// CHECK: attributes [[NR]] = { noreturn }
-// CHECK: attributes [[NA]] = { argmemonly nounwind{{.*}} }
+// CHECK: attributes [[NAKED]] = { naked noconvergent noinline nounwind{{.*}} }
+// CHECK: attributes [[NUW]] = { noconvergent nounwind{{.*}} }
+// CHECK: attributes [[NI]] = { noconvergent noinline nounwind{{.*}} }
+// CHECK: attributes [[NR]] = { noconvergent noreturn }
+// CHECK: attributes [[NA]] = { argmemonly noconvergent nounwind{{.*}} }

clang/test/CodeGen/noduplicate-cxx11-test.cpp

 }
 
 int main() {
 
   return noduplicatedfun(5);
 
 }
 
-// CHECK: attributes [[NI]] = { noduplicate {{.*}}nounwind{{.*}} }
+// CHECK: attributes [[NI]] = { noconvergent noduplicate {{.*}}nounwind{{.*}} }

clang/test/CodeGen/noinline.c

 // Make sure -fno-inline-functions is behaving correctly.
 // rdar://10972766
 
 // RUN: %clang_cc1 -O3 -fno-inline -fno-inline-functions -emit-llvm %s -o - | FileCheck -check-prefix=NOINLINE %s
 
 inline int dont_inline_me(int a, int b) { return(a+b); }
 
 inline __attribute__ ((__always_inline__)) int inline_me(int a, int b) { return(a*b); }
 
 volatile int *pa = (int*) 0x1000;
 void foo() {
 // NOINLINE: @foo
 // NOINLINE: dont_inline_me
 // NOINLINE-NOT: inlinehint
-    pa[0] = dont_inline_me(pa[1],pa[2]);  
+    pa[0] = dont_inline_me(pa[1],pa[2]);
 // NOINLINE-NOT: inline_me
     pa[3] = inline_me(pa[4],pa[5]);
 }
 
-// NOINLINE: Function Attrs: noinline
+// NOINLINE: Function Attrs: noconvergent noinline
 // NOINLINE: @dont_inline_me

clang/test/CodeGen/noplt.c

 // RUN: %clang_cc1 -emit-llvm -fno-plt %s -o - | FileCheck %s -check-prefix=CHECK-NOPLT -check-prefix=CHECK-NOPLT-METADATA
 
-// CHECK-NOPLT: Function Attrs: nonlazybind
+// CHECK-NOPLT: Function Attrs: noconvergent nonlazybind
 // CHECK-NOPLT-NEXT: declare {{.*}}i32 @foo
 // CHECK-NOPLT-METADATA: !"RtLibUseGOT"
 int foo();
 
 int bar() {
   return foo();
 }

clang/test/CodeGen/ppc64-complex-parms.c

 // CHECK: store i64 2, i64* %[[VAR72]]
 // CHECK: store i64 -3, i64* %[[VAR73]]
 // CHECK: %[[VAR74:[A-Za-z0-9.]+]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* %[[VAR71]], i32 0, i32 0
 // CHECK: %[[VAR75:[A-Za-z0-9.]+]] = load i64, i64* %[[VAR74]], align 8
 // CHECK: %[[VAR76:[A-Za-z0-9.]+]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* %[[VAR71]], i32 0, i32 1
 // CHECK: %[[VAR77:[A-Za-z0-9.]+]] = load i64, i64* %[[VAR76]], align 8
 // CHECK: %{{[A-Za-z0-9.]+}} = call i64 @foo_long_long(i64 %[[VAR75]], i64 %[[VAR77]])
 
-// CHECK: attributes [[NUW]] = { noinline nounwind{{.*}} }
+// CHECK: attributes [[NUW]] = { noconvergent noinline nounwind{{.*}} }

clang/test/CodeGen/ppc64-complex-return.c

 }
 
 // CHECK: define i64 @bar_long_long() [[NUW]] {
 // CHECK: [[VAR8:[%A-Za-z0-9.]+]] = call { i64, i64 } @foo_long_long
 // CHECK: extractvalue { i64, i64 } [[VAR8]], 0
 // CHECK: extractvalue { i64, i64 } [[VAR8]], 1
 
 
-// CHECK: attributes [[NUW]] = { noinline nounwind{{.*}} }
+// CHECK: attributes [[NUW]] = { noconvergent noinline nounwind{{.*}} }

clang/test/CodeGen/ppc64-extend.c

 // REQUIRES: powerpc-registered-target
 // RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s
 
 void f1(int x) { return; }
 // CHECK: define void @f1(i32 signext %x) [[NUW:#[0-9]+]]
 
 void f2(unsigned int x) { return; }
 // CHECK: define void @f2(i32 zeroext %x) [[NUW]]
 
 int f3(void) { return 0; }
 // CHECK: define signext i32 @f3() [[NUW]]
 
 unsigned int f4(void) { return 0; }
 // CHECK: define zeroext i32 @f4() [[NUW]]
 
-// CHECK: attributes [[NUW]] = { noinline nounwind{{.*}} }
+// CHECK: attributes [[NUW]] = { noconvergent noinline nounwind{{.*}} }

clang/test/CodeGen/pragma-weak.c

 void yyy(void){}
 void zzz(void){}
 #pragma weak yyy
 // NOTE: weak doesn't apply, not before or in same TopLevelDec(!)
 // CHECK-LABEL: define void @yyy()
 
 int correct_linkage;
 
-// CHECK: attributes [[NI]] = { noinline nounwind{{.*}} }
-// CHECK: attributes [[RN]] = { noinline nounwind optnone readnone{{.*}} }
+// CHECK: attributes [[NI]] = { noconvergent noinline nounwind{{.*}} }
+// CHECK: attributes [[RN]] = { noconvergent noinline nounwind optnone readnone{{.*}} }

clang/test/CodeGen/sanitize-thread-attr.cpp

 
 // Check that __cxx_global_var_init* get the sanitize_thread attribute.
 int global1 = 0;
 int global2 = *(int*)((char*)&global1+1);
 // WITHOUT: @__cxx_global_var_init{{.*}}[[NOATTR:#[0-9]+]]
 // BL: @__cxx_global_var_init{{.*}}[[NOATTR:#[0-9]+]]
 // TSAN: @__cxx_global_var_init{{.*}}[[WITH:#[0-9]+]]
 
-// WITHOUT: attributes [[NOATTR]] = { noinline nounwind{{.*}} }
+// WITHOUT: attributes [[NOATTR]] = { noconvergent noinline nounwind{{.*}} }
 
-// BL: attributes [[NOATTR]] = { noinline nounwind{{.*}} }
+// BL: attributes [[NOATTR]] = { noconvergent noinline nounwind{{.*}} }
 
-// TSAN: attributes [[NOATTR]] = { noinline nounwind{{.*}} }
-// TSAN: attributes [[WITH]] = { noinline nounwind sanitize_thread{{.*}} }
+// TSAN: attributes [[NOATTR]] = { noconvergent noinline nounwind{{.*}} }
+// TSAN: attributes [[WITH]] = { noconvergent noinline nounwind sanitize_thread{{.*}} }

clang/test/CodeGen/sanitize-thread-no-checking-at-run-time.m

 // TSAN: cxx_destruct{{.*}}) [[ATTR:#[0-9]+]]
 
 void test2(id x) {
   extern void test2_helper(id (^)(void));
   test2_helper(^{ return x; });
 // TSAN: define linkonce_odr hidden void @__destroy_helper_block_8_32o(i8* %0) unnamed_addr [[ATTR:#[0-9]+]]
 }
 
-// TSAN: attributes [[ATTR]] = { noinline nounwind {{.*}} "sanitize_thread_no_checking_at_run_time" {{.*}} }
+// TSAN: attributes [[ATTR]] = { noconvergent noinline nounwind {{.*}} "sanitize_thread_no_checking_at_run_time" {{.*}} }

clang/test/CodeGen/stackrealign-main.c

 // RUN: %clang_cc1 -triple i386-unknown-unknown -emit-llvm -o - -mstack-alignment=64 %s | FileCheck %s
 
 // CHECK-LABEL: define void @other()
 // CHECK: [[OTHER:#[0-9]+]]
 // CHECK: {
 void other(void) {}
 
 // CHECK-LABEL: define i32 @main(
 // CHECK: [[MAIN:#[0-9]+]]
 // CHECK: {
 int main(int argc, char **argv) {
   other();
   return 0;
 }
 
-// CHECK: attributes [[OTHER]] = { noinline nounwind optnone
+// CHECK: attributes [[OTHER]] = { noconvergent noinline nounwind optnone
 // CHECK-NOT: "stackrealign"
 // CHECK: }
-// CHECK: attributes [[MAIN]] = { noinline nounwind optnone {{.*}}"stackrealign"{{.*}} }
+// CHECK: attributes [[MAIN]] = { noconvergent noinline nounwind optnone {{.*}}"stackrealign"{{.*}} }

clang/test/CodeGen/struct-passing.c

 
 // CHECK: declare i32 @f0() [[RN:#[0-9]+]]
 // CHECK: declare i32 @f1() [[RO:#[0-9]+]]
 // CHECK: declare void @f2({{.*}} sret)
 // CHECK: declare void @f3({{.*}} sret)
 // CHECK: declare void @f4({{.*}} byval({{.*}}) align 4)
 // CHECK: declare void @f5({{.*}} byval({{.*}}) align 4)
 
-// CHECK: attributes [[RN]] = { nounwind readnone{{.*}} }
-// CHECK: attributes [[RO]] = { nounwind readonly{{.*}} }
+// CHECK: attributes [[RN]] = { noconvergent nounwind readnone{{.*}} }
+// CHECK: attributes [[RO]] = { noconvergent nounwind readonly{{.*}} }

clang/test/CodeGen/unwind-attr.c

 
 // <rdar://problem/8283071>: not for weak functions
 // CHECK:       define weak [[INT:i.*]] @test2() [[TF]] {
 // CHECK-NOEXC: define weak [[INT:i.*]] @test2() [[NUW]] {
 __attribute__((weak)) int test2(void) {
   return 0;
 }
 
-// CHECK: attributes [[TF]] = { noinline optnone "{{.*}} }
-// CHECK: attributes [[NUW]] = { noinline nounwind{{.*}} }
+// CHECK: attributes [[TF]] = { noconvergent noinline optnone "{{.*}} }
+// CHECK: attributes [[NUW]] = { noconvergent noinline nounwind{{.*}} }
 
-// CHECK-NOEXC: attributes [[NUW]] = { noinline nounwind{{.*}} }
+// CHECK-NOEXC: attributes [[NUW]] = { noconvergent noinline nounwind{{.*}} }

clang/test/CodeGenCUDA/amdgpu-kernel-attrs.cu

 }
 
 // Make sure this is silently accepted on other targets.
 // NAMD-NOT: "amdgpu-flat-work-group-size"
 // NAMD-NOT: "amdgpu-waves-per-eu"
 // NAMD-NOT: "amdgpu-num-vgpr"
 // NAMD-NOT: "amdgpu-num-sgpr"
 
-// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64]] = { convergent noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" 
-// CHECK-DAG: attributes [[WAVES_PER_EU_2]] = { convergent noinline nounwind optnone "amdgpu-waves-per-eu"="2"
-// CHECK-DAG: attributes [[NUM_SGPR_32]] = { convergent noinline nounwind optnone "amdgpu-num-sgpr"="32" 
-// CHECK-DAG: attributes [[NUM_VGPR_64]] = { convergent noinline nounwind optnone "amdgpu-num-vgpr"="64" 
+// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64"
+// CHECK-DAG: attributes [[WAVES_PER_EU_2]] = { noinline nounwind optnone "amdgpu-waves-per-eu"="2"
+// CHECK-DAG: attributes [[NUM_SGPR_32]] = { noinline nounwind optnone "amdgpu-num-sgpr"="32"
+// CHECK-DAG: attributes [[NUM_VGPR_64]] = { noinline nounwind optnone "amdgpu-num-vgpr"="64"

clang/test/CodeGenCUDA/convergent.cu

 // REQUIRES: x86-registered-target
 // REQUIRES: nvptx-registered-target
 
 // RUN: %clang_cc1 -fcuda-is-device -triple nvptx-nvidia-cuda -emit-llvm \
 // RUN:   -disable-llvm-passes -o - %s | FileCheck -allow-deprecated-dag-overlap -check-prefix DEVICE %s
 
 // RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -emit-llvm \
 // RUN:   -disable-llvm-passes -o - %s | \
 // RUN:  FileCheck -allow-deprecated-dag-overlap -check-prefix HOST %s
 
 #include "Inputs/cuda.h"
 
-// DEVICE: Function Attrs:
-// DEVICE-SAME: convergent
+// DEVICE: Function Attrs: noinline nounwind optnone{{$}}
 // DEVICE-NEXT: define void @_Z3foov
 __device__ void foo() {}
 
-// HOST: Function Attrs:
-// HOST-NOT: convergent
+// HOST: Function Attrs: noconvergent noinline nounwind optnone{{$}}
 // HOST-NEXT: define void @_Z3barv
-// DEVICE: Function Attrs:
-// DEVICE-SAME: convergent
+
+// DEVICE: Function Attrs: noinline nounwind optnone{{$}}
 // DEVICE-NEXT: define void @_Z3barv
 __host__ __device__ void baz();
 __host__ __device__ void bar() {
   // DEVICE: call void @_Z3bazv() [[CALL_ATTR:#[0-9]+]]
   baz();
   // DEVICE: call i32 asm "trap;", "=l"() [[ASM_ATTR:#[0-9]+]]
   int x;
   asm ("trap;" : "=l"(x));
   // DEVICE: call void asm sideeffect "trap;", ""() [[ASM_ATTR:#[0-9]+]]
   asm volatile ("trap;");
 }
 
 // DEVICE: declare void @_Z3bazv() [[BAZ_ATTR:#[0-9]+]]
-// DEVICE: attributes [[BAZ_ATTR]] = {
-// DEVICE-SAME: convergent
-// DEVICE-SAME: }
-// DEVICE-DAG: attributes [[CALL_ATTR]] = { convergent
-// DEVICE-DAG: attributes [[ASM_ATTR]] = { convergent
+
+// No noconvergent
+// DEVICE: attributes [[BAZ_ATTR]] = { nounwind "{{.*}} }
 
 // HOST: declare void @_Z3bazv() [[BAZ_ATTR:#[0-9]+]]
-// HOST: attributes [[BAZ_ATTR]] = {
-// HOST-NOT: convergent
-// NOST-SAME: }
+// HOST: attributes [[BAZ_ATTR]] = { {{.*}}noconvergent{{.*}} }

clang/test/CodeGenCUDA/propagate-metadata.cu

 
 #include "Inputs/cuda.h"
 __device__ void lib_fn();
 __global__ void kernel() { lib_fn(); }
 
 #endif
 }
 
+// CHECK-NOT: convergent
+
 // The kernel and lib function should have the same attributes.
 // CHECK: define void @kernel() [[attr:#[0-9]+]]
 // CHECK: define internal void @lib_fn() [[attr]]
 
 // Check the attribute list.
 // CHECK: attributes [[attr]] = {
-// CHECK-SAME: convergent
 // CHECK-SAME: "no-trapping-math"="true"
 
 // FTZ-SAME: "nvptx-f32ftz"="true"
 // NOFTZ-NOT: "nvptx-f32ftz"="true"
 
 // FAST-SAME: "unsafe-fp-math"="true"
 // NOFAST-NOT: "unsafe-fp-math"="true"

clang/test/CodeGenCXX/2009-05-04-PureConstNounwind.cpp

int f(void) {
   return c() + p() + t();
 }
 
 // CHECK: declare i32 @_Z1cv() [[NUW_RN:#[0-9]+]]
 // CHECK: declare i32 @_Z1pv() [[NUW_RO:#[0-9]+]]
 // CHECK: declare i32 @_Z1tv() [[TF2:#[0-9]+]]
 
 // CHECK: attributes [[TF]] = { {{.*}} }
-// CHECK: attributes [[NUW_RN]] = { nounwind readnone{{.*}} }
-// CHECK: attributes [[NUW_RO]] = { nounwind readonly{{.*}} }
+// CHECK: attributes [[NUW_RN]] = { noconvergent nounwind readnone{{.*}} }
+// CHECK: attributes [[NUW_RO]] = { noconvergent nounwind readonly{{.*}} }
 // CHECK: attributes [[TF2]] = { {{.*}} }
-// CHECK: attributes [[NUW_RN_CALL]] = { nounwind readnone }
-// CHECK: attributes [[NUW_RO_CALL]] = { nounwind readonly }
+// CHECK: attributes [[NUW_RN_CALL]] = { noconvergent nounwind readnone }
+// CHECK: attributes [[NUW_RO_CALL]] = { noconvergent nounwind readonly }

clang/test/CodeGenCXX/attr-x86-no_caller_saved_registers.cpp

int main(int argc, char **argv) {
   return 0;
 }
 
 // CHECK: baz{{[^#]*}}#[[ATTRS]]
 
 // CHECK: attributes #[[ATTRS]] = {
 // CHECK-SAME: "no_caller_saved_registers"
 // CHECK-SAME: }
-// CHECK: attributes #[[ATTRS1]] = { "no_caller_saved_registers" }
+// CHECK: attributes #[[ATTRS1]] = { noconvergent "no_caller_saved_registers" }

clang/test/CodeGenCXX/attr.cpp

 void C::bar4() { }
 
 // PR6635
 // CHECK-LABEL: define i32 @_Z5test1v()
 int test1() { return 10; }
 // CHECK at top of file
 extern "C" int test2() __attribute__((alias("_Z5test1v")));
 
-// CHECK: attributes [[NUW]] = { noinline nounwind{{.*}} }
+// CHECK: attributes [[NUW]] = { noconvergent noinline nounwind{{.*}} }

clang/test/CodeGenCXX/builtin-operator-new-delete.cpp

extern "C" void test_sized_delete() {
   // CHECK: call i8* @_Znwm(i64 4) [[ATTR_BUILTIN_NEW:#[^ ]*]]
   // CHECK: call void @_ZdlPvm({{.*}}, i64 4) [[ATTR_BUILTIN_DELETE:#[^ ]*]]
   __builtin_operator_delete(__builtin_operator_new(4), 4);
 }
 // CHECK: declare void @_ZdlPvm(i8*, i64) [[ATTR_NOBUILTIN_UNWIND:#[^ ]*]]
 
 
 // CHECK-DAG: attributes [[ATTR_NOBUILTIN]] = {{[{].*}} nobuiltin {{.*[}]}}
-// CHECK-DAG: attributes [[ATTR_NOBUILTIN_NOUNWIND]] = {{[{].*}} nobuiltin nounwind {{.*[}]}}
+// CHECK-DAG: attributes [[ATTR_NOBUILTIN_NOUNWIND]] = {{[{].*}} nobuiltin noconvergent nounwind {{.*[}]}}
 
 // CHECK-DAG: attributes [[ATTR_BUILTIN_NEW]] = {{[{].*}} builtin {{.*[}]}}
 // CHECK-DAG: attributes [[ATTR_BUILTIN_DELETE]] = {{[{].*}} builtin {{.*[}]}}

clang/test/CodeGenCXX/cxx11-exception-spec.cpp

void j() {
   // CHECK: declare {{.*}} @_ZN6NestedIiE1fILb1EcEEvv(
   // CHECK-NOT: [[NUW]]
   Nested<int>().f<true, char>();
   // CHECK: declare {{.*}} @_ZN6NestedIlE1fILb0ElEEvv({{.*}}) [[NUW2]]
   Nested<long>().f<false, long>();
 }
 
 // CHECK: attributes [[NONE]] = { {{.*}} }
-// CHECK: attributes [[NUW]] = { noinline nounwind{{.*}} }
-// CHECK: attributes [[NUW2]] = { nounwind{{.*}} }
+// CHECK: attributes [[NUW]] = { noconvergent noinline nounwind{{.*}} }
+// CHECK: attributes [[NUW2]] = { noconvergent nounwind{{.*}} }
 
 
 
 namespace PR19190 {
 template <class T> struct DWFIterator { virtual void get() throw(int) = 0; };
 void foo(DWFIterator<int> *foo) { foo->get(); }
 }

clang/test/CodeGenCXX/cxx11-noreturn.cpp

 // RUN: %clang_cc1 -emit-llvm -triple %itanium_abi_triple -std=c++11 %s -o - | FileCheck %s
 
 int g();
 
 // CHECK: _Z1fv(){{.*}} [[NR:#[0-9]+]]
 [[noreturn]] int f() {
   while (g()) {}
 }
 
-// CHECK: attributes [[NR]] = { noinline noreturn nounwind{{.*}} }
+// CHECK: attributes [[NR]] = { noconvergent noinline noreturn nounwind{{.*}} }

clang/test/CodeGenCXX/cxx1z-aligned-allocation.cpp

 // No array cookie.
 // CHECK-MS-NOT: store
 // CHECK-MS: invoke %struct.A* @"??0A@@QEAA@XZ"(
 // CHECK-MS: cleanuppad
 // CHECK-MS: call void @"??_V@YAXPEAXW4align_val_t@std@@@Z"(i8* %[[ALLOC]], i64 32)
 void *a1(long n) { return new A[n]; }
 
 // CHECK-LABEL: define {{.*}} @_Z2a2P1A(
-// CHECK: call void @_ZdlPvmSt11align_val_t(i8* %{{.*}}, i64 512, i64 32) #9
+// CHECK: call void @_ZdlPvmSt11align_val_t(i8* %{{.*}}, i64 512, i64 32) #10
 void a2(A *p) { delete p; }
 
 // CHECK-LABEL: define {{.*}} @_Z2a3P1A(
-// CHECK: call void @_ZdaPvSt11align_val_t(i8* %{{.*}}, i64 32) #9
+// CHECK: call void @_ZdaPvSt11align_val_t(i8* %{{.*}}, i64 32) #10
 void a3(A *p) { delete[] p; }
 
 
 // Class-specific usual new and delete.
 // ====================================
 struct OVERALIGNED B {
   B();
   // These are just a distraction. We should ignore them.

clang/test/CodeGenCXX/debug-info-globalinit.cpp

 static int i = test();
 __attribute__((nodebug)) static int j = test();
 static int k = test();
 
 int main(void) {}
 
 // CHECK-LABEL: define internal void @__cxx_global_var_init()
 // CHECK-NOT: __cxx_global_var_init
-// CHECK: %[[C0:.+]] = call i32 @_Z4testv(), !dbg ![[LINE:.*]]
+// CHECK: %[[C0:.+]] = call i32 @_Z4testv() #{{[0-9]+}}, !dbg ![[LINE:.*]]
 // CHECK-NOT: __cxx_global_var_init
 // CHECK: store i32 %[[C0]], i32* @_ZL1i, align 4, !dbg
-// 
+//
 // CHECK-LABEL: define internal void @__cxx_global_var_init.1()
 // CHECK-NOT: dbg
 // CHECK: %[[C1:.+]] = call i32 @_Z4testv()
 // CHECK-NOT: dbg
 // CHECK: store i32 %[[C1]], i32* @_ZL1j, align 4
 //
 // CHECK-LABEL: define internal void @__cxx_global_var_init.2()
 // CHECK-NOT: __cxx_global_var_init
-// CHECK: %[[C2:.+]] = call i32 @_Z4testv(), !dbg ![[LINE2:.*]]
+// CHECK: %[[C2:.+]] = call i32 @_Z4testv() #{{[0-9]+}}, !dbg ![[LINE2:.*]]
 // CHECK-NOT: __cxx_global_var_init
 // CHECK: store i32 %[[C2]], i32* @_ZL1k, align 4, !dbg
-// 
+//
 // CHECK: ![[LINE]] = !DILocation(line: 13,
 // CHECK: ![[LINE2]] = !DILocation(line: 15,

clang/test/CodeGenCXX/derived-to-base.cpp

 // RUN: %clang_cc1 %s -triple=x86_64-apple-darwin10 -emit-llvm -o - | FileCheck %s
-struct A { 
-  void f(); 
-  
+struct A {
+  void f();
   int a;
 };
 
-struct B : A { 
+struct B : A {
   double b;
 };
 
 void f() {
   B b;
-  
   b.f();
 }
 
 // CHECK: define %struct.B* @_Z1fP1A(%struct.A* %a) [[NUW:#[0-9]+]]
 B *f(A *a) {
   // CHECK-NOT: br label
   // CHECK: ret %struct.B*
   return static_cast<B*>(a);
namespace test3 {
   struct B : A {};
 
   void foo(A a);
   void test() {
     foo(B());
   }
 }
 
-// CHECK: attributes [[NUW]] = { noinline nounwind{{.*}} }
+// CHECK: attributes [[NUW]] = { noconvergent noinline nounwind{{.*}} }

clang/test/CodeGenCXX/dynamic-cast.cpp

try {
     // CHECK:      landingpad { i8*, i32 }
     // CHECK-NEXT:   catch i8* null
   }
   return fail;
 }
 
 // CHECK: declare i8* @__dynamic_cast(i8*, i8*, i8*, i64) [[NUW_RO:#[0-9]+]]
 
-// CHECK: attributes [[NUW_RO]] = { nounwind readonly }
+// CHECK: attributes [[NUW_RO]] = { noconvergent nounwind readonly }
 // CHECK: attributes [[NR]] = { noreturn }

clang/test/CodeGenCXX/exceptions.cpp

namespace test12 {
   // CHECK-NEXT:  [[CAST:%.*]] = bitcast i8* [[PTR]] to [[A:%.*]]*
   // CHECK-NEXT:  invoke void @_ZN6test121AC1Ev([[A]]* [[CAST]])
   // CHECK:       ret [[A]]* [[CAST]]
 
   // CHECK98:       invoke void @_ZN6test121AdlEPvS1_(i8* [[PTR]], i8* [[PTR]])
   // CHECK11:       call void @_ZN6test121AdlEPvS1_(i8* [[PTR]], i8* [[PTR]])
 }
 
-// CHECK98: attributes [[NI_NR_NUW]] = { noinline noreturn nounwind }
+// CHECK98: attributes [[NI_NR_NUW]] = { noconvergent noinline noreturn nounwind }

clang/test/CodeGenCXX/global-dtor-no-atexit.cpp

 
 // CHECK:      define internal void @__dtor__ZZ4funcvE2a2() [[NUW]]
 // CHECK:      call void @_ZN1AD1Ev([[A]]* @_ZZ4funcvE2a2)
 
 void func() {
   static A a1, a2;
 }
 
-// CHECK: attributes [[NUW]] = { noinline nounwind{{.*}} }
+// CHECK: attributes [[NUW]] = { noconvergent noinline nounwind{{.*}} }

clang/test/CodeGenCXX/global-init.cpp

 
 // CHECK: define internal void @_GLOBAL__sub_I_global_init.cpp() #{{[0-9]+}} section "__TEXT,__StaticInit,regular,pure_instructions" {
 // CHECK:   call void [[TEST1_Y_INIT]]
 // CHECK:   call void [[TEST1_Z_INIT]]
 
 // rdar://problem/8090834: this should be nounwind
 // CHECK-NOEXC: define internal void @_GLOBAL__sub_I_global_init.cpp() [[NUW:#[0-9]+]] section "__TEXT,__StaticInit,regular,pure_instructions" {
 
-// CHECK-NOEXC: attributes [[NUW]] = { noinline nounwind{{.*}} }
+// CHECK-NOEXC: attributes [[NUW]] = { noconvergent noinline nounwind{{.*}} }
 
 // PR21811: attach the appropriate attribute to the global init function
 // CHECK-FP: define internal void @_GLOBAL__sub_I_global_init.cpp() [[NUX:#[0-9]+]] section "__TEXT,__StaticInit,regular,pure_instructions" {
-// CHECK-FP: attributes [[NUX]] = { noinline nounwind {{.*}}"frame-pointer"="non-leaf"{{.*}} }
+// CHECK-FP: attributes [[NUX]] = { noconvergent noinline nounwind {{.*}}"frame-pointer"="non-leaf"{{.*}} }

clang/test/CodeGenCXX/inline-hint.cpp

 // CHECK: @_ZN1B17noHintTplFunctionILi2EEEii({{.*}}) [[NOHINT_ATTR]]
   b1.noHintTplFunction<2>(14);
 // CHECK: @_ZN1B25explicitRedeclTplFunctionILi2EEEii({{.*}}) [[EXPLICIT_ATTR]]
   b1.explicitRedeclTplFunction<2>(15);
 // CHECK: @_ZN1BD2Ev({{.*}}) unnamed_addr [[IMPLICIT_CONSTR_ATTR]]
 }
 
 // SUITABLE-NOT: attributes [[NOHINT_ATTR]] = { {{.*}}noinline{{.*}} }
-//   HINTED-DAG: attributes [[NOHINT_ATTR]] = { noinline{{.*}} }
-// NOINLINE-DAG: attributes [[NOHINT_ATTR]] = { noinline{{.*}} }
+//   HINTED-DAG: attributes [[NOHINT_ATTR]] = { noconvergent noinline{{.*}} }
+// NOINLINE-DAG: attributes [[NOHINT_ATTR]] = { noconvergent noinline{{.*}} }
 
 // SUITABLE-NOT: attributes [[IMPLICIT_ATTR]] = { {{.*}}noinline{{.*}} }
 //   HINTED-NOT: attributes [[IMPLICIT_ATTR]] = { {{.*}}noinline{{.*}} }
-// NOINLINE-DAG: attributes [[IMPLICIT_ATTR]] = { noinline{{.*}} }
+// NOINLINE-DAG: attributes [[IMPLICIT_ATTR]] = { noconvergent noinline{{.*}} }
 
 // SUITABLE-NOT: attributes [[IMPLICIT_CONSTR_ATTR]] = { {{.*}}noinline{{.*}} }
 //   HINTED-NOT: attributes [[IMPLICIT_ATTR]] = { {{.*}}noinline{{.*}} }
-// NOINLINE-DAG: attributes [[IMPLICIT_CONSTR_ATTR]] = { noinline{{.*}} }
+// NOINLINE-DAG: attributes [[IMPLICIT_CONSTR_ATTR]] = { noconvergent noinline{{.*}} }
 
 // SUITABLE-NOT: attributes [[EXPLICIT_ATTR]] = { {{.*}}noinline{{.*}} }
 //   HINTED-NOT: attributes [[IMPLICIT_ATTR]] = { {{.*}}noinline{{.*}} }
-// NOINLINE-DAG: attributes [[EXPLICIT_ATTR]] = { noinline{{.*}} }
+// NOINLINE-DAG: attributes [[EXPLICIT_ATTR]] = { noconvergent noinline{{.*}} }
 
-// CHECK-DAG: attributes [[OPTNONE_ATTR]] = { noinline{{.*}} }
+// CHECK-DAG: attributes [[OPTNONE_ATTR]] = { noconvergent noinline{{.*}} }

clang/test/CodeGenCXX/inline-template-hint.cpp

 
 struct A {
   inline void int_run(int);
 
   template <class T>
   inline void template_run(T);
 };
 
-// CHECK: @_ZN1A7int_runEi({{.*}}) [[ATTR:#[0-9]+]]
+// CHECK: define {{.*}} @_ZN1A7int_runEi({{.*}}) [[ATTR:#[0-9]+]]
 void A::int_run(int) {}
 // CHECK: @_ZN1A12template_runIiEEvT_({{.*}}) [[ATTR]]
 template <typename T>
 void A::template_run(T) {}
 
 void bar() {
   A().int_run(1);
   A().template_run(1);
 }
 
 // SUITABLE: attributes [[ATTR]] = { {{.*}}inlinehint{{.*}} }
 //   HINTED: attributes [[ATTR]] = { {{.*}}inlinehint{{.*}} }
 // NOINLINE: attributes [[ATTR]] = { {{.*}}noinline{{.*}} }

clang/test/CodeGenCXX/main-norecurse.cpp

 // RUN: %clang_cc1 -emit-llvm %s -o - | FileCheck %s
 
 // CHECK: define {{.*}} @main({{.*}}) #0
 int main(int argc, char **argv) {
     return 1;
 }
 
-// CHECK: attributes #0 = { noinline norecurse{{.*}} }
+// CHECK: attributes #0 = { noconvergent noinline norecurse{{.*}} }

clang/test/CodeGenCXX/microsoft-abi-array-cookies.cpp

struct S {
   char x[42];
   void operator delete[](void *p, __SIZE_TYPE__);
   // CHECK-LABEL: define dso_local void @"?delete_s@PR23990@@YAXPAUS@1@@Z"(
   // CHECK: call void @"??_VS@PR23990@@SAXPAXI@Z"(i8* {{.*}}, i32 42)
 };
 void delete_s(S *s) { delete[] s; }
 }
 
-// CHECK: attributes [[NUW]] = { noinline nounwind{{.*}} }
+// CHECK: attributes [[NUW]] = { noconvergent noinline nounwind{{.*}} }

clang/test/CodeGenCXX/new-alias.cpp

 // RUN: %clang_cc1 -emit-llvm -triple x86_64-linux-gnu -std=c++11 -o - %s | FileCheck %s
 
 using size_t = decltype(sizeof(0));
 
 extern "C" char *something(long long x) {
 }
 
 // CHECK: @_Znwm = alias i8* (i64), i8* (i64)* @something
 void *operator new(size_t) __attribute__((alias("something")));
 
 // PR16715: don't assert here.
-// CHECK: call i8* @_Znwm(i64 4){{$}}
+// CHECK: call i8* @_Znwm(i64 4) [[ATTR:#[0-9]+]]{{$}}
 int *pr16715 = new int;
+
+// CHECK: [[ATTR]] = { noconvergent }

clang/test/CodeGenCXX/new.cpp

-// RUN: %clang_cc1 -std=c++14 -triple x86_64-unknown-unknown %s -emit-llvm -o - | FileCheck %s
+// RUN: %clang_cc1 -emit-llvm -triple x86_64-linux-gnu -std=c++11 -o - %s | FileCheck %s
 
-typedef __typeof__(sizeof(0)) size_t;
+using size_t = decltype(sizeof(0));
 
-// Declare an 'operator new' template to tickle a bug in __builtin_operator_new.
-template<typename T> void *operator new(size_t, int (*)(T));
-
-// Ensure that this declaration doesn't cause operator new to lose its
-// 'noalias' attribute.
-void *operator new[](size_t);
-
-void t1() {
-  delete new int;
-  delete [] new int [3];
-}
-
-// CHECK: declare noalias i8* @_Znwm(i64) [[ATTR_NOBUILTIN:#[^ ]*]]
-// CHECK: declare void @_ZdlPv(i8*) [[ATTR_NOBUILTIN_NOUNWIND:#[^ ]*]]
-// CHECK: declare noalias i8* @_Znam(i64) [[ATTR_NOBUILTIN]]
-// CHECK: declare void @_ZdaPv(i8*) [[ATTR_NOBUILTIN_NOUNWIND]]
-
-namespace std {
-  struct nothrow_t {};
-}
-std::nothrow_t nothrow;
-
-// Declare the reserved placement operators.
-void *operator new(size_t, void*) throw();
-void operator delete(void*, void*) throw();
-void *operator new[](size_t, void*) throw();
-void operator delete[](void*, void*) throw();
-
-// Declare the replaceable global allocation operators.
-void *operator new(size_t, const std::nothrow_t &) throw();
-void *operator new[](size_t, const std::nothrow_t &) throw();
-void operator delete(void *, const std::nothrow_t &) throw();
-void operator delete[](void *, const std::nothrow_t &) throw();
-
-// Declare some other placemenet operators.
-void *operator new(size_t, void*, bool) throw();
-void *operator new[](size_t, void*, bool) throw();
-
-void t2(int* a) {
-  int* b = new (a) int;
-}
-
-struct S {
-  int a;
-};
-
-// POD types.
-void t3() {
-  int *a = new int(10);
-  _Complex int* b = new _Complex int(10i);
-  
-  S s;
-  s.a = 10;
-  S *sp = new S(s);
-}
-
-// Non-POD
-struct T {
-  T();
-  int a;
-};
-
-void t4() {
-  // CHECK: call void @_ZN1TC1Ev
-  T *t = new T;
-}
-
-struct T2 {
-  int a;
-  T2(int, int);
-};
-
-void t5() { 
-  // CHECK: call void @_ZN2T2C1Eii
-  T2 *t2 = new T2(10, 10);
-}
-
-int *t6() {
-  // Null check.
-  return new (0) int(10);
-}
-
-void t7() {
-  new int();
-}
-
-struct U {
-  ~U();
-};
-  
-void t8(int n) {
-  new int[10];
-  new int[n];
-  
-  // Non-POD
-  new T[10];
-  new T[n];
-  
-  // Cookie required
-  new U[10];
-  new U[n];
-}
-
-void t9() {
-  bool b;
-
-  new bool(true);  
-  new (&b) bool(true);
-}
-
-struct A {
-  void* operator new(__typeof(sizeof(int)), int, float, ...);
-  A();
-};
-
-A* t10() {
-   // CHECK: @_ZN1AnwEmifz
-  return new(1, 2, 3.45, 100) A;
-}
-
-// CHECK-LABEL: define void @_Z3t11i
-struct B { int a; };
-struct Bmemptr { int Bmemptr::* memptr; int a; };
-
-void t11(int n) {
-  // CHECK: call i8* @_Znwm
-  // CHECK: call void @llvm.memset.p0i8.i64(
-  B* b = new B();
-
-  // CHECK: call i8* @_Znam
-  // CHECK: {{call void.*llvm.memset.p0i8.i64.*i8 0, i64 %}}
-  B *b2 = new B[n]();
-
-  // CHECK: call i8* @_Znam
-  // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64
-  // CHECK: br
-  Bmemptr *b_memptr = new Bmemptr[n]();
-  
-  // CHECK: ret void
-}
-
-struct Empty { };
-
-// We don't need to initialize an empty class.
-// CHECK-LABEL: define void @_Z3t12v
-void t12() {
-  // CHECK: call i8* @_Znam
-  // CHECK-NOT: br
-  (void)new Empty[10];
-
-  // CHECK: call i8* @_Znam
-  // CHECK-NOT: br
-  (void)new Empty[10]();
-
-  // CHECK: ret void
-}
-
-// Zero-initialization
-// CHECK-LABEL: define void @_Z3t13i
-void t13(int n) {
-  // CHECK: call i8* @_Znwm
-  // CHECK: store i32 0, i32*
-  (void)new int();
-
-  // CHECK: call i8* @_Znam
-  // CHECK: {{call void.*llvm.memset.p0i8.i64.*i8 0, i64 %}}
-  (void)new int[n]();
-
-  // CHECK-NEXT: ret void
-}
-
-struct Alloc{
-  int x;
-  void* operator new[](size_t size);
-  void operator delete[](void* p);
-  ~Alloc();
-};
-
-void f() {
-  // CHECK: call i8* @_ZN5AllocnaEm(i64 808)
-  // CHECK: store i64 200
-  // CHECK: call void @_ZN5AllocD1Ev(
-  // CHECK: call void @_ZN5AllocdaEPv(i8*
-  delete[] new Alloc[10][20];
-  // CHECK: call i8* @_Znwm
-  // CHECK: call void @_ZdlPv(i8*
-  delete new bool;
-  // CHECK: ret void
-}
-
-namespace test15 {
-  struct A { A(); ~A(); };
-
-  // CHECK-LABEL:    define void @_ZN6test156test0aEPv(
-  // CHECK:      [[P:%.*]] = load i8*, i8**
-  // CHECK-NOT:  icmp eq i8* [[P]], null
-  // CHECK-NOT:  br i1
-  // CHECK:      [[T0:%.*]] = bitcast i8* [[P]] to [[A:%.*]]*
-  // CHECK-NEXT: call void @_ZN6test151AC1Ev([[A]]* [[T0]])
-  void test0a(void *p) {
-    new (p) A();
-  }
-
-  // CHECK-LABEL:    define void @_ZN6test156test0bEPv(
-  // CHECK:      [[P0:%.*]] = load i8*, i8**
-  // CHECK:      [[P:%.*]] = call i8* @_ZnwmPvb(i64 1, i8* [[P0]]
-  // CHECK-NEXT: icmp eq i8* [[P]], null
-  // CHECK-NEXT: br i1
-  // CHECK:      [[T0:%.*]] = bitcast i8* [[P]] to [[A:%.*]]*
-  // CHECK-NEXT: call void @_ZN6test151AC1Ev([[A]]* [[T0]])
-  void test0b(void *p) {
-    new (p, true) A();
-  }
-
-  // CHECK-LABEL:    define void @_ZN6test156test1aEPv(
-  // CHECK:      [[P:%.*]] = load i8*, i8**
-  // CHECK-NOT:  icmp eq i8* [[P]], null
-  // CHECK-NOT:  br i1
-  // CHECK:      [[BEGIN:%.*]] = bitcast i8* [[P]] to [[A:%.*]]*
-  // CHECK-NEXT: [[END:%.*]] = getelementptr inbounds [[A]], [[A]]* [[BEGIN]], i64 5
-  // CHECK-NEXT: br label
-  // CHECK:      [[CUR:%.*]] = phi [[A]]* [ [[BEGIN]], {{%.*}} ], [ [[NEXT:%.*]], {{%.*}} ]
-  // CHECK-NEXT: call void @_ZN6test151AC1Ev([[A]]* [[CUR]])
-  // CHECK-NEXT: [[NEXT]] = getelementptr inbounds [[A]], [[A]]* [[CUR]], i64 1
-  // CHECK-NEXT: [[DONE:%.*]] = icmp eq [[A]]* [[NEXT]], [[END]]
-  // CHECK-NEXT: br i1 [[DONE]]
-  void test1a(void *p) {
-    new (p) A[5];
-  }
-
-  // CHECK-LABEL:    define void @_ZN6test156test1bEPv(
-  // CHECK:      [[P0:%.*]] = load i8*, i8**
-  // CHECK:      [[P:%.*]] = call i8* @_ZnamPvb(i64 13, i8* [[P0]]
-  // CHECK-NEXT: icmp eq i8* [[P]], null
-  // CHECK-NEXT: br i1
-  // CHECK:      [[AFTER_COOKIE:%.*]] = getelementptr inbounds i8, i8* [[P]], i64 8
-  // CHECK:      [[BEGIN:%.*]] = bitcast i8* [[AFTER_COOKIE]] to [[A:%.*]]*
-  // CHECK-NEXT: [[END:%.*]] = getelementptr inbounds [[A]], [[A]]* [[BEGIN]], i64 5
-  // CHECK-NEXT: br label
-  // CHECK:      [[CUR:%.*]] = phi [[A]]* [ [[BEGIN]], {{%.*}} ], [ [[NEXT:%.*]], {{%.*}} ]
-  // CHECK-NEXT: call void @_ZN6test151AC1Ev([[A]]* [[CUR]])
-  // CHECK-NEXT: [[NEXT]] = getelementptr inbounds [[A]], [[A]]* [[CUR]], i64 1
-  // CHECK-NEXT: [[DONE:%.*]] = icmp eq [[A]]* [[NEXT]], [[END]]
-  // CHECK-NEXT: br i1 [[DONE]]
-  void test1b(void *p) {
-    new (p, true) A[5];
-  }
-
-  // TODO: it's okay if all these size calculations get dropped.
-  // FIXME: maybe we should try to throw on overflow?
-  // CHECK-LABEL:    define void @_ZN6test155test2EPvi(
-  // CHECK:      [[N:%.*]] = load i32, i32*
-  // CHECK-NEXT: [[T0:%.*]] = sext i32 [[N]] to i64
-  // CHECK-NEXT: [[P:%.*]] = load i8*, i8**
-  // CHECK:      [[BEGIN:%.*]] = bitcast i8* [[P]] to [[A:%.*]]*
-  // CHECK-NEXT: [[ISEMPTY:%.*]] = icmp eq i64 [[T0]], 0
-  // CHECK-NEXT: br i1 [[ISEMPTY]],
-  // CHECK:      [[END:%.*]] = getelementptr inbounds [[A]], [[A]]* [[BEGIN]], i64 [[T0]]
-  // CHECK-NEXT: br label
-  // CHECK:      [[CUR:%.*]] = phi [[A]]* [ [[BEGIN]],
-  // CHECK-NEXT: call void @_ZN6test151AC1Ev([[A]]* [[CUR]])
-  void test2(void *p, int n) {
-    new (p) A[n];
-  }
-}
-
-namespace PR10197 {
-  // CHECK-LABEL: define weak_odr void @_ZN7PR101971fIiEEvv()
-  template<typename T>
-  void f() {
-    // CHECK: [[CALL:%.*]] = call i8* @_Znwm
-    // CHECK-NEXT: [[CASTED:%.*]] = bitcast i8* [[CALL]] to 
-    new T;
-    // CHECK-NEXT: ret void
-  }
-
-  template void f<int>();
-}
-
-namespace PR11523 {
-  class MyClass;
-  typedef int MyClass::* NewTy;
-  // CHECK-LABEL: define i64* @_ZN7PR115231fEv
-  // CHECK: store i64 -1
-  NewTy* f() { return new NewTy[2](); }
-}
-
-namespace PR11757 {
-  // Make sure we elide the copy construction.
-  struct X { X(); X(const X&); };
-  X* a(X* x) { return new X(X()); }
-  // CHECK: define {{.*}} @_ZN7PR117571aEPNS_1XE
-  // CHECK: [[CALL:%.*]] = call i8* @_Znwm
-  // CHECK-NEXT: [[CASTED:%.*]] = bitcast i8* [[CALL]] to
-  // CHECK-NEXT: call void @_ZN7PR117571XC1Ev({{.*}}* [[CASTED]])
-  // CHECK-NEXT: ret {{.*}} [[CASTED]]
-}
-
-namespace PR13380 {
-  struct A { A() {} };
-  struct B : public A { int x; };
-  // CHECK-LABEL: define i8* @_ZN7PR133801fEv
-  // CHECK: call i8* @_Znam(
-  // CHECK: call void @llvm.memset.p0i8
-  // CHECK-NEXT: call void @_ZN7PR133801BC1Ev
-  void* f() { return new B[2](); }
-}
-
-struct MyPlacementType {} mpt;
-void *operator new(size_t, MyPlacementType);
-
-namespace N3664 {
-  struct S { S() throw(int); };
-
-  // CHECK-LABEL: define void @_ZN5N36641fEv
-  void f() {
-    // CHECK: call i8* @_Znwm(i64 4) [[ATTR_BUILTIN_NEW:#[^ ]*]]
-    int *p = new int; // expected-note {{allocated with 'new' here}}
-    // CHECK: call void @_ZdlPv({{.*}}) [[ATTR_BUILTIN_DELETE:#[^ ]*]]
-    delete p;
-
-    // CHECK: call i8* @_Znam(i64 12) [[ATTR_BUILTIN_NEW]]
-    int *q = new int[3];
-    // CHECK: call void @_ZdaPv({{.*}}) [[ATTR_BUILTIN_DELETE]]
-    delete[] p; // expected-warning {{'delete[]' applied to a pointer that was allocated with 'new'; did you mean 'delete'?}}
-
-    // CHECK: call i8* @_ZnamRKSt9nothrow_t(i64 3, {{.*}}) [[ATTR_BUILTIN_NOTHROW_NEW:#[^ ]*]]
-    (void) new (nothrow) S[3];
-
-    // CHECK: call i8* @_Znwm15MyPlacementType(i64 4){{$}}
-    (void) new (mpt) int;
-  }
-
-  // CHECK: declare noalias i8* @_ZnamRKSt9nothrow_t(i64, {{.*}}) [[ATTR_NOBUILTIN_NOUNWIND]]
-
-  // CHECK-LABEL: define void @_ZN5N36641gEv
-  void g() {
-    // It's OK for there to be attributes here, so long as we don't have a
-    // 'builtin' attribute.
-    // CHECK: call i8* @_Znwm(i64 4){{$}}
-    int *p = (int*)operator new(4);
-    // CHECK: call void @_ZdlPv({{.*}}) [[ATTR_NOUNWIND:#[^ ]*]]
-    operator delete(p);
-
-    // CHECK: call i8* @_Znam(i64 12){{$}}
-    int *q = (int*)operator new[](12);
-    // CHECK: call void @_ZdaPv({{.*}}) [[ATTR_NOUNWIND]]
-    operator delete [](p);
-
-    // CHECK: call i8* @_ZnamRKSt9nothrow_t(i64 3, {{.*}}) [[ATTR_NOUNWIND]]
-    (void) operator new[](3, nothrow);
-  }
-}
-
-namespace builtins {
-  // CHECK-LABEL: define void @_ZN8builtins1fEv
-  void f() {
-    // CHECK: call i8* @_Znwm(i64 4) [[ATTR_BUILTIN_NEW]]
-    // CHECK: call void @_ZdlPv({{.*}}) [[ATTR_BUILTIN_DELETE]]
-    __builtin_operator_delete(__builtin_operator_new(4));
-  }
+extern "C" char *something(long long x) {
 }
 
-// CHECK-DAG: attributes [[ATTR_NOBUILTIN]] = {{[{].*}} nobuiltin {{.*[}]}}
-// CHECK-DAG: attributes [[ATTR_NOBUILTIN_NOUNWIND]] = {{[{].*}} nobuiltin nounwind {{.*[}]}}
+// CHECK: @_Znwm = alias i8* (i64), i8* (i64)* @something
+void *operator new(size_t) __attribute__((alias("something")));
 
-// CHECK-DAG: attributes [[ATTR_BUILTIN_NEW]] = {{[{].*}} builtin {{.*[}]}}
-// CHECK-DAG: attributes [[ATTR_BUILTIN_DELETE]] = {{[{].*}} builtin {{.*[}]}}
+// PR16715: don't assert here.
+// CHECK: call i8* @_Znwm(i64 4) [[ATTR:#[0-9]+]]{{$}}
+int *pr16715 = new int;
 
-// The ([^b}|...) monstrosity is matching a character that's not the start of 'builtin'.
-// Add more letters if this matches some other attribute.
-// CHECK-DAG: attributes [[ATTR_NOUNWIND]] = {{([^b]|b[^u]|bu[^i]|bui[^l])*}} nounwind {{([^b]|b[^u]|bu[^i]|bui[^l])*$}}
+// CHECK: [[ATTR]] = { noconvergent }

clang/test/CodeGenCXX/no-exceptions.cpp

 // RUN: %clang_cc1 %s -triple=x86_64-apple-darwin10 -emit-llvm -o - | FileCheck %s
 
 void g();
 
 // CHECK: define void @_Z1fv() [[NUW:#[0-9]+]]
-void f() throw (int) { 
+void f() throw (int) {
 
   // CHECK-NOT: invoke void @_Z1gv
   g();
   // CHECK: call void @_Z1gv()
   // CHECK: ret void
 }
 
-// CHECK: attributes [[NUW]] = { noinline nounwind{{.*}} }
+// CHECK: attributes [[NUW]] = { noconvergent noinline nounwind{{.*}} }

clang/test/CodeGenCXX/noinline-template.cpp

 };
 template <class T> __attribute__((noinline)) void Vector<T>::growStorageBy() {
 }
 void foo() {
  Vector<int> strs;
  strs.growStorageBy();
 }
 
-// CHECK: attributes [[NI]] = { noinline nounwind{{.*}} }
+// CHECK: attributes [[NI]] = { noconvergent noinline nounwind{{.*}} }

clang/test/CodeGenCXX/optnone-and-attributes.cpp

 // RUN: %clang_cc1 < %s -triple i386-mingw32 -fms-extensions -emit-llvm -x c++ | FileCheck %s
 
 // optnone wins over inlinehint.
 // Test that both func1 and func2 are marked optnone and noinline.
 
 // Definition with both optnone and inlinehint.
 __attribute__((optnone))
 inline int func1(int a) {
   return a + a + a + a;
 }
-// CHECK: @_Z5func1i({{.*}}) [[OPTNONE:#[0-9]+]]
+// CHECK: dso_local i32 @_Z5func1i({{.*}}) [[OPTNONE:#[0-9]+]]
 
 // optnone declaration, inlinehint definition.
 __attribute__((optnone))
 int func2(int a);
 
 inline int func2(int a) {
   return a + a + a + a;
 }

 __attribute__((optnone))
 int exported_optnone_func(int a) {
   return imported_optnone_func(a); // use of imported func
 }
 // CHECK: @_Z21exported_optnone_funci({{.*}}) [[OPTNONE]]
 // CHECK: declare dllimport {{.*}} @_Z21imported_optnone_funci({{.*}}) [[DLLIMPORT:#[0-9]+]]
 
 
-// CHECK: attributes [[OPTNONE]] = { noinline {{.*}} optnone
-// CHECK: attributes [[NORETURN]] = { noinline noreturn {{.*}} optnone
+// CHECK: attributes [[OPTNONE]] = { {{.*}} noinline {{.*}} optnone
+// CHECK: attributes [[NORETURN]] = { {{.*}} noinline noreturn {{.*}} optnone
 
 // CHECK: attributes [[DLLIMPORT]] =
 // CHECK-NOT: optnone

clang/test/CodeGenCXX/optnone-class-members.cpp

 // RUN: %clang_cc1 < %s -triple %itanium_abi_triple -fms-extensions -O2 -disable-llvm-passes -emit-llvm -x c++ | FileCheck %s
 
 // Test attribute 'optnone' on methods:
 //  -- member functions;
 //  -- static member functions.
 
 // Verify that all methods of struct A are associated to the same attribute set.
 // The attribute set shall contain attributes 'noinline' and 'optnone'.
 
 struct A {
   // Definition of an optnone static method.
   __attribute__((optnone))
   static int static_optnone_method(int a) {
     return a + a;
   }
-  // CHECK: @_ZN1A21static_optnone_methodEi({{.*}}) [[OPTNONE:#[0-9]+]]
+  // CHECK: define {{.*}} @_ZN1A21static_optnone_methodEi({{.*}}) [[OPTNONE:#[0-9]+]]
 
   // Definition of an optnone normal method.
   __attribute__((optnone))
   int optnone_method(int a) {
     return a + a + a + a;
   }
   // CHECK: @_ZN1A14optnone_methodEi({{.*}}) [[OPTNONE]]
 

clang/test/CodeGenCXX/optnone-def-decl.cpp

 
 int user_of_forceinline_optnone_function() {
     return forceinline_optnone_function(4,5);
 }
 
 // CHECK: @_Z36user_of_forceinline_optnone_functionv() [[NORMAL]]
 // CHECK: @_Z28forceinline_optnone_functionii({{.*}}) [[OPTNONE]]
 
-// CHECK: attributes [[OPTNONE]] = { noinline nounwind optnone {{.*}} }
+// CHECK: attributes [[OPTNONE]] = { noconvergent noinline nounwind optnone {{.*}} }
 // CHECK: attributes [[NORMAL]] =
 // CHECK-NOT: noinline
 // CHECK-NOT: optnone

clang/test/CodeGenCXX/optnone-templates.cpp

 
 // This function should cause instantiations of each template, one marked
 // with the 'optnone' attribute.
 int container(int i)
 {
   return template_normal<int>(i) + template_optnone<int>(i);
 }
 
-// CHECK: @_Z15template_normalIiET_S0_({{.*}}) [[NORMAL:#[0-9]+]]
-// CHECK: @_Z16template_optnoneIiET_S0_({{.*}}) [[OPTNONE:#[0-9]+]]
+// CHECK: define {{.*}} @_Z15template_normalIiET_S0_({{.*}}) [[NORMAL:#[0-9]+]]
+// CHECK: define {{.*}} @_Z16template_optnoneIiET_S0_({{.*}}) [[OPTNONE:#[0-9]+]]
 
 
 //-- Effect of optnone on a partial specialization.
 //   FIRST TEST: a method becomes marked with optnone in the specialization.
 
 template <typename T, typename U> class template_normal_base {
 public:
-  T method(T t, U u) 
+  T method(T t, U u)
   {
     return t + static_cast<T>(u);
   }
 };
 
 template <typename U> class template_normal_base<int, U>
 {
 public:
   __attribute__((optnone)) int method (int t, U u)
   {
     return t - static_cast<int>(u);
   }
 };
 
 // This function should cause an instantiation of the full template (whose
 // method is not marked optnone) and an instantiation of the partially
 // specialized template (whose method is marked optnone).
-void container2() 
+void container2()
 {
   int y = 2;
   float z = 3.0;
   template_normal_base<float, int> class_normal;
   template_normal_base<int, float> class_optnone;
   float r1 = class_normal.method(z, y);
   float r2 = class_optnone.method(y, z);
 }
 
 // CHECK: @_ZN20template_normal_baseIfiE6methodEfi({{.*}}) [[NORMAL]]
 // CHECK: @_ZN20template_normal_baseIifE6methodEif({{.*}}) [[OPTNONE]]
 
 
 //-- Effect of optnone on a partial specialization.
 //   SECOND TEST: a method loses optnone in the specialization.
 
 template <typename T, typename U> class template_optnone_base {
 public:
-  __attribute__((optnone)) T method(T t, U u) 
+  __attribute__((optnone)) T method(T t, U u)
   {
     return t + static_cast<T>(u);
   }
 };
 
 template <typename U> class template_optnone_base<int, U>
 {
 public:
   int method (int t, U u)
   {
     return t - static_cast<int>(u);
   }
 };
 
 // This function should cause an instantiation of the full template (whose
 // method is marked optnone) and an instantiation of the partially
 // specialized template (whose method is not marked optnone).
-void container3() 
+void container3()
 {
   int y = 2;
   float z = 3.0;
   template_optnone_base<float, int> class_optnone;
   template_optnone_base<int, float> class_normal;
   float r1 = class_optnone.method(z, y);
   float r2 = class_normal.method(y, z);
 }
 
 // CHECK: @_ZN21template_optnone_baseIfiE6methodEfi({{.*}}) [[OPTNONE]]
 // CHECK: @_ZN21template_optnone_baseIifE6methodEif({{.*}}) [[NORMAL]]
 
 
 // CHECK: attributes [[NORMAL]] =
 // CHECK-NOT: optnone
 // CHECK: attributes [[OPTNONE]] = {{.*}} optnone

clang/test/CodeGenCXX/reference-cast.cpp

if (i == 0)
     return (const int&)17;
   else if (i == 1)
     // CHECK: store i32 17, i32*
     return static_cast<const int&>(17);
     // CHECK: store i32 17, i32*
   return 17;
 }
 
-// CHECK-LABEL: define dereferenceable({{[0-9]+}}) i16* @_Z20lvalue_integral_castv() 
+// CHECK-LABEL: define dereferenceable({{[0-9]+}}) i16* @_Z20lvalue_integral_castv()
 const short &lvalue_integral_cast() {
   if (i == 0)
     // CHECK: store i16 17, i16*
     return (const short&)17;
   else if (i == 1)
     // CHECK: store i16 17, i16*
     return static_cast<const short&>(17);
   // CHECK: store i16 17, i16*
namespace PR10650 {
   };
   unsigned long long test(Helper *obj) {
     return static_cast<const unsigned long long&>(obj->id());
   }
   // CHECK-LABEL: define i64 @_ZN7PR106504testEPNS_6HelperE
   // CHECK: store i64
 }
 
-// CHECK: attributes [[NUW]] = { noinline nounwind{{.*}} }
+// CHECK: attributes [[NUW]] = { noconvergent noinline nounwind{{.*}} }

clang/test/CodeGenCXX/runtimecc.cpp

namespace test0 {
 
   A global;
 // CHECK-LABEL:    define internal void @__cxx_global_var_init()
 // CHECK:      call [[A]]* @_ZN5test01AC1Ev([[A]]* @_ZN5test06globalE)
 // CHECK-NEXT: call i32 @__cxa_atexit(void (i8*)* bitcast ([[A]]* ([[A]]*)* @_ZN5test01AD1Ev to void (i8*)*), i8* bitcast ([[A]]* @_ZN5test06globalE to i8*), i8* @__dso_handle) [[NOUNWIND:#[0-9]+]]
 // CHECK-NEXT: ret void
 }
 
-// CHECK: declare i32 @__cxa_atexit(void (i8*)*, i8*, i8*) [[NOUNWIND]]
+// CHECK: declare i32 @__cxa_atexit(void (i8*)*, i8*, i8*) [[NOCONVERGENT_NOUNWIND:#[0-9]+]]
 
 namespace test1 {
   void test() {
     throw 0;
   }
 
 // CHECK-LABEL:    define void @_ZN5test14testEv()
 // CHECK:      [[T0:%.*]] = call i8* @__cxa_allocate_exception(i32 4) [[NOUNWIND]]
 // CHECK-NEXT: [[T1:%.*]] = bitcast i8* [[T0]] to i32*
 // CHECK-NEXT: store i32 0, i32* [[T1]]
 // CHECK-NEXT: call void @__cxa_throw(i8* [[T0]], i8* bitcast (i8** @_ZTIi to i8*), i8* null) [[NORETURN:#[0-9]+]]
 // CHECK-NEXT: unreachable
 }
 
 // CHECK: declare i8* @__cxa_allocate_exception(i32)
 
 // CHECK: declare void @__cxa_throw(i8*, i8*, i8*)
 
 // CHECK-LABEL: define internal void @_GLOBAL__sub_I_runtimecc.cpp()
 // CHECK:   call void @__cxx_global_var_init()
 
 
+// CHECK: attributes [[NOCONVERGENT_NOUNWIND]] = { noconvergent nounwind }
 // CHECK: attributes [[NOUNWIND]] = { nounwind }
 // CHECK: attributes [[NORETURN]] = { noreturn }

clang/test/CodeGenCXX/threadsafe-statics.cpp

 // RUN: %clang_cc1 -emit-llvm -triple=x86_64-apple-darwin10 -o - %s | FileCheck -check-prefix=WITH-TSS %s
 // RUN: %clang_cc1 -emit-llvm -triple=x86_64-apple-darwin10 -o - %s -fno-threadsafe-statics | FileCheck -check-prefix=NO-TSS %s
 
 int f();
 
 // WITH-TSS: @_ZZ1gvE1a = internal global i32 0, align 4
 // WITH-TSS: @_ZGVZ1gvE1a = internal global i64 0
 
 // WITH-TSS: define void @_Z1gv() [[NUW:#[0-9]+]]
 // WITH-TSS: call i32 @__cxa_guard_acquire
 // WITH-TSS: call void @__cxa_guard_release
 // WITH-TSS: ret void
-void g() { 
+void g() {
   static int a = f();
 }
 
 // NO-TSS: @_ZZ1gvE1a = internal global i32 0, align 4
 // NO-TSS: @_ZGVZ1gvE1a = internal global i8 0
 
 // NO-TSS: define void @_Z1gv() [[NUW:#[0-9]+]]
 // NO-TSS-NOT: call i32 @__cxa_guard_acquire
 // NO-TSS-NOT: call void @__cxa_guard_release
 // NO-TSS: ret void
 
-// WITH-TSS: attributes [[NUW]] = { noinline nounwind{{.*}} }
+// WITH-TSS: attributes [[NUW]] = { noconvergent noinline nounwind{{.*}} }
 
-// NO-TSS: attributes [[NUW]] = { noinline nounwind{{.*}} }
+// NO-TSS: attributes [[NUW]] = { noconvergent noinline nounwind{{.*}} }

clang/test/CodeGenCXX/thunks.cpp

 };
 
 struct B {
   virtual void f();
 };
 
 struct C : A, B {
   virtual void c();
-  
   virtual void f();
 };
 
 // CHECK-LABEL: define void @_ZThn8_N5Test11C1fEv(
 // CHECK-DBG-NOT: dbg.declare
 // CHECK: ret void
 //
 // WIN64-LABEL: define dso_local void @"?f@C@Test1@@UEAAXXZ"(

 struct V2 : virtual V1 { };
 
 struct A {
   virtual V1 *f();
 };
 
 struct B : A {
   virtual void b();
-  
   virtual V2 *f();
 };
 
 // CHECK: define %{{.*}}* @_ZTch0_v0_n24_N5Test31B1fEv(
 // WIN64: define weak_odr dso_local %{{.*}} @"?f@B@Test3@@QEAAPEAUV1@2@XZ"(
 V2 *B::f() { return 0; }
 
 }
 
 namespace Test4 {
 
 // Check that the thunk for 'C::f' has the same visibility as the function itself.
 
 struct A {
   virtual void f();
 };
 
 struct B {
   virtual void f();
 };
 
 struct __attribute__((visibility("protected"))) C : A, B {
   virtual void c();
-  
   virtual void f();
 };
 
 // CHECK-LABEL: define protected void @_ZThn8_N5Test41C1fEv(
 // CHECK-DBG-NOT: dbg.declare
 // CHECK: ret void
 void C::f() { }
 
struct C : A, B {
       virtual void c();
       virtual void f();
     };
   }
   void C::c() {}
   void C::f() {}
 
   // Force C::f to be used.
-  void f() { 
-    C c; 
+  void f() {
+    C c;
     c.f();
   }
 }
 // Not sure why this isn't delayed like in Itanium.
 // WIN64-LABEL: define internal void @"?f@C@?A{{.*}}@Test4B@@UEAAXXZ"(
 
 namespace Test5 {
 

 // This is from Test10:
 // CHECK-OPT-LABEL: define linkonce_odr void @_ZN6Test101C3fooEv
 // CHECK-OPT-LABEL: define linkonce_odr void @_ZThn8_N6Test101C3fooEv
 
 // This is from Test10:
 // WIN64-LABEL: define linkonce_odr dso_local void @"?foo@C@Test10@@UEAAXXZ"(
 // WIN64-LABEL: define linkonce_odr dso_local void @"?foo@C@Test10@@W7EAAXXZ"(
 
-// CHECK-NONOPT: attributes [[NUW]] = { noinline nounwind optnone uwtable{{.*}} }
-// CHECK-OPT: attributes [[NUW]] = { nounwind uwtable{{.*}} }
+// CHECK-NONOPT: attributes [[NUW]] = { noconvergent noinline nounwind optnone uwtable{{.*}} }
+// CHECK-OPT: attributes [[NUW]] = { noconvergent nounwind uwtable{{.*}} }

clang/test/CodeGenCXX/virtual-base-cast.cpp

 // MSVC:   %[[vbptr_off:.*]] = getelementptr inbounds i8, i8* {{.*}}, i32 4
 // MSVC:   %[[vbptr:.*]] = bitcast i8* %[[vbptr_off]] to i32**
 // MSVC:   %[[vbtable:.*]] = load i32*, i32** %[[vbptr]]
 // MSVC:   %[[entry:.*]] = getelementptr inbounds i32, i32* {{.*}}, i32 4
 // MSVC:   %[[offset:.*]] = load i32, i32* %[[entry]]
 // MSVC:   add nsw i32 4, %[[offset]]
 // MSVC: }
 
-// CHECK: attributes [[NUW]] = { noinline nounwind{{.*}} }
+// CHECK: attributes [[NUW]] = { noconvergent noinline nounwind{{.*}} }

clang/test/CodeGenCXX/virtual-function-calls.cpp

 // RUN: %clang_cc1 %s -triple %itanium_abi_triple -std=c++11 -emit-llvm -o - | FileCheck %s
 // RUN: %clang_cc1 %s -triple %itanium_abi_triple -std=c++11 -emit-llvm -o - -fstrict-vtable-pointers -O1 | FileCheck --check-prefix=CHECK-INVARIANT %s
 
 // PR5021
 namespace PR5021 {
 
 struct A {
   virtual void f(char);
 };
 
 void f(A *a) {
   // CHECK: call {{.*}}void %
   a->f('c');
 }
 
-struct B : virtual A { 
+struct B : virtual A {
   virtual void f();
 };
 
 void f(B * b) {
   b->f();
 }
 
 }
 
 namespace Test1 {
-  struct A { 
-    virtual ~A(); 
+  struct A {
+    virtual ~A();
   };
 
   struct B : A {
     virtual ~B();
     virtual void f();
   };
 
   void f(B *b) {
     b->f();
   }
 }
 
 namespace VirtualNoreturn {
   struct A {
     [[noreturn]] virtual void f();
   };
 
   // CHECK-LABEL: @_ZN15VirtualNoreturn1f
   // CHECK-INVARIANT-LABEL: define {{(dso_local )?}}void @_ZN15VirtualNoreturn1f
   void f(A *p) {
     p->f();
-    // CHECK: call {{.*}}void %{{[^#]*$}}
+    // CHECK: call {{.*}}void %{{[^#]*}}[[ATTR:#[0-9]+]]{{$}}
     // CHECK-NOT: unreachable
     // CHECK-INVARIANT: load {{.*}} !invariant.load ![[EMPTY_NODE:[0-9]+]]
   }
 }
 
+// CHECK: [[ATTR]] = { noconvergent }
 // CHECK-INVARIANT: ![[EMPTY_NODE]] = !{}

clang/test/CodeGenCXX/wasm-eh.cpp

 // CHECK: [[CATCHDISPATCH_BB]]:
 // CHECK-NEXT:   %[[CATCHSWITCH:.*]] = catchswitch within none [label %[[CATCHSTART_BB:.*]]] unwind to caller
 
 // CHECK: [[CATCHSTART_BB]]:
 // CHECK-NEXT:   %[[CATCHPAD:.*]] = catchpad within %[[CATCHSWITCH]] [i8* bitcast (i8** @_ZTIi to i8*), i8* bitcast (i8** @_ZTId to i8*)]
 // CHECK-NEXT:   %[[EXN:.*]] = call i8* @llvm.wasm.get.exception(token %[[CATCHPAD]])
 // CHECK-NEXT:   store i8* %[[EXN]], i8** %exn.slot
 // CHECK-NEXT:   %[[SELECTOR:.*]] = call i32 @llvm.wasm.get.ehselector(token %[[CATCHPAD]])
-// CHECK-NEXT:   %[[TYPEID:.*]] = call i32 @llvm.eh.typeid.for(i8* bitcast (i8** @_ZTIi to i8*)) #2
+// CHECK-NEXT:   %[[TYPEID:.*]] = call i32 @llvm.eh.typeid.for(i8* bitcast (i8** @_ZTIi to i8*))
 // CHECK-NEXT:   %[[MATCHES:.*]] = icmp eq i32 %[[SELECTOR]], %[[TYPEID]]
 // CHECK-NEXT:   br i1 %[[MATCHES]], label %[[CATCH_INT_BB:.*]], label %[[CATCH_FALLTHROUGH_BB:.*]]
 
 // CHECK: [[CATCH_INT_BB]]:
 // CHECK-NEXT:   %[[EXN:.*]] = load i8*, i8** %exn.slot
 // CHECK-NEXT:   %[[ADDR:.*]] = call i8* @__cxa_begin_catch(i8* %[[EXN]]) {{.*}} [ "funclet"(token %[[CATCHPAD]]) ]
 // CHECK-NEXT:   %[[ADDR_CAST:.*]] = bitcast i8* %[[ADDR]] to i32*
 // CHECK-NEXT:   %[[INT_VAL:.*]] = load i32, i32* %[[ADDR_CAST]]
 // CHECK-NEXT:   store i32 %[[INT_VAL]], i32* %[[INT_ALLOCA]]
 // CHECK-NEXT:   call void @_Z10dont_throwv() {{.*}} [ "funclet"(token %[[CATCHPAD]]) ]
 // CHECK-NEXT:   call void @__cxa_end_catch() {{.*}} [ "funclet"(token %[[CATCHPAD]]) ]
 // CHECK-NEXT:   catchret from %[[CATCHPAD]] to label %[[CATCHRET_DEST_BB0:.*]]
 
 // CHECK: [[CATCHRET_DEST_BB0]]:
 // CHECK-NEXT:   br label %[[TRY_CONT_BB:.*]]
 
 // CHECK: [[CATCH_FALLTHROUGH_BB]]
-// CHECK-NEXT:   %[[TYPEID:.*]] = call i32 @llvm.eh.typeid.for(i8* bitcast (i8** @_ZTId to i8*)) #2
+// CHECK-NEXT:   %[[TYPEID:.*]] = call i32 @llvm.eh.typeid.for(i8* bitcast (i8** @_ZTId to i8*))
 // CHECK-NEXT:   %[[MATCHES:.*]] = icmp eq i32 %[[SELECTOR]], %[[TYPEID]]
 // CHECK-NEXT:   br i1 %[[MATCHES]], label %[[CATCH_FLOAT_BB:.*]], label %[[RETHROW_BB:.*]]
 
 // CHECK: [[CATCH_FLOAT_BB]]:
 // CHECK:   catchret from %[[CATCHPAD]] to label %[[CATCHRET_DEST_BB1:.*]]
 
 // CHECK: [[CATCHRET_DEST_BB1]]:
 // CHECK-NEXT:   br label %[[TRY_CONT_BB]]

 
 // CHECK-LABEL: @_Z5test4v()
 
 // CHECK:   %[[CATCHSWITCH]] = catchswitch within none [label %[[CATCHSTART_BB]]] unwind to caller
 
 // CHECK: [[CATCHSTART_BB]]:
 // CHECK:   %[[CATCHPAD:.*]] = catchpad within %[[CATCHSWITCH]] [i8* bitcast (i8** @_ZTIi to i8*)]
 
-// CHECK:   invoke void @_Z9may_throwv() [ "funclet"(token %[[CATCHPAD]]) ]
+// CHECK:   invoke void @_Z9may_throwv() #{{[0-9]+}} [ "funclet"(token %[[CATCHPAD]]) ]
 // CHECK-NEXT:           to label %[[INVOKE_CONT_BB:.*]] unwind label %[[EHCLEANUP_BB:.*]]
 
 // CHECK: [[INVOKE_CONT_BB]]:
 // CHECK-NEXT:   call void @__cxa_end_catch() {{.*}} [ "funclet"(token %[[CATCHPAD]]) ]
 // CHECK-NEXT:   catchret from %[[CATCHPAD]] to label
 
 // CHECK: [[EHCLEANUP_BB]]:
 // CHECK-NEXT:   %[[CLEANUPPAD:.*]] = cleanuppad within %[[CATCHPAD]] []

 
 // CHECK-LABEL: @_Z5test5v()
 
 // CHECK:   %[[CATCHSWITCH:.*]] = catchswitch within none [label %[[CATCHSTART_BB]]] unwind to caller
 
 // CHECK: [[CATCHSTART_BB]]:
 // CHECK:   %[[CATCHPAD:.*]] = catchpad within %[[CATCHSWITCH]] [i8* null]
 
-// CHECK:   invoke void @_Z9may_throwv() [ "funclet"(token %[[CATCHPAD]]) ]
+// CHECK:   invoke void @_Z9may_throwv() #{{[0-9]+}} [ "funclet"(token %[[CATCHPAD]]) ]
 // CHECK-NEXT:           to label %[[INVOKE_CONT_BB0:.*]] unwind label %[[EHCLEANUP_BB:.*]]
 
 // CHECK: [[INVOKE_CONT_BB0]]:
 // CHECK-NEXT:   call void @__cxa_end_catch() [ "funclet"(token %[[CATCHPAD]]) ]
 // CHECK-NEXT:   catchret from %[[CATCHPAD]] to label
 
 // CHECK: [[EHCLEANUP_BB]]:
 // CHECK-NEXT:   %[[CLEANUPPAD0:.*]] = cleanuppad within %[[CATCHPAD]] []

 // CHECK: [[CATCH_DISPATCH_BB]]:
 // CHECK-NEXT:  %[[CATCHSWITCH:.*]] = catchswitch within none [label %[[CATCHSTART_BB:.*]]] unwind label %[[EHCLEANUP_BB1:.*]]
 
 // CHECK: [[CATCHSTART_BB]]:
 // CHECK-NEXT:   %[[CATCHPAD:.*]] = catchpad within %[[CATCHSWITCH]] [i8* bitcast (i8** @_ZTIi to i8*)]
 // CHECK:   br i1 %{{.*}}, label %[[CATCH_INT_BB:.*]], label %[[RETHROW_BB:.*]]
 
 // CHECK: [[CATCH_INT_BB]]:
-// CHECK:   invoke void @_Z9may_throwv() [ "funclet"(token %[[CATCHPAD]]) ]
+// CHECK:   invoke void @_Z9may_throwv() #{{[0-9]+}} [ "funclet"(token %[[CATCHPAD]]) ]
 // CHECK-NEXT:           to label %[[INVOKE_CONT_BB:.*]] unwind label %[[EHCLEANUP_BB2:.*]]
 
 // CHECK: [[INVOKE_CONT_BB]]:
 // CHECK:   catchret from %[[CATCHPAD]] to label %{{.*}}
 
 // CHECK: [[RETHROW_BB]]:
 // CHECK-NEXT:   invoke void @llvm.wasm.rethrow.in.catch() {{.*}} [ "funclet"(token %[[CATCHPAD]]) ]
 // CHECK-NEXT:          to label %[[UNREACHABLE_BB:.*]] unwind label %[[EHCLEANUP_BB1:.*]]

 
 // CHECK:   %[[CLEANUPPAD0:.*]] = cleanuppad within none []
 // CHECK:   cleanupret from %[[CLEANUPPAD0]] unwind label
 
 // CHECK:   %[[CATCHSWITCH0:.*]] = catchswitch within none
 
 // CHECK:   %[[CATCHPAD0:.*]] = catchpad within %[[CATCHSWITCH0]] [i8* bitcast (i8** @_ZTIi to i8*), i8* bitcast (i8** @_ZTId to i8*)]
 
-// CHECK:   invoke void @_Z9may_throwv() [ "funclet"(token %[[CATCHPAD0]]) ]
+// CHECK:   invoke void @_Z9may_throwv() #{{[0-9]+}} [ "funclet"(token %[[CATCHPAD0]]) ]
 
 // CHECK:   catchret from %[[CATCHPAD0]] to label
 
-// CHECK:   invoke void @_Z9may_throwv() [ "funclet"(token %[[CATCHPAD0]]) ]
+// CHECK:   invoke void @_Z9may_throwv() #{{[0-9]+}} [ "funclet"(token %[[CATCHPAD0]]) ]
 
 // CHECK:   catchret from %[[CATCHPAD0]] to label
 
 // CHECK:   invoke void @llvm.wasm.rethrow.in.catch() {{.*}} [ "funclet"(token %[[CATCHPAD0]]) ]
 
 // CHECK:   %[[CLEANUPPAD1:.*]] = cleanuppad within %[[CATCHPAD0]] []
 // CHECK:   cleanupret from %[[CLEANUPPAD1]] unwind label
 
 // CHECK:   %[[CLEANUPPAD2:.*]] = cleanuppad within %[[CATCHPAD0]] []
 // CHECK:   cleanupret from %[[CLEANUPPAD2]] unwind label
 
 // CHECK:   %[[CLEANUPPAD3:.*]] = cleanuppad within none []
 // CHECK:   cleanupret from %[[CLEANUPPAD3]] unwind label
 
 // CHECK:   %[[CATCHSWITCH1:.*]] = catchswitch within none
 
 // CHECK:   %[[CATCHPAD1:.*]] = catchpad within %[[CATCHSWITCH1]] [i8* bitcast (i8** @_ZTIi to i8*), i8* null]
 
-// CHECK:   invoke void @_Z9may_throwv() [ "funclet"(token %[[CATCHPAD1]]) ]
+// CHECK:   invoke void @_Z9may_throwv() #{{[0-9]+}} [ "funclet"(token %[[CATCHPAD1]]) ]
 
 // CHECK:   catchret from %[[CATCHPAD1]] to label
 
-// CHECK:   invoke void @_Z9may_throwv() [ "funclet"(token %[[CATCHPAD1]]) ]
+// CHECK:   invoke void @_Z9may_throwv() #{{[0-9]+}} [ "funclet"(token %[[CATCHPAD1]]) ]
 
 // CHECK:   invoke void @__cxa_end_catch() [ "funclet"(token %[[CATCHPAD1]]) ]
 
 // CHECK:   catchret from %[[CATCHPAD1]] to label
 
 // CHECK:   %[[CLEANUPPAD4:.*]] = cleanuppad within %[[CATCHPAD1]] []
 // CHECK:   invoke void @__cxa_end_catch() [ "funclet"(token %[[CLEANUPPAD4]]) ]
 

 
 // CHECK-LABEL: @_Z5test8v()
 // CHECK:   invoke void @_Z9may_throwv()
 
 // CHECK:   %[[CATCHSWITCH0:.*]] = catchswitch within none
 
 // CHECK:   %[[CATCHPAD0:.*]] = catchpad within %[[CATCHSWITCH0]] [i8* bitcast (i8** @_ZTIi to i8*)]
 
-// CHECK:   invoke void @_Z9may_throwv() [ "funclet"(token %[[CATCHPAD0]]) ]
+// CHECK:   invoke void @_Z9may_throwv() #{{[0-9]+}} [ "funclet"(token %[[CATCHPAD0]]) ]
 
 // CHECK:   %[[CATCHSWITCH1:.*]] = catchswitch within %[[CATCHPAD0]]
 
 // CHECK:   %[[CATCHPAD1:.*]] = catchpad within %[[CATCHSWITCH1]] [i8* bitcast (i8** @_ZTIi to i8*)]
 
-// CHECK:   invoke void @_Z9may_throwv() [ "funclet"(token %[[CATCHPAD1]]) ]
+// CHECK:   invoke void @_Z9may_throwv() #{{[0-9]+}} [ "funclet"(token %[[CATCHPAD1]]) ]
 
 // CHECK:   catchret from %[[CATCHPAD1]] to label
 
 // CHECK:   invoke void @llvm.wasm.rethrow.in.catch() {{.*}} [ "funclet"(token %[[CATCHPAD1]]) ]
 
 // CHECK:   catchret from %[[CATCHPAD0]] to label
 
 // CHECK:   call void @llvm.wasm.rethrow.in.catch() {{.*}} [ "funclet"(token %[[CATCHPAD0]]) ]

clang/test/CodeGenCoroutines/coro-unhandled-exception.cpp

 // CHECK-NEXT: br label %[[COROFIN:.+]]
 // CHECK: [[COROFIN]]:
 // CHECK-NEXT: invoke void @"?final_suspend@promise_type@coro_t@@QEAA?AUsuspend_never@coroutines_v1@experimental@std@@XZ"(
 
 // CHECK-LPAD: @_Z1fv(
 // CHECK-LPAD:   invoke void @_Z9may_throwv()
 // CHECK-LPAD:       to label %[[CONT:.+]] unwind label %[[CLEANUP:.+]]
 // CHECK-LPAD: [[CLEANUP]]:
-// CHECK-LPAD:   call void @_ZN7CleanupD1Ev(%struct.Cleanup* %x) #2
+// CHECK-LPAD:   call void @_ZN7CleanupD1Ev(%struct.Cleanup* %x)
 // CHECK-LPAD:   br label %[[CATCH:.+]]
 
 // CHECK-LPAD: [[CATCH]]:
 // CHECK-LPAD:    call i8* @__cxa_begin_catch
 // CHECK-LPAD:    call void @_ZN6coro_t12promise_type19unhandled_exceptionEv(%"struct.coro_t::promise_type"* %__promise) #2
 // CHECK-LPAD:    invoke void @__cxa_end_catch()
 // CHECK-LPAD-NEXT:  to label %[[CATCHRETDEST:.+]] unwind label
 // CHECK-LPAD: [[CATCHRETDEST]]:
 // CHECK-LPAD-NEXT: br label %[[TRYCONT:.+]]
 // CHECK-LPAD: [[TRYCONT]]:
 // CHECK-LPAD: br label %[[RESUMECONT:.+]]
 // CHECK-LPAD: [[RESUMECONT]]:
 // CHECK-LPAD-NEXT: br label %[[COROFIN:.+]]
 // CHECK-LPAD: [[COROFIN]]:
 // CHECK-LPAD-NEXT: invoke void @_ZN6coro_t12promise_type13final_suspendEv(

clang/test/CodeGenObjC/arc-no-arc-exceptions.m

 // RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -fobjc-arc -fblocks -fexceptions -fobjc-exceptions -O2 -disable-llvm-passes -o - %s | FileCheck %s
 // RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -fobjc-arc -fblocks -fexceptions -fobjc-exceptions -disable-llvm-passes -o - %s | FileCheck -check-prefix=NO-METADATA %s
 // RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -fobjc-arc -fblocks -fexceptions -fobjc-exceptions -O2 -disable-llvm-passes -o - %s -fobjc-arc-exceptions | FileCheck -check-prefix=NO-METADATA %s
 
 // The front-end should emit clang.arc.no_objc_arc_exceptions in -fobjc-arc-exceptions
 // mode when optimization is enabled, and not otherwise.
 
 void thrower(void);
 void not(void) __attribute__((nothrow));
 
 // CHECK-LABEL: define void @test0(
-// CHECK: call void @thrower(), !clang.arc.no_objc_arc_exceptions !
+// CHECK: call void @thrower() [[NOCONV:#[0-9]+]], !clang.arc.no_objc_arc_exceptions !
 // CHECK: call void @not() [[NUW:#[0-9]+]], !clang.arc.no_objc_arc_exceptions !
 // NO-METADATA-LABEL: define void @test0(
 // NO-METADATA-NOT: !clang.arc.no_objc_arc_exceptions
 // NO-METADATA: }
 void test0(void) {
   thrower();
   not();
 }
 
 // CHECK-LABEL: define void @test1(
-// CHECK: call void @thrower(), !clang.arc.no_objc_arc_exceptions !
+// CHECK: call void @thrower() [[NOCONV]], !clang.arc.no_objc_arc_exceptions !
 // CHECK: call void @not() [[NUW]], !clang.arc.no_objc_arc_exceptions !
 // NO-METADATA-LABEL: define void @test1(
 // NO-METADATA-NOT: !clang.arc.no_objc_arc_exceptions
 // NO-METADATA: }
 void test1(id x) {
   id y = x;
   thrower();
   not();
@autoreleasepool {
         __attribute__((__blocks__(byref))) int x;
         void (^b)(void) = ^{
             NSLog(@"Address of x in assigned block: %p", &x);
         };
         b();
     }
 }
 
-// CHECK: attributes [[NUW]] = { nounwind }
+// CHECK-DAG: attributes [[NOCONV]] = { noconvergent }
+// CHECK-DAG: attributes [[NUW]] = { noconvergent nounwind }

clang/test/CodeGenObjC/arc.m

void test71(void) {
   // CHECK: %[[T:[^ ]+]] = bitcast %struct.AggDtor* %[[TMP1]] to i8**
   // CHECK: call void @__destructor_8_s40(i8** %[[T]])
   // CHECK: %[[T:[^ ]+]] = bitcast %struct.AggDtor* %[[TMP1:[^ ]+]] to i8*
   // CHECK: call void @llvm.lifetime.end.p0i8({{[^,]+}}, i8* %[[T]])
   getAggDtor();
   getAggDtor();
 }
 
-// ARC-ALIEN: attributes [[NLB]] = { nonlazybind }
-// ARC-NATIVE: attributes [[NLB]] = { nonlazybind }
+// ARC-ALIEN: attributes [[NLB]] = { noconvergent nonlazybind }
+// ARC-NATIVE: attributes [[NLB]] = { noconvergent nonlazybind }
 // CHECK: attributes [[NUW]] = { nounwind }

clang/test/CodeGenObjC/attr-noreturn.m

 // RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-MRC
 // RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -fobjc-arc -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-ARC
 
 __attribute__((objc_root_class))
 @interface Root
 - (instancetype) init;
 @end
 
 @interface Base : Root
 @end
 
 @interface Middle : Base
 + (void) abort __attribute__((noreturn));
 - (void) fail __attribute__((noreturn));
 @end
-  
 @interface Derived : Middle
 @end
 
 // An arbitrary instance pointer may be null.
 void testInstanceMethod(Derived *x) {
   [x fail];
 }
 // CHECK-LABEL: @testInstanceMethod
-// CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* {{.*}}, i8* {{.*}}){{$}}
+// CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* {{.*}}, i8* {{.*}}) [[NOCONV:#[0-9]+]]{{$}}
 
 // A direct call of a class method will normally never have a null receiver.
 void testClassMethod() {
   [Derived abort];
 }
 // CHECK-LABEL: @testClassMethod
 // CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* {{.*}}, i8* {{.*}}) [[NORETURN:#[0-9]+]]
 
 __attribute__((weak_import))
 @interface WeakMiddle : Base
 @end
-  
 @interface WeakDerived : WeakMiddle
 + (void) abort __attribute__((noreturn));
 @end
 
 // The class pointer of a weakly-imported class may be null.
 void testWeakImport() {
   [WeakDerived abort];
 }
 // CHECK-LABEL: @testWeakImport
-// CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* {{.*}}, i8* {{.*}}){{$}}
+// CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* {{.*}}, i8* {{.*}}) [[NOCONV]]{{$}}
 
 @interface Derived (MyMethods)
 @end
 
 @implementation Derived (MyMethods)
 
 // In general, self can be reassigned, so we can't make stronger assumptions.
 // But ARC makes self const in an ordinary method.
 // TODO: do the analysis to take advantage of the dominant case where
 // self is not reassigned.
 - (void) testSelfInstanceMethod {
   [self fail];
 }
 // CHECK-LABEL: [Derived(MyMethods) testSelfInstanceMethod]
-// CHECK-MRC: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* {{.*}}, i8* {{.*}}){{$}}
+// CHECK-MRC: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* {{.*}}, i8* {{.*}}) [[NOCONV]]{{$}}
 // CHECK-ARC: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* {{.*}}, i8* {{.*}}) [[NORETURN]]
 
 // The ARC rule doesn't apply in -init methods.
 - (id) initWhileTestingSelfInstanceMethod {
   self = [super init];
   [self fail];
   return self;
 }
 // CHECK-LABEL: [Derived(MyMethods) initWhileTestingSelfInstanceMethod]
-// CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* {{.*}}, i8* {{.*}}){{$}}
+// CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* {{.*}}, i8* {{.*}}) [[NOCONV]]{{$}}
 
 // Same thing applies to class methods.
 + (void) testSelfClassMethod {
   [self abort];
 }
 // CHECK-LABEL: [Derived(MyMethods) testSelfClassMethod]
-// CHECK-MRC: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* {{.*}}, i8* {{.*}}){{$}}
+// CHECK-MRC: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* {{.*}}, i8* {{.*}}) [[NOCONV]]{{$}}
 // CHECK-ARC: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* {{.*}}, i8* {{.*}}) [[NORETURN]]
 
 // Super invocations may never be used with a null pointer; this is a
 // constraint on user code when it isn't enforced by the ARC const-self
 // rule.
 - (void) testSuperInstanceMethod {
   [super fail];
 }
 // CHECK-LABEL: [Derived(MyMethods) testSuperInstanceMethod]
 // CHECK: call void bitcast (i8* ([[SUPER_T:%.*]]*, i8*, ...)* @objc_msgSendSuper2 to void ([[SUPER_T]]*, i8*)*)([[SUPER_T]]* {{.*}}, i8* {{.*}}) [[NORETURN]]
 
 + (void) testSuperClassMethod {
   [super abort];
 }
 // CHECK-LABEL: [Derived(MyMethods) testSuperClassMethod]
 // CHECK: call void bitcast (i8* ([[SUPER_T]]*, i8*, ...)* @objc_msgSendSuper2 to void ([[SUPER_T]]*, i8*)*)([[SUPER_T]]* {{.*}}, i8* {{.*}}) [[NORETURN]]
 @end
 
-// CHECK: attributes [[NORETURN]] = { noreturn }
+// CHECK-DAG: attributes [[NORETURN]] = { noconvergent noreturn }
+// CHECK-DAG: attributes [[NOCONV]] = { noconvergent }
+
 
 

clang/test/CodeGenObjC/attr-objc-runtime-visible.m

 // RUN: %clang_cc1 -triple x86_64-apple-darwin -fobjc-runtime=macosx-10.9.0 -emit-llvm %s -o - | FileCheck %s
 
 // RUN: %clang_cc1 -triple i386-apple-darwin -fobjc-runtime=macosx-fragile-10.9.0 -emit-llvm %s -o - | FileCheck %s
 
 @interface Root
 +(Class)class;
 @end
 
 __attribute__((objc_runtime_visible))
 __attribute__((objc_runtime_name("MyRuntimeVisibleClass")))
 @interface A : Root
 @end
 
 // CHECK: [[CLASSNAME:@.*]] = private unnamed_addr constant [22 x i8] c"MyRuntimeVisibleClass
 // CHECK: define i8* @getClass() #0 {
 Class getClass(void) {
-  // CHECK: call i8* @objc_lookUpClass(i8* getelementptr inbounds ([22 x i8], [22 x i8]* [[CLASSNAME]], i32 0, i32 0)) #2
+  // CHECK: call i8* @objc_lookUpClass(i8* getelementptr inbounds ([22 x i8], [22 x i8]* [[CLASSNAME]], i32 0, i32 0)) #3
   return [A class];
 }
+
+// CHECK: declare i8* @objc_lookUpClass(i8*) [[NOCONVERGENT:#[0-9]+]]
+
+// CHECK: attributes [[NOCONVERGENT]] = { noconvergent }

clang/test/CodeGenObjC/class-stubs.m

 // CHECK:        [[DEST:%.*]] = getelementptr inbounds %struct._objc_super, %struct._objc_super* [[SUPER]], i32 0, i32 1
 // CHECK:        store i8* [[CAST_CLASS_REF]], i8** [[DEST]], align 8
 // CHECK:        call void bitcast (i8* (%struct._objc_super*, i8*, ...)* @objc_msgSendSuper2 to void (%struct._objc_super*, i8*)*)(%struct._objc_super* [[SUPER]], i8* {{%.*}})
 // CHECK:        ret void
 
 @end
 
 // -- calls to objc_loadClassRef() are readnone
-// CHECK: attributes [[ATTRLIST]] = { nounwind nonlazybind readnone }
+// CHECK: attributes [[ATTRLIST]] = { noconvergent nounwind nonlazybind readnone }

clang/test/CodeGenObjC/gnu-exceptions.m

@try {
     // NEW-ABI: objc_end_catch
 
     log(0);
   }
 
   log(1);
 }
 
-// CHECK: attributes [[TF]] = { noinline optnone "{{.*}} }
+// CHECK: attributes [[TF]] = { noconvergent noinline optnone "{{.*}} }

clang/test/CodeGenObjC/nonlazy-msgSend.m

 // RUN: %clang_cc1 -triple x86_64-apple-darwin9 -fobjc-runtime=macosx-fragile-10.5 -emit-llvm %s -o - | FileCheck %s
 
 // CHECK: declare i8* @objc_msgSend(i8*, i8*, ...) [[NLB:#[0-9]+]]
 void f0(id x) {
   [x foo];
 }
 
-// CHECK: attributes [[NLB]] = { nonlazybind }
+// CHECK: attributes [[NLB]] = { noconvergent nonlazybind }

clang/test/CodeGenObjC/objc-literal-debugger-test.m

#if __has_feature(objc_boxed_expressions)
   b = @("hello");
 #else
 #error "boxed expressions not supported"
 #endif
 }
 
 // CHECK: declare i8* @objc_msgSend(i8*, i8*, ...) [[NLB:#[0-9]+]]
 
-// CHECK: attributes [[NLB]] = { nonlazybind }
+// CHECK: attributes [[NLB]] = { noconvergent nonlazybind }

clang/test/CodeGenObjC/objc-literal-tests.m

int main() {
   // CHECK: call{{.*}}@objc_msgSend{{.*}}i8 signext 1
   NSNumber *yesNumber = @__objc_yes;
   // CHECK: call{{.*}}@objc_msgSend{{.*}}i8 signext 0
   NSNumber *noNumber = @__objc_no;
   // CHECK: call{{.*}}@objc_msgSend{{.*}}i8 signext 1
   NSNumber *yesNumber1 = @YES;
   // CHECK: call{{.*}}@objc_msgSend{{.*}}i8 signext 0
   NSNumber *noNumber1 = @NO;
-NSDictionary *dictionary = @{@"name" : NSUserName(), 
-                             @"date" : [NSDate date] }; 
+NSDictionary *dictionary = @{@"name" : NSUserName(),
+                             @"date" : [NSDate date] };
   return __objc_yes == __objc_no;
 }
 
 // rdar://10579122
 typedef BOOL (^foo)(void);
 extern void bar(foo a);
 
 void baz(void) {
   bar(^(void) { return YES; });
 }
 
-// CHECK: attributes [[NUW]] = { noinline {{(norecurse )?}}nounwind{{.*}} }
+// CHECK: attributes [[NUW]] = { noconvergent noinline {{(norecurse )?}}nounwind{{.*}} }

clang/test/CodeGenObjCXX/arc-marker-funclet.mm

 // RUN: %clang_cc1 -triple i686-unknown-windows-msvc -fobjc-runtime=ios-6.0 -fobjc-arc \
 // RUN:   -fexceptions -fcxx-exceptions -emit-llvm -o - %s | FileCheck %s
 
 id f();
 void g() {
   try {
     f();
   } catch (...) {
     f();
   }
 }
 
-// CHECK: call i8* @"?f@@YAPAUobjc_object@@XZ"() [ "funclet"(token %1) ]
+// CHECK: call i8* @"?f@@YAPAUobjc_object@@XZ"() [[NOCONV:#[0-9]+]] [ "funclet"(token %1) ]
 // CHECK-NEXT: call void asm sideeffect "movl{{.*}}%ebp, %ebp{{.*}}", ""() [ "funclet"(token %1) ]
 
 // The corresponding f() call was invoked from the entry basic block.
 // CHECK: call void asm sideeffect "movl{{.*}}%ebp, %ebp{{.*}}", ""(){{$}}
+
+// CHECK: [[NOCONV]] = { noconvergent }

clang/test/CodeGenObjCXX/lambda-expressions.mm

 void test() {
   void (*p)(Weak) = [](Weak a) { };
 }
 
 };
 
 #endif
 
-// ARC: attributes [[NUW]] = { noinline nounwind{{.*}} }
-// MRC: attributes [[NUW]] = { noinline nounwind{{.*}} }
+// ARC: attributes [[NUW]] = { noconvergent noinline nounwind{{.*}} }
+// MRC: attributes [[NUW]] = { noconvergent noinline nounwind{{.*}} }

clang/test/CodeGenOpenCL/amdgpu-attrs.cl

 // NONAMDHSA-NOT: "amdgpu-implicitarg-num-bytes"
 
 // CHECK-NOT: "amdgpu-flat-work-group-size"="0,0"
 // CHECK-NOT: "amdgpu-waves-per-eu"="0"
 // CHECK-NOT: "amdgpu-waves-per-eu"="0,0"
 // CHECK-NOT: "amdgpu-num-sgpr"="0"
 // CHECK-NOT: "amdgpu-num-vgpr"="0"
 
-// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64]] = { convergent noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-implicitarg-num-bytes"="56"
-// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_64_64]] = { convergent noinline nounwind optnone "amdgpu-flat-work-group-size"="64,64" "amdgpu-implicitarg-num-bytes"="56"
-// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_16_128]] = { convergent noinline nounwind optnone "amdgpu-flat-work-group-size"="16,128" "amdgpu-implicitarg-num-bytes"="56"
-
-// CHECK-DAG: attributes [[WAVES_PER_EU_2]] = { convergent noinline nounwind optnone "amdgpu-flat-work-group-size"="1,256"  "amdgpu-implicitarg-num-bytes"="56" "amdgpu-waves-per-eu"="2"
-
-// CHECK-DAG: attributes [[WAVES_PER_EU_2_4]] = { convergent noinline nounwind optnone "amdgpu-flat-work-group-size"="1,256" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-waves-per-eu"="2,4"
-// CHECK-DAG: attributes [[NUM_SGPR_32]] = { convergent noinline nounwind optnone "amdgpu-flat-work-group-size"="1,256" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-num-sgpr"="32"
-// CHECK-DAG: attributes [[NUM_VGPR_64]] = { convergent noinline nounwind optnone "amdgpu-flat-work-group-size"="1,256" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-num-vgpr"="64"
-
-// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2]] = { convergent noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-waves-per-eu"="2"
-// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4]] = { convergent noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-waves-per-eu"="2,4"
-// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_NUM_SGPR_32]] = { convergent noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-num-sgpr"="32"
-// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_NUM_VGPR_64]] = { convergent noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-num-vgpr"="64"
-// CHECK-DAG: attributes [[WAVES_PER_EU_2_NUM_SGPR_32]] = { convergent noinline nounwind optnone "amdgpu-flat-work-group-size"="1,256" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-num-sgpr"="32" "amdgpu-waves-per-eu"="2"
-// CHECK-DAG: attributes [[WAVES_PER_EU_2_NUM_VGPR_64]] = { convergent noinline nounwind optnone "amdgpu-flat-work-group-size"="1,256" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2"
-// CHECK-DAG: attributes [[WAVES_PER_EU_2_4_NUM_SGPR_32]] = { convergent noinline nounwind optnone "amdgpu-flat-work-group-size"="1,256" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-num-sgpr"="32" "amdgpu-waves-per-eu"="2,4"
-// CHECK-DAG: attributes [[WAVES_PER_EU_2_4_NUM_VGPR_64]] = { convergent noinline nounwind optnone "amdgpu-flat-work-group-size"="1,256" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2,4"
-// CHECK-DAG: attributes [[NUM_SGPR_32_NUM_VGPR_64]] = { convergent noinline nounwind optnone "amdgpu-flat-work-group-size"="1,256" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-num-sgpr"="32" "amdgpu-num-vgpr"="64"
-
-// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_NUM_SGPR_32]] = { convergent noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-num-sgpr"="32" "amdgpu-waves-per-eu"="2"
-// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_NUM_VGPR_64]] = { convergent noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2"
-// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4_NUM_SGPR_32]] = { convergent noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-num-sgpr"="32" "amdgpu-waves-per-eu"="2,4"
-// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4_NUM_VGPR_64]] = { convergent noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2,4"
+// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-implicitarg-num-bytes"="56"
+// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_64_64]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="64,64" "amdgpu-implicitarg-num-bytes"="56"
+// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_16_128]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="16,128" "amdgpu-implicitarg-num-bytes"="56"
+
+// CHECK-DAG: attributes [[WAVES_PER_EU_2]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="1,256"  "amdgpu-implicitarg-num-bytes"="56" "amdgpu-waves-per-eu"="2"
+
+// CHECK-DAG: attributes [[WAVES_PER_EU_2_4]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="1,256" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-waves-per-eu"="2,4"
+// CHECK-DAG: attributes [[NUM_SGPR_32]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="1,256" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-num-sgpr"="32"
+// CHECK-DAG: attributes [[NUM_VGPR_64]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="1,256" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-num-vgpr"="64"
+
+// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-waves-per-eu"="2"
+// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-waves-per-eu"="2,4"
+// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_NUM_SGPR_32]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-num-sgpr"="32"
+// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_NUM_VGPR_64]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-num-vgpr"="64"
+// CHECK-DAG: attributes [[WAVES_PER_EU_2_NUM_SGPR_32]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="1,256" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-num-sgpr"="32" "amdgpu-waves-per-eu"="2"
+// CHECK-DAG: attributes [[WAVES_PER_EU_2_NUM_VGPR_64]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="1,256" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2"
+// CHECK-DAG: attributes [[WAVES_PER_EU_2_4_NUM_SGPR_32]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="1,256" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-num-sgpr"="32" "amdgpu-waves-per-eu"="2,4"
+// CHECK-DAG: attributes [[WAVES_PER_EU_2_4_NUM_VGPR_64]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="1,256" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2,4"
+// CHECK-DAG: attributes [[NUM_SGPR_32_NUM_VGPR_64]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="1,256" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-num-sgpr"="32" "amdgpu-num-vgpr"="64"
+
+// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_NUM_SGPR_32]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-num-sgpr"="32" "amdgpu-waves-per-eu"="2"
+// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_NUM_VGPR_64]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2"
+// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4_NUM_SGPR_32]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-num-sgpr"="32" "amdgpu-waves-per-eu"="2,4"
+// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4_NUM_VGPR_64]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2,4"
 
-// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_NUM_SGPR_32_NUM_VGPR_64]] = { convergent noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-num-sgpr"="32" "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2"
-// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4_NUM_SGPR_32_NUM_VGPR_64]] = { convergent noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-num-sgpr"="32" "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2,4"
+// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_NUM_SGPR_32_NUM_VGPR_64]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-num-sgpr"="32" "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2"
+// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64_WAVES_PER_EU_2_4_NUM_SGPR_32_NUM_VGPR_64]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="32,64" "amdgpu-implicitarg-num-bytes"="56" "amdgpu-num-sgpr"="32" "amdgpu-num-vgpr"="64" "amdgpu-waves-per-eu"="2,4"
 
-// CHECK-DAG: attributes [[A_FUNCTION]] = { convergent noinline nounwind optnone "correctly-rounded-divide-sqrt-fp-math"="false"
-// CHECK-DAG: attributes [[DEFAULT_KERNEL_ATTRS]] = { convergent noinline nounwind optnone "amdgpu-flat-work-group-size"="1,256" "amdgpu-implicitarg-num-bytes"="56"
+// CHECK-DAG: attributes [[A_FUNCTION]] = { noinline nounwind optnone "correctly-rounded-divide-sqrt-fp-math"="false"
+// CHECK-DAG: attributes [[DEFAULT_KERNEL_ATTRS]] = { noinline nounwind optnone "amdgpu-flat-work-group-size"="1,256" "amdgpu-implicitarg-num-bytes"="56"

clang/test/CodeGenOpenCL/builtins-amdgcn.cl

 
 // CHECK-LABEL: @test_cubema(
 // CHECK: call float @llvm.amdgcn.cubema(float %a, float %b, float %c)
 void test_cubema(global float* out, float a, float b, float c) {
   *out = __builtin_amdgcn_cubema(a, b, c);
 }
 
 // CHECK-LABEL: @test_read_exec(
-// CHECK: call i64 @llvm.read_register.i64(metadata ![[$EXEC:[0-9]+]]) #[[$READ_EXEC_ATTRS:[0-9]+]]
+// CHECK: call i64 @llvm.read_register.i64(metadata ![[$EXEC:[0-9]+]]){{$}}
 void test_read_exec(global ulong* out) {
   *out = __builtin_amdgcn_read_exec();
 }
 
 // CHECK: declare i64 @llvm.read_register.i64(metadata) #[[$NOUNWIND_READONLY:[0-9]+]]
 
 // CHECK-LABEL: @test_read_exec_lo(
-// CHECK: call i32 @llvm.read_register.i32(metadata ![[$EXEC_LO:[0-9]+]]) #[[$READ_EXEC_ATTRS]]
+// CHECK: call i32 @llvm.read_register.i32(metadata ![[$EXEC_LO:[0-9]+]]){{$}}
 void test_read_exec_lo(global uint* out) {
   *out = __builtin_amdgcn_read_exec_lo();
 }
 
 // CHECK-LABEL: @test_read_exec_hi(
-// CHECK: call i32 @llvm.read_register.i32(metadata ![[$EXEC_HI:[0-9]+]]) #[[$READ_EXEC_ATTRS]]
+// CHECK: call i32 @llvm.read_register.i32(metadata ![[$EXEC_HI:[0-9]+]]){{$}}
 void test_read_exec_hi(global uint* out) {
   *out = __builtin_amdgcn_read_exec_hi();
 }
 
 // CHECK-LABEL: @test_dispatch_ptr
 // CHECK: call i8 addrspace(4)* @llvm.amdgcn.dispatch.ptr()
 void test_dispatch_ptr(__constant unsigned char ** out)
 {

 // CHECK-LABEL: test_mqsad_u32_u8(
 // CHECK: call <4 x i32> @llvm.amdgcn.mqsad.u32.u8(i64 %src0, i32 %src1, <4 x i32> %src2)
 kernel void test_mqsad_u32_u8(global uint4* out, ulong src0, uint src1, uint4 src2) {
   *out = __builtin_amdgcn_mqsad_u32_u8(src0, src1, src2);
 }
 
 // CHECK-DAG: [[$WI_RANGE]] = !{i32 0, i32 1024}
 // CHECK-DAG: attributes #[[$NOUNWIND_READONLY:[0-9]+]] = { nounwind readonly }
-// CHECK-DAG: attributes #[[$READ_EXEC_ATTRS]] = { convergent }
 // CHECK-DAG: ![[$EXEC]] = !{!"exec"}
 // CHECK-DAG: ![[$EXEC_LO]] = !{!"exec_lo"}
 // CHECK-DAG: ![[$EXEC_HI]] = !{!"exec_hi"}

clang/test/CodeGenOpenCL/convergent.cl

 // RUN: %clang_cc1 -triple spir-unknown-unknown -emit-llvm %s -o - -fno-experimental-new-pass-manager | opt -instnamer -S | FileCheck -enable-var-scope %s --check-prefixes=CHECK,CHECK-LEGACY
 // RUN: %clang_cc1 -triple spir-unknown-unknown -emit-llvm %s -o - -fexperimental-new-pass-manager | opt -instnamer -S | FileCheck -enable-var-scope %s --check-prefixes=CHECK,CHECK-NEWPM
 
 // This is initially assumed convergent, but can be deduced to not require it.
 
 // CHECK-LABEL: define spir_func void @non_convfun() local_unnamed_addr #0
 // CHECK: ret void
 __attribute__((noinline))
 void non_convfun(void) {
   volatile int* p;
   *p = 0;
 }
 
-void convfun(void) __attribute__((convergent));
+void convfun(void);
 void nodupfun(void) __attribute__((noduplicate));
 
 // External functions should be assumed convergent.
 void f(void);
 void g(void);
 
 // Test two if's are merged and non_convfun duplicated.
 // The LLVM IR is equivalent to:
 //    if (a) {
 //      f();
 //      non_convfun();
 //      g();
 //    } else {
 //      non_convfun();
 //    }
 //
 // CHECK-LABEL: define spir_func void @test_merge_if(i32 %a) local_unnamed_addr #1 {
 // CHECK: %[[tobool:.+]] = icmp eq i32 %a, 0
 // CHECK: br i1 %[[tobool]], label %[[if_end3_critedge:.+]], label %[[if_then:.+]]
 
-// CHECK: [[if_then]]:
-// CHECK: tail call spir_func void @f()
+// CHECK: [[if_end3_critedge]]:
 // CHECK: tail call spir_func void @non_convfun()
-// CHECK: tail call spir_func void @g()
-
 // CHECK: br label %[[if_end3:.+]]
 
-// CHECK: [[if_end3_critedge]]:
+// CHECK: [[if_then]]:
+// CHECK: tail call spir_func void @f()
 // CHECK: tail call spir_func void @non_convfun()
+// CHECK: tail call spir_func void @g()
 // CHECK: br label %[[if_end3]]
 
 // CHECK: [[if_end3]]:
 // CHECK: ret void
 
 void test_merge_if(int a) {
   if (a) {
     f();

 
 // CHECK-LABEL: @assume_convergent_asm
 // CHECK: tail call void asm sideeffect "s_barrier", ""() #5
 kernel void assume_convergent_asm()
 {
   __asm__ volatile("s_barrier");
 }
 
-// CHECK: attributes #0 = { nofree noinline norecurse nounwind "
-// CHECK: attributes #1 = { {{[^}]*}}convergent{{[^}]*}} }
-// CHECK: attributes #2 = { {{[^}]*}}convergent{{[^}]*}} }
-// CHECK: attributes #3 = { {{[^}]*}}convergent noduplicate{{[^}]*}} }
-// CHECK: attributes #4 = { {{[^}]*}}convergent{{[^}]*}} }
-// CHECK: attributes #5 = { {{[^}]*}}convergent{{[^}]*}} }
-// CHECK: attributes #6 = { {{[^}]*}}convergent noduplicate{{[^}]*}} }
+// CHECK: attributes #0 = { noconvergent nofree noinline norecurse nounwind "
+// CHECK: attributes #1 = { nounwind "
+// CHECK: attributes #2 = { "
+// CHECK: attributes #3 = { noduplicate "
+// CHECK: attributes #4 = { nounwind "
+// CHECK: attributes #5 = { nounwind }
+// CHECK: attributes #6 = { noduplicate nounwind }

clang/test/CodeGenOpenCL/func-call-dbg-loc.cl

-// RUN: %clang_cc1 -triple amdgcn---amdgizcl -debug-info-kind=limited -O0 -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple amdgcn-- -debug-info-kind=limited -O0 -emit-llvm -o - %s | FileCheck %s
 
 typedef struct
 {
     int a;
 } Struct;
 
 Struct func1();
 
 void func2(Struct S);
 
 void func3()
 {
-    // CHECK: call i32 @func1() #{{[0-9]+}}, !dbg ![[LOC:[0-9]+]]
-    // CHECK: call void @func2(i32 %{{[0-9]+}}) #{{[0-9]+}}, !dbg ![[LOC]]
+    // CHECK: call i32 @func1(), !dbg ![[LOC:[0-9]+]]
+    // CHECK: call void @func2(i32 %{{[0-9]+}}), !dbg ![[LOC]]
     func2(func1());
 }
 

clang/test/CodeGenOpenCLCXX/template-address-spaces.cl

 // RUN: %clang_cc1 -cl-std=clc++ %s -emit-llvm -o - -O0 -triple spir-unknown-unknown | FileCheck %s
 
 template <typename T>
 struct S{
   T a;
   T foo();
 };
 
 template<typename T>
 T S<T>::foo() { return a;}
 
 // CHECK: %struct.S = type { i32 }
 // CHECK: %struct.S.0 = type { i32 addrspace(4)* }
 // CHECK: %struct.S.1 = type { i32 addrspace(1)* }
 
 // CHECK:  [[A1:%[.a-z0-9]+]] = addrspacecast %struct.S* %{{[a-z0-9]+}} to %struct.S addrspace(4)*
-// CHECK:  %call = call spir_func i32 @_ZNU3AS41SIiE3fooEv(%struct.S addrspace(4)* [[A1]]) #1
+// CHECK:  %call = call spir_func i32 @_ZNU3AS41SIiE3fooEv(%struct.S addrspace(4)* [[A1]])
 // CHECK:  [[A2:%[.a-z0-9]+]] = addrspacecast %struct.S.0* %{{[a-z0-9]+}} to %struct.S.0 addrspace(4)*
-// CHECK:  %call1 = call spir_func i32 addrspace(4)* @_ZNU3AS41SIPU3AS4iE3fooEv(%struct.S.0 addrspace(4)* [[A2]]) #1
+// CHECK:  %call1 = call spir_func i32 addrspace(4)* @_ZNU3AS41SIPU3AS4iE3fooEv(%struct.S.0 addrspace(4)* [[A2]])
 // CHECK:  [[A3:%[.a-z0-9]+]] = addrspacecast %struct.S.1* %{{[a-z0-9]+}} to %struct.S.1 addrspace(4)*
-// CHECK:  %call2 = call spir_func i32 addrspace(1)* @_ZNU3AS41SIPU3AS1iE3fooEv(%struct.S.1 addrspace(4)* [[A3]]) #1
+// CHECK:  %call2 = call spir_func i32 addrspace(1)* @_ZNU3AS41SIPU3AS1iE3fooEv(%struct.S.1 addrspace(4)* [[A3]])
 
 void bar(){
   S<int> sint;
   S<int*> sintptr;
   S<__global int*> sintptrgl;
 
   sint.foo();
   sintptr.foo();
   sintptrgl.foo();
 }

clang/test/Driver/darwin-iphone-defaults.m

 @interface I1
 +(id) alloc;
 @end
 
 void f1() {
   [I1 alloc];
 }
 
-// CHECK: attributes [[F0]] = { noinline  optnone ssp{{.*}} }
+// CHECK: attributes [[F0]] = { noconvergent noinline optnone ssp{{.*}} }

clang/test/OpenMP/nvptx_parallel_codegen.cpp

 // CHECK-LABEL: define {{.*}}void {{@__omp_offloading_.+template.+l26}}_worker()
 // CHECK-DAG: [[OMP_EXEC_STATUS:%.+]] = alloca i8,
 // CHECK-DAG: [[OMP_WORK_FN:%.+]] = alloca i8*,
 // CHECK: store i8* null, i8** [[OMP_WORK_FN]],
 // CHECK: store i8 0, i8* [[OMP_EXEC_STATUS]],
 // CHECK: br label {{%?}}[[AWAIT_WORK:.+]]
 //
 // CHECK: [[AWAIT_WORK]]
-// CHECK: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) #[[#CONVERGENT:]]
+// CHECK: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0){{$}}
 // CHECK: [[KPR:%.+]] = call i1 @__kmpc_kernel_parallel(i8** [[OMP_WORK_FN]]
 // CHECK: [[KPRB:%.+]] = zext i1 [[KPR]] to i8
 // store i8 [[KPRB]], i8* [[OMP_EXEC_STATUS]], align 1
 // CHECK: [[WORK:%.+]] = load i8*, i8** [[OMP_WORK_FN]],
 // CHECK: [[SHOULD_EXIT:%.+]] = icmp eq i8* [[WORK]], null
 // CHECK: br i1 [[SHOULD_EXIT]], label {{%?}}[[EXIT:.+]], label {{%?}}[[SEL_WORKERS:.+]]
 //
 // CHECK: [[SEL_WORKERS]]

 // CHECK: br label {{%?}}[[EXIT]]
 //
 // CHECK: [[EXIT]]
 // CHECK: ret void
 
 // CHECK: define internal void [[PARALLEL_FN4]](
 // CHECK: [[A:%.+]] = alloca i[[SZ:32|64]],
 // CHECK: store i[[SZ]] 45, i[[SZ]]* %a,
-// CHECK: call void @__kmpc_barrier(%struct.ident_t* @{{.+}}, i32 %{{.+}}) #[[#CONVERGENT:]]
+// CHECK: call void @__kmpc_barrier(%struct.ident_t* @{{.+}}, i32 %{{.+}}){{$}}
 // CHECK: ret void
 
-// CHECK: declare void @__kmpc_barrier(%struct.ident_t*, i32) #[[#CONVERGENT]]
+// CHECK: declare void @__kmpc_barrier(%struct.ident_t*, i32){{$}}
 
 // CHECK-LABEL: define {{.*}}void {{@__omp_offloading_.+template.+l55}}_worker()
 // CHECK-LABEL: define {{.*}}void {{@__omp_offloading_.+template.+l55}}(
 // CHECK-32: [[A_ADDR:%.+]] = alloca i32,
 // CHECK-64: [[A_ADDR:%.+]] = alloca i64,
 // CHECK-64: [[CONV:%.+]] = bitcast i64* [[A_ADDR]] to i32*
 // CHECK: [[IS_SHARED:%.+]] = load i16, i16* [[KERNEL_SHARED]],
 // CHECK: [[SIZE:%.+]] = load i{{64|32}}, i{{64|32}}* [[KERNEL_SIZE]],

 // CHECK:  call void @__kmpc_end_critical(
 
 // CHECK:  call void @__kmpc_syncwarp(i32 [[MASK]]){{$}}
 // CHECK:  [[NEW_CC_VAL:%.+]] = add nsw i32 [[CC_VAL]], 1
 // CHECK:  store i32 [[NEW_CC_VAL]], i32* [[CC]],
 // CHECK:  br label
 
 
-// CHECK: declare i32 @__kmpc_warp_active_thread_mask() #[[#CONVERGENT:]]
-// CHECK: declare void @__kmpc_syncwarp(i32) #[[#CONVERGENT:]]
-
-// CHECK: attributes #[[#CONVERGENT]] = {{.*}} convergent {{.*}}
+// no noconvergent attribute
+// CHECK: declare i32 @__kmpc_warp_active_thread_mask(){{$}}
+// CHECK: declare void @__kmpc_syncwarp(i32){{$}}
 
 #endif

clang/test/OpenMP/openmp_win_codegen.cpp

 // CHECK: call void @__kmpc_critical(%struct.ident_t* {{.*}}@0, i32 [[GID:%.+]],
 // CHECK: invoke void @{{.+}}bar
 // CHECK: call void @__kmpc_end_critical(%struct.ident_t* {{.*}}@0, i32 [[GID]],
 // CHECK: catchret from [[CATCHPAD]] to
 // CHECK:      cleanuppad within [[CATCHPAD]] []
 // CHECK-NEXT: call void @__kmpc_end_critical(%struct.ident_t* {{.*}}@0, i32 [[GID]],
 // CHECK-NEXT: cleanupret from {{.*}} unwind label %[[CATCHTERM:[^ ]+]]
 // CHECK:      cleanuppad within none []
-// CHECK-NEXT: call void @"?terminate@@YAXXZ"() #5 [ "funclet"(token %{{.*}}) ]
+// CHECK-NEXT: call void @"?terminate@@YAXXZ"() #{{[0-9]+}} [ "funclet"(token %{{.*}}) ]
 // CHECK-NEXT: unreachable
 // CHECK:      [[CATCHTERM]]
 // CHECK-NEXT: cleanuppad within [[CATCHPAD]] []
-// CHECK-NEXT: call void @"?terminate@@YAXXZ"() #5 [ "funclet"(token %{{.*}}) ]
+// CHECK-NEXT: call void @"?terminate@@YAXXZ"() #{{[0-9]+}} [ "funclet"(token %{{.*}}) ]
 // CHECK-NEXT: unreachable

clang/test/PCH/objc_container.m

 // Test this without pch.
 // RUN: %clang_cc1 -include %S/objc_container.h -fsyntax-only -verify %s
 
 // Test with pch.
 // RUN: %clang_cc1 -x objective-c -emit-pch -o %t %S/objc_container.h
-// RUN: %clang_cc1 -include-pch %t -fsyntax-only -verify %s 
+// RUN: %clang_cc1 -include-pch %t -fsyntax-only -verify %s
 // RUN: %clang_cc1 -include-pch %t -ast-print %s | FileCheck -check-prefix=CHECK-PRINT %s
 // RUN: %clang_cc1 -include-pch %t -emit-llvm -o - %s | FileCheck -check-prefix=CHECK-IR %s
 
 // expected-no-diagnostics
 
 // CHECK-PRINT: id oldObject = array[10];
 // CHECK-PRINT: array[10] = oldObject;
 // CHECK-PRINT: oldObject = dictionary[key];
 // CHECK-PRINT: dictionary[key] = newObject;
 
 // CHECK-IR: define {{.*}}void @all() #0
 // CHECK-IR: {{call.*objc_msgSend}}
 // CHECK-IR: {{call.*objc_msgSend}}
 // CHECK-IR: {{call.*objc_msgSend}}
 // CHECK-IR: {{call.*objc_msgSend}}
 // CHECK-IR: ret void
 
-// CHECK-IR: attributes #0 = { noinline nounwind {{.*}} }
-// CHECK-IR: attributes #1 = { nonlazybind }
+// CHECK-IR: attributes #0 = { noconvergent noinline nounwind {{.*}} }
+// CHECK-IR: attributes #1 = { noconvergent nonlazybind }

clang/test/Sema/libbuiltins-ctype-powerpc64.c

 // CHECK: declare signext i32 @isprint(i32 signext) [[NUW_RO:#[0-9]+]]
 // CHECK: declare signext i32 @ispunct(i32 signext) [[NUW_RO:#[0-9]+]]
 // CHECK: declare signext i32 @isspace(i32 signext) [[NUW_RO:#[0-9]+]]
 // CHECK: declare signext i32 @isupper(i32 signext) [[NUW_RO:#[0-9]+]]
 // CHECK: declare signext i32 @isxdigit(i32 signext) [[NUW_RO:#[0-9]+]]
 // CHECK: declare signext i32 @tolower(i32 signext) [[NUW_RO:#[0-9]+]]
 // CHECK: declare signext i32 @toupper(i32 signext) [[NUW_RO:#[0-9]+]]
 
-// CHECK: attributes [[NUW_RO]] = { nounwind readonly{{.*}} }
-// CHECK: attributes [[NUW_RO_CALL]] = { nounwind readonly }
+// CHECK: attributes [[NUW_RO]] = { noconvergent nounwind readonly{{.*}} }
+// CHECK: attributes [[NUW_RO_CALL]] = { noconvergent nounwind readonly }

clang/test/Sema/libbuiltins-ctype-x86_64.c

 // CHECK: declare i32 @isprint(i32) [[NUW_RO:#[0-9]+]]
 // CHECK: declare i32 @ispunct(i32) [[NUW_RO:#[0-9]+]]
 // CHECK: declare i32 @isspace(i32) [[NUW_RO:#[0-9]+]]
 // CHECK: declare i32 @isupper(i32) [[NUW_RO:#[0-9]+]]
 // CHECK: declare i32 @isxdigit(i32) [[NUW_RO:#[0-9]+]]
 // CHECK: declare i32 @tolower(i32) [[NUW_RO:#[0-9]+]]
 // CHECK: declare i32 @toupper(i32) [[NUW_RO:#[0-9]+]]
 
-// CHECK: attributes [[NUW_RO]] = { nounwind readonly{{.*}} }
-// CHECK: attributes [[NUW_RO_CALL]] = { nounwind readonly }
+// CHECK: attributes [[NUW_RO]] = { noconvergent nounwind readonly{{.*}} }
+// CHECK: attributes [[NUW_RO_CALL]] = { noconvergent nounwind readonly }

clang/test/SemaCXX/pragma-optimize.cpp

 
 // This instantiation of the "thrice" template function with a "float" type
 // will have an `optnone` attribute because the template definition was
 // affected by the pragma.
 float container2 (float par) {
     return thrice(par);
 }
 // CHECK-DAG: @_Z10container2f{{.*}} [[ATTRCONTAINER2:#[0-9]+]]
-// CHECK-DAG: @_Z6thriceIfET_S0_{{.*}} [[ATTRTHRICEFLOAT:#[0-9]+]]
+// CHECK-DAG: define linkonce_odr float @_Z6thriceIfET_S0_{{.*}} [[ATTRTHRICEFLOAT:#[0-9]+]]
 
 
 // A template specialization is a new definition and it will not be
 // decorated with an `optnone` attribute because it is now outside of the
 // affected region.
 template<> int thrice(int par) {
     return (par << 1) + par;
 }

llvm/docs/Frontend/PerformanceTips.rst

 
 #. Use the lifetime.start/lifetime.end and invariant.start/invariant.end
    intrinsics where possible.  Common profitable uses are for stack like data
    structures (thus allowing dead store elimination) and for describing
    life times of allocas (thus allowing smaller stack sizes).
 
 #. Mark invariant locations using !invariant.load and TBAA's constant flags
 
+Convergence
+^^^^^^^^^^^^^^^^^^^^^^^^
+
+#. By default functions are assumed to potentially use operations
+   which have data parallel semantics, referred to as
+   convergent. These apply to certain classes of synchronization and
+   parallel communication operations, such as appear in GPUs
+   (e.g. OpenCL barrier or subgroup operations) . For languages that
+   do not have data parallel semantics, the ``noconvergent`` attribute
+   should be added to all functions to avoid pessimizing control flow
+   optimizations that may break convergent operations.
+
 Pass Ordering
 ^^^^^^^^^^^^^
 
 One of the most common mistakes made by new language frontend projects is to
 use the existing -O2 or -O3 pass pipelines as is.  These pass pipelines make a
 good starting point for an optimizing compiler for any language, but they have
 been carefully tuned for C and C++, not your target language.  You will almost
 certainly need to use a custom pass order to achieve optimal performance.  A

llvm/docs/LangRef.rst

 
 The argument list is a comma separated sequence of arguments where each
 argument is of the following form:
 
 Syntax::
 
    <type> [parameter Attrs] [name]
 
+  .. _convergence:
+
+Convergence
+---------
+
+In some parallel execution models, there exist operations that cannot
+be made control-dependent on any additional values. We call such
+operations convergent. By default, functions are assumed to have
+convergent semantics.
 
 .. _langref_aliases:
 
 Aliases
 -------
 
 Aliases, unlike function or variables, don't create any new data. They
 are just a new symbol and metadata for an existing position.
``builtin``
     uses the ``nobuiltin`` attribute. This is only valid at call sites for
     direct calls to functions that are declared with the ``nobuiltin``
     attribute.
 ``cold``
     This attribute indicates that this function is rarely called. When
     computing edge weights, basic blocks post-dominated by a cold
     function call are also considered to be cold; and, thus, given low
     weight.
-``convergent``
-    In some parallel execution models, there exist operations that cannot be
-    made control-dependent on any additional values.  We call such operations
-    ``convergent``, and mark them with this attribute.
-
-    The ``convergent`` attribute may appear on functions or call/invoke
-    instructions.  When it appears on a function, it indicates that calls to
-    this function should not be made control-dependent on additional values.
-    For example, the intrinsic ``llvm.nvvm.barrier0`` is ``convergent``, so
-    calls to this intrinsic cannot be made control-dependent on additional
+``noconvergent``
+    This indicates that the function does not call any `convergent
+    <convergence>` operations. The absence of this attributes implies
+    such operations may be called.
+
+    The ``noconvergent`` attribute may appear on functions or
+    call/invoke instructions.  When it appears on a function, it
+    indicates that calls to this function may be made
+    control-dependent on additional values.  For example, the
+    intrinsic ``llvm.nvvm.barrier0`` is not ``noconvergent``, so calls
+    to this intrinsic cannot be made control-dependent on additional
     values.
 
-    When it appears on a call/invoke, the ``convergent`` attribute indicates
-    that we should treat the call as though we're calling a convergent
+    When it appears on a call/invoke, the ``noconvergent`` attribute indicates
+    that we should treat the call as though we're calling a ``noconvergent``
     function.  This is particularly useful on indirect calls; without this we
-    may treat such calls as though the target is non-convergent.
+    may treat such calls as though the target is `convergent <convergence>`.
+
+    The optimizer may add the ``noconvergent`` attribute on functions
+    when it can prove that the function does not execute any
+    convergent operations.  Similarly, the optimizer may add
+    ``noconvergent`` on calls/invokes when it can prove that the
+    call/invoke cannot call a convergent function.
 
-    The optimizer may remove the ``convergent`` attribute on functions when it
-    can prove that the function does not execute any convergent operations.
-    Similarly, the optimizer may remove ``convergent`` on calls/invokes when it
-    can prove that the call/invoke cannot call a convergent function.
 ``inaccessiblememonly``
     This attribute indicates that the function may only access memory that
     is not accessible by the module being compiled. This is a weaker form
     of ``readnone``. If the function reads or writes other memory, the
     behavior is undefined.
 ``inaccessiblemem_or_argmemonly``
     This attribute indicates that the function may only access memory that is
     either not accessible by the module being compiled, or is pointed to

 ``willreturn``
     This function attribute indicates that a call of this function will
     either exhibit undefined behavior or comes back and continues execution
     at a point in the existing call stack that includes the current invocation.
     Annotated functions may still raise an exception, i.a., ``nounwind`` is not implied.
     If an invocation of an annotated function does not return control back
     to a point in the call stack, the behavior is undefined.
 ``nosync``
-    This function attribute indicates that the function does not communicate
-    (synchronize) with another thread through memory or other well-defined means.
-    Synchronization is considered possible in the presence of `atomic` accesses
-    that enforce an order, thus not "unordered" and "monotonic", `volatile` accesses,
-    as well as `convergent` function calls. Note that through `convergent` function calls
-    non-memory communication, e.g., cross-lane operations, are possible and are also
-    considered synchronization. However `convergent` does not contradict `nosync`.
-    If an annotated function does ever synchronize with another thread,
-    the behavior is undefined.
+    This function attribute indicates that the function does not
+    communicate (synchronize) with another thread through memory or
+    other well-defined means.  Synchronization is considered possible
+    in the presence of `atomic` accesses that enforce an order, thus
+    not "unordered" and "monotonic", `volatile` accesses, as well as
+    `convergent` function calls. Note that through `convergent`
+    function calls non-memory communication, e.g., cross-lane
+    operations, are possible and are also considered
+    synchronization. However the abcense of ``noconvergent`` does not
+    contradict `nosync`.  If an annotated function does ever
+    synchronize with another thread, the behavior is undefined.
 ``nounwind``
     This function attribute indicates that the function never raises an
     exception. If the function does raise an exception, its runtime
     behavior is undefined. However, functions marked nounwind may still
     trap or generate asynchronous exceptions. Exception handling schemes
     that are recognized by LLVM to handle asynchronous exceptions, such
     as SEH, will still provide their implementation defined semantics.
 ``"null-pointer-is-valid"``

 operations is done. The correct way to mix constrained and less constrained
 operations is to use the rounding mode and exception handling metadata to
 mark constrained intrinsics as having LLVM's default behavior.
 
 Each of these intrinsics corresponds to a normal floating-point operation. The
 data arguments and the return value are the same as the corresponding FP
 operation.
 
-The rounding mode argument is a metadata string specifying what 
-assumptions, if any, the optimizer can make when transforming constant 
-values. Some constrained FP intrinsics omit this argument. If required 
+The rounding mode argument is a metadata string specifying what
+assumptions, if any, the optimizer can make when transforming constant
+values. Some constrained FP intrinsics omit this argument. If required
 by the intrinsic, this argument must be one of the following strings:
 
 ::
 
       "round.dynamic"
       "round.tonearest"
       "round.downward"
       "round.upward"

llvm/docs/ReleaseNotes.rst

 
 * The Loop Idiom Recognition (``-loop-idiom``) pass has learned to recognize
   ``bcmp`` pattern, and convert it into a call to ``bcmp`` (or ``memcmp``)
   function.
 
 Changes to the LLVM IR
 ----------------------
 
+* Functions are now assumed to potentially have convergent semantics
+  by default. The convergent attribute has been removed, as it is now
+  the default. Languages or targets without convergent semantics
+  should add the new noconvergent attribute to all functions.
+
 * Unnamed function arguments now get printed with their automatically
   generated name (e.g. "i32 %0") in definitions. This may require front-ends
   to update their tests; if so there is a script utils/add_argument_names.py
   that correctly converted 80-90% of Clang tests. Some manual work will almost
   certainly still be needed.
 
 
 Changes to building LLVM

llvm/include/llvm/Bitcode/LLVMBitCodes.h

enum AttributeKindCodes {
   ATTR_KIND_OPT_FOR_FUZZING = 57,
   ATTR_KIND_SHADOWCALLSTACK = 58,
   ATTR_KIND_SPECULATIVE_LOAD_HARDENING = 59,
   ATTR_KIND_IMMARG = 60,
   ATTR_KIND_WILLRETURN = 61,
   ATTR_KIND_NOFREE = 62,
   ATTR_KIND_NOSYNC = 63,
   ATTR_KIND_SANITIZE_MEMTAG = 64,
+  ATTR_KIND_NOCONVERGENT = 65,
 };
 
 enum ComdatSelectionKindCodes {
   COMDAT_SELECTION_KIND_ANY = 1,
   COMDAT_SELECTION_KIND_EXACT_MATCH = 2,
   COMDAT_SELECTION_KIND_LARGEST = 3,
   COMDAT_SELECTION_KIND_NO_DUPLICATES = 4,
   COMDAT_SELECTION_KIND_SAME_SIZE = 5,

llvm/include/llvm/IR/Attributes.td

 def Builtin : EnumAttr<"builtin">;
 
 /// Pass structure by value.
 def ByVal : EnumAttr<"byval">;
 
 /// Marks function as being in a cold path.
 def Cold : EnumAttr<"cold">;
 
-/// Can only be moved to control-equivalent blocks.
-def Convergent : EnumAttr<"convergent">;
+/// Function is not a convergent intrinsic call and does not call any
+/// functions that may be convergent.
+def NoConvergent : EnumAttr<"noconvergent">;
 
 /// Pointer is known to be dereferenceable.
 def Dereferenceable : EnumAttr<"dereferenceable">;
 
 /// Pointer is either null or dereferenceable.
 def DereferenceableOrNull : EnumAttr<"dereferenceable_or_null">;
 
 /// Function may only access memory that is inaccessible from IR.

llvm/include/llvm/IR/CallSite.h

#define CALLSITE_DELEGATE_SETTER(METHOD)                                       \
   void setCannotDuplicate() {
     CALLSITE_DELEGATE_SETTER(setCannotDuplicate());
   }
 
   /// Determine if the call is convergent.
   bool isConvergent() const {
     CALLSITE_DELEGATE_GETTER(isConvergent());
   }
-  void setConvergent() {
-    CALLSITE_DELEGATE_SETTER(setConvergent());
+
+  bool isNoConvergent() const {
+    CALLSITE_DELEGATE_GETTER(isNoConvergent());
   }
-  void setNotConvergent() {
-    CALLSITE_DELEGATE_SETTER(setNotConvergent());
+
+  void setNoConvergent() {
+    CALLSITE_DELEGATE_SETTER(setNoConvergent());
   }
 
   unsigned getNumOperandBundles() const {
     CALLSITE_DELEGATE_GETTER(getNumOperandBundles());
   }
 
   bool hasOperandBundles() const {
     CALLSITE_DELEGATE_GETTER(hasOperandBundles());

llvm/include/llvm/IR/Function.h

public:
   /// Determine if the call cannot be duplicated.
   bool cannotDuplicate() const {
     return hasFnAttribute(Attribute::NoDuplicate);
   }
   void setCannotDuplicate() {
     addFnAttr(Attribute::NoDuplicate);
   }
 
-  /// Determine if the call is convergent.
-  bool isConvergent() const {
-    return hasFnAttribute(Attribute::Convergent);
+  /// Determine if the call is not convergent.
+  bool isNoConvergent() const {
+    return hasFnAttribute(Attribute::NoConvergent);
   }
-  void setConvergent() {
-    addFnAttr(Attribute::Convergent);
+
+  void setNoConvergent() {
+    addFnAttr(Attribute::NoConvergent);
   }
-  void setNotConvergent() {
-    removeFnAttr(Attribute::Convergent);
+  void setNotNoConvergent() {
+    removeFnAttr(Attribute::NoConvergent);
   }
 
   /// Determine if the call has sideeffects.
   bool isSpeculatable() const {
     return hasFnAttribute(Attribute::Speculatable);
   }
   void setSpeculatable() {
     addFnAttr(Attribute::Speculatable);

llvm/include/llvm/IR/InstrTypes.h

public:
 
   /// Determine if the invoke cannot be duplicated.
   bool cannotDuplicate() const { return hasFnAttr(Attribute::NoDuplicate); }
   void setCannotDuplicate() {
     addAttribute(AttributeList::FunctionIndex, Attribute::NoDuplicate);
   }
 
   /// Determine if the invoke is convergent
-  bool isConvergent() const { return hasFnAttr(Attribute::Convergent); }
-  void setConvergent() {
-    addAttribute(AttributeList::FunctionIndex, Attribute::Convergent);
+  bool isConvergent() const { return !hasFnAttr(Attribute::NoConvergent); }
+
+  /// Determine if the invoke is noconvergent
+  bool isNoConvergent() const { return hasFnAttr(Attribute::NoConvergent); }
+
+  void setNoConvergent() {
+    addAttribute(AttributeList::FunctionIndex, Attribute::NoConvergent);
   }
-  void setNotConvergent() {
-    removeAttribute(AttributeList::FunctionIndex, Attribute::Convergent);
+
+  void setConvergent() {
+    removeAttribute(AttributeList::FunctionIndex, Attribute::NoConvergent);
   }
 
   /// Determine if the call returns a structure through first
   /// pointer argument.
   bool hasStructRetAttr() const {
     if (getNumArgOperands() == 0)
       return false;
 

llvm/include/llvm/IR/Intrinsics.td

 
 //===--------------------- Code Generator Intrinsics ----------------------===//
 //
 def int_returnaddress : Intrinsic<[llvm_ptr_ty], [llvm_i32_ty], [IntrNoMem, ImmArg<0>]>;
 def int_addressofreturnaddress : Intrinsic<[llvm_anyptr_ty], [], [IntrNoMem]>;
 def int_frameaddress : Intrinsic<[llvm_anyptr_ty], [llvm_i32_ty], [IntrNoMem, ImmArg<0>]>;
 def int_sponentry  : Intrinsic<[llvm_anyptr_ty], [], [IntrNoMem]>;
 def int_read_register  : Intrinsic<[llvm_anyint_ty], [llvm_metadata_ty],
-                                   [IntrReadMem], "llvm.read_register">;
+                                   [IntrReadMem, IntrConvergent], "llvm.read_register">;
 def int_write_register : Intrinsic<[], [llvm_metadata_ty, llvm_anyint_ty],
-                                   [], "llvm.write_register">;
+                                   [IntrConvergent], "llvm.write_register">;
 
 // Gets the address of the local variable area. This is typically a copy of the
 // stack, frame, or base pointer depending on the type of prologue.
 def int_localaddress : Intrinsic<[llvm_ptr_ty], [], [IntrNoMem]>;
 
 // Escapes local variables to allow access from other functions.
 def int_localescape : Intrinsic<[], [llvm_vararg_ty]>;
 

llvm/include/llvm/Transforms/IPO/Attributor.h

struct AANoUnwind
 
   /// Create an abstract attribute view for the position \p IRP.
   static AANoUnwind &createForPosition(const IRPosition &IRP, Attributor &A);
 
   /// Unique ID (due to the unique address)
   static const char ID;
 };
 
+struct AANoConvergent
+    : public IRAttribute<Attribute::NoConvergent,
+                         StateWrapper<BooleanState, AbstractAttribute>> {
+  AANoConvergent(const IRPosition &IRP) : IRAttribute(IRP) {}
+
+  /// Returns true if noconvergent is assumed.
+  bool isAssumedNoConvergent() const { return getAssumed(); }
+
+  /// Returns true if noconvergent is known.
+  bool isKnownNoConvergent() const { return getKnown(); }
+
+  /// Create an abstract attribute view for the position \p IRP.
+  static AANoConvergent &createForPosition(const IRPosition &IRP, Attributor &A);
+
+  /// Unique ID (due to the unique address)
+  static const char ID;
+};
+
 struct AANoSync
     : public IRAttribute<Attribute::NoSync,
                          StateWrapper<BooleanState, AbstractAttribute>> {
   AANoSync(const IRPosition &IRP) : IRAttribute(IRP) {}
 
   /// Returns true if "nosync" is assumed.
   bool isAssumedNoSync() const { return getAssumed(); }
 

llvm/lib/AsmParser/LLLexer.cpp

#define KEYWORD(STR)                                                           \
   KEYWORD(alwaysinline);
   KEYWORD(allocsize);
   KEYWORD(argmemonly);
   KEYWORD(builtin);
   KEYWORD(byval);
   KEYWORD(inalloca);
   KEYWORD(cold);
   KEYWORD(convergent);
+  KEYWORD(noconvergent);
   KEYWORD(dereferenceable);
   KEYWORD(dereferenceable_or_null);
   KEYWORD(inaccessiblememonly);
   KEYWORD(inaccessiblemem_or_argmemonly);
   KEYWORD(inlinehint);
   KEYWORD(inreg);
   KEYWORD(jumptable);
   KEYWORD(minsize);

llvm/lib/AsmParser/LLParser.cpp

case lltok::kw_allocsize: {
         return true;
       B.addAllocSizeAttr(ElemSizeArg, NumElemsArg);
       continue;
     }
     case lltok::kw_alwaysinline: B.addAttribute(Attribute::AlwaysInline); break;
     case lltok::kw_argmemonly: B.addAttribute(Attribute::ArgMemOnly); break;
     case lltok::kw_builtin: B.addAttribute(Attribute::Builtin); break;
     case lltok::kw_cold: B.addAttribute(Attribute::Cold); break;
-    case lltok::kw_convergent: B.addAttribute(Attribute::Convergent); break;
+    case lltok::kw_convergent:
+      HaveError |= Error(Lex.getLoc(), "convergent attribute removed");
+      break;
+    case lltok::kw_noconvergent: B.addAttribute(Attribute::NoConvergent); break;
     case lltok::kw_inaccessiblememonly:
       B.addAttribute(Attribute::InaccessibleMemOnly); break;
     case lltok::kw_inaccessiblemem_or_argmemonly:
       B.addAttribute(Attribute::InaccessibleMemOrArgMemOnly); break;
     case lltok::kw_inlinehint: B.addAttribute(Attribute::InlineHint); break;
     case lltok::kw_jumptable: B.addAttribute(Attribute::JumpTable); break;
     case lltok::kw_minsize: B.addAttribute(Attribute::MinSize); break;
     case lltok::kw_naked: B.addAttribute(Attribute::Naked); break;
while (true) {
     case lltok::kw_speculative_load_hardening:
     case lltok::kw_ssp:
     case lltok::kw_sspreq:
     case lltok::kw_sspstrong:
     case lltok::kw_safestack:
     case lltok::kw_shadowcallstack:
     case lltok::kw_strictfp:
     case lltok::kw_uwtable:
+    case lltok::kw_noconvergent:
       HaveError |= Error(Lex.getLoc(), "invalid use of function-only attribute");
       break;
     }
 
     Lex.Lex();
   }
 }
 
while (true) {
     case lltok::kw_speculative_load_hardening:
     case lltok::kw_ssp:
     case lltok::kw_sspreq:
     case lltok::kw_sspstrong:
     case lltok::kw_safestack:
     case lltok::kw_shadowcallstack:
     case lltok::kw_strictfp:
     case lltok::kw_uwtable:
+    case lltok::kw_noconvergent:
       HaveError |= Error(Lex.getLoc(), "invalid use of function-only attribute");
       break;
 
     case lltok::kw_readnone:
     case lltok::kw_readonly:
       HaveError |= Error(Lex.getLoc(), "invalid use of attribute on return type");
     }
 

llvm/lib/AsmParser/LLToken.h

enum Kind {
   kw_sanitize_address,
   kw_sanitize_hwaddress,
   kw_sanitize_memtag,
   kw_builtin,
   kw_byval,
   kw_inalloca,
   kw_cold,
   kw_convergent,
+  kw_noconvergent,
   kw_dereferenceable,
   kw_dereferenceable_or_null,
   kw_inaccessiblememonly,
   kw_inaccessiblemem_or_argmemonly,
   kw_inlinehint,
   kw_inreg,
   kw_jumptable,
   kw_minsize,

llvm/lib/Bitcode/Reader/BitcodeReader.cpp

static uint64_t getRawAttributeMask(Attribute::AttrKind Val) {
   case Attribute::NoBuiltin:       return 1ULL << 38;
   case Attribute::Returned:        return 1ULL << 39;
   case Attribute::Cold:            return 1ULL << 40;
   case Attribute::Builtin:         return 1ULL << 41;
   case Attribute::OptimizeNone:    return 1ULL << 42;
   case Attribute::InAlloca:        return 1ULL << 43;
   case Attribute::NonNull:         return 1ULL << 44;
   case Attribute::JumpTable:       return 1ULL << 45;
-  case Attribute::Convergent:      return 1ULL << 46;
+  // Removed Convergent , 1ULL << 46
   case Attribute::SafeStack:       return 1ULL << 47;
   case Attribute::NoRecurse:       return 1ULL << 48;
   case Attribute::InaccessibleMemOnly:         return 1ULL << 49;
   case Attribute::InaccessibleMemOrArgMemOnly: return 1ULL << 50;
   case Attribute::SwiftSelf:       return 1ULL << 51;
   case Attribute::SwiftError:      return 1ULL << 52;
   case Attribute::WriteOnly:       return 1ULL << 53;
   case Attribute::Speculatable:    return 1ULL << 54;
case Attribute::ArgMemOnly:
     llvm_unreachable("argmemonly attribute not supported in raw format");
     break;
   case Attribute::AllocSize:
     llvm_unreachable("allocsize not supported in raw format");
     break;
   case Attribute::SanitizeMemTag:
     llvm_unreachable("sanitize_memtag attribute not supported in raw format");
     break;
+  case Attribute::NoConvergent:
+    // FIXME: Should steal noduplicate or convergent's bit
+    llvm_unreachable("noconvergent attribute not supported in raw format");
+    break;
   }
   llvm_unreachable("Unsupported attribute type");
 }
 
 static void addRawAttributeValue(AttrBuilder &B, uint64_t Val) {
   if (!Val) return;
 
   for (Attribute::AttrKind I = Attribute::None; I != Attribute::EndAttrKinds;
        I = Attribute::AttrKind(I + 1)) {
     if (I == Attribute::SanitizeMemTag ||
         I == Attribute::Dereferenceable ||
         I == Attribute::DereferenceableOrNull ||
         I == Attribute::ArgMemOnly ||
         I == Attribute::AllocSize ||
-        I == Attribute::NoSync)
+        I == Attribute::NoSync ||
+        I == Attribute::NoConvergent)
       continue;
     if (uint64_t A = (Val & getRawAttributeMask(I))) {
       if (I == Attribute::Alignment)
         B.addAlignmentAttr(1ULL << ((A >> 16) - 1));
       else if (I == Attribute::StackAlignment)
         B.addStackAlignmentAttr(1ULL << ((A >> 26)-1));
       else
         B.addAttribute(I);
case bitc::ATTR_KIND_BUILTIN:
     return Attribute::Builtin;
   case bitc::ATTR_KIND_BY_VAL:
     return Attribute::ByVal;
   case bitc::ATTR_KIND_IN_ALLOCA:
     return Attribute::InAlloca;
   case bitc::ATTR_KIND_COLD:
     return Attribute::Cold;
   case bitc::ATTR_KIND_CONVERGENT:
-    return Attribute::Convergent;
+    // Upgrade convergent by ignoring it. The new default behavior matches
+    // the old attributed semantics.
+    return Attribute::EndAttrKinds;
+  case bitc::ATTR_KIND_NOCONVERGENT:
+    return Attribute::NoConvergent;
   case bitc::ATTR_KIND_INACCESSIBLEMEM_ONLY:
     return Attribute::InaccessibleMemOnly;
   case bitc::ATTR_KIND_INACCESSIBLEMEM_OR_ARGMEMONLY:
     return Attribute::InaccessibleMemOrArgMemOnly;
   case bitc::ATTR_KIND_INLINE_HINT:
     return Attribute::InlineHint;
   case bitc::ATTR_KIND_IN_REG:
     return Attribute::InReg;
case bitc::PARAMATTR_GRP_CODE_ENTRY: { // ENTRY: [grpid, idx, a0, a1, ...]
 
       AttrBuilder B;
       for (unsigned i = 2, e = Record.size(); i != e; ++i) {
         if (Record[i] == 0) {        // Enum attribute
           Attribute::AttrKind Kind;
           if (Error Err = parseAttrKind(Record[++i], &Kind))
             return Err;
 
+          if (Kind == Attribute::EndAttrKinds) // Removed attribute
+            continue;
+
           // Upgrade old-style byval attribute to one with a type, even if it's
           // nullptr. We will have to insert the real type when we associate
           // this AttributeList with a function.
           if (Kind == Attribute::ByVal)
             B.addByValAttr(nullptr);
 
           B.addAttribute(Kind);
         } else if (Record[i] == 1) { // Integer attribute

llvm/lib/Bitcode/Writer/BitcodeWriter.cpp

static uint64_t getAttrKindEncoding(Attribute::AttrKind Kind) {
   case Attribute::AlwaysInline:
     return bitc::ATTR_KIND_ALWAYS_INLINE;
   case Attribute::ArgMemOnly:
     return bitc::ATTR_KIND_ARGMEMONLY;
   case Attribute::Builtin:
     return bitc::ATTR_KIND_BUILTIN;
   case Attribute::ByVal:
     return bitc::ATTR_KIND_BY_VAL;
-  case Attribute::Convergent:
-    return bitc::ATTR_KIND_CONVERGENT;
+  case Attribute::NoConvergent:
+    return bitc::ATTR_KIND_NOCONVERGENT;
   case Attribute::InAlloca:
     return bitc::ATTR_KIND_IN_ALLOCA;
   case Attribute::Cold:
     return bitc::ATTR_KIND_COLD;
   case Attribute::InaccessibleMemOnly:
     return bitc::ATTR_KIND_INACCESSIBLEMEM_ONLY;
   case Attribute::InaccessibleMemOrArgMemOnly:
     return bitc::ATTR_KIND_INACCESSIBLEMEM_OR_ARGMEMONLY;

llvm/lib/IR/Attributes.cpp

std::string Attribute::getAsString(bool InAttrGrp) const {
   if (hasAttribute(Attribute::SanitizeMemTag))
     return "sanitize_memtag";
   if (hasAttribute(Attribute::AlwaysInline))
     return "alwaysinline";
   if (hasAttribute(Attribute::ArgMemOnly))
     return "argmemonly";
   if (hasAttribute(Attribute::Builtin))
     return "builtin";
-  if (hasAttribute(Attribute::Convergent))
-    return "convergent";
+  if (hasAttribute(Attribute::NoConvergent))
+    return "noconvergent";
   if (hasAttribute(Attribute::SwiftError))
     return "swifterror";
   if (hasAttribute(Attribute::SwiftSelf))
     return "swiftself";
   if (hasAttribute(Attribute::InaccessibleMemOnly))
     return "inaccessiblememonly";
   if (hasAttribute(Attribute::InaccessibleMemOrArgMemOnly))
     return "inaccessiblemem_or_argmemonly";

llvm/lib/IR/Verifier.cpp

static bool isFuncOnlyAttr(Attribute::AttrKind Kind) {
   case Attribute::MinSize:
   case Attribute::NoDuplicate:
   case Attribute::Builtin:
   case Attribute::NoBuiltin:
   case Attribute::Cold:
   case Attribute::OptForFuzzing:
   case Attribute::OptimizeNone:
   case Attribute::JumpTable:
-  case Attribute::Convergent:
+  case Attribute::NoConvergent:
   case Attribute::ArgMemOnly:
   case Attribute::NoRecurse:
   case Attribute::InaccessibleMemOnly:
   case Attribute::InaccessibleMemOrArgMemOnly:
   case Attribute::AllocSize:
   case Attribute::SpeculativeLoadHardening:
   case Attribute::Speculatable:
   case Attribute::StrictFP:

llvm/lib/Transforms/IPO/Attributor.cpp

return clampStateAndIndicateChange(
         getState(),
         static_cast<const AANoUnwind::StateType &>(FnAA.getState()));
   }
 
   /// See AbstractAttribute::trackStatistics()
   void trackStatistics() const override { STATS_DECLTRACK_CS_ATTR(nounwind); }
 };
 
+/// -----------------------NoConvergent Function Attribute--------------------------
+
+struct AANoConvergentImpl : AANoConvergent {
+  AANoConvergentImpl(const IRPosition &IRP) : AANoConvergent(IRP) {}
+
+  const std::string getAsStr() const override {
+    return getAssumed() ? "noconvergent" : "convergent";
+  }
+
+  /// See AbstractAttribute::updateImpl(...).
+  ChangeStatus updateImpl(Attributor &A) override {
+    auto CheckForNoConvergent = [&](Instruction &I) {
+      if (ImmutableCallSite ICS = ImmutableCallSite(&I)) {
+        const auto &NoConvergentAA =
+            A.getAAFor<AANoConvergent>(*this, IRPosition::callsite_function(ICS));
+        return NoConvergentAA.isAssumedNoConvergent();
+      }
+
+      // Only call-like instructions may be convergent.
+      return true;
+    };
+
+    if (!A.checkForAllInstructions(CheckForNoConvergent, *this, CallLikeOpcodes))
+      return indicatePessimisticFixpoint();
+
+    return ChangeStatus::UNCHANGED;
+  }
+};
+
+struct AANoConvergentFunction final : public AANoConvergentImpl {
+  AANoConvergentFunction(const IRPosition &IRP) : AANoConvergentImpl(IRP) {}
+
+  /// See AbstractAttribute::trackStatistics()
+  void trackStatistics() const override { STATS_DECLTRACK_FN_ATTR(noconvergent) }
+};
+
+/// NoConvergent attribute deduction for a call sites.
+struct AANoConvergentCallSite final : AANoConvergentImpl {
+  AANoConvergentCallSite(const IRPosition &IRP) : AANoConvergentImpl(IRP) {}
+
+  /// See AbstractAttribute::initialize(...).
+  void initialize(Attributor &A) override {
+    AANoConvergentImpl::initialize(A);
+    Function *F = getAssociatedFunction();
+    if (!F)
+      indicatePessimisticFixpoint();
+  }
+
+  /// See AbstractAttribute::updateImpl(...).
+  ChangeStatus updateImpl(Attributor &A) override {
+    // TODO: Once we have call site specific value information we can provide
+    //       call site specific liveness information and then it makes
+    //       sense to specialize attributes for call sites arguments instead of
+    //       redirecting requests to the callee argument.
+    Function *F = getAssociatedFunction();
+    const IRPosition &FnPos = IRPosition::function(*F);
+    auto &FnAA = A.getAAFor<AANoConvergent>(*this, FnPos);
+    return clampStateAndIndicateChange(
+        getState(),
+        static_cast<const AANoConvergent::StateType &>(FnAA.getState()));
+  }
+
+  /// See AbstractAttribute::trackStatistics()
+  void trackStatistics() const override { STATS_DECLTRACK_CS_ATTR(noconvergent); }
+};
+
 /// --------------------- Function Return Values -------------------------------
 
 /// "Attribute" that collects all potential returned values and the return
 /// instructions that they arise from.
 ///
 /// If there is a unique returned value R, the manifest method will:
 ///   - mark R with the "returned" attribute, if R is an argument.
 class AAReturnedValuesImpl : public AAReturnedValues, public AbstractState {
ChangeStatus AANoSyncImpl::updateImpl(Attributor &A) {
 
   auto CheckForNoSync = [&](Instruction &I) {
     // At this point we handled all read/write effects and they are all
     // nosync, so they can be skipped.
     if (I.mayReadOrWriteMemory())
       return true;
 
     // non-convergent and readnone imply nosync.
-    return !ImmutableCallSite(&I).isConvergent();
+    return ImmutableCallSite(&I).isNoConvergent();
   };
 
   if (!A.checkForAllReadWriteInstructions(CheckRWInstForNoSync, *this) ||
       !A.checkForAllCallLikeInstructions(CheckForNoSync, *this))
     return indicatePessimisticFixpoint();
 
   return ChangeStatus::UNCHANGED;
 }
void Attributor::identifyDefaultAbstractAttributes(Function &F) {
   getOrCreateAAFor<AAIsDead>(FPos);
 
   // Every function might be "will-return".
   getOrCreateAAFor<AAWillReturn>(FPos);
 
   // Every function can be nounwind.
   getOrCreateAAFor<AANoUnwind>(FPos);
 
+  // Every function can be noconvergent
+  getOrCreateAAFor<AANoConvergent>(FPos);
+
   // Every function might be marked "nosync"
   getOrCreateAAFor<AANoSync>(FPos);
 
   // Every function might be "no-free".
   getOrCreateAAFor<AANoFree>(FPos);
 
   // Every function might be "no-return".
   getOrCreateAAFor<AANoReturn>(FPos);

 } // end anonymous namespace
 
 Pass *llvm::createAttributorLegacyPass() { return new AttributorLegacyPass(); }
 
 char AttributorLegacyPass::ID = 0;
 
 const char AAReturnedValues::ID = 0;
 const char AANoUnwind::ID = 0;
+const char AANoConvergent::ID = 0;
 const char AANoSync::ID = 0;
 const char AANoFree::ID = 0;
 const char AANonNull::ID = 0;
 const char AANoRecurse::ID = 0;
 const char AAWillReturn::ID = 0;
 const char AANoAlias::ID = 0;
 const char AANoReturn::ID = 0;
 const char AAIsDead::ID = 0;
switch (IRP.getPositionKind()) {                                           \
       SWITCH_PK_CREATE(CLASS, IRP, IRP_ARGUMENT, Argument)                     \
       SWITCH_PK_CREATE(CLASS, IRP, IRP_CALL_SITE_RETURNED, CallSiteReturned)   \
       SWITCH_PK_CREATE(CLASS, IRP, IRP_CALL_SITE_ARGUMENT, CallSiteArgument)   \
     }                                                                          \
     return *AA;                                                                \
   }
 
 CREATE_FUNCTION_ABSTRACT_ATTRIBUTE_FOR_POSITION(AANoUnwind)
+CREATE_FUNCTION_ABSTRACT_ATTRIBUTE_FOR_POSITION(AANoConvergent)
 CREATE_FUNCTION_ABSTRACT_ATTRIBUTE_FOR_POSITION(AANoSync)
 CREATE_FUNCTION_ABSTRACT_ATTRIBUTE_FOR_POSITION(AANoFree)
 CREATE_FUNCTION_ABSTRACT_ATTRIBUTE_FOR_POSITION(AANoRecurse)
 CREATE_FUNCTION_ABSTRACT_ATTRIBUTE_FOR_POSITION(AAWillReturn)
 CREATE_FUNCTION_ABSTRACT_ATTRIBUTE_FOR_POSITION(AANoReturn)
 CREATE_FUNCTION_ABSTRACT_ATTRIBUTE_FOR_POSITION(AAIsDead)
 CREATE_FUNCTION_ABSTRACT_ATTRIBUTE_FOR_POSITION(AAReturnedValues)
 

llvm/lib/Transforms/IPO/ForceFunctionAttrs.cpp

ForceAttributes("force-attribute", cl::Hidden,
                              "example -force-attribute=foo:noinline. This "
                              "option can be specified multiple times."));
 
 static Attribute::AttrKind parseAttrKind(StringRef Kind) {
   return StringSwitch<Attribute::AttrKind>(Kind)
       .Case("alwaysinline", Attribute::AlwaysInline)
       .Case("builtin", Attribute::Builtin)
       .Case("cold", Attribute::Cold)
-      .Case("convergent", Attribute::Convergent)
+      .Case("noconvergent", Attribute::NoConvergent)
       .Case("inlinehint", Attribute::InlineHint)
       .Case("jumptable", Attribute::JumpTable)
       .Case("minsize", Attribute::MinSize)
       .Case("naked", Attribute::Naked)
       .Case("nobuiltin", Attribute::NoBuiltin)
       .Case("noduplicate", Attribute::NoDuplicate)
       .Case("noimplicitfloat", Attribute::NoImplicitFloat)
       .Case("noinline", Attribute::NoInline)

llvm/lib/Transforms/IPO/FunctionAttrs.cpp

 STATISTIC(NumReturned, "Number of arguments marked returned");
 STATISTIC(NumReadNoneArg, "Number of arguments marked readnone");
 STATISTIC(NumReadOnlyArg, "Number of arguments marked readonly");
 STATISTIC(NumNoAlias, "Number of function returns marked noalias");
 STATISTIC(NumNonNullReturn, "Number of function returns marked nonnull");
 STATISTIC(NumNoRecurse, "Number of functions marked as norecurse");
 STATISTIC(NumNoUnwind, "Number of functions marked as nounwind");
 STATISTIC(NumNoFree, "Number of functions marked as nofree");
+STATISTIC(NumNoConvergent, "Number of functions marked as noconvergent");
 
 static cl::opt<bool> EnableNonnullArgPropagation(
     "enable-nonnull-arg-prop", cl::init(true), cl::Hidden,
     cl::desc("Try to propagate nonnull argument attributes from callsites to "
              "caller functions."));
 
 static cl::opt<bool> DisableNoUnwindInference(
     "disable-nounwind-inference", cl::Hidden,
for (auto &ID : InferInSCC) {
       Changed = true;
       ID.SetAttribute(*F);
     }
   return Changed;
 }
 
 } // end anonymous namespace
 
-/// Helper for non-Convergent inference predicate InstrBreaksAttribute.
-static bool InstrBreaksNonConvergent(Instruction &I,
+/// Helper for NoConvergent inference predicate InstrBreaksAttribute.
+static bool InstrBreaksNoConvergent(Instruction &I,
                                      const SCCNodeSet &SCCNodes) {
   const CallSite CS(&I);
   // Breaks non-convergent assumption if CS is a convergent call to a function
   // not in the SCC.
-  return CS && CS.isConvergent() && SCCNodes.count(CS.getCalledFunction()) == 0;
+  return CS && !CS.isNoConvergent() && SCCNodes.count(CS.getCalledFunction()) == 0;
 }
 
 /// Helper for NoUnwind inference predicate InstrBreaksAttribute.
 static bool InstrBreaksNonThrowing(Instruction &I, const SCCNodeSet &SCCNodes) {
   if (!I.mayThrow())
     return false;
   if (const auto *CI = dyn_cast<CallInst>(&I)) {
     if (Function *Callee = CI->getCalledFunction()) {

 ///   - removal of Convergent attribute
 ///   - addition of NoUnwind attribute
 ///
 /// Returns true if any changes to function attributes were made.
 static bool inferAttrsFromFunctionBodies(const SCCNodeSet &SCCNodes) {
 
   AttributeInferer AI;
 
-  // Request to remove the convergent attribute from all functions in the SCC
-  // if every callsite within the SCC is not convergent (except for calls
-  // to functions within the SCC).
-  // Note: Removal of the attr from the callsites will happen in
-  // InstCombineCalls separately.
-  AI.registerAttrInference(AttributeInferer::InferenceDescriptor{
-      Attribute::Convergent,
-      // Skip non-convergent functions.
-      [](const Function &F) { return !F.isConvergent(); },
-      // Instructions that break non-convergent assumption.
-      [SCCNodes](Instruction &I) {
-        return InstrBreaksNonConvergent(I, SCCNodes);
-      },
-      [](Function &F) {
-        LLVM_DEBUG(dbgs() << "Removing convergent attr from fn " << F.getName()
-                          << "\n");
-        F.setNotConvergent();
-      },
-      /* RequiresExactDefinition= */ false});
-
   if (!DisableNoUnwindInference)
     // Request to infer nounwind attribute for all the functions in the SCC if
     // every callsite within the SCC is not throwing (except for calls to
     // functions within the SCC). Note that nounwind attribute suffers from
     // derefinement - results may change depending on how functions are
     // optimized. Thus it can be inferred only from exact definitions.
     AI.registerAttrInference(AttributeInferer::InferenceDescriptor{
         Attribute::NoUnwind,
AI.registerAttrInference(AttributeInferer::InferenceDescriptor{
         [](Function &F) {
           LLVM_DEBUG(dbgs()
                      << "Adding nofree attr to fn " << F.getName() << "\n");
           F.setDoesNotFreeMemory();
           ++NumNoFree;
         },
         /* RequiresExactDefinition= */ true});
 
+
+  AI.registerAttrInference(AttributeInferer::InferenceDescriptor{
+      Attribute::NoConvergent,
+        // Skip noconvergent functions.
+        [](const Function &F) { return F.isNoConvergent(); },
+        // Instructions that break non-throwing assumption.
+        [SCCNodes](Instruction &I) {
+          return InstrBreaksNoConvergent(I, SCCNodes);
+        },
+          [](Function &F) {
+            LLVM_DEBUG(dbgs()
+                       << "Adding noconvergent attr to fn " << F.getName() << '\n');
+            F.setNoConvergent();
+            ++NumNoConvergent;
+          },
+            /* RequiresExactDefinition= */ true});
+
+
   // Perform all the requested attribute inference actions.
   return AI.run(SCCNodes);
 }
 
 static bool setDoesNotRecurse(Function &F) {
   if (F.doesNotRecurse())
     return false;
   F.setDoesNotRecurse();

llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp

if (auto *CSrc0 = dyn_cast<Constant>(Src0)) {
         // comparison that always returns true is the same as a read of the
         // EXEC register.
         Function *NewF = Intrinsic::getDeclaration(
             II->getModule(), Intrinsic::read_register, II->getType());
         Metadata *MDArgs[] = {MDString::get(II->getContext(), "exec")};
         MDNode *MD = MDNode::get(II->getContext(), MDArgs);
         Value *Args[] = {MetadataAsValue::get(II->getContext(), MD)};
         CallInst *NewCall = Builder.CreateCall(NewF, Args);
-        NewCall->addAttribute(AttributeList::FunctionIndex,
-                              Attribute::Convergent);
         NewCall->takeName(II);
         return replaceInstUsesWith(*II, NewCall);
       }
 
       // Canonicalize constants to RHS.
       CmpInst::Predicate SwapPred
         = CmpInst::getSwappedPredicate(static_cast<CmpInst::Predicate>(CCVal));
       II->setArgOperand(0, Src1);
Instruction *InstCombiner::visitCallBase(CallBase &Call) {
 
   // If the callee is a pointer to a function, attempt to move any casts to the
   // arguments of the call/callbr/invoke.
   Value *Callee = Call.getCalledValue();
   if (!isa<Function>(Callee) && transformConstExprCastCall(Call))
     return nullptr;
 
   if (Function *CalleeF = dyn_cast<Function>(Callee)) {
-    // Remove the convergent attr on calls when the callee is not convergent.
-    if (Call.isConvergent() && !CalleeF->isConvergent() &&
-        !CalleeF->isIntrinsic()) {
-      LLVM_DEBUG(dbgs() << "Removing convergent attr from instr " << Call
-                        << "\n");
-      Call.setNotConvergent();
-      return &Call;
-    }
-
     // If the call and callee calling conventions don't match, this call must
     // be unreachable, as the call is undefined.
     if (CalleeF->getCallingConv() != Call.getCallingConv() &&
         // Only do this for calls to a function with a body.  A prototype may
         // not actually end up matching the implementation's calling conv for a
         // variety of reasons (e.g. it may be written in assembly).
         !CalleeF->isDeclaration()) {
       Instruction *OldCall = &Call;

llvm/lib/Transforms/Utils/CodeExtractor.cpp

if (Attr.isStringAttribute()) {
       // Those attributes cannot be propagated safely. Explicitly list them
       // here so we get a warning if new attributes are added. This list also
       // includes non-function attributes.
       case Attribute::Alignment:
       case Attribute::AllocSize:
       case Attribute::ArgMemOnly:
       case Attribute::Builtin:
       case Attribute::ByVal:
-      case Attribute::Convergent:
+      case Attribute::NoConvergent:
       case Attribute::Dereferenceable:
       case Attribute::DereferenceableOrNull:
       case Attribute::InAlloca:
       case Attribute::InReg:
       case Attribute::InaccessibleMemOnly:
       case Attribute::InaccessibleMemOrArgMemOnly:
       case Attribute::JumpTable:
       case Attribute::Naked:

llvm/test/Analysis/BasicAA/intrinsics.ll

entry:
   %b = call <8 x i16> @llvm.masked.load.v8i16.p0v8i16(<8 x i16>* %p, i32 16, <8 x i1> %m, <8 x i16> %pt) nounwind
   %c = add <8 x i16> %a, %b
   ret <8 x i16> %c
 }
 
 declare <8 x i16> @llvm.masked.load.v8i16.p0v8i16(<8 x i16>*, i32, <8 x i1>, <8 x i16>) nounwind readonly
 declare void @llvm.masked.store.v8i16.p0v8i16(<8 x i16>, <8 x i16>*, i32, <8 x i1>) nounwind
 
-; CHECK: attributes #0 = { argmemonly nounwind readonly willreturn }
-; CHECK: attributes #1 = { argmemonly nounwind willreturn }
+; CHECK: attributes #0 = { argmemonly noconvergent nounwind readonly willreturn }
+; CHECK: attributes #1 = { argmemonly noconvergent nounwind willreturn }
 ; CHECK: attributes [[ATTR]] = { nounwind }

llvm/test/Analysis/TypeBasedAliasAnalysis/functionattrs.ll

 }
 
 ; CHECK: define void @test0_no(i32* nocapture %p) #1 {
 define void @test0_no(i32* %p) nounwind {
   store i32 0, i32* %p, !tbaa !2
   ret void
 }
 
-; Add the readonly attribute, since there's just a call to a function which 
+; Add the readonly attribute, since there's just a call to a function which
 ; TBAA says doesn't modify any memory.
 
 ; CHECK: define void @test1_yes(i32* nocapture %p) #2 {
 define void @test1_yes(i32* %p) nounwind {
   call void @callee(i32* %p), !tbaa !1
   ret void
 }
 

 ; isn't necessarily invalid.
 
 ; CHECK: define void @test2_yes(i8* nocapture %p, i8* nocapture %q, i64 %n) #4 {
 define void @test2_yes(i8* %p, i8* %q, i64 %n) nounwind {
   call void @llvm.memcpy.p0i8.p0i8.i64(i8* %p, i8* %q, i64 %n, i1 false), !tbaa !1
   ret void
 }
 
-; CHECK: define void @test2_no(i8* nocapture %p, i8* nocapture readonly %q, i64 %n) #3 {
+; CHECK: define void @test2_no(i8* nocapture %p, i8* nocapture readonly %q, i64 %n) #5 {
 define void @test2_no(i8* %p, i8* %q, i64 %n) nounwind {
   call void @llvm.memcpy.p0i8.p0i8.i64(i8* %p, i8* %q, i64 %n, i1 false), !tbaa !2
   ret void
 }
 
 ; Similar to the others, va_arg only accesses memory through its operand.
 
 ; CHECK: define i32 @test3_yes(i8* nocapture %p) #0 {
 define i32 @test3_yes(i8* %p) nounwind {
   %t = va_arg i8* %p, i32, !tbaa !1
   ret i32 %t
 }
 
-; CHECK: define i32 @test3_no(i8* nocapture %p) #5 {
+; CHECK: define i32 @test3_no(i8* nocapture %p) #6 {
 define i32 @test3_no(i8* %p) nounwind {
   %t = va_arg i8* %p, i32, !tbaa !2
   ret i32 %t
 }
 
 declare void @callee(i32* %p) nounwind
 declare void @llvm.memcpy.p0i8.p0i8.i64(i8*, i8*, i64, i1) nounwind
 
-; CHECK: attributes #0 = { norecurse nounwind readnone }
-; CHECK: attributes #1 = { nofree norecurse nounwind writeonly }
+; CHECK: attributes #0 = { noconvergent norecurse nounwind readnone }
+; CHECK: attributes #1 = { noconvergent nofree norecurse nounwind writeonly }
 ; CHECK: attributes #2 = { nounwind readonly }
 ; CHECK: attributes #3 = { nounwind }
-; CHECK: attributes #4 = { nounwind readnone }
-; CHECK: attributes #5 = { nofree norecurse nounwind }
-; CHECK: attributes #6 = { argmemonly nounwind willreturn }
+; CHECK: attributes #4 = { noconvergent nounwind readnone }
+; CHECK: attributes #5 = { noconvergent nounwind }
+; CHECK: attributes #6 = { noconvergent nofree norecurse nounwind }
+; CHECK: attributes #7 = { argmemonly noconvergent nounwind willreturn }
 
 ; Root note.
 !0 = !{ }
 
 ; Invariant memory.
 !1 = !{!3, !3, i64 0, i1 1 }
 ; Not invariant memory.
 !2 = !{!3, !3, i64 0, i1 0 }
 !3 = !{ !"foo", !0 }

llvm/test/Analysis/TypeBasedAliasAnalysis/intrinsics.ll

entry:
   %b = call <8 x i16> @llvm.masked.load.v8i16.p0v8i16(<8 x i16>* %p, i32 16, <8 x i1> %m, <8 x i16> %pt) nounwind, !tbaa !2
   %c = add <8 x i16> %a, %b
   ret <8 x i16> %c
 }
 
 declare <8 x i16> @llvm.masked.load.v8i16.p0v8i16(<8 x i16>*, i32, <8 x i1>, <8 x i16>) nounwind readonly
 declare void @llvm.masked.store.v8i16.p0v8i16(<8 x i16>, <8 x i16>*, i32, <8 x i1>) nounwind
 
-; CHECK: attributes #0 = { argmemonly nounwind readonly willreturn }
-; CHECK: attributes #1 = { argmemonly nounwind willreturn }
+; CHECK: attributes #0 = { argmemonly noconvergent nounwind readonly willreturn }
+; CHECK: attributes #1 = { argmemonly noconvergent nounwind willreturn }
 ; CHECK: attributes [[NUW]] = { nounwind }
 
 !0 = !{!"tbaa root"}
 !1 = !{!3, !3, i64 0}
 !2 = !{!4, !4, i64 0}
 !3 = !{!"A", !0}
 !4 = !{!"B", !0}

llvm/test/Assembler/invalid-noconvergent-argument.ll

+; RUN: not llvm-as -o /dev/null %s 2>&1 | FileCheck %s
+
+; CHECK: error: invalid use of function-only attribute
+declare void @foo(i32 noconvergent)

llvm/test/Assembler/invalid-noconvergent-return.ll

+; RUN: not llvm-as -o /dev/null %s 2>&1 | FileCheck %s
+
+; CHECK: error: invalid use of function-only attribute
+declare noconvergent void @foo()

llvm/test/Bindings/llvm-c/debug_info.ll

 ; RUN: llvm-c-test --test-dibuilder | FileCheck %s
 
 ; CHECK: ; ModuleID = 'debuginfo.c'
 ; CHECK-NEXT: source_filename = "debuginfo.c"
 
 ; CHECK:      define i64 @foo(i64 %0, i64 %1, <10 x i64> %2) !dbg !31 {
 ; CHECK-NEXT: entry:
 ; CHECK-NEXT:   call void @llvm.dbg.declare(metadata i64 0, metadata !38, metadata !DIExpression()), !dbg !43
 ; CHECK-NEXT:   call void @llvm.dbg.declare(metadata i64 0, metadata !39, metadata !DIExpression()), !dbg !43
 ; CHECK-NEXT:   call void @llvm.dbg.declare(metadata i64 0, metadata !40, metadata !DIExpression()), !dbg !43
 ; CHECK:      vars:                                             ; No predecessors!
 ; CHECK-NEXT:   call void @llvm.dbg.value(metadata i64 0, metadata !41, metadata !DIExpression(DW_OP_constu, 0, DW_OP_stack_value)), !dbg !44
 ; CHECK-NEXT: }
 
-; CHECK:      ; Function Attrs: nounwind readnone speculatable
+; CHECK:      ; Function Attrs: noconvergent nounwind readnone speculatable
 ; CHECK-NEXT: declare void @llvm.dbg.declare(metadata, metadata, metadata) #0
 
-; CHECK:      ; Function Attrs: nounwind readnone speculatable
+; CHECK:      ; Function Attrs: noconvergent nounwind readnone speculatable
 ; CHECK-NEXT: declare void @llvm.dbg.value(metadata, metadata, metadata) #0
 
-; CHECK:      attributes #0 = { nounwind readnone speculatable willreturn }
+; CHECK:      attributes #0 = { noconvergent nounwind readnone speculatable willreturn }
 
 ; CHECK:      !llvm.dbg.cu = !{!0}
 ; CHECK-NEXT: !FooType = !{!28}
 ; CHECK-NEXT: !EnumTest = !{!3}
 
 ; CHECK:      !0 = distinct !DICompileUnit(language: DW_LANG_C, file: !1, producer: "llvm-c-test", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, globals: !11, imports: !19, macros: !23, splitDebugInlining: false)
 ; CHECK-NEXT: !1 = !DIFile(filename: "debuginfo.c", directory: ".")
 ; CHECK-NEXT: !2 = !{!3}

llvm/test/Bitcode/attributes.ll

 }
 
 ; CHECK: define dereferenceable_or_null(8) i8* @f42(i8* dereferenceable_or_null(8) %foo)
 define dereferenceable_or_null(8) i8* @f42(i8* dereferenceable_or_null(8) %foo) {
  entry:
   ret i8* %foo
 }
 
-; CHECK: define void @f43() #25
-define void @f43() convergent {
+; convergent attribute removed
+; CHECK: define void @f43() {
+define void @f43() {
   ret void
 }
 
 define void @f44() argmemonly
-; CHECK: define void @f44() #26
+; CHECK: define void @f44() #25
 {
         ret void;
 }
 
 ; CHECK: define "string_attribute" void @f45(i32 "string_attribute" %0)
 define "string_attribute" void @f45(i32 "string_attribute" %0) {
   ret void
 }
 
 ; CHECK: define "string_attribute_with_value"="value" void @f46(i32 "string_attribute_with_value"="value" %0)
 define "string_attribute_with_value"="value" void @f46(i32 "string_attribute_with_value"="value" %0) {
   ret void
 }
 
-; CHECK: define void @f47() #27
+; CHECK: define void @f47() #26
 define void @f47() norecurse {
   ret void
 }
 
-; CHECK: define void @f48() #28
+; CHECK: define void @f48() #27
 define void @f48() inaccessiblememonly {
   ret void
 }
 
-; CHECK: define void @f49() #29
+; CHECK: define void @f49() #28
 define void @f49() inaccessiblemem_or_argmemonly {
   ret void
 }
 
 ; CHECK: define void @f50(i8* swiftself %0)
 define void @f50(i8* swiftself %0)
 {
   ret void;

 define float @f53(i8* %error_ref) {
 entry:
   %error_ptr_ref = alloca swifterror %swift_error*
   store %swift_error* null, %swift_error** %error_ptr_ref
   %call = call float @foo(%swift_error** swifterror %error_ptr_ref)
   ret float 1.0
 }
 
-; CHECK: define i8* @f54(i32 %0) #30
+; CHECK: define i8* @f54(i32 %0) #29
 define i8* @f54(i32 %0) allocsize(0) {
   ret i8* null
 }
 
-; CHECK: define i8* @f55(i32 %0, i32 %1) #31
+; CHECK: define i8* @f55(i32 %0, i32 %1) #30
 define i8* @f55(i32 %0, i32 %1) allocsize(0, 1) {
   ret i8* null
 }
 
-; CHECK: define void @f56() #32
+; CHECK: define void @f56() #31
 define void @f56() writeonly
 {
   ret void
 }
 
-; CHECK: define void @f57() #33
+; CHECK: define void @f57() #32
 define void @f57() speculatable {
   ret void
 }
 
-; CHECK: define void @f58() #34
+; CHECK: define void @f58() #33
 define void @f58() sanitize_hwaddress
 {
         ret void;
 }
 
-; CHECK: define void @f59() #35
+; CHECK: define void @f59() #34
 define void @f59() shadowcallstack
 {
   ret void
 }
 
-; CHECK: define void @f60() #36
+; CHECK: define void @f60() #35
 define void @f60() willreturn
 {
   ret void
 }
 
-; CHECK: define void @f61() #37
+; CHECK: define void @f61() #36
 define void @f61() nofree {
   ret void
 }
 
-; CHECK: define void @f62() #38
+; CHECK: define void @f62() #37
 define void @f62() nosync
 {
   ret void
 }
 
-; CHECK: define void @f63() #39
+; CHECK: define void @f63() #38
 define void @f63() sanitize_memtag
 {
   ret void;
 }
 
+; CHECK: define void @f64() #39
+define void @f64() noconvergent {
+  ret void
+}
+
 ; CHECK: attributes #0 = { noreturn }
 ; CHECK: attributes #1 = { nounwind }
 ; CHECK: attributes #2 = { readnone }
 ; CHECK: attributes #3 = { readonly }
 ; CHECK: attributes #4 = { noinline }
 ; CHECK: attributes #5 = { alwaysinline }
 ; CHECK: attributes #6 = { optsize }
 ; CHECK: attributes #7 = { ssp }

 ; CHECK: attributes #17 = { sanitize_address }
 ; CHECK: attributes #18 = { sanitize_thread }
 ; CHECK: attributes #19 = { sanitize_memory }
 ; CHECK: attributes #20 = { "cpu"="cortex-a8" }
 ; CHECK: attributes #21 = { sspstrong }
 ; CHECK: attributes #22 = { minsize }
 ; CHECK: attributes #23 = { noinline optnone }
 ; CHECK: attributes #24 = { jumptable }
-; CHECK: attributes #25 = { convergent }
-; CHECK: attributes #26 = { argmemonly }
-; CHECK: attributes #27 = { norecurse }
-; CHECK: attributes #28 = { inaccessiblememonly }
-; CHECK: attributes #29 = { inaccessiblemem_or_argmemonly }
-; CHECK: attributes #30 = { allocsize(0) }
-; CHECK: attributes #31 = { allocsize(0,1) }
-; CHECK: attributes #32 = { writeonly }
-; CHECK: attributes #33 = { speculatable }
-; CHECK: attributes #34 = { sanitize_hwaddress }
-; CHECK: attributes #35 = { shadowcallstack }
-; CHECK: attributes #36 = { willreturn }
-; CHECK: attributes #37 = { nofree }
-; CHECK: attributes #38 = { nosync }
-; CHECK: attributes #39 = { sanitize_memtag }
+; CHECK: attributes #25 = { argmemonly }
+; CHECK: attributes #26 = { norecurse }
+; CHECK: attributes #27 = { inaccessiblememonly }
+; CHECK: attributes #28 = { inaccessiblemem_or_argmemonly }
+; CHECK: attributes #29 = { allocsize(0) }
+; CHECK: attributes #30 = { allocsize(0,1) }
+; CHECK: attributes #31 = { writeonly }
+; CHECK: attributes #32 = { speculatable }
+; CHECK: attributes #33 = { sanitize_hwaddress }
+; CHECK: attributes #34 = { shadowcallstack }
+; CHECK: attributes #35 = { willreturn }
+; CHECK: attributes #36 = { nofree }
+; CHECK: attributes #37 = { nosync }
+; CHECK: attributes #38 = { sanitize_memtag }
+; CHECK: attributes #39 = { noconvergent }
 ; CHECK: attributes #40 = { nobuiltin }

llvm/test/Bitcode/compatibility-3.6.ll

exit:
   ; CHECK: phi i32 [ %v1, %L1 ], [ %v2, %L2 ], [ %op1, %entry ]
 
   select i1 true, i32 0, i32 1
   ; CHECK: select i1 true, i32 0, i32 1
   select <2 x i1> <i1 true, i1 false>, <2 x i8> <i8 2, i8 3>, <2 x i8> <i8 3, i8 2>
   ; CHECK: select <2 x i1> <i1 true, i1 false>, <2 x i8> <i8 2, i8 3>, <2 x i8> <i8 3, i8 2>
 
   call void @f.nobuiltin() builtin
-  ; CHECK: call void @f.nobuiltin() #35
+  ; CHECK: call void @f.nobuiltin() #36
 
   call fastcc noalias i32* @f.noalias() noinline
   ; CHECK: call fastcc noalias i32* @f.noalias() #11
   tail call ghccc nonnull i32* @f.nonnull() minsize
   ; CHECK: tail call ghccc nonnull i32* @f.nonnull() #6
 
   ret void
 }

 ; CHECK: attributes #21 = { sanitize_address }
 ; CHECK: attributes #22 = { sanitize_memory }
 ; CHECK: attributes #23 = { sanitize_thread }
 ; CHECK: attributes #24 = { ssp }
 ; CHECK: attributes #25 = { sspreq }
 ; CHECK: attributes #26 = { sspstrong }
 ; CHECK: attributes #27 = { uwtable }
 ; CHECK: attributes #28 = { "cpu"="cortex-a8" }
-; CHECK: attributes #29 = { nounwind readnone willreturn }
-; CHECK: attributes #30 = { argmemonly nounwind readonly }
-; CHECK: attributes #31 = { argmemonly nounwind }
-; CHECK: attributes #32 = { nounwind readnone }
-; CHECK: attributes #33 = { nounwind readonly }
-; CHECK: attributes #34 = { inaccessiblemem_or_argmemonly nounwind willreturn }
-; CHECK: attributes #35 = { builtin }
+; CHECK: attributes #29 = { noconvergent nounwind readnone willreturn }
+; CHECK: attributes #30 = { noconvergent nounwind }
+; CHECK: attributes #31 = { argmemonly noconvergent nounwind readonly }
+; CHECK: attributes #32 = { argmemonly noconvergent nounwind }
+; CHECK: attributes #33 = { noconvergent nounwind readnone }
+; CHECK: attributes #34 = { nounwind readonly }
+; CHECK: attributes #35 = { inaccessiblemem_or_argmemonly noconvergent nounwind willreturn }
+; CHECK: attributes #36 = { builtin }
 
 ;; Metadata
 
 ; Metadata -- Module flags
 !llvm.module.flags = !{!0, !1, !2, !4, !5, !6}
 ; CHECK: !llvm.module.flags = !{!0, !1, !2, !4, !5, !6}
 
 !0 = !{i32 1, !"mod1", i32 0}

llvm/test/Bitcode/compatibility-3.7.ll

 declare void @f.alignstack4() alignstack(4)
 ; CHECK: declare void @f.alignstack4() #0
 declare void @f.alignstack8() alignstack(8)
 ; CHECK: declare void @f.alignstack8() #1
 declare void @f.alwaysinline() alwaysinline
 ; CHECK: declare void @f.alwaysinline() #2
 declare void @f.cold() cold
 ; CHECK: declare void @f.cold() #3
-declare void @f.convergent() convergent
-; CHECK: declare void @f.convergent() #4
 declare void @f.inlinehint() inlinehint
-; CHECK: declare void @f.inlinehint() #5
+; CHECK: declare void @f.inlinehint() #4
 declare void @f.jumptable() unnamed_addr jumptable
-; CHECK: declare void @f.jumptable() unnamed_addr #6
+; CHECK: declare void @f.jumptable() unnamed_addr #5
 declare void @f.minsize() minsize
-; CHECK: declare void @f.minsize() #7
+; CHECK: declare void @f.minsize() #6
 declare void @f.naked() naked
-; CHECK: declare void @f.naked() #8
+; CHECK: declare void @f.naked() #7
 declare void @f.nobuiltin() nobuiltin
-; CHECK: declare void @f.nobuiltin() #9
+; CHECK: declare void @f.nobuiltin() #8
 declare void @f.noduplicate() noduplicate
-; CHECK: declare void @f.noduplicate() #10
+; CHECK: declare void @f.noduplicate() #9
 declare void @f.noimplicitfloat() noimplicitfloat
-; CHECK: declare void @f.noimplicitfloat() #11
+; CHECK: declare void @f.noimplicitfloat() #10
 declare void @f.noinline() noinline
-; CHECK: declare void @f.noinline() #12
+; CHECK: declare void @f.noinline() #11
 declare void @f.nonlazybind() nonlazybind
-; CHECK: declare void @f.nonlazybind() #13
+; CHECK: declare void @f.nonlazybind() #12
 declare void @f.noredzone() noredzone
-; CHECK: declare void @f.noredzone() #14
+; CHECK: declare void @f.noredzone() #13
 declare void @f.noreturn() noreturn
-; CHECK: declare void @f.noreturn() #15
+; CHECK: declare void @f.noreturn() #14
 declare void @f.nounwind() nounwind
-; CHECK: declare void @f.nounwind() #16
+; CHECK: declare void @f.nounwind() #15
 declare void @f.optnone() noinline optnone
-; CHECK: declare void @f.optnone() #17
+; CHECK: declare void @f.optnone() #16
 declare void @f.optsize() optsize
-; CHECK: declare void @f.optsize() #18
+; CHECK: declare void @f.optsize() #17
 declare void @f.readnone() readnone
-; CHECK: declare void @f.readnone() #19
+; CHECK: declare void @f.readnone() #18
 declare void @f.readonly() readonly
-; CHECK: declare void @f.readonly() #20
+; CHECK: declare void @f.readonly() #19
 declare void @f.returns_twice() returns_twice
-; CHECK: declare void @f.returns_twice() #21
+; CHECK: declare void @f.returns_twice() #20
 declare void @f.safestack() safestack
-; CHECK: declare void @f.safestack() #22
+; CHECK: declare void @f.safestack() #21
 declare void @f.sanitize_address() sanitize_address
-; CHECK: declare void @f.sanitize_address() #23
+; CHECK: declare void @f.sanitize_address() #22
 declare void @f.sanitize_memory() sanitize_memory
-; CHECK: declare void @f.sanitize_memory() #24
+; CHECK: declare void @f.sanitize_memory() #23
 declare void @f.sanitize_thread() sanitize_thread
-; CHECK: declare void @f.sanitize_thread() #25
+; CHECK: declare void @f.sanitize_thread() #24
 declare void @f.ssp() ssp
-; CHECK: declare void @f.ssp() #26
+; CHECK: declare void @f.ssp() #25
 declare void @f.sspreq() sspreq
-; CHECK: declare void @f.sspreq() #27
+; CHECK: declare void @f.sspreq() #26
 declare void @f.sspstrong() sspstrong
-; CHECK: declare void @f.sspstrong() #28
+; CHECK: declare void @f.sspstrong() #27
 declare void @f.thunk() "thunk"
-; CHECK: declare void @f.thunk() #29
+; CHECK: declare void @f.thunk() #28
 declare void @f.uwtable() uwtable
-; CHECK: declare void @f.uwtable() #30
+; CHECK: declare void @f.uwtable() #29
 declare void @f.kvpair() "cpu"="cortex-a8"
-; CHECK:declare void @f.kvpair() #31
+; CHECK:declare void @f.kvpair() #30
 
 ; Functions -- section
 declare void @f.section() section "80"
 ; CHECK: declare void @f.section() section "80"
 
 ; Functions -- comdat
 define void @f.comdat_any() comdat($comdat.any) {
 ; CHECK: define void @f.comdat_any() comdat($comdat.any)

 ; Functions -- Prologue data
 declare void @f.prologuei32() prologue i32 1684365669
 ; CHECK: declare void @f.prologuei32() prologue i32 1684365669
 declare void @f.prologuearray() prologue [4 x i32] [i32 0, i32 1, i32 2, i32 3]
 ; CHECK: declare void @f.prologuearray() prologue [4 x i32] [i32 0, i32 1, i32 2, i32 3]
 
 ; Functions -- Personality constant
 declare void @llvm.donothing() nounwind readnone
-; CHECK: declare void @llvm.donothing() #32
+; CHECK: declare void @llvm.donothing() #31
 define void @f.no_personality() personality i8 3 {
 ; CHECK: define void @f.no_personality() personality i8 3
   invoke void @llvm.donothing() to label %normal unwind label %exception
 exception:
   %cleanup = landingpad i8 cleanup
   br label %normal
 normal:
   ret void
exit:
   ; CHECK: select i1 true, i32 0, i32 1
   select <2 x i1> <i1 true, i1 false>, <2 x i8> <i8 2, i8 3>, <2 x i8> <i8 3, i8 2>
   ; CHECK: select <2 x i1> <i1 true, i1 false>, <2 x i8> <i8 2, i8 3>, <2 x i8> <i8 3, i8 2>
 
   call void @f.nobuiltin() builtin
   ; CHECK: call void @f.nobuiltin() #38
 
   call fastcc noalias i32* @f.noalias() noinline
-  ; CHECK: call fastcc noalias i32* @f.noalias() #12
+  ; CHECK: call fastcc noalias i32* @f.noalias() #11
   tail call ghccc nonnull i32* @f.nonnull() minsize
-  ; CHECK: tail call ghccc nonnull i32* @f.nonnull() #7
+  ; CHECK: tail call ghccc nonnull i32* @f.nonnull() #6
 
   ret void
 }
 
 define void @instructions.call_musttail(i8* inalloca %val) {
   musttail call void @f.param.inalloca(i8* inalloca %val)
   ; CHECK: musttail call void @f.param.inalloca(i8* inalloca %val)
 
define void @misc.metadata() {
   call void @f1(), !srcloc !14
   ret void
 }
 
 ; CHECK: attributes #0 = { alignstack=4 }
 ; CHECK: attributes #1 = { alignstack=8 }
 ; CHECK: attributes #2 = { alwaysinline }
 ; CHECK: attributes #3 = { cold }
-; CHECK: attributes #4 = { convergent }
-; CHECK: attributes #5 = { inlinehint }
-; CHECK: attributes #6 = { jumptable }
-; CHECK: attributes #7 = { minsize }
-; CHECK: attributes #8 = { naked }
-; CHECK: attributes #9 = { nobuiltin }
-; CHECK: attributes #10 = { noduplicate }
-; CHECK: attributes #11 = { noimplicitfloat }
-; CHECK: attributes #12 = { noinline }
-; CHECK: attributes #13 = { nonlazybind }
-; CHECK: attributes #14 = { noredzone }
-; CHECK: attributes #15 = { noreturn }
-; CHECK: attributes #16 = { nounwind }
-; CHECK: attributes #17 = { noinline optnone }
-; CHECK: attributes #18 = { optsize }
-; CHECK: attributes #19 = { readnone }
-; CHECK: attributes #20 = { readonly }
-; CHECK: attributes #21 = { returns_twice }
-; CHECK: attributes #22 = { safestack }
-; CHECK: attributes #23 = { sanitize_address }
-; CHECK: attributes #24 = { sanitize_memory }
-; CHECK: attributes #25 = { sanitize_thread }
-; CHECK: attributes #26 = { ssp }
-; CHECK: attributes #27 = { sspreq }
-; CHECK: attributes #28 = { sspstrong }
-; CHECK: attributes #29 = { "thunk" }
-; CHECK: attributes #30 = { uwtable }
-; CHECK: attributes #31 = { "cpu"="cortex-a8" }
-; CHECK: attributes #32 = { nounwind readnone willreturn }
-; CHECK: attributes #33 = { argmemonly nounwind readonly }
-; CHECK: attributes #34 = { argmemonly nounwind }
-; CHECK: attributes #35 = { nounwind readnone }
+; CHECK: attributes #4 = { inlinehint }
+; CHECK: attributes #5 = { jumptable }
+; CHECK: attributes #6 = { minsize }
+; CHECK: attributes #7 = { naked }
+; CHECK: attributes #8 = { nobuiltin }
+; CHECK: attributes #9 = { noduplicate }
+; CHECK: attributes #10 = { noimplicitfloat }
+; CHECK: attributes #11 = { noinline }
+; CHECK: attributes #12 = { nonlazybind }
+; CHECK: attributes #13 = { noredzone }
+; CHECK: attributes #14 = { noreturn }
+; CHECK: attributes #15 = { nounwind }
+; CHECK: attributes #16 = { noinline optnone }
+; CHECK: attributes #17 = { optsize }
+; CHECK: attributes #18 = { readnone }
+; CHECK: attributes #19 = { readonly }
+; CHECK: attributes #20 = { returns_twice }
+; CHECK: attributes #21 = { safestack }
+; CHECK: attributes #22 = { sanitize_address }
+; CHECK: attributes #23 = { sanitize_memory }
+; CHECK: attributes #24 = { sanitize_thread }
+; CHECK: attributes #25 = { ssp }
+; CHECK: attributes #26 = { sspreq }
+; CHECK: attributes #27 = { sspstrong }
+; CHECK: attributes #28 = { "thunk" }
+; CHECK: attributes #29 = { uwtable }
+; CHECK: attributes #30 = { "cpu"="cortex-a8" }
+; CHECK: attributes #31 = { noconvergent nounwind readnone willreturn }
+; CHECK: attributes #32 = { noconvergent nounwind }
+; CHECK: attributes #33 = { argmemonly noconvergent nounwind readonly }
+; CHECK: attributes #34 = { argmemonly noconvergent nounwind }
+; CHECK: attributes #35 = { noconvergent nounwind readnone }
 ; CHECK: attributes #36 = { nounwind readonly }
-; CHECK: attributes #37 = { inaccessiblemem_or_argmemonly nounwind willreturn }
+; CHECK: attributes #37 = { inaccessiblemem_or_argmemonly noconvergent nounwind willreturn }
 ; CHECK: attributes #38 = { builtin }
 
 ;; Metadata
 
 ; Metadata -- Module flags
 !llvm.module.flags = !{!0, !1, !2, !4, !5, !6}
 ; CHECK: !llvm.module.flags = !{!0, !1, !2, !4, !5, !6}
 

llvm/test/Bitcode/compatibility-3.8.ll

 declare void @f.alignstack4() alignstack(4)
 ; CHECK: declare void @f.alignstack4() #0
 declare void @f.alignstack8() alignstack(8)
 ; CHECK: declare void @f.alignstack8() #1
 declare void @f.alwaysinline() alwaysinline
 ; CHECK: declare void @f.alwaysinline() #2
 declare void @f.cold() cold
 ; CHECK: declare void @f.cold() #3
-declare void @f.convergent() convergent
-; CHECK: declare void @f.convergent() #4
 declare void @f.inlinehint() inlinehint
-; CHECK: declare void @f.inlinehint() #5
+; CHECK: declare void @f.inlinehint() #4
 declare void @f.jumptable() unnamed_addr jumptable
-; CHECK: declare void @f.jumptable() unnamed_addr #6
+; CHECK: declare void @f.jumptable() unnamed_addr #5
 declare void @f.minsize() minsize
-; CHECK: declare void @f.minsize() #7
+; CHECK: declare void @f.minsize() #6
 declare void @f.naked() naked
-; CHECK: declare void @f.naked() #8
+; CHECK: declare void @f.naked() #7
 declare void @f.nobuiltin() nobuiltin
-; CHECK: declare void @f.nobuiltin() #9
+; CHECK: declare void @f.nobuiltin() #8
 declare void @f.noduplicate() noduplicate
-; CHECK: declare void @f.noduplicate() #10
+; CHECK: declare void @f.noduplicate() #9
 declare void @f.noimplicitfloat() noimplicitfloat
-; CHECK: declare void @f.noimplicitfloat() #11
+; CHECK: declare void @f.noimplicitfloat() #10
 declare void @f.noinline() noinline
-; CHECK: declare void @f.noinline() #12
+; CHECK: declare void @f.noinline() #11
 declare void @f.nonlazybind() nonlazybind
-; CHECK: declare void @f.nonlazybind() #13
+; CHECK: declare void @f.nonlazybind() #12
 declare void @f.noredzone() noredzone
-; CHECK: declare void @f.noredzone() #14
+; CHECK: declare void @f.noredzone() #13
 declare void @f.noreturn() noreturn
-; CHECK: declare void @f.noreturn() #15
+; CHECK: declare void @f.noreturn() #14
 declare void @f.nounwind() nounwind
-; CHECK: declare void @f.nounwind() #16
+; CHECK: declare void @f.nounwind() #15
 declare void @f.optnone() noinline optnone
-; CHECK: declare void @f.optnone() #17
+; CHECK: declare void @f.optnone() #16
 declare void @f.optsize() optsize
-; CHECK: declare void @f.optsize() #18
+; CHECK: declare void @f.optsize() #17
 declare void @f.readnone() readnone
-; CHECK: declare void @f.readnone() #19
+; CHECK: declare void @f.readnone() #18
 declare void @f.readonly() readonly
-; CHECK: declare void @f.readonly() #20
+; CHECK: declare void @f.readonly() #19
 declare void @f.returns_twice() returns_twice
-; CHECK: declare void @f.returns_twice() #21
+; CHECK: declare void @f.returns_twice() #20
 declare void @f.safestack() safestack
-; CHECK: declare void @f.safestack() #22
+; CHECK: declare void @f.safestack() #21
 declare void @f.sanitize_address() sanitize_address
-; CHECK: declare void @f.sanitize_address() #23
+; CHECK: declare void @f.sanitize_address() #22
 declare void @f.sanitize_memory() sanitize_memory
-; CHECK: declare void @f.sanitize_memory() #24
+; CHECK: declare void @f.sanitize_memory() #23
 declare void @f.sanitize_thread() sanitize_thread
-; CHECK: declare void @f.sanitize_thread() #25
+; CHECK: declare void @f.sanitize_thread() #24
 declare void @f.ssp() ssp
-; CHECK: declare void @f.ssp() #26
+; CHECK: declare void @f.ssp() #25
 declare void @f.sspreq() sspreq
-; CHECK: declare void @f.sspreq() #27
+; CHECK: declare void @f.sspreq() #26
 declare void @f.sspstrong() sspstrong
-; CHECK: declare void @f.sspstrong() #28
+; CHECK: declare void @f.sspstrong() #27
 declare void @f.thunk() "thunk"
-; CHECK: declare void @f.thunk() #29
+; CHECK: declare void @f.thunk() #28
 declare void @f.uwtable() uwtable
-; CHECK: declare void @f.uwtable() #30
+; CHECK: declare void @f.uwtable() #29
 declare void @f.kvpair() "cpu"="cortex-a8"
-; CHECK:declare void @f.kvpair() #31
+; CHECK:declare void @f.kvpair() #30
 declare void @f.norecurse() norecurse
-; CHECK: declare void @f.norecurse() #32
+; CHECK: declare void @f.norecurse() #31
 declare void @f.inaccessiblememonly() inaccessiblememonly
-; CHECK: declare void @f.inaccessiblememonly() #33
+; CHECK: declare void @f.inaccessiblememonly() #32
 declare void @f.inaccessiblemem_or_argmemonly() inaccessiblemem_or_argmemonly
-; CHECK: declare void @f.inaccessiblemem_or_argmemonly() #34
+; CHECK: declare void @f.inaccessiblemem_or_argmemonly() #33
 
 ; Functions -- section
 declare void @f.section() section "80"
 ; CHECK: declare void @f.section() section "80"
 
 ; Functions -- comdat
 define void @f.comdat_any() comdat($comdat.any) {
 ; CHECK: define void @f.comdat_any() comdat($comdat.any)

 ; Functions -- Prologue data
 declare void @f.prologuei32() prologue i32 1684365669
 ; CHECK: declare void @f.prologuei32() prologue i32 1684365669
 declare void @f.prologuearray() prologue [4 x i32] [i32 0, i32 1, i32 2, i32 3]
 ; CHECK: declare void @f.prologuearray() prologue [4 x i32] [i32 0, i32 1, i32 2, i32 3]
 
 ; Functions -- Personality constant
 declare void @llvm.donothing() nounwind readnone
-; CHECK: declare void @llvm.donothing() #35
+; CHECK: declare void @llvm.donothing() #34
 define void @f.no_personality() personality i8 3 {
 ; CHECK: define void @f.no_personality() personality i8 3
   invoke void @llvm.donothing() to label %normal unwind label %exception
 exception:
   %cleanup = landingpad i8 cleanup
   br label %normal
 normal:
   ret void
exit:
   ; CHECK: select i1 true, i32 0, i32 1
   select <2 x i1> <i1 true, i1 false>, <2 x i8> <i8 2, i8 3>, <2 x i8> <i8 3, i8 2>
   ; CHECK: select <2 x i1> <i1 true, i1 false>, <2 x i8> <i8 2, i8 3>, <2 x i8> <i8 3, i8 2>
 
   call void @f.nobuiltin() builtin
   ; CHECK: call void @f.nobuiltin() #41
 
   call fastcc noalias i32* @f.noalias() noinline
-  ; CHECK: call fastcc noalias i32* @f.noalias() #12
+  ; CHECK: call fastcc noalias i32* @f.noalias() #11
   tail call ghccc nonnull i32* @f.nonnull() minsize
-  ; CHECK: tail call ghccc nonnull i32* @f.nonnull() #7
+  ; CHECK: tail call ghccc nonnull i32* @f.nonnull() #6
 
   ret void
 }
 
 define void @instructions.call_musttail(i8* inalloca %val) {
   musttail call void @f.param.inalloca(i8* inalloca %val)
   ; CHECK: musttail call void @f.param.inalloca(i8* inalloca %val)
 
normal:
   ret void
 }
 
 
 ; CHECK: attributes #0 = { alignstack=4 }
 ; CHECK: attributes #1 = { alignstack=8 }
 ; CHECK: attributes #2 = { alwaysinline }
 ; CHECK: attributes #3 = { cold }
-; CHECK: attributes #4 = { convergent }
-; CHECK: attributes #5 = { inlinehint }
-; CHECK: attributes #6 = { jumptable }
-; CHECK: attributes #7 = { minsize }
-; CHECK: attributes #8 = { naked }
-; CHECK: attributes #9 = { nobuiltin }
-; CHECK: attributes #10 = { noduplicate }
-; CHECK: attributes #11 = { noimplicitfloat }
-; CHECK: attributes #12 = { noinline }
-; CHECK: attributes #13 = { nonlazybind }
-; CHECK: attributes #14 = { noredzone }
-; CHECK: attributes #15 = { noreturn }
-; CHECK: attributes #16 = { nounwind }
-; CHECK: attributes #17 = { noinline optnone }
-; CHECK: attributes #18 = { optsize }
-; CHECK: attributes #19 = { readnone }
-; CHECK: attributes #20 = { readonly }
-; CHECK: attributes #21 = { returns_twice }
-; CHECK: attributes #22 = { safestack }
-; CHECK: attributes #23 = { sanitize_address }
-; CHECK: attributes #24 = { sanitize_memory }
-; CHECK: attributes #25 = { sanitize_thread }
-; CHECK: attributes #26 = { ssp }
-; CHECK: attributes #27 = { sspreq }
-; CHECK: attributes #28 = { sspstrong }
-; CHECK: attributes #29 = { "thunk" }
-; CHECK: attributes #30 = { uwtable }
-; CHECK: attributes #31 = { "cpu"="cortex-a8" }
-; CHECK: attributes #32 = { norecurse }
-; CHECK: attributes #33 = { inaccessiblememonly }
-; CHECK: attributes #34 = { inaccessiblemem_or_argmemonly }
-; CHECK: attributes #35 = { nounwind readnone willreturn }
-; CHECK: attributes #36 = { argmemonly nounwind readonly }
-; CHECK: attributes #37 = { argmemonly nounwind }
-; CHECK: attributes #38 = { nounwind readnone }
+; CHECK: attributes #4 = { inlinehint }
+; CHECK: attributes #5 = { jumptable }
+; CHECK: attributes #6 = { minsize }
+; CHECK: attributes #7 = { naked }
+; CHECK: attributes #8 = { nobuiltin }
+; CHECK: attributes #9 = { noduplicate }
+; CHECK: attributes #10 = { noimplicitfloat }
+; CHECK: attributes #11 = { noinline }
+; CHECK: attributes #12 = { nonlazybind }
+; CHECK: attributes #13 = { noredzone }
+; CHECK: attributes #14 = { noreturn }
+; CHECK: attributes #15 = { nounwind }
+; CHECK: attributes #16 = { noinline optnone }
+; CHECK: attributes #17 = { optsize }
+; CHECK: attributes #18 = { readnone }
+; CHECK: attributes #19 = { readonly }
+; CHECK: attributes #20 = { returns_twice }
+; CHECK: attributes #21 = { safestack }
+; CHECK: attributes #22 = { sanitize_address }
+; CHECK: attributes #23 = { sanitize_memory }
+; CHECK: attributes #24 = { sanitize_thread }
+; CHECK: attributes #25 = { ssp }
+; CHECK: attributes #26 = { sspreq }
+; CHECK: attributes #27 = { sspstrong }
+; CHECK: attributes #28 = { "thunk" }
+; CHECK: attributes #29 = { uwtable }
+; CHECK: attributes #30 = { "cpu"="cortex-a8" }
+; CHECK: attributes #31 = { norecurse }
+; CHECK: attributes #32 = { inaccessiblememonly }
+; CHECK: attributes #33 = { inaccessiblemem_or_argmemonly }
+; CHECK: attributes #34 = { noconvergent nounwind readnone willreturn }
+; CHECK: attributes #35 = { noconvergent nounwind }
+; CHECK: attributes #36 = { argmemonly noconvergent nounwind readonly }
+; CHECK: attributes #37 = { argmemonly noconvergent nounwind }
+; CHECK: attributes #38 = { noconvergent nounwind readnone }
 ; CHECK: attributes #39 = { nounwind readonly }
-; CHECK: attributes #40 = { inaccessiblemem_or_argmemonly nounwind willreturn }
+; CHECK: attributes #40 = { inaccessiblemem_or_argmemonly noconvergent nounwind willreturn }
 ; CHECK: attributes #41 = { builtin }
 
 ;; Metadata
 
 ; Metadata -- Module flags
 !llvm.module.flags = !{!0, !1, !2, !4, !5, !6}
 ; CHECK: !llvm.module.flags = !{!0, !1, !2, !4, !5, !6}
 

llvm/test/Bitcode/compatibility-3.9.ll

 declare void @f.alignstack4() alignstack(4)
 ; CHECK: declare void @f.alignstack4() #0
 declare void @f.alignstack8() alignstack(8)
 ; CHECK: declare void @f.alignstack8() #1
 declare void @f.alwaysinline() alwaysinline
 ; CHECK: declare void @f.alwaysinline() #2
 declare void @f.cold() cold
 ; CHECK: declare void @f.cold() #3
-declare void @f.convergent() convergent
-; CHECK: declare void @f.convergent() #4
 declare void @f.inlinehint() inlinehint
-; CHECK: declare void @f.inlinehint() #5
+; CHECK: declare void @f.inlinehint() #4
 declare void @f.jumptable() unnamed_addr jumptable
-; CHECK: declare void @f.jumptable() unnamed_addr #6
+; CHECK: declare void @f.jumptable() unnamed_addr #5
 declare void @f.minsize() minsize
-; CHECK: declare void @f.minsize() #7
+; CHECK: declare void @f.minsize() #6
 declare void @f.naked() naked
-; CHECK: declare void @f.naked() #8
+; CHECK: declare void @f.naked() #7
 declare void @f.nobuiltin() nobuiltin
-; CHECK: declare void @f.nobuiltin() #9
+; CHECK: declare void @f.nobuiltin() #8
 declare void @f.noduplicate() noduplicate
-; CHECK: declare void @f.noduplicate() #10
+; CHECK: declare void @f.noduplicate() #9
 declare void @f.noimplicitfloat() noimplicitfloat
-; CHECK: declare void @f.noimplicitfloat() #11
+; CHECK: declare void @f.noimplicitfloat() #10
 declare void @f.noinline() noinline
-; CHECK: declare void @f.noinline() #12
+; CHECK: declare void @f.noinline() #11
 declare void @f.nonlazybind() nonlazybind
-; CHECK: declare void @f.nonlazybind() #13
+; CHECK: declare void @f.nonlazybind() #12
 declare void @f.noredzone() noredzone
-; CHECK: declare void @f.noredzone() #14
+; CHECK: declare void @f.noredzone() #13
 declare void @f.noreturn() noreturn
-; CHECK: declare void @f.noreturn() #15
+; CHECK: declare void @f.noreturn() #14
 declare void @f.nounwind() nounwind
-; CHECK: declare void @f.nounwind() #16
+; CHECK: declare void @f.nounwind() #15
 declare void @f.optnone() noinline optnone
-; CHECK: declare void @f.optnone() #17
+; CHECK: declare void @f.optnone() #16
 declare void @f.optsize() optsize
-; CHECK: declare void @f.optsize() #18
+; CHECK: declare void @f.optsize() #17
 declare void @f.readnone() readnone
-; CHECK: declare void @f.readnone() #19
+; CHECK: declare void @f.readnone() #18
 declare void @f.readonly() readonly
-; CHECK: declare void @f.readonly() #20
+; CHECK: declare void @f.readonly() #19
 declare void @f.returns_twice() returns_twice
-; CHECK: declare void @f.returns_twice() #21
+; CHECK: declare void @f.returns_twice() #20
 declare void @f.safestack() safestack
-; CHECK: declare void @f.safestack() #22
+; CHECK: declare void @f.safestack() #21
 declare void @f.sanitize_address() sanitize_address
-; CHECK: declare void @f.sanitize_address() #23
+; CHECK: declare void @f.sanitize_address() #22
 declare void @f.sanitize_memory() sanitize_memory
-; CHECK: declare void @f.sanitize_memory() #24
+; CHECK: declare void @f.sanitize_memory() #23
 declare void @f.sanitize_thread() sanitize_thread
-; CHECK: declare void @f.sanitize_thread() #25
+; CHECK: declare void @f.sanitize_thread() #24
 declare void @f.ssp() ssp
-; CHECK: declare void @f.ssp() #26
+; CHECK: declare void @f.ssp() #25
 declare void @f.sspreq() sspreq
-; CHECK: declare void @f.sspreq() #27
+; CHECK: declare void @f.sspreq() #26
 declare void @f.sspstrong() sspstrong
-; CHECK: declare void @f.sspstrong() #28
+; CHECK: declare void @f.sspstrong() #27
 declare void @f.thunk() "thunk"
-; CHECK: declare void @f.thunk() #29
+; CHECK: declare void @f.thunk() #28
 declare void @f.uwtable() uwtable
-; CHECK: declare void @f.uwtable() #30
+; CHECK: declare void @f.uwtable() #29
 declare void @f.kvpair() "cpu"="cortex-a8"
-; CHECK:declare void @f.kvpair() #31
+; CHECK:declare void @f.kvpair() #30
 declare void @f.norecurse() norecurse
-; CHECK: declare void @f.norecurse() #32
+; CHECK: declare void @f.norecurse() #31
 declare void @f.inaccessiblememonly() inaccessiblememonly
-; CHECK: declare void @f.inaccessiblememonly() #33
+; CHECK: declare void @f.inaccessiblememonly() #32
 declare void @f.inaccessiblemem_or_argmemonly() inaccessiblemem_or_argmemonly
-; CHECK: declare void @f.inaccessiblemem_or_argmemonly() #34
+; CHECK: declare void @f.inaccessiblemem_or_argmemonly() #33
 
 ; Functions -- section
 declare void @f.section() section "80"
 ; CHECK: declare void @f.section() section "80"
 
 ; Functions -- comdat
 define void @f.comdat_any() comdat($comdat.any) {
 ; CHECK: define void @f.comdat_any() comdat($comdat.any)

 ; Functions -- Prologue data
 declare void @f.prologuei32() prologue i32 1684365669
 ; CHECK: declare void @f.prologuei32() prologue i32 1684365669
 declare void @f.prologuearray() prologue [4 x i32] [i32 0, i32 1, i32 2, i32 3]
 ; CHECK: declare void @f.prologuearray() prologue [4 x i32] [i32 0, i32 1, i32 2, i32 3]
 
 ; Functions -- Personality constant
 declare void @llvm.donothing() nounwind readnone
-; CHECK: declare void @llvm.donothing() #35
+; CHECK: declare void @llvm.donothing() #34
 define void @f.no_personality() personality i8 3 {
 ; CHECK: define void @f.no_personality() personality i8 3
   invoke void @llvm.donothing() to label %normal unwind label %exception
 exception:
   %cleanup = landingpad i8 cleanup
   br label %normal
 normal:
   ret void
exit:
   ; CHECK: select i1 true, i32 0, i32 1
   select <2 x i1> <i1 true, i1 false>, <2 x i8> <i8 2, i8 3>, <2 x i8> <i8 3, i8 2>
   ; CHECK: select <2 x i1> <i1 true, i1 false>, <2 x i8> <i8 2, i8 3>, <2 x i8> <i8 3, i8 2>
 
   call void @f.nobuiltin() builtin
   ; CHECK: call void @f.nobuiltin() #42
 
   call fastcc noalias i32* @f.noalias() noinline
-  ; CHECK: call fastcc noalias i32* @f.noalias() #12
+  ; CHECK: call fastcc noalias i32* @f.noalias() #11
   tail call ghccc nonnull i32* @f.nonnull() minsize
-  ; CHECK: tail call ghccc nonnull i32* @f.nonnull() #7
+  ; CHECK: tail call ghccc nonnull i32* @f.nonnull() #6
 
   ret void
 }
 
 define void @instructions.call_musttail(i8* inalloca %val) {
   musttail call void @f.param.inalloca(i8* inalloca %val)
   ; CHECK: musttail call void @f.param.inalloca(i8* inalloca %val)
 

 
 declare void @f.writeonly() writeonly
 ; CHECK: declare void @f.writeonly() #40
 
 ; CHECK: attributes #0 = { alignstack=4 }
 ; CHECK: attributes #1 = { alignstack=8 }
 ; CHECK: attributes #2 = { alwaysinline }
 ; CHECK: attributes #3 = { cold }
-; CHECK: attributes #4 = { convergent }
-; CHECK: attributes #5 = { inlinehint }
-; CHECK: attributes #6 = { jumptable }
-; CHECK: attributes #7 = { minsize }
-; CHECK: attributes #8 = { naked }
-; CHECK: attributes #9 = { nobuiltin }
-; CHECK: attributes #10 = { noduplicate }
-; CHECK: attributes #11 = { noimplicitfloat }
-; CHECK: attributes #12 = { noinline }
-; CHECK: attributes #13 = { nonlazybind }
-; CHECK: attributes #14 = { noredzone }
-; CHECK: attributes #15 = { noreturn }
-; CHECK: attributes #16 = { nounwind }
-; CHECK: attributes #17 = { noinline optnone }
-; CHECK: attributes #18 = { optsize }
-; CHECK: attributes #19 = { readnone }
-; CHECK: attributes #20 = { readonly }
-; CHECK: attributes #21 = { returns_twice }
-; CHECK: attributes #22 = { safestack }
-; CHECK: attributes #23 = { sanitize_address }
-; CHECK: attributes #24 = { sanitize_memory }
-; CHECK: attributes #25 = { sanitize_thread }
-; CHECK: attributes #26 = { ssp }
-; CHECK: attributes #27 = { sspreq }
-; CHECK: attributes #28 = { sspstrong }
-; CHECK: attributes #29 = { "thunk" }
-; CHECK: attributes #30 = { uwtable }
-; CHECK: attributes #31 = { "cpu"="cortex-a8" }
-; CHECK: attributes #32 = { norecurse }
-; CHECK: attributes #33 = { inaccessiblememonly }
-; CHECK: attributes #34 = { inaccessiblemem_or_argmemonly }
-; CHECK: attributes #35 = { nounwind readnone willreturn }
-; CHECK: attributes #36 = { argmemonly nounwind readonly }
-; CHECK: attributes #37 = { argmemonly nounwind }
-; CHECK: attributes #38 = { nounwind readnone }
+; CHECK: attributes #4 = { inlinehint }
+; CHECK: attributes #5 = { jumptable }
+; CHECK: attributes #6 = { minsize }
+; CHECK: attributes #7 = { naked }
+; CHECK: attributes #8 = { nobuiltin }
+; CHECK: attributes #9 = { noduplicate }
+; CHECK: attributes #10 = { noimplicitfloat }
+; CHECK: attributes #11 = { noinline }
+; CHECK: attributes #12 = { nonlazybind }
+; CHECK: attributes #13 = { noredzone }
+; CHECK: attributes #14 = { noreturn }
+; CHECK: attributes #15 = { nounwind }
+; CHECK: attributes #16 = { noinline optnone }
+; CHECK: attributes #17 = { optsize }
+; CHECK: attributes #18 = { readnone }
+; CHECK: attributes #19 = { readonly }
+; CHECK: attributes #20 = { returns_twice }
+; CHECK: attributes #21 = { safestack }
+; CHECK: attributes #22 = { sanitize_address }
+; CHECK: attributes #23 = { sanitize_memory }
+; CHECK: attributes #24 = { sanitize_thread }
+; CHECK: attributes #25 = { ssp }
+; CHECK: attributes #26 = { sspreq }
+; CHECK: attributes #27 = { sspstrong }
+; CHECK: attributes #28 = { "thunk" }
+; CHECK: attributes #29 = { uwtable }
+; CHECK: attributes #30 = { "cpu"="cortex-a8" }
+; CHECK: attributes #31 = { norecurse }
+; CHECK: attributes #32 = { inaccessiblememonly }
+; CHECK: attributes #33 = { inaccessiblemem_or_argmemonly }
+; CHECK: attributes #34 = { noconvergent nounwind readnone willreturn }
+; CHECK: attributes #35 = { noconvergent nounwind }
+; CHECK: attributes #36 = { argmemonly noconvergent nounwind readonly }
+; CHECK: attributes #37 = { argmemonly noconvergent nounwind }
+; CHECK: attributes #38 = { noconvergent nounwind readnone }
 ; CHECK: attributes #39 = { nounwind readonly }
 ; CHECK: attributes #40 = { writeonly }
-; CHECK: attributes #41 = { inaccessiblemem_or_argmemonly nounwind willreturn }
+; CHECK: attributes #41 = { inaccessiblemem_or_argmemonly noconvergent nounwind willreturn }
 ; CHECK: attributes #42 = { builtin }
 
 ;; Metadata
 
 ; Metadata -- Module flags
 !llvm.module.flags = !{!0, !1, !2, !4, !5, !6}
 ; CHECK: !llvm.module.flags = !{!0, !1, !2, !4, !5, !6}
 

llvm/test/Bitcode/compatibility-4.0.ll

 declare void @f.alignstack4() alignstack(4)
 ; CHECK: declare void @f.alignstack4() #0
 declare void @f.alignstack8() alignstack(8)
 ; CHECK: declare void @f.alignstack8() #1
 declare void @f.alwaysinline() alwaysinline
 ; CHECK: declare void @f.alwaysinline() #2
 declare void @f.cold() cold
 ; CHECK: declare void @f.cold() #3
-declare void @f.convergent() convergent
-; CHECK: declare void @f.convergent() #4
 declare void @f.inlinehint() inlinehint
-; CHECK: declare void @f.inlinehint() #5
+; CHECK: declare void @f.inlinehint() #4
 declare void @f.jumptable() unnamed_addr jumptable
-; CHECK: declare void @f.jumptable() unnamed_addr #6
+; CHECK: declare void @f.jumptable() unnamed_addr #5
 declare void @f.minsize() minsize
-; CHECK: declare void @f.minsize() #7
+; CHECK: declare void @f.minsize() #6
 declare void @f.naked() naked
-; CHECK: declare void @f.naked() #8
+; CHECK: declare void @f.naked() #7
 declare void @f.nobuiltin() nobuiltin
-; CHECK: declare void @f.nobuiltin() #9
+; CHECK: declare void @f.nobuiltin() #8
 declare void @f.noduplicate() noduplicate
-; CHECK: declare void @f.noduplicate() #10
+; CHECK: declare void @f.noduplicate() #9
 declare void @f.noimplicitfloat() noimplicitfloat
-; CHECK: declare void @f.noimplicitfloat() #11
+; CHECK: declare void @f.noimplicitfloat() #10
 declare void @f.noinline() noinline
-; CHECK: declare void @f.noinline() #12
+; CHECK: declare void @f.noinline() #11
 declare void @f.nonlazybind() nonlazybind
-; CHECK: declare void @f.nonlazybind() #13
+; CHECK: declare void @f.nonlazybind() #12
 declare void @f.noredzone() noredzone
-; CHECK: declare void @f.noredzone() #14
+; CHECK: declare void @f.noredzone() #13
 declare void @f.noreturn() noreturn
-; CHECK: declare void @f.noreturn() #15
+; CHECK: declare void @f.noreturn() #14
 declare void @f.nounwind() nounwind
-; CHECK: declare void @f.nounwind() #16
+; CHECK: declare void @f.nounwind() #15
 declare void @f.optnone() noinline optnone
-; CHECK: declare void @f.optnone() #17
+; CHECK: declare void @f.optnone() #16
 declare void @f.optsize() optsize
-; CHECK: declare void @f.optsize() #18
+; CHECK: declare void @f.optsize() #17
 declare void @f.readnone() readnone
-; CHECK: declare void @f.readnone() #19
+; CHECK: declare void @f.readnone() #18
 declare void @f.readonly() readonly
-; CHECK: declare void @f.readonly() #20
+; CHECK: declare void @f.readonly() #19
 declare void @f.returns_twice() returns_twice
-; CHECK: declare void @f.returns_twice() #21
+; CHECK: declare void @f.returns_twice() #20
 declare void @f.safestack() safestack
-; CHECK: declare void @f.safestack() #22
+; CHECK: declare void @f.safestack() #21
 declare void @f.sanitize_address() sanitize_address
-; CHECK: declare void @f.sanitize_address() #23
+; CHECK: declare void @f.sanitize_address() #22
 declare void @f.sanitize_memory() sanitize_memory
-; CHECK: declare void @f.sanitize_memory() #24
+; CHECK: declare void @f.sanitize_memory() #23
 declare void @f.sanitize_thread() sanitize_thread
-; CHECK: declare void @f.sanitize_thread() #25
+; CHECK: declare void @f.sanitize_thread() #24
 declare void @f.ssp() ssp
-; CHECK: declare void @f.ssp() #26
+; CHECK: declare void @f.ssp() #25
 declare void @f.sspreq() sspreq
-; CHECK: declare void @f.sspreq() #27
+; CHECK: declare void @f.sspreq() #26
 declare void @f.sspstrong() sspstrong
-; CHECK: declare void @f.sspstrong() #28
+; CHECK: declare void @f.sspstrong() #27
 declare void @f.thunk() "thunk"
-; CHECK: declare void @f.thunk() #29
+; CHECK: declare void @f.thunk() #28
 declare void @f.uwtable() uwtable
-; CHECK: declare void @f.uwtable() #30
+; CHECK: declare void @f.uwtable() #29
 declare void @f.kvpair() "cpu"="cortex-a8"
-; CHECK:declare void @f.kvpair() #31
+; CHECK:declare void @f.kvpair() #30
 declare void @f.norecurse() norecurse
-; CHECK: declare void @f.norecurse() #32
+; CHECK: declare void @f.norecurse() #31
 declare void @f.inaccessiblememonly() inaccessiblememonly
-; CHECK: declare void @f.inaccessiblememonly() #33
+; CHECK: declare void @f.inaccessiblememonly() #32
 declare void @f.inaccessiblemem_or_argmemonly() inaccessiblemem_or_argmemonly
-; CHECK: declare void @f.inaccessiblemem_or_argmemonly() #34
+; CHECK: declare void @f.inaccessiblemem_or_argmemonly() #33
 
 ; Functions -- section
 declare void @f.section() section "80"
 ; CHECK: declare void @f.section() section "80"
 
 ; Functions -- comdat
 define void @f.comdat_any() comdat($comdat.any) {
 ; CHECK: define void @f.comdat_any() comdat($comdat.any)

 ; Functions -- Prologue data
 declare void @f.prologuei32() prologue i32 1684365669
 ; CHECK: declare void @f.prologuei32() prologue i32 1684365669
 declare void @f.prologuearray() prologue [4 x i32] [i32 0, i32 1, i32 2, i32 3]
 ; CHECK: declare void @f.prologuearray() prologue [4 x i32] [i32 0, i32 1, i32 2, i32 3]
 
 ; Functions -- Personality constant
 declare void @llvm.donothing() nounwind readnone
-; CHECK: declare void @llvm.donothing() #35
+; CHECK: declare void @llvm.donothing() #34
 define void @f.no_personality() personality i8 3 {
 ; CHECK: define void @f.no_personality() personality i8 3
   invoke void @llvm.donothing() to label %normal unwind label %exception
 exception:
   %cleanup = landingpad i8 cleanup
   br label %normal
 normal:
   ret void
exit:
   ; CHECK: select i1 true, i32 0, i32 1
   select <2 x i1> <i1 true, i1 false>, <2 x i8> <i8 2, i8 3>, <2 x i8> <i8 3, i8 2>
   ; CHECK: select <2 x i1> <i1 true, i1 false>, <2 x i8> <i8 2, i8 3>, <2 x i8> <i8 3, i8 2>
 
   call void @f.nobuiltin() builtin
   ; CHECK: call void @f.nobuiltin() #42
 
   call fastcc noalias i32* @f.noalias() noinline
-  ; CHECK: call fastcc noalias i32* @f.noalias() #12
+  ; CHECK: call fastcc noalias i32* @f.noalias() #11
   tail call ghccc nonnull i32* @f.nonnull() minsize
-  ; CHECK: tail call ghccc nonnull i32* @f.nonnull() #7
+  ; CHECK: tail call ghccc nonnull i32* @f.nonnull() #6
 
   ret void
 }
 
 define void @instructions.call_musttail(i8* inalloca %val) {
   musttail call void @f.param.inalloca(i8* inalloca %val)
   ; CHECK: musttail call void @f.param.inalloca(i8* inalloca %val)
 
define i8** @constexpr() {
   ; CHECK: ret i8** getelementptr inbounds ({ [4 x i8*], [4 x i8*] }, { [4 x i8*], [4 x i8*] }* null, i32 0, inrange i32 1, i32 2)
   ret i8** getelementptr inbounds ({ [4 x i8*], [4 x i8*] }, { [4 x i8*], [4 x i8*] }* null, i32 0, inrange i32 1, i32 2)
 }
 
 ; CHECK: attributes #0 = { alignstack=4 }
 ; CHECK: attributes #1 = { alignstack=8 }
 ; CHECK: attributes #2 = { alwaysinline }
 ; CHECK: attributes #3 = { cold }
-; CHECK: attributes #4 = { convergent }
-; CHECK: attributes #5 = { inlinehint }
-; CHECK: attributes #6 = { jumptable }
-; CHECK: attributes #7 = { minsize }
-; CHECK: attributes #8 = { naked }
-; CHECK: attributes #9 = { nobuiltin }
-; CHECK: attributes #10 = { noduplicate }
-; CHECK: attributes #11 = { noimplicitfloat }
-; CHECK: attributes #12 = { noinline }
-; CHECK: attributes #13 = { nonlazybind }
-; CHECK: attributes #14 = { noredzone }
-; CHECK: attributes #15 = { noreturn }
-; CHECK: attributes #16 = { nounwind }
-; CHECK: attributes #17 = { noinline optnone }
-; CHECK: attributes #18 = { optsize }
-; CHECK: attributes #19 = { readnone }
-; CHECK: attributes #20 = { readonly }
-; CHECK: attributes #21 = { returns_twice }
-; CHECK: attributes #22 = { safestack }
-; CHECK: attributes #23 = { sanitize_address }
-; CHECK: attributes #24 = { sanitize_memory }
-; CHECK: attributes #25 = { sanitize_thread }
-; CHECK: attributes #26 = { ssp }
-; CHECK: attributes #27 = { sspreq }
-; CHECK: attributes #28 = { sspstrong }
-; CHECK: attributes #29 = { "thunk" }
-; CHECK: attributes #30 = { uwtable }
-; CHECK: attributes #31 = { "cpu"="cortex-a8" }
-; CHECK: attributes #32 = { norecurse }
-; CHECK: attributes #33 = { inaccessiblememonly }
-; CHECK: attributes #34 = { inaccessiblemem_or_argmemonly }
-; CHECK: attributes #35 = { nounwind readnone willreturn }
-; CHECK: attributes #36 = { argmemonly nounwind readonly }
-; CHECK: attributes #37 = { argmemonly nounwind }
-; CHECK: attributes #38 = { nounwind readnone }
+; CHECK: attributes #4 = { inlinehint }
+; CHECK: attributes #5 = { jumptable }
+; CHECK: attributes #6 = { minsize }
+; CHECK: attributes #7 = { naked }
+; CHECK: attributes #8 = { nobuiltin }
+; CHECK: attributes #9 = { noduplicate }
+; CHECK: attributes #10 = { noimplicitfloat }
+; CHECK: attributes #11 = { noinline }
+; CHECK: attributes #12 = { nonlazybind }
+; CHECK: attributes #13 = { noredzone }
+; CHECK: attributes #14 = { noreturn }
+; CHECK: attributes #15 = { nounwind }
+; CHECK: attributes #16 = { noinline optnone }
+; CHECK: attributes #17 = { optsize }
+; CHECK: attributes #18 = { readnone }
+; CHECK: attributes #19 = { readonly }
+; CHECK: attributes #20 = { returns_twice }
+; CHECK: attributes #21 = { safestack }
+; CHECK: attributes #22 = { sanitize_address }
+; CHECK: attributes #23 = { sanitize_memory }
+; CHECK: attributes #24 = { sanitize_thread }
+; CHECK: attributes #25 = { ssp }
+; CHECK: attributes #26 = { sspreq }
+; CHECK: attributes #27 = { sspstrong }
+; CHECK: attributes #28 = { "thunk" }
+; CHECK: attributes #29 = { uwtable }
+; CHECK: attributes #30 = { "cpu"="cortex-a8" }
+; CHECK: attributes #31 = { norecurse }
+; CHECK: attributes #32 = { inaccessiblememonly }
+; CHECK: attributes #33 = { inaccessiblemem_or_argmemonly }
+; CHECK: attributes #34 = { noconvergent nounwind readnone willreturn }
+; CHECK: attributes #35 = { noconvergent nounwind }
+; CHECK: attributes #36 = { argmemonly noconvergent nounwind readonly }
+; CHECK: attributes #37 = { argmemonly noconvergent nounwind }
+; CHECK: attributes #38 = { noconvergent nounwind readnone }
 ; CHECK: attributes #39 = { nounwind readonly }
 ; CHECK: attributes #40 = { writeonly }
-; CHECK: attributes #41 = { inaccessiblemem_or_argmemonly nounwind willreturn }
+; CHECK: attributes #41 = { inaccessiblemem_or_argmemonly noconvergent nounwind willreturn }
 ; CHECK: attributes #42 = { builtin }
 
+
 ;; Metadata
 
 ; Metadata -- Module flags
 !llvm.module.flags = !{!0, !1, !2, !4, !5, !6}
 ; CHECK: !llvm.module.flags = !{!0, !1, !2, !4, !5, !6}
 
 !0 = !{i32 1, !"mod1", i32 0}
 ; CHECK: !0 = !{i32 1, !"mod1", i32 0}

llvm/test/Bitcode/compatibility-5.0.ll

 declare void @f.alignstack4() alignstack(4)
 ; CHECK: declare void @f.alignstack4() #0
 declare void @f.alignstack8() alignstack(8)
 ; CHECK: declare void @f.alignstack8() #1
 declare void @f.alwaysinline() alwaysinline
 ; CHECK: declare void @f.alwaysinline() #2
 declare void @f.cold() cold
 ; CHECK: declare void @f.cold() #3
-declare void @f.convergent() convergent
-; CHECK: declare void @f.convergent() #4
 declare void @f.inlinehint() inlinehint
-; CHECK: declare void @f.inlinehint() #5
+; CHECK: declare void @f.inlinehint() #4
 declare void @f.jumptable() unnamed_addr jumptable
-; CHECK: declare void @f.jumptable() unnamed_addr #6
+; CHECK: declare void @f.jumptable() unnamed_addr #5
 declare void @f.minsize() minsize
-; CHECK: declare void @f.minsize() #7
+; CHECK: declare void @f.minsize() #6
 declare void @f.naked() naked
-; CHECK: declare void @f.naked() #8
+; CHECK: declare void @f.naked() #7
 declare void @f.nobuiltin() nobuiltin
-; CHECK: declare void @f.nobuiltin() #9
+; CHECK: declare void @f.nobuiltin() #8
 declare void @f.noduplicate() noduplicate
-; CHECK: declare void @f.noduplicate() #10
+; CHECK: declare void @f.noduplicate() #9
 declare void @f.noimplicitfloat() noimplicitfloat
-; CHECK: declare void @f.noimplicitfloat() #11
+; CHECK: declare void @f.noimplicitfloat() #10
 declare void @f.noinline() noinline
-; CHECK: declare void @f.noinline() #12
+; CHECK: declare void @f.noinline() #11
 declare void @f.nonlazybind() nonlazybind
-; CHECK: declare void @f.nonlazybind() #13
+; CHECK: declare void @f.nonlazybind() #12
 declare void @f.noredzone() noredzone
-; CHECK: declare void @f.noredzone() #14
+; CHECK: declare void @f.noredzone() #13
 declare void @f.noreturn() noreturn
-; CHECK: declare void @f.noreturn() #15
+; CHECK: declare void @f.noreturn() #14
 declare void @f.nounwind() nounwind
-; CHECK: declare void @f.nounwind() #16
+; CHECK: declare void @f.nounwind() #15
 declare void @f.optnone() noinline optnone
-; CHECK: declare void @f.optnone() #17
+; CHECK: declare void @f.optnone() #16
 declare void @f.optsize() optsize
-; CHECK: declare void @f.optsize() #18
+; CHECK: declare void @f.optsize() #17
 declare void @f.readnone() readnone
-; CHECK: declare void @f.readnone() #19
+; CHECK: declare void @f.readnone() #18
 declare void @f.readonly() readonly
-; CHECK: declare void @f.readonly() #20
+; CHECK: declare void @f.readonly() #19
 declare void @f.returns_twice() returns_twice
-; CHECK: declare void @f.returns_twice() #21
+; CHECK: declare void @f.returns_twice() #20
 declare void @f.safestack() safestack
-; CHECK: declare void @f.safestack() #22
+; CHECK: declare void @f.safestack() #21
 declare void @f.sanitize_address() sanitize_address
-; CHECK: declare void @f.sanitize_address() #23
+; CHECK: declare void @f.sanitize_address() #22
 declare void @f.sanitize_memory() sanitize_memory
-; CHECK: declare void @f.sanitize_memory() #24
+; CHECK: declare void @f.sanitize_memory() #23
 declare void @f.sanitize_thread() sanitize_thread
-; CHECK: declare void @f.sanitize_thread() #25
+; CHECK: declare void @f.sanitize_thread() #24
 declare void @f.ssp() ssp
-; CHECK: declare void @f.ssp() #26
+; CHECK: declare void @f.ssp() #25
 declare void @f.sspreq() sspreq
-; CHECK: declare void @f.sspreq() #27
+; CHECK: declare void @f.sspreq() #26
 declare void @f.sspstrong() sspstrong
-; CHECK: declare void @f.sspstrong() #28
+; CHECK: declare void @f.sspstrong() #27
 declare void @f.thunk() "thunk"
-; CHECK: declare void @f.thunk() #29
+; CHECK: declare void @f.thunk() #28
 declare void @f.uwtable() uwtable
-; CHECK: declare void @f.uwtable() #30
+; CHECK: declare void @f.uwtable() #29
 declare void @f.kvpair() "cpu"="cortex-a8"
-; CHECK:declare void @f.kvpair() #31
+; CHECK:declare void @f.kvpair() #30
 declare void @f.norecurse() norecurse
-; CHECK: declare void @f.norecurse() #32
+; CHECK: declare void @f.norecurse() #31
 declare void @f.inaccessiblememonly() inaccessiblememonly
-; CHECK: declare void @f.inaccessiblememonly() #33
+; CHECK: declare void @f.inaccessiblememonly() #32
 declare void @f.inaccessiblemem_or_argmemonly() inaccessiblemem_or_argmemonly
-; CHECK: declare void @f.inaccessiblemem_or_argmemonly() #34
+; CHECK: declare void @f.inaccessiblemem_or_argmemonly() #33
 declare void @f.strictfp() #35
 
 ; Functions -- section
 declare void @f.section() section "80"
 ; CHECK: declare void @f.section() section "80"
 
 ; Functions -- comdat
 define void @f.comdat_any() comdat($comdat.any) {

 ; Functions -- Prologue data
 declare void @f.prologuei32() prologue i32 1684365669
 ; CHECK: declare void @f.prologuei32() prologue i32 1684365669
 declare void @f.prologuearray() prologue [4 x i32] [i32 0, i32 1, i32 2, i32 3]
 ; CHECK: declare void @f.prologuearray() prologue [4 x i32] [i32 0, i32 1, i32 2, i32 3]
 
 ; Functions -- Personality constant
 declare void @llvm.donothing() nounwind readnone
-; CHECK: declare void @llvm.donothing() #35
+; CHECK: declare void @llvm.donothing() #34
 define void @f.no_personality() personality i8 3 {
 ; CHECK: define void @f.no_personality() personality i8 3
   invoke void @llvm.donothing() to label %normal unwind label %exception
 exception:
   %cleanup = landingpad i8 cleanup
   br label %normal
 normal:
   ret void
exit:
 
   call void @f.nobuiltin() builtin
   ; CHECK: call void @f.nobuiltin() #43
 
   call void @f.strictfp() strictfp
   ; CHECK: call void @f.strictfp() #44
 
   call fastcc noalias i32* @f.noalias() noinline
-  ; CHECK: call fastcc noalias i32* @f.noalias() #12
+  ; CHECK: call fastcc noalias i32* @f.noalias() #11
   tail call ghccc nonnull i32* @f.nonnull() minsize
-  ; CHECK: tail call ghccc nonnull i32* @f.nonnull() #7
+  ; CHECK: tail call ghccc nonnull i32* @f.nonnull() #6
 
   ret void
 }
 
 define void @instructions.call_musttail(i8* inalloca %val) {
   musttail call void @f.param.inalloca(i8* inalloca %val)
   ; CHECK: musttail call void @f.param.inalloca(i8* inalloca %val)
 
define i8** @constexpr() {
   ; CHECK: ret i8** getelementptr inbounds ({ [4 x i8*], [4 x i8*] }, { [4 x i8*], [4 x i8*] }* null, i32 0, inrange i32 1, i32 2)
   ret i8** getelementptr inbounds ({ [4 x i8*], [4 x i8*] }, { [4 x i8*], [4 x i8*] }* null, i32 0, inrange i32 1, i32 2)
 }
 
 ; CHECK: attributes #0 = { alignstack=4 }
 ; CHECK: attributes #1 = { alignstack=8 }
 ; CHECK: attributes #2 = { alwaysinline }
 ; CHECK: attributes #3 = { cold }
-; CHECK: attributes #4 = { convergent }
-; CHECK: attributes #5 = { inlinehint }
-; CHECK: attributes #6 = { jumptable }
-; CHECK: attributes #7 = { minsize }
-; CHECK: attributes #8 = { naked }
-; CHECK: attributes #9 = { nobuiltin }
-; CHECK: attributes #10 = { noduplicate }
-; CHECK: attributes #11 = { noimplicitfloat }
-; CHECK: attributes #12 = { noinline }
-; CHECK: attributes #13 = { nonlazybind }
-; CHECK: attributes #14 = { noredzone }
-; CHECK: attributes #15 = { noreturn }
-; CHECK: attributes #16 = { nounwind }
-; CHECK: attributes #17 = { noinline optnone }
-; CHECK: attributes #18 = { optsize }
-; CHECK: attributes #19 = { readnone }
-; CHECK: attributes #20 = { readonly }
-; CHECK: attributes #21 = { returns_twice }
-; CHECK: attributes #22 = { safestack }
-; CHECK: attributes #23 = { sanitize_address }
-; CHECK: attributes #24 = { sanitize_memory }
-; CHECK: attributes #25 = { sanitize_thread }
-; CHECK: attributes #26 = { ssp }
-; CHECK: attributes #27 = { sspreq }
-; CHECK: attributes #28 = { sspstrong }
-; CHECK: attributes #29 = { "thunk" }
-; CHECK: attributes #30 = { uwtable }
-; CHECK: attributes #31 = { "cpu"="cortex-a8" }
-; CHECK: attributes #32 = { norecurse }
-; CHECK: attributes #33 = { inaccessiblememonly }
-; CHECK: attributes #34 = { inaccessiblemem_or_argmemonly }
-; CHECK: attributes #35 = { nounwind readnone willreturn }
-; CHECK: attributes #36 = { argmemonly nounwind readonly }
-; CHECK: attributes #37 = { argmemonly nounwind }
-; CHECK: attributes #38 = { nounwind readnone }
+; CHECK: attributes #4 = { inlinehint }
+; CHECK: attributes #5 = { jumptable }
+; CHECK: attributes #6 = { minsize }
+; CHECK: attributes #7 = { naked }
+; CHECK: attributes #8 = { nobuiltin }
+; CHECK: attributes #9 = { noduplicate }
+; CHECK: attributes #10 = { noimplicitfloat }
+; CHECK: attributes #11 = { noinline }
+; CHECK: attributes #12 = { nonlazybind }
+; CHECK: attributes #13 = { noredzone }
+; CHECK: attributes #14 = { noreturn }
+; CHECK: attributes #15 = { nounwind }
+; CHECK: attributes #16 = { noinline optnone }
+; CHECK: attributes #17 = { optsize }
+; CHECK: attributes #18 = { readnone }
+; CHECK: attributes #19 = { readonly }
+; CHECK: attributes #20 = { returns_twice }
+; CHECK: attributes #21 = { safestack }
+; CHECK: attributes #22 = { sanitize_address }
+; CHECK: attributes #23 = { sanitize_memory }
+; CHECK: attributes #24 = { sanitize_thread }
+; CHECK: attributes #25 = { ssp }
+; CHECK: attributes #26 = { sspreq }
+; CHECK: attributes #27 = { sspstrong }
+; CHECK: attributes #28 = { "thunk" }
+; CHECK: attributes #29 = { uwtable }
+; CHECK: attributes #30 = { "cpu"="cortex-a8" }
+; CHECK: attributes #31 = { norecurse }
+; CHECK: attributes #32 = { inaccessiblememonly }
+; CHECK: attributes #33 = { inaccessiblemem_or_argmemonly }
+; CHECK: attributes #34 = { noconvergent nounwind readnone willreturn }
+; CHECK: attributes #35 = { noconvergent nounwind }
+; CHECK: attributes #36 = { argmemonly noconvergent nounwind readonly }
+; CHECK: attributes #37 = { argmemonly noconvergent nounwind }
+; CHECK: attributes #38 = { noconvergent nounwind readnone }
 ; CHECK: attributes #39 = { nounwind readonly }
 ; CHECK: attributes #40 = { writeonly }
 ; CHECK: attributes #41 = { speculatable }
-; CHECK: attributes #42 = { inaccessiblemem_or_argmemonly nounwind willreturn }
+; CHECK: attributes #42 = { inaccessiblemem_or_argmemonly noconvergent nounwind willreturn }
 ; CHECK: attributes #43 = { builtin }
 ; CHECK: attributes #44 = { strictfp }
 
 ;; Metadata
 
 ; Metadata -- Module flags
 !llvm.module.flags = !{!0, !1, !2, !4, !5, !6}
 ; CHECK: !llvm.module.flags = !{!0, !1, !2, !4, !5, !6}

llvm/test/Bitcode/compatibility-6.0.ll

 declare void @f.alignstack4() alignstack(4)
 ; CHECK: declare void @f.alignstack4() #0
 declare void @f.alignstack8() alignstack(8)
 ; CHECK: declare void @f.alignstack8() #1
 declare void @f.alwaysinline() alwaysinline
 ; CHECK: declare void @f.alwaysinline() #2
 declare void @f.cold() cold
 ; CHECK: declare void @f.cold() #3
-declare void @f.convergent() convergent
-; CHECK: declare void @f.convergent() #4
 declare void @f.inlinehint() inlinehint
-; CHECK: declare void @f.inlinehint() #5
+; CHECK: declare void @f.inlinehint() #4
 declare void @f.jumptable() unnamed_addr jumptable
-; CHECK: declare void @f.jumptable() unnamed_addr #6
+; CHECK: declare void @f.jumptable() unnamed_addr #5
 declare void @f.minsize() minsize
-; CHECK: declare void @f.minsize() #7
+; CHECK: declare void @f.minsize() #6
 declare void @f.naked() naked
-; CHECK: declare void @f.naked() #8
+; CHECK: declare void @f.naked() #7
 declare void @f.nobuiltin() nobuiltin
-; CHECK: declare void @f.nobuiltin() #9
+; CHECK: declare void @f.nobuiltin() #8
 declare void @f.noduplicate() noduplicate
-; CHECK: declare void @f.noduplicate() #10
+; CHECK: declare void @f.noduplicate() #9
 declare void @f.noimplicitfloat() noimplicitfloat
-; CHECK: declare void @f.noimplicitfloat() #11
+; CHECK: declare void @f.noimplicitfloat() #10
 declare void @f.noinline() noinline
-; CHECK: declare void @f.noinline() #12
+; CHECK: declare void @f.noinline() #11
 declare void @f.nonlazybind() nonlazybind
-; CHECK: declare void @f.nonlazybind() #13
+; CHECK: declare void @f.nonlazybind() #12
 declare void @f.noredzone() noredzone
-; CHECK: declare void @f.noredzone() #14
+; CHECK: declare void @f.noredzone() #13
 declare void @f.noreturn() noreturn
-; CHECK: declare void @f.noreturn() #15
+; CHECK: declare void @f.noreturn() #14
 declare void @f.nounwind() nounwind
-; CHECK: declare void @f.nounwind() #16
+; CHECK: declare void @f.nounwind() #15
 declare void @f.optnone() noinline optnone
-; CHECK: declare void @f.optnone() #17
+; CHECK: declare void @f.optnone() #16
 declare void @f.optsize() optsize
-; CHECK: declare void @f.optsize() #18
+; CHECK: declare void @f.optsize() #17
 declare void @f.readnone() readnone
-; CHECK: declare void @f.readnone() #19
+; CHECK: declare void @f.readnone() #18
 declare void @f.readonly() readonly
-; CHECK: declare void @f.readonly() #20
+; CHECK: declare void @f.readonly() #19
 declare void @f.returns_twice() returns_twice
-; CHECK: declare void @f.returns_twice() #21
+; CHECK: declare void @f.returns_twice() #20
 declare void @f.safestack() safestack
-; CHECK: declare void @f.safestack() #22
+; CHECK: declare void @f.safestack() #21
 declare void @f.sanitize_address() sanitize_address
-; CHECK: declare void @f.sanitize_address() #23
+; CHECK: declare void @f.sanitize_address() #22
 declare void @f.sanitize_memory() sanitize_memory
-; CHECK: declare void @f.sanitize_memory() #24
+; CHECK: declare void @f.sanitize_memory() #23
 declare void @f.sanitize_thread() sanitize_thread
-; CHECK: declare void @f.sanitize_thread() #25
+; CHECK: declare void @f.sanitize_thread() #24
 declare void @f.ssp() ssp
-; CHECK: declare void @f.ssp() #26
+; CHECK: declare void @f.ssp() #25
 declare void @f.sspreq() sspreq
-; CHECK: declare void @f.sspreq() #27
+; CHECK: declare void @f.sspreq() #26
 declare void @f.sspstrong() sspstrong
-; CHECK: declare void @f.sspstrong() #28
+; CHECK: declare void @f.sspstrong() #27
 declare void @f.thunk() "thunk"
-; CHECK: declare void @f.thunk() #29
+; CHECK: declare void @f.thunk() #28
 declare void @f.uwtable() uwtable
-; CHECK: declare void @f.uwtable() #30
+; CHECK: declare void @f.uwtable() #29
 declare void @f.kvpair() "cpu"="cortex-a8"
-; CHECK:declare void @f.kvpair() #31
+; CHECK:declare void @f.kvpair() #30
 declare void @f.norecurse() norecurse
-; CHECK: declare void @f.norecurse() #32
+; CHECK: declare void @f.norecurse() #31
 declare void @f.inaccessiblememonly() inaccessiblememonly
-; CHECK: declare void @f.inaccessiblememonly() #33
+; CHECK: declare void @f.inaccessiblememonly() #32
 declare void @f.inaccessiblemem_or_argmemonly() inaccessiblemem_or_argmemonly
-; CHECK: declare void @f.inaccessiblemem_or_argmemonly() #34
+; CHECK: declare void @f.inaccessiblemem_or_argmemonly() #33
 declare void @f.strictfp() #35
 
 ; Functions -- section
 declare void @f.section() section "80"
 ; CHECK: declare void @f.section() section "80"
 
 ; Functions -- comdat
 define void @f.comdat_any() comdat($comdat.any) {

 ; Functions -- Prologue data
 declare void @f.prologuei32() prologue i32 1684365669
 ; CHECK: declare void @f.prologuei32() prologue i32 1684365669
 declare void @f.prologuearray() prologue [4 x i32] [i32 0, i32 1, i32 2, i32 3]
 ; CHECK: declare void @f.prologuearray() prologue [4 x i32] [i32 0, i32 1, i32 2, i32 3]
 
 ; Functions -- Personality constant
 declare void @llvm.donothing() nounwind readnone
-; CHECK: declare void @llvm.donothing() #35
+; CHECK: declare void @llvm.donothing() #34
 define void @f.no_personality() personality i8 3 {
 ; CHECK: define void @f.no_personality() personality i8 3
   invoke void @llvm.donothing() to label %normal unwind label %exception
 exception:
   %cleanup = landingpad i8 cleanup
   br label %normal
 normal:
   ret void
exit:
 
   call void @f.nobuiltin() builtin
   ; CHECK: call void @f.nobuiltin() #43
 
   call void @f.strictfp() strictfp
   ; CHECK: call void @f.strictfp() #44
 
   call fastcc noalias i32* @f.noalias() noinline
-  ; CHECK: call fastcc noalias i32* @f.noalias() #12
+  ; CHECK: call fastcc noalias i32* @f.noalias() #11
   tail call ghccc nonnull i32* @f.nonnull() minsize
-  ; CHECK: tail call ghccc nonnull i32* @f.nonnull() #7
+  ; CHECK: tail call ghccc nonnull i32* @f.nonnull() #6
 
   ret void
 }
 
 define void @instructions.call_musttail(i8* inalloca %val) {
   musttail call void @f.param.inalloca(i8* inalloca %val)
   ; CHECK: musttail call void @f.param.inalloca(i8* inalloca %val)
 
define i8** @constexpr() {
   ; CHECK: ret i8** getelementptr inbounds ({ [4 x i8*], [4 x i8*] }, { [4 x i8*], [4 x i8*] }* null, i32 0, inrange i32 1, i32 2)
   ret i8** getelementptr inbounds ({ [4 x i8*], [4 x i8*] }, { [4 x i8*], [4 x i8*] }* null, i32 0, inrange i32 1, i32 2)
 }
 
 ; CHECK: attributes #0 = { alignstack=4 }
 ; CHECK: attributes #1 = { alignstack=8 }
 ; CHECK: attributes #2 = { alwaysinline }
 ; CHECK: attributes #3 = { cold }
-; CHECK: attributes #4 = { convergent }
-; CHECK: attributes #5 = { inlinehint }
-; CHECK: attributes #6 = { jumptable }
-; CHECK: attributes #7 = { minsize }
-; CHECK: attributes #8 = { naked }
-; CHECK: attributes #9 = { nobuiltin }
-; CHECK: attributes #10 = { noduplicate }
-; CHECK: attributes #11 = { noimplicitfloat }
-; CHECK: attributes #12 = { noinline }
-; CHECK: attributes #13 = { nonlazybind }
-; CHECK: attributes #14 = { noredzone }
-; CHECK: attributes #15 = { noreturn }
-; CHECK: attributes #16 = { nounwind }
-; CHECK: attributes #17 = { noinline optnone }
-; CHECK: attributes #18 = { optsize }
-; CHECK: attributes #19 = { readnone }
-; CHECK: attributes #20 = { readonly }
-; CHECK: attributes #21 = { returns_twice }
-; CHECK: attributes #22 = { safestack }
-; CHECK: attributes #23 = { sanitize_address }
-; CHECK: attributes #24 = { sanitize_memory }
-; CHECK: attributes #25 = { sanitize_thread }
-; CHECK: attributes #26 = { ssp }
-; CHECK: attributes #27 = { sspreq }
-; CHECK: attributes #28 = { sspstrong }
-; CHECK: attributes #29 = { "thunk" }
-; CHECK: attributes #30 = { uwtable }
-; CHECK: attributes #31 = { "cpu"="cortex-a8" }
-; CHECK: attributes #32 = { norecurse }
-; CHECK: attributes #33 = { inaccessiblememonly }
-; CHECK: attributes #34 = { inaccessiblemem_or_argmemonly }
-; CHECK: attributes #35 = { nounwind readnone willreturn }
-; CHECK: attributes #36 = { argmemonly nounwind readonly }
-; CHECK: attributes #37 = { argmemonly nounwind }
-; CHECK: attributes #38 = { nounwind readnone }
+; CHECK: attributes #4 = { inlinehint }
+; CHECK: attributes #5 = { jumptable }
+; CHECK: attributes #6 = { minsize }
+; CHECK: attributes #7 = { naked }
+; CHECK: attributes #8 = { nobuiltin }
+; CHECK: attributes #9 = { noduplicate }
+; CHECK: attributes #10 = { noimplicitfloat }
+; CHECK: attributes #11 = { noinline }
+; CHECK: attributes #12 = { nonlazybind }
+; CHECK: attributes #13 = { noredzone }
+; CHECK: attributes #14 = { noreturn }
+; CHECK: attributes #15 = { nounwind }
+; CHECK: attributes #16 = { noinline optnone }
+; CHECK: attributes #17 = { optsize }
+; CHECK: attributes #18 = { readnone }
+; CHECK: attributes #19 = { readonly }
+; CHECK: attributes #20 = { returns_twice }
+; CHECK: attributes #21 = { safestack }
+; CHECK: attributes #22 = { sanitize_address }
+; CHECK: attributes #23 = { sanitize_memory }
+; CHECK: attributes #24 = { sanitize_thread }
+; CHECK: attributes #25 = { ssp }
+; CHECK: attributes #26 = { sspreq }
+; CHECK: attributes #27 = { sspstrong }
+; CHECK: attributes #28 = { "thunk" }
+; CHECK: attributes #29 = { uwtable }
+; CHECK: attributes #30 = { "cpu"="cortex-a8" }
+; CHECK: attributes #31 = { norecurse }
+; CHECK: attributes #32 = { inaccessiblememonly }
+; CHECK: attributes #33 = { inaccessiblemem_or_argmemonly }
+; CHECK: attributes #34 = { noconvergent nounwind readnone willreturn }
+; CHECK: attributes #35 = { noconvergent nounwind }
+; CHECK: attributes #36 = { argmemonly noconvergent nounwind readonly }
+; CHECK: attributes #37 = { argmemonly noconvergent nounwind }
+; CHECK: attributes #38 = { noconvergent nounwind readnone }
 ; CHECK: attributes #39 = { nounwind readonly }
 ; CHECK: attributes #40 = { writeonly }
 ; CHECK: attributes #41 = { speculatable }
-; CHECK: attributes #42 = { inaccessiblemem_or_argmemonly nounwind willreturn }
+; CHECK: attributes #42 = { inaccessiblemem_or_argmemonly noconvergent nounwind willreturn }
 ; CHECK: attributes #43 = { builtin }
 ; CHECK: attributes #44 = { strictfp }
 
 ;; Metadata
 
 ; Metadata -- Module flags
 !llvm.module.flags = !{!0, !1, !2, !4, !5, !6}
 ; CHECK: !llvm.module.flags = !{!0, !1, !2, !4, !5, !6}

llvm/test/Bitcode/compatibility.ll

 declare void @f.alignstack4() alignstack(4)
 ; CHECK: declare void @f.alignstack4() #0
 declare void @f.alignstack8() alignstack(8)
 ; CHECK: declare void @f.alignstack8() #1
 declare void @f.alwaysinline() alwaysinline
 ; CHECK: declare void @f.alwaysinline() #2
 declare void @f.cold() cold
 ; CHECK: declare void @f.cold() #3
-declare void @f.convergent() convergent
-; CHECK: declare void @f.convergent() #4
 declare void @f.inlinehint() inlinehint
-; CHECK: declare void @f.inlinehint() #5
+; CHECK: declare void @f.inlinehint() #4
 declare void @f.jumptable() unnamed_addr jumptable
-; CHECK: declare void @f.jumptable() unnamed_addr #6
+; CHECK: declare void @f.jumptable() unnamed_addr #5
 declare void @f.minsize() minsize
-; CHECK: declare void @f.minsize() #7
+; CHECK: declare void @f.minsize() #6
 declare void @f.naked() naked
-; CHECK: declare void @f.naked() #8
+; CHECK: declare void @f.naked() #7
 declare void @f.nobuiltin() nobuiltin
-; CHECK: declare void @f.nobuiltin() #9
+; CHECK: declare void @f.nobuiltin() #8
 declare void @f.noduplicate() noduplicate
-; CHECK: declare void @f.noduplicate() #10
+; CHECK: declare void @f.noduplicate() #9
 declare void @f.noimplicitfloat() noimplicitfloat
-; CHECK: declare void @f.noimplicitfloat() #11
+; CHECK: declare void @f.noimplicitfloat() #10
 declare void @f.noinline() noinline
-; CHECK: declare void @f.noinline() #12
+; CHECK: declare void @f.noinline() #11
 declare void @f.nonlazybind() nonlazybind
-; CHECK: declare void @f.nonlazybind() #13
+; CHECK: declare void @f.nonlazybind() #12
 declare void @f.noredzone() noredzone
-; CHECK: declare void @f.noredzone() #14
+; CHECK: declare void @f.noredzone() #13
 declare void @f.noreturn() noreturn
-; CHECK: declare void @f.noreturn() #15
+; CHECK: declare void @f.noreturn() #14
 declare void @f.nounwind() nounwind
-; CHECK: declare void @f.nounwind() #16
+; CHECK: declare void @f.nounwind() #15
 declare void @f.optnone() noinline optnone
-; CHECK: declare void @f.optnone() #17
+; CHECK: declare void @f.optnone() #16
 declare void @f.optsize() optsize
-; CHECK: declare void @f.optsize() #18
+; CHECK: declare void @f.optsize() #17
 declare void @f.readnone() readnone
-; CHECK: declare void @f.readnone() #19
+; CHECK: declare void @f.readnone() #18
 declare void @f.readonly() readonly
-; CHECK: declare void @f.readonly() #20
+; CHECK: declare void @f.readonly() #19
 declare void @f.returns_twice() returns_twice
-; CHECK: declare void @f.returns_twice() #21
+; CHECK: declare void @f.returns_twice() #20
 declare void @f.safestack() safestack
-; CHECK: declare void @f.safestack() #22
+; CHECK: declare void @f.safestack() #21
 declare void @f.sanitize_address() sanitize_address
-; CHECK: declare void @f.sanitize_address() #23
+; CHECK: declare void @f.sanitize_address() #22
 declare void @f.sanitize_memory() sanitize_memory
-; CHECK: declare void @f.sanitize_memory() #24
+; CHECK: declare void @f.sanitize_memory() #23
 declare void @f.sanitize_thread() sanitize_thread
-; CHECK: declare void @f.sanitize_thread() #25
+; CHECK: declare void @f.sanitize_thread() #24
 declare void @f.ssp() ssp
-; CHECK: declare void @f.ssp() #26
+; CHECK: declare void @f.ssp() #25
 declare void @f.sspreq() sspreq
-; CHECK: declare void @f.sspreq() #27
+; CHECK: declare void @f.sspreq() #26
 declare void @f.sspstrong() sspstrong
-; CHECK: declare void @f.sspstrong() #28
+; CHECK: declare void @f.sspstrong() #27
 declare void @f.thunk() "thunk"
-; CHECK: declare void @f.thunk() #29
+; CHECK: declare void @f.thunk() #28
 declare void @f.uwtable() uwtable
-; CHECK: declare void @f.uwtable() #30
+; CHECK: declare void @f.uwtable() #29
 declare void @f.kvpair() "cpu"="cortex-a8"
-; CHECK:declare void @f.kvpair() #31
+; CHECK:declare void @f.kvpair() #30
 declare void @f.norecurse() norecurse
-; CHECK: declare void @f.norecurse() #32
+; CHECK: declare void @f.norecurse() #31
 declare void @f.inaccessiblememonly() inaccessiblememonly
-; CHECK: declare void @f.inaccessiblememonly() #33
+; CHECK: declare void @f.inaccessiblememonly() #32
 declare void @f.inaccessiblemem_or_argmemonly() inaccessiblemem_or_argmemonly
-; CHECK: declare void @f.inaccessiblemem_or_argmemonly() #34
+; CHECK: declare void @f.inaccessiblemem_or_argmemonly() #33
 declare void @f.strictfp() #35
 
 ; Functions -- section
 declare void @f.section() section "80"
 ; CHECK: declare void @f.section() section "80"
 
 ; Functions -- partition
 define void @f.partition() partition "part" {

 ; Functions -- Prologue data
 declare void @f.prologuei32() prologue i32 1684365669
 ; CHECK: declare void @f.prologuei32() prologue i32 1684365669
 declare void @f.prologuearray() prologue [4 x i32] [i32 0, i32 1, i32 2, i32 3]
 ; CHECK: declare void @f.prologuearray() prologue [4 x i32] [i32 0, i32 1, i32 2, i32 3]
 
 ; Functions -- Personality constant
 declare void @llvm.donothing() nounwind readnone
-; CHECK: declare void @llvm.donothing() #35
+; CHECK: declare void @llvm.donothing() #34
 define void @f.no_personality() personality i8 3 {
 ; CHECK: define void @f.no_personality() personality i8 3
   invoke void @llvm.donothing() to label %normal unwind label %exception
 exception:
   %cleanup = landingpad i8 cleanup
   br label %normal
 normal:
   ret void
exit:
   ; CHECK: select i1 true, i32 0, i32 1
   select <2 x i1> <i1 true, i1 false>, <2 x i8> <i8 2, i8 3>, <2 x i8> <i8 3, i8 2>
   ; CHECK: select <2 x i1> <i1 true, i1 false>, <2 x i8> <i8 2, i8 3>, <2 x i8> <i8 3, i8 2>
 
   call void @f.nobuiltin() builtin
   ; CHECK: call void @f.nobuiltin() #44
 
   call fastcc noalias i32* @f.noalias() noinline
-  ; CHECK: call fastcc noalias i32* @f.noalias() #12
+  ; CHECK: call fastcc noalias i32* @f.noalias() #11
   tail call ghccc nonnull i32* @f.nonnull() minsize
-  ; CHECK: tail call ghccc nonnull i32* @f.nonnull() #7
+  ; CHECK: tail call ghccc nonnull i32* @f.nonnull() #6
 
   ret void
 }
 
 define void @instructions.call_musttail(i8* inalloca %val) {
   musttail call void @f.param.inalloca(i8* inalloca %val)
   ; CHECK: musttail call void @f.param.inalloca(i8* inalloca %val)
 

 ; CHECK: declare void @byval_type(i32* byval(i32) align 2)
 ; CHECK: declare void @byval_type2({ i8, i8* }* byval({ i8, i8* }))
 ; CHECK: declare void @byval_named_type([8 x i8]* byval([8 x i8]))
 
 ; CHECK: attributes #0 = { alignstack=4 }
 ; CHECK: attributes #1 = { alignstack=8 }
 ; CHECK: attributes #2 = { alwaysinline }
 ; CHECK: attributes #3 = { cold }
-; CHECK: attributes #4 = { convergent }
-; CHECK: attributes #5 = { inlinehint }
-; CHECK: attributes #6 = { jumptable }
-; CHECK: attributes #7 = { minsize }
-; CHECK: attributes #8 = { naked }
-; CHECK: attributes #9 = { nobuiltin }
-; CHECK: attributes #10 = { noduplicate }
-; CHECK: attributes #11 = { noimplicitfloat }
-; CHECK: attributes #12 = { noinline }
-; CHECK: attributes #13 = { nonlazybind }
-; CHECK: attributes #14 = { noredzone }
-; CHECK: attributes #15 = { noreturn }
-; CHECK: attributes #16 = { nounwind }
-; CHECK: attributes #17 = { noinline optnone }
-; CHECK: attributes #18 = { optsize }
-; CHECK: attributes #19 = { readnone }
-; CHECK: attributes #20 = { readonly }
-; CHECK: attributes #21 = { returns_twice }
-; CHECK: attributes #22 = { safestack }
-; CHECK: attributes #23 = { sanitize_address }
-; CHECK: attributes #24 = { sanitize_memory }
-; CHECK: attributes #25 = { sanitize_thread }
-; CHECK: attributes #26 = { ssp }
-; CHECK: attributes #27 = { sspreq }
-; CHECK: attributes #28 = { sspstrong }
-; CHECK: attributes #29 = { "thunk" }
-; CHECK: attributes #30 = { uwtable }
-; CHECK: attributes #31 = { "cpu"="cortex-a8" }
-; CHECK: attributes #32 = { norecurse }
-; CHECK: attributes #33 = { inaccessiblememonly }
-; CHECK: attributes #34 = { inaccessiblemem_or_argmemonly }
-; CHECK: attributes #35 = { nounwind readnone willreturn }
-; CHECK: attributes #36 = { argmemonly nounwind readonly }
-; CHECK: attributes #37 = { argmemonly nounwind }
-; CHECK: attributes #38 = { nounwind readnone }
+; CHECK: attributes #4 = { inlinehint }
+; CHECK: attributes #5 = { jumptable }
+; CHECK: attributes #6 = { minsize }
+; CHECK: attributes #7 = { naked }
+; CHECK: attributes #8 = { nobuiltin }
+; CHECK: attributes #9 = { noduplicate }
+; CHECK: attributes #10 = { noimplicitfloat }
+; CHECK: attributes #11 = { noinline }
+; CHECK: attributes #12 = { nonlazybind }
+; CHECK: attributes #13 = { noredzone }
+; CHECK: attributes #14 = { noreturn }
+; CHECK: attributes #15 = { nounwind }
+; CHECK: attributes #16 = { noinline optnone }
+; CHECK: attributes #17 = { optsize }
+; CHECK: attributes #18 = { readnone }
+; CHECK: attributes #19 = { readonly }
+; CHECK: attributes #20 = { returns_twice }
+; CHECK: attributes #21 = { safestack }
+; CHECK: attributes #22 = { sanitize_address }
+; CHECK: attributes #23 = { sanitize_memory }
+; CHECK: attributes #24 = { sanitize_thread }
+; CHECK: attributes #25 = { ssp }
+; CHECK: attributes #26 = { sspreq }
+; CHECK: attributes #27 = { sspstrong }
+; CHECK: attributes #28 = { "thunk" }
+; CHECK: attributes #29 = { uwtable }
+; CHECK: attributes #30 = { "cpu"="cortex-a8" }
+; CHECK: attributes #31 = { norecurse }
+; CHECK: attributes #32 = { inaccessiblememonly }
+; CHECK: attributes #33 = { inaccessiblemem_or_argmemonly }
+; CHECK: attributes #34 = { noconvergent nounwind readnone willreturn }
+; CHECK: attributes #35 = { noconvergent nounwind }
+; CHECK: attributes #36 = { argmemonly noconvergent nounwind readonly }
+; CHECK: attributes #37 = { argmemonly noconvergent nounwind }
+; CHECK: attributes #38 = { noconvergent nounwind readnone }
 ; CHECK: attributes #39 = { nounwind readonly }
-; CHECK: attributes #40 = { inaccessiblemem_or_argmemonly nounwind willreturn }
+; CHECK: attributes #40 = { inaccessiblemem_or_argmemonly noconvergent nounwind willreturn }
 ; CHECK: attributes #41 = { writeonly }
 ; CHECK: attributes #42 = { speculatable }
 ; CHECK: attributes #43 = { strictfp }
 ; CHECK: attributes #44 = { builtin }
 
+
 ;; Metadata
 
 ; Metadata -- Module flags
 !llvm.module.flags = !{!0, !1, !2, !4, !5, !6}
 ; CHECK: !llvm.module.flags = !{!0, !1, !2, !4, !5, !6}
 
 !0 = !{i32 1, !"mod1", i32 0}
 ; CHECK: !0 = !{i32 1, !"mod1", i32 0}

llvm/test/Bitcode/convergent-upgrade.ll

+; RUN: llvm-dis < %s.bc | FileCheck %s
+; RUN: verify-uselistorder < %s.bc
+
+; Make sure the convergent attribute is dropped.
+
+; convergent-upgrade.ll.bc was produced by running a version of llvm-as from just
+; before the IR change on this file.
+
+; No attributes
+; CHECK: define void @test_convergent_fn() {
+define void @test_convergent_fn() #0 {
+  ret void
+}
+
+; CHECK: declare void @test_convergent_extern(){{$}}
+declare void @test_convergent_extern() #0
+
+; CHECK: declare void @extern(){{$}}
+declare void @extern()
+
+define void @test_convergent_callsize() {
+  ; CHECK: call void @extern(){{$}}
+  call void @extern() #0
+  ret void
+}
+
+; CHECK-NOT: attributes
+
+attributes #0 = { convergent }

llvm/test/Bitcode/ptest-new.ll

 ; CHECK: declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) #1
 ; CHECK: declare i32 @llvm.x86.sse41.ptestnzc(<2 x i64>, <2 x i64>) #1
 
 declare i32 @llvm.x86.sse41.ptestc(<2 x i64>, <2 x i64>) nounwind readnone
 declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) nounwind readnone
 declare i32 @llvm.x86.sse41.ptestnzc(<2 x i64>, <2 x i64>) nounwind readnone
 
 ; CHECK: attributes #0 = { nounwind }
-; CHECK: attributes #1 = { nounwind readnone }
+; CHECK: attributes #1 = { noconvergent nounwind readnone }

llvm/test/Bitcode/ptest-old.ll

 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
 ; RUN: verify-uselistorder < %s
 ; REQUIRES: x86-registered-target
 
 define i32 @foo(<4 x float> %bar) nounwind {
 entry:
 ; CHECK: call i32 @llvm.x86.sse41.ptestc(<2 x i64>
  %res1 = call i32 @llvm.x86.sse41.ptestc(<4 x float> %bar, <4 x float> %bar)
-; CHECK: call i32 @llvm.x86.sse41.ptestz(<2 x i64> 
+; CHECK: call i32 @llvm.x86.sse41.ptestz(<2 x i64>
  %res2 = call i32 @llvm.x86.sse41.ptestz(<4 x float> %bar, <4 x float> %bar)
 ; CHECK: call i32 @llvm.x86.sse41.ptestnzc(<2 x i64>
  %res3 = call i32 @llvm.x86.sse41.ptestnzc(<4 x float> %bar, <4 x float> %bar)
  %add1 = add i32 %res1, %res2
  %add2 = add i32 %add1, %res2
  ret i32 %add2
 }
 
 ; CHECK: declare i32 @llvm.x86.sse41.ptestc(<2 x i64>, <2 x i64>) #1
 ; CHECK: declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) #1
 ; CHECK: declare i32 @llvm.x86.sse41.ptestnzc(<2 x i64>, <2 x i64>) #1
 
 declare i32 @llvm.x86.sse41.ptestc(<4 x float>, <4 x float>) nounwind readnone
 declare i32 @llvm.x86.sse41.ptestz(<4 x float>, <4 x float>) nounwind readnone
 declare i32 @llvm.x86.sse41.ptestnzc(<4 x float>, <4 x float>) nounwind readnone
 
 ; CHECK: attributes #0 = { nounwind }
-; CHECK: attributes #1 = { nounwind readnone }
+; CHECK: attributes #1 = { noconvergent nounwind readnone }

llvm/test/Bitcode/upgrade-invariant-group-barrier.ll

 ; RUN: opt -S < %s | FileCheck %s
 
 ; The intrinsic firstly only took i8*, then it was made polimorphic, then
 ; it was renamed to launder.invariant.group
 define void @test(i8* %p1, i16* %p16) {
 ; CHECK-LABEL: @test
 ; CHECK: %p2 = call i8* @llvm.launder.invariant.group.p0i8(i8* %p1)
 ; CHECK: %p3 = call i8* @llvm.launder.invariant.group.p0i8(i8* %p1)
 ; CHECK: %p4 = call i16* @llvm.launder.invariant.group.p0i16(i16* %p16)
   %p2 = call i8* @llvm.invariant.group.barrier(i8* %p1)
   %p3 = call i8* @llvm.invariant.group.barrier.p0i8(i8* %p1)
   %p4 = call i16* @llvm.invariant.group.barrier.p0i16(i16* %p16)
   ret void
 }
 
-; CHECK: Function Attrs: inaccessiblememonly nounwind speculatable
+; CHECK: Function Attrs: inaccessiblememonly noconvergent nounwind speculatable
 ; CHECK: declare i8* @llvm.launder.invariant.group.p0i8(i8*)
-; CHECK: Function Attrs: inaccessiblememonly nounwind speculatable
+; CHECK: Function Attrs: inaccessiblememonly noconvergent nounwind speculatable
 ; CHECK: declare i16* @llvm.launder.invariant.group.p0i16(i16*)
 declare i8* @llvm.invariant.group.barrier(i8*)
 declare i8* @llvm.invariant.group.barrier.p0i8(i8*)
 declare i16* @llvm.invariant.group.barrier.p0i16(i16*)

llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll

define amdgpu_kernel void @store_constant_cast_group_gv_gep_to_flat_to_group() #1 {
   ret void
 }
 
 ; HSA: @ret_constant_cast_group_gv_gep_to_flat_to_group() #2
 define i32 addrspace(3)* @ret_constant_cast_group_gv_gep_to_flat_to_group() #1 {
   ret i32 addrspace(3)* addrspacecast (i32 addrspace(4)* getelementptr ([256 x i32], [256 x i32] addrspace(4)* addrspacecast ([256 x i32] addrspace(3)* @lds.arr to [256 x i32] addrspace(4)*), i64 0, i64 8) to i32 addrspace(3)*)
 }
 
-; HSA: attributes #0 = { argmemonly nounwind willreturn }
+; HSA: attributes #0 = { argmemonly noconvergent nounwind willreturn }
 ; HSA: attributes #1 = { nounwind }
 ; HSA: attributes #2 = { nounwind "amdgpu-queue-ptr" }
 
 attributes #0 = { argmemonly nounwind }
 attributes #1 = { nounwind }

llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll

define amdgpu_kernel void @func_kern_defined() #3 {
   ret void
 }
 
 attributes #0 = { nounwind readnone speculatable }
 attributes #1 = { nounwind "target-cpu"="fiji" }
 attributes #2 = { nounwind "target-cpu"="gfx900" }
 attributes #3 = { nounwind }
 
-; HSA: attributes #0 = { nounwind readnone speculatable }
+; HSA: attributes #0 = { noconvergent nounwind readnone speculatable }
 ; HSA: attributes #1 = { nounwind "amdgpu-work-item-id-x" "target-cpu"="fiji" "uniform-work-group-size"="false" }
 ; HSA: attributes #2 = { nounwind "amdgpu-work-item-id-y" "target-cpu"="fiji" "uniform-work-group-size"="false" }
 ; HSA: attributes #3 = { nounwind "amdgpu-work-item-id-z" "target-cpu"="fiji" "uniform-work-group-size"="false" }
 ; HSA: attributes #4 = { nounwind "amdgpu-work-group-id-x" "target-cpu"="fiji" "uniform-work-group-size"="false" }
 ; HSA: attributes #5 = { nounwind "amdgpu-work-group-id-y" "target-cpu"="fiji" "uniform-work-group-size"="false" }
 ; HSA: attributes #6 = { nounwind "amdgpu-work-group-id-z" "target-cpu"="fiji" "uniform-work-group-size"="false" }
 ; HSA: attributes #7 = { nounwind "amdgpu-dispatch-ptr" "target-cpu"="fiji" "uniform-work-group-size"="false" }
 ; HSA: attributes #8 = { nounwind "amdgpu-queue-ptr" "target-cpu"="fiji" "uniform-work-group-size"="false" }

llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll

define amdgpu_kernel void @use_is_private(i8* %ptr) #1 {
   %ext = zext i1 %is.private to i32
   store i32 %ext, i32 addrspace(1)* undef
   ret void
 }
 
 attributes #0 = { nounwind readnone speculatable }
 attributes #1 = { nounwind }
 
-; HSA: attributes #0 = { nounwind readnone speculatable }
+; HSA: attributes #0 = { noconvergent nounwind readnone speculatable }
 ; HSA: attributes #1 = { nounwind }
 ; HSA: attributes #2 = { nounwind "amdgpu-work-group-id-y" }
 ; HSA: attributes #3 = { nounwind "amdgpu-work-group-id-z" }
 ; HSA: attributes #4 = { nounwind "amdgpu-work-group-id-y" "amdgpu-work-group-id-z" }
 ; HSA: attributes #5 = { nounwind "amdgpu-work-item-id-y" }
 ; HSA: attributes #6 = { nounwind "amdgpu-work-item-id-z" }
 ; HSA: attributes #7 = { nounwind "amdgpu-work-group-id-y" "amdgpu-work-item-id-y" }
 ; HSA: attributes #8 = { nounwind "amdgpu-work-item-id-y" "amdgpu-work-item-id-z" }
 ; HSA: attributes #9 = { nounwind "amdgpu-work-group-id-y" "amdgpu-work-group-id-z" "amdgpu-work-item-id-y" "amdgpu-work-item-id-z" }
 ; HSA: attributes #10 = { nounwind "amdgpu-dispatch-ptr" }
 ; HSA: attributes #11 = { nounwind "amdgpu-queue-ptr" }
 ; HSA: attributes #12 = { nounwind "amdgpu-kernarg-segment-ptr" }

llvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll

define amdgpu_cs void @mmo_offsets0(<4 x i32> addrspace(6)* inreg noalias dereferenceable(18446744073709551615) %arg0, i32 %arg1) {
   ; GCN:   [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
   ; GCN:   [[REG_SEQUENCE:%[0-9]+]]:sgpr_64 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[S_MOV_B32_]], %subreg.sub1
   ; GCN:   [[S_LOAD_DWORDX4_IMM:%[0-9]+]]:sgpr_128 = S_LOAD_DWORDX4_IMM killed [[REG_SEQUENCE]], 0, 0, 0 :: (dereferenceable invariant load 16 from %ir.arg0, addrspace 6)
   ; GCN:   [[BUFFER_LOAD_DWORDX4_OFFSET:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_OFFSET [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 16, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7 + 16, align 1, addrspace 4)
   ; GCN:   [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
   ; GCN:   [[BUFFER_LOAD_DWORDX4_IDXEN:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_IDXEN [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 16, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   [[BUFFER_LOAD_DWORDX4_OFFEN:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_OFFEN [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   [[BUFFER_LOAD_DWORDX4_IDXEN1:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_IDXEN [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 16, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7, align 1, addrspace 4)
-  ; GCN:   INLINEASM &"", 1
+  ; GCN:   INLINEASM &"", 33
   ; GCN:   BUFFER_STORE_DWORDX4_OFFSET_exact killed [[BUFFER_LOAD_DWORDX4_OFFSET]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 32, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store 16 into custom TargetCustom7 + 32, align 1, addrspace 4)
   ; GCN:   BUFFER_STORE_DWORDX4_OFFEN_exact killed [[BUFFER_LOAD_DWORDX4_OFFEN]], [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store 16 into custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   BUFFER_STORE_DWORDX4_IDXEN_exact killed [[BUFFER_LOAD_DWORDX4_IDXEN]], [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 32, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store 16 into custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   BUFFER_STORE_DWORDX4_IDXEN_exact killed [[BUFFER_LOAD_DWORDX4_IDXEN1]], [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 32, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store 16 into custom TargetCustom7, align 1, addrspace 4)
-  ; GCN:   INLINEASM &"", 1
+  ; GCN:   INLINEASM &"", 33
   ; GCN:   [[BUFFER_LOAD_FORMAT_XYZW_OFFSET:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_OFFSET [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 48, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7 + 48, align 1, addrspace 4)
   ; GCN:   [[BUFFER_LOAD_FORMAT_XYZW_IDXEN:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_IDXEN [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 48, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   [[BUFFER_LOAD_FORMAT_XYZW_OFFEN:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_OFFEN [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   [[BUFFER_LOAD_FORMAT_XYZW_IDXEN1:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_IDXEN [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 48, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7, align 1, addrspace 4)
-  ; GCN:   INLINEASM &"", 1
+  ; GCN:   INLINEASM &"", 33
   ; GCN:   BUFFER_STORE_FORMAT_XYZW_OFFSET_exact killed [[BUFFER_LOAD_FORMAT_XYZW_OFFSET]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 64, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store 16 into custom TargetCustom7 + 64, align 1, addrspace 4)
   ; GCN:   BUFFER_STORE_FORMAT_XYZW_OFFEN_exact killed [[BUFFER_LOAD_FORMAT_XYZW_OFFEN]], [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store 16 into custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   BUFFER_STORE_FORMAT_XYZW_IDXEN_exact killed [[BUFFER_LOAD_FORMAT_XYZW_IDXEN]], [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 64, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store 16 into custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   BUFFER_STORE_FORMAT_XYZW_IDXEN_exact killed [[BUFFER_LOAD_FORMAT_XYZW_IDXEN1]], [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 64, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store 16 into custom TargetCustom7, align 1, addrspace 4)
-  ; GCN:   INLINEASM &"", 1
+  ; GCN:   INLINEASM &"", 33
   ; GCN:   BUFFER_ATOMIC_ADD_OFFSET [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 80, 0, implicit $exec :: (volatile dereferenceable load store 4 on custom TargetCustom7 + 80, align 1, addrspace 4)
   ; GCN:   BUFFER_ATOMIC_ADD_OFFEN [[COPY]], [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 0, 0, implicit $exec :: (volatile dereferenceable load store 4 on custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   BUFFER_ATOMIC_ADD_IDXEN [[COPY]], [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 80, 0, implicit $exec :: (volatile dereferenceable load store 4 on custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   BUFFER_ATOMIC_ADD_IDXEN [[COPY]], [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 80, 0, implicit $exec :: (volatile dereferenceable load store 4 on custom TargetCustom7, align 1, addrspace 4)
-  ; GCN:   INLINEASM &"", 1
+  ; GCN:   INLINEASM &"", 33
   ; GCN:   [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY]], %subreg.sub1
   ; GCN:   [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
   ; GCN:   BUFFER_ATOMIC_CMPSWAP_OFFSET [[REG_SEQUENCE1]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 96, 0, implicit $exec :: (volatile dereferenceable load store 4 on custom TargetCustom7 + 96, align 1, addrspace 4)
   ; GCN:   [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[DEF]].sub0
   ; GCN:   [[DEF1:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
   ; GCN:   BUFFER_ATOMIC_CMPSWAP_OFFEN [[REG_SEQUENCE1]], [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 0, 0, implicit $exec :: (volatile dereferenceable load store 4 on custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[DEF1]].sub0
   ; GCN:   [[DEF2:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
   ; GCN:   BUFFER_ATOMIC_CMPSWAP_IDXEN [[REG_SEQUENCE1]], [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 96, 0, implicit $exec :: (volatile dereferenceable load store 4 on custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[DEF2]].sub0
   ; GCN:   [[DEF3:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
   ; GCN:   BUFFER_ATOMIC_CMPSWAP_IDXEN [[REG_SEQUENCE1]], [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 96, 0, implicit $exec :: (volatile dereferenceable load store 4 on custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[DEF3]].sub0
-  ; GCN:   INLINEASM &"", 1
+  ; GCN:   INLINEASM &"", 33
   ; GCN:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1065353216, implicit $exec
   ; GCN:   BUFFER_ATOMIC_ADD_F32_OFFSET [[V_MOV_B32_e32_1]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 112, 0, implicit $exec :: (load store 4 on custom TargetCustom7 + 112, addrspace 4)
   ; GCN:   BUFFER_ATOMIC_ADD_F32_OFFEN [[V_MOV_B32_e32_1]], [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 0, 0, implicit $exec :: (load store 4 on custom TargetCustom7, addrspace 4)
   ; GCN:   BUFFER_ATOMIC_ADD_F32_IDXEN [[V_MOV_B32_e32_1]], [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 112, 0, implicit $exec :: (load store 4 on custom TargetCustom7, addrspace 4)
   ; GCN:   BUFFER_ATOMIC_ADD_F32_IDXEN [[V_MOV_B32_e32_1]], [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 112, 0, implicit $exec :: (load store 4 on custom TargetCustom7, addrspace 4)
-  ; GCN:   INLINEASM &"", 1
+  ; GCN:   INLINEASM &"", 33
   ; GCN:   [[BUFFER_LOAD_DWORDX4_OFFSET1:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_OFFSET [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 128, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7 + 128, align 1, addrspace 4)
   ; GCN:   [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 64
   ; GCN:   [[BUFFER_LOAD_DWORDX4_OFFSET2:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_OFFSET [[S_LOAD_DWORDX4_IMM]], killed [[S_MOV_B32_1]], 64, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7 + 128, align 1, addrspace 4)
   ; GCN:   [[S_MOV_B32_2:%[0-9]+]]:sreg_32 = S_MOV_B32 128
   ; GCN:   [[BUFFER_LOAD_DWORDX4_OFFSET3:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_OFFSET [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_2]], 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7 + 128, align 1, addrspace 4)
   ; GCN:   [[BUFFER_LOAD_DWORDX4_OFFEN1:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_OFFEN [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_2]], 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   [[COPY6:%[0-9]+]]:sreg_32 = COPY [[COPY]]
   ; GCN:   [[BUFFER_LOAD_DWORDX4_OFFSET4:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_OFFSET [[S_LOAD_DWORDX4_IMM]], [[COPY6]], 128, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7, align 1, addrspace 4)
-  ; GCN:   INLINEASM &"", 1
+  ; GCN:   INLINEASM &"", 33
   ; GCN:   [[BUFFER_LOAD_FORMAT_XYZW_OFFSET1:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_OFFSET [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 144, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7 + 144, align 1, addrspace 4)
   ; GCN:   [[S_MOV_B32_3:%[0-9]+]]:sreg_32 = S_MOV_B32 72
   ; GCN:   [[BUFFER_LOAD_FORMAT_XYZW_OFFSET2:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_OFFSET [[S_LOAD_DWORDX4_IMM]], killed [[S_MOV_B32_3]], 72, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7 + 144, align 1, addrspace 4)
   ; GCN:   [[S_MOV_B32_4:%[0-9]+]]:sreg_32 = S_MOV_B32 144
   ; GCN:   [[BUFFER_LOAD_FORMAT_XYZW_OFFSET3:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_OFFSET [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_4]], 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7 + 144, align 1, addrspace 4)
   ; GCN:   [[BUFFER_LOAD_FORMAT_XYZW_OFFEN1:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_OFFEN [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_4]], 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   [[COPY7:%[0-9]+]]:sreg_32 = COPY [[COPY]]
   ; GCN:   [[BUFFER_LOAD_FORMAT_XYZW_OFFSET4:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_OFFSET [[S_LOAD_DWORDX4_IMM]], [[COPY7]], 144, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7, align 1, addrspace 4)
-  ; GCN:   INLINEASM &"", 1
+  ; GCN:   INLINEASM &"", 33
   ; GCN:   BUFFER_ATOMIC_ADD_OFFSET [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 160, 0, implicit $exec :: (volatile dereferenceable load store 4 on custom TargetCustom7 + 160, align 1, addrspace 4)
   ; GCN:   [[S_MOV_B32_5:%[0-9]+]]:sreg_32 = S_MOV_B32 80
   ; GCN:   BUFFER_ATOMIC_ADD_OFFSET [[COPY]], [[S_LOAD_DWORDX4_IMM]], killed [[S_MOV_B32_5]], 80, 0, implicit $exec :: (volatile dereferenceable load store 4 on custom TargetCustom7 + 160, align 1, addrspace 4)
   ; GCN:   [[S_MOV_B32_6:%[0-9]+]]:sreg_32 = S_MOV_B32 160
   ; GCN:   BUFFER_ATOMIC_ADD_OFFSET [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_6]], 0, 0, implicit $exec :: (volatile dereferenceable load store 4 on custom TargetCustom7 + 160, align 1, addrspace 4)
   ; GCN:   BUFFER_ATOMIC_ADD_OFFEN [[COPY]], [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_6]], 0, 0, implicit $exec :: (volatile dereferenceable load store 4 on custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   [[COPY8:%[0-9]+]]:sreg_32 = COPY [[COPY]]
   ; GCN:   BUFFER_ATOMIC_ADD_OFFSET [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[COPY8]], 160, 0, implicit $exec :: (volatile dereferenceable load store 4 on custom TargetCustom7, align 1, addrspace 4)
-  ; GCN:   INLINEASM &"", 1
+  ; GCN:   INLINEASM &"", 33
   ; GCN:   [[DEF4:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
   ; GCN:   BUFFER_ATOMIC_CMPSWAP_OFFSET [[REG_SEQUENCE1]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 176, 0, implicit $exec :: (volatile dereferenceable load store 4 on custom TargetCustom7 + 176, align 1, addrspace 4)
   ; GCN:   [[COPY9:%[0-9]+]]:vgpr_32 = COPY [[DEF4]].sub0
   ; GCN:   [[S_MOV_B32_7:%[0-9]+]]:sreg_32 = S_MOV_B32 88
   ; GCN:   [[DEF5:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
   ; GCN:   BUFFER_ATOMIC_CMPSWAP_OFFSET [[REG_SEQUENCE1]], [[S_LOAD_DWORDX4_IMM]], killed [[S_MOV_B32_7]], 88, 0, implicit $exec :: (volatile dereferenceable load store 4 on custom TargetCustom7 + 176, align 1, addrspace 4)
   ; GCN:   [[COPY10:%[0-9]+]]:vgpr_32 = COPY [[DEF5]].sub0
   ; GCN:   [[S_MOV_B32_8:%[0-9]+]]:sreg_32 = S_MOV_B32 176
   ; GCN:   [[DEF6:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
   ; GCN:   BUFFER_ATOMIC_CMPSWAP_OFFSET [[REG_SEQUENCE1]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_8]], 0, 0, implicit $exec :: (volatile dereferenceable load store 4 on custom TargetCustom7 + 176, align 1, addrspace 4)
   ; GCN:   [[COPY11:%[0-9]+]]:vgpr_32 = COPY [[DEF6]].sub0
   ; GCN:   [[DEF7:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
   ; GCN:   BUFFER_ATOMIC_CMPSWAP_OFFEN [[REG_SEQUENCE1]], [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_8]], 0, 0, implicit $exec :: (volatile dereferenceable load store 4 on custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   [[COPY12:%[0-9]+]]:vgpr_32 = COPY [[DEF7]].sub0
   ; GCN:   [[COPY13:%[0-9]+]]:sreg_32 = COPY [[COPY]]
   ; GCN:   [[DEF8:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
   ; GCN:   BUFFER_ATOMIC_CMPSWAP_OFFSET [[REG_SEQUENCE1]], [[S_LOAD_DWORDX4_IMM]], [[COPY13]], 176, 0, implicit $exec :: (volatile dereferenceable load store 4 on custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   [[COPY14:%[0-9]+]]:vgpr_32 = COPY [[DEF8]].sub0
-  ; GCN:   INLINEASM &"", 1
+  ; GCN:   INLINEASM &"", 33
   ; GCN:   BUFFER_STORE_DWORDX4_OFFSET_exact killed [[BUFFER_LOAD_DWORDX4_OFFSET1]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 192, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store 16 into custom TargetCustom7 + 192, align 1, addrspace 4)
   ; GCN:   [[S_MOV_B32_9:%[0-9]+]]:sreg_32 = S_MOV_B32 96
   ; GCN:   BUFFER_STORE_DWORDX4_OFFSET_exact killed [[BUFFER_LOAD_DWORDX4_OFFSET2]], [[S_LOAD_DWORDX4_IMM]], killed [[S_MOV_B32_9]], 96, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store 16 into custom TargetCustom7 + 192, align 1, addrspace 4)
   ; GCN:   [[S_MOV_B32_10:%[0-9]+]]:sreg_32 = S_MOV_B32 192
   ; GCN:   BUFFER_STORE_DWORDX4_OFFSET_exact killed [[BUFFER_LOAD_DWORDX4_OFFSET3]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_10]], 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store 16 into custom TargetCustom7 + 192, align 1, addrspace 4)
   ; GCN:   BUFFER_STORE_DWORDX4_OFFEN_exact killed [[BUFFER_LOAD_DWORDX4_OFFEN1]], [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_10]], 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store 16 into custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   [[COPY15:%[0-9]+]]:sreg_32 = COPY [[COPY]]
   ; GCN:   BUFFER_STORE_DWORDX4_OFFSET_exact killed [[BUFFER_LOAD_DWORDX4_OFFSET4]], [[S_LOAD_DWORDX4_IMM]], [[COPY15]], 192, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store 16 into custom TargetCustom7, align 1, addrspace 4)
-  ; GCN:   INLINEASM &"", 1
+  ; GCN:   INLINEASM &"", 33
   ; GCN:   BUFFER_STORE_FORMAT_XYZW_OFFSET_exact killed [[BUFFER_LOAD_FORMAT_XYZW_OFFSET1]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 208, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store 16 into custom TargetCustom7 + 208, align 1, addrspace 4)
   ; GCN:   [[S_MOV_B32_11:%[0-9]+]]:sreg_32 = S_MOV_B32 104
   ; GCN:   BUFFER_STORE_FORMAT_XYZW_OFFSET_exact killed [[BUFFER_LOAD_FORMAT_XYZW_OFFSET2]], [[S_LOAD_DWORDX4_IMM]], killed [[S_MOV_B32_11]], 104, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store 16 into custom TargetCustom7 + 208, align 1, addrspace 4)
   ; GCN:   [[S_MOV_B32_12:%[0-9]+]]:sreg_32 = S_MOV_B32 208
   ; GCN:   BUFFER_STORE_FORMAT_XYZW_OFFSET_exact killed [[BUFFER_LOAD_FORMAT_XYZW_OFFSET3]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_12]], 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store 16 into custom TargetCustom7 + 208, align 1, addrspace 4)
   ; GCN:   BUFFER_STORE_FORMAT_XYZW_OFFEN_exact killed [[BUFFER_LOAD_FORMAT_XYZW_OFFEN1]], [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_12]], 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store 16 into custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   [[COPY16:%[0-9]+]]:sreg_32 = COPY [[COPY]]
   ; GCN:   BUFFER_STORE_FORMAT_XYZW_OFFSET_exact killed [[BUFFER_LOAD_FORMAT_XYZW_OFFSET4]], [[S_LOAD_DWORDX4_IMM]], [[COPY16]], 208, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store 16 into custom TargetCustom7, align 1, addrspace 4)
-  ; GCN:   INLINEASM &"", 1
+  ; GCN:   INLINEASM &"", 33
   ; GCN:   [[COPY17:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
   ; GCN:   [[BUFFER_LOAD_DWORDX4_IDXEN2:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_IDXEN [[COPY17]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 224, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7 + 224, align 1, addrspace 4)
   ; GCN:   [[S_MOV_B32_13:%[0-9]+]]:sreg_32 = S_MOV_B32 112
   ; GCN:   [[COPY18:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
   ; GCN:   [[BUFFER_LOAD_DWORDX4_IDXEN3:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_IDXEN [[COPY18]], [[S_LOAD_DWORDX4_IMM]], killed [[S_MOV_B32_13]], 112, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7 + 224, align 1, addrspace 4)
   ; GCN:   [[S_MOV_B32_14:%[0-9]+]]:sreg_32 = S_MOV_B32 224
   ; GCN:   [[COPY19:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
   ; GCN:   [[BUFFER_LOAD_DWORDX4_IDXEN4:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_IDXEN [[COPY19]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_14]], 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7 + 224, align 1, addrspace 4)
   ; GCN:   [[REG_SEQUENCE2:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[S_MOV_B32_]], %subreg.sub0, [[COPY]], %subreg.sub1
   ; GCN:   [[BUFFER_LOAD_DWORDX4_BOTHEN:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_BOTHEN [[REG_SEQUENCE2]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_14]], 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   [[COPY20:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
   ; GCN:   [[COPY21:%[0-9]+]]:sreg_32 = COPY [[COPY]]
   ; GCN:   [[BUFFER_LOAD_DWORDX4_IDXEN5:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_IDXEN [[COPY20]], [[S_LOAD_DWORDX4_IMM]], [[COPY21]], 224, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   [[BUFFER_LOAD_DWORDX4_IDXEN6:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_IDXEN [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 224, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   [[BUFFER_LOAD_DWORDX4_IDXEN7:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_IDXEN [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 224, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7, align 1, addrspace 4)
-  ; GCN:   INLINEASM &"", 1
+  ; GCN:   INLINEASM &"", 33
   ; GCN:   [[COPY22:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
   ; GCN:   [[BUFFER_LOAD_FORMAT_XYZW_IDXEN2:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_IDXEN [[COPY22]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 240, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7 + 240, align 1, addrspace 4)
   ; GCN:   [[S_MOV_B32_15:%[0-9]+]]:sreg_32 = S_MOV_B32 120
   ; GCN:   [[COPY23:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
   ; GCN:   [[BUFFER_LOAD_FORMAT_XYZW_IDXEN3:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_IDXEN [[COPY23]], [[S_LOAD_DWORDX4_IMM]], killed [[S_MOV_B32_15]], 120, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7 + 240, align 1, addrspace 4)
   ; GCN:   [[S_MOV_B32_16:%[0-9]+]]:sreg_32 = S_MOV_B32 240
   ; GCN:   [[COPY24:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
   ; GCN:   [[BUFFER_LOAD_FORMAT_XYZW_IDXEN4:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_IDXEN [[COPY24]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_16]], 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7 + 240, align 1, addrspace 4)
   ; GCN:   [[BUFFER_LOAD_FORMAT_XYZW_BOTHEN:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_BOTHEN [[REG_SEQUENCE2]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_16]], 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   [[COPY25:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
   ; GCN:   [[COPY26:%[0-9]+]]:sreg_32 = COPY [[COPY]]
   ; GCN:   [[BUFFER_LOAD_FORMAT_XYZW_IDXEN5:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_IDXEN [[COPY25]], [[S_LOAD_DWORDX4_IMM]], [[COPY26]], 240, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   [[BUFFER_LOAD_FORMAT_XYZW_IDXEN6:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_IDXEN [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 240, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   [[BUFFER_LOAD_FORMAT_XYZW_IDXEN7:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_IDXEN [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 240, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 16 from custom TargetCustom7, align 1, addrspace 4)
-  ; GCN:   INLINEASM &"", 1
+  ; GCN:   INLINEASM &"", 33
   ; GCN:   [[COPY27:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
   ; GCN:   BUFFER_ATOMIC_ADD_IDXEN [[COPY]], [[COPY27]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 256, 0, implicit $exec :: (volatile dereferenceable load store 4 on custom TargetCustom7 + 256, align 1, addrspace 4)
   ; GCN:   [[COPY28:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
   ; GCN:   BUFFER_ATOMIC_ADD_IDXEN [[COPY]], [[COPY28]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_2]], 128, 0, implicit $exec :: (volatile dereferenceable load store 4 on custom TargetCustom7 + 256, align 1, addrspace 4)
   ; GCN:   [[S_MOV_B32_17:%[0-9]+]]:sreg_32 = S_MOV_B32 256
   ; GCN:   [[COPY29:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
   ; GCN:   BUFFER_ATOMIC_ADD_IDXEN [[COPY]], [[COPY29]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_17]], 0, 0, implicit $exec :: (volatile dereferenceable load store 4 on custom TargetCustom7 + 256, align 1, addrspace 4)
   ; GCN:   BUFFER_ATOMIC_ADD_BOTHEN [[COPY]], [[REG_SEQUENCE2]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_17]], 0, 0, implicit $exec :: (volatile dereferenceable load store 4 on custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   [[COPY30:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
   ; GCN:   [[COPY31:%[0-9]+]]:sreg_32 = COPY [[COPY]]
   ; GCN:   BUFFER_ATOMIC_ADD_IDXEN [[COPY]], [[COPY30]], [[S_LOAD_DWORDX4_IMM]], [[COPY31]], 256, 0, implicit $exec :: (volatile dereferenceable load store 4 on custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   BUFFER_ATOMIC_ADD_IDXEN [[COPY]], [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 256, 0, implicit $exec :: (volatile dereferenceable load store 4 on custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   BUFFER_ATOMIC_ADD_IDXEN [[COPY]], [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 256, 0, implicit $exec :: (volatile dereferenceable load store 4 on custom TargetCustom7, align 1, addrspace 4)
-  ; GCN:   INLINEASM &"", 1
+  ; GCN:   INLINEASM &"", 33
   ; GCN:   [[COPY32:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
   ; GCN:   [[DEF9:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
   ; GCN:   BUFFER_ATOMIC_CMPSWAP_IDXEN [[REG_SEQUENCE1]], [[COPY32]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 272, 0, implicit $exec :: (volatile dereferenceable load store 4 on custom TargetCustom7 + 272, align 1, addrspace 4)
   ; GCN:   [[COPY33:%[0-9]+]]:vgpr_32 = COPY [[DEF9]].sub0
   ; GCN:   [[S_MOV_B32_18:%[0-9]+]]:sreg_32 = S_MOV_B32 136
   ; GCN:   [[COPY34:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
   ; GCN:   [[DEF10:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
   ; GCN:   BUFFER_ATOMIC_CMPSWAP_IDXEN [[REG_SEQUENCE1]], [[COPY34]], [[S_LOAD_DWORDX4_IMM]], killed [[S_MOV_B32_18]], 136, 0, implicit $exec :: (volatile dereferenceable load store 4 on custom TargetCustom7 + 272, align 1, addrspace 4)
define amdgpu_cs void @mmo_offsets0(<4 x i32> addrspace(6)* inreg noalias dereferenceable(18446744073709551615) %arg0, i32 %arg1) {
   ; GCN:   BUFFER_ATOMIC_CMPSWAP_IDXEN [[REG_SEQUENCE1]], [[COPY39]], [[S_LOAD_DWORDX4_IMM]], [[COPY40]], 272, 0, implicit $exec :: (volatile dereferenceable load store 4 on custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   [[COPY41:%[0-9]+]]:vgpr_32 = COPY [[DEF13]].sub0
   ; GCN:   [[DEF14:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
   ; GCN:   BUFFER_ATOMIC_CMPSWAP_IDXEN [[REG_SEQUENCE1]], [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 272, 0, implicit $exec :: (volatile dereferenceable load store 4 on custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   [[COPY42:%[0-9]+]]:vgpr_32 = COPY [[DEF14]].sub0
   ; GCN:   [[DEF15:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
   ; GCN:   BUFFER_ATOMIC_CMPSWAP_IDXEN [[REG_SEQUENCE1]], [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 272, 0, implicit $exec :: (volatile dereferenceable load store 4 on custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   [[COPY43:%[0-9]+]]:vgpr_32 = COPY [[DEF15]].sub0
-  ; GCN:   INLINEASM &"", 1
+  ; GCN:   INLINEASM &"", 33
   ; GCN:   [[COPY44:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
   ; GCN:   BUFFER_STORE_DWORDX4_IDXEN_exact killed [[BUFFER_LOAD_DWORDX4_IDXEN2]], [[COPY44]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 288, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store 16 into custom TargetCustom7 + 288, align 1, addrspace 4)
   ; GCN:   [[COPY45:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
   ; GCN:   BUFFER_STORE_DWORDX4_IDXEN_exact killed [[BUFFER_LOAD_DWORDX4_IDXEN3]], [[COPY45]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_4]], 144, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store 16 into custom TargetCustom7 + 288, align 1, addrspace 4)
   ; GCN:   [[S_MOV_B32_20:%[0-9]+]]:sreg_32 = S_MOV_B32 288
   ; GCN:   [[COPY46:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
   ; GCN:   BUFFER_STORE_DWORDX4_IDXEN_exact killed [[BUFFER_LOAD_DWORDX4_IDXEN4]], [[COPY46]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_20]], 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store 16 into custom TargetCustom7 + 288, align 1, addrspace 4)
   ; GCN:   BUFFER_STORE_DWORDX4_BOTHEN_exact killed [[BUFFER_LOAD_DWORDX4_BOTHEN]], [[REG_SEQUENCE2]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_20]], 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store 16 into custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   [[COPY47:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
   ; GCN:   [[COPY48:%[0-9]+]]:sreg_32 = COPY [[COPY]]
   ; GCN:   BUFFER_STORE_DWORDX4_IDXEN_exact killed [[BUFFER_LOAD_DWORDX4_IDXEN5]], [[COPY47]], [[S_LOAD_DWORDX4_IMM]], [[COPY48]], 288, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store 16 into custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   BUFFER_STORE_DWORDX4_IDXEN_exact killed [[BUFFER_LOAD_DWORDX4_IDXEN6]], [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 288, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store 16 into custom TargetCustom7, align 1, addrspace 4)
   ; GCN:   BUFFER_STORE_DWORDX4_IDXEN_exact killed [[BUFFER_LOAD_DWORDX4_IDXEN7]], [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 288, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store 16 into custom TargetCustom7, align 1, addrspace 4)
-  ; GCN:   INLINEASM &"", 1
+  ; GCN:   INLINEASM &"", 33
   ; GCN:   [[COPY49:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
   ; GCN:   BUFFER_STORE_FORMAT_XYZW_IDXEN_exact killed [[BUFFER_LOAD_FORMAT_XYZW_IDXEN2]], [[COPY49]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 304, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store 16 into custom TargetCustom7 + 304, align 1, addrspace 4)
   ; GCN:   [[S_MOV_B32_21:%[0-9]+]]:sreg_32 = S_MOV_B32 152
   ; GCN:   [[COPY50:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
   ; GCN:   BUFFER_STORE_FORMAT_XYZW_IDXEN_exact killed [[BUFFER_LOAD_FORMAT_XYZW_IDXEN3]], [[COPY50]], [[S_LOAD_DWORDX4_IMM]], killed [[S_MOV_B32_21]], 152, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store 16 into custom TargetCustom7 + 304, align 1, addrspace 4)
   ; GCN:   [[S_MOV_B32_22:%[0-9]+]]:sreg_32 = S_MOV_B32 304
   ; GCN:   [[COPY51:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
   ; GCN:   BUFFER_STORE_FORMAT_XYZW_IDXEN_exact killed [[BUFFER_LOAD_FORMAT_XYZW_IDXEN4]], [[COPY51]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_22]], 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store 16 into custom TargetCustom7 + 304, align 1, addrspace 4)

llvm/test/CodeGen/AMDGPU/convergent-inlineasm.ll

 ; RUN: llc -mtriple=amdgcn--amdhsa -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
 
 declare i32 @llvm.amdgcn.workitem.id.x() #0
 ; GCN-LABEL: {{^}}convergent_inlineasm:
 ; GCN: %bb.0:
 ; GCN: v_cmp_ne_u32_e64
 ; GCN: ; mask branch
 ; GCN: BB{{[0-9]+_[0-9]+}}:
 define amdgpu_kernel void @convergent_inlineasm(i64 addrspace(1)* nocapture %arg) {
 bb:
   %tmp = call i32 @llvm.amdgcn.workitem.id.x()
-  %tmp1 = tail call i64 asm "v_cmp_ne_u32_e64 $0, 0, $1", "=s,v"(i32 1) #1
+  %tmp1 = tail call i64 asm "v_cmp_ne_u32_e64 $0, 0, $1", "=s,v"(i32 1)
   %tmp2 = icmp eq i32 %tmp, 8
   br i1 %tmp2, label %bb3, label %bb5
 
 bb3:                                              ; preds = %bb
   %tmp4 = getelementptr i64, i64 addrspace(1)* %arg, i32 %tmp
   store i64 %tmp1, i64 addrspace(1)* %arg, align 8
   br label %bb5
 
 bb5:                                              ; preds = %bb3, %bb
   ret void
 }
 
 ; GCN-LABEL: {{^}}nonconvergent_inlineasm:
 ; GCN: ; mask branch
 
 ; GCN: BB{{[0-9]+_[0-9]+}}:
 ; GCN: v_cmp_ne_u32_e64
 
 ; GCN: BB{{[0-9]+_[0-9]+}}:
 
 define amdgpu_kernel void @nonconvergent_inlineasm(i64 addrspace(1)* nocapture %arg) {
 bb:
   %tmp = call i32 @llvm.amdgcn.workitem.id.x()
-  %tmp1 = tail call i64 asm "v_cmp_ne_u32_e64 $0, 0, $1", "=s,v"(i32 1)
+  %tmp1 = tail call i64 asm "v_cmp_ne_u32_e64 $0, 0, $1", "=s,v"(i32 1) #0
   %tmp2 = icmp eq i32 %tmp, 8
   br i1 %tmp2, label %bb3, label %bb5
 
 bb3:                                              ; preds = %bb
   %tmp4 = getelementptr i64, i64 addrspace(1)* %arg, i32 %tmp
   store i64 %tmp1, i64 addrspace(1)* %arg, align 8
   br label %bb5
 
 bb5:                                              ; preds = %bb3, %bb
   ret void
 }
 
-attributes #0 = { nounwind readnone }
-attributes #1 = { convergent nounwind readnone }
+attributes #0 = { noconvergent }

llvm/test/CodeGen/AMDGPU/inline-attr.ll

 ; RUN: opt -mtriple=amdgcn--amdhsa -S -O3 -enable-unsafe-fp-math %s  | FileCheck -check-prefix=GCN -check-prefix=UNSAFE %s
 ; RUN: opt -mtriple=amdgcn--amdhsa -S -O3 -enable-no-nans-fp-math %s | FileCheck -check-prefix=GCN -check-prefix=NONANS %s
 ; RUN: opt -mtriple=amdgcn--amdhsa -S -O3 -enable-no-infs-fp-math %s | FileCheck -check-prefix=GCN -check-prefix=NOINFS %s
 
 ; GCN: define float @foo(float %x) local_unnamed_addr #0 {
 ; GCN: define amdgpu_kernel void @caller(float addrspace(1)* nocapture %p) local_unnamed_addr #1 {
 ; GCN: %mul.i = fmul float %load, 1.500000e+01
 
-; UNSAFE: attributes #0 = { norecurse nounwind readnone "less-precise-fpmad"="true" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "unsafe-fp-math"="true" }
-; UNSAFE: attributes #1 = { nofree norecurse nounwind "less-precise-fpmad"="true" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "unsafe-fp-math"="true" }
+; UNSAFE: attributes #0 = { noconvergent norecurse nounwind readnone "less-precise-fpmad"="true" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "unsafe-fp-math"="true" }
+; UNSAFE: attributes #1 = { noconvergent nofree norecurse nounwind "less-precise-fpmad"="true" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "unsafe-fp-math"="true" }
 
-; NOINFS: attributes #0 = { norecurse nounwind readnone "no-infs-fp-math"="true" }
-; NOINFS: attributes #1 = { nofree norecurse nounwind "less-precise-fpmad"="false" "no-infs-fp-math"="true" "no-nans-fp-math"="false" "unsafe-fp-math"="false" }
+; NOINFS: attributes #0 = { noconvergent norecurse nounwind readnone "no-infs-fp-math"="true" }
+; NOINFS: attributes #1 = { noconvergent nofree norecurse nounwind "less-precise-fpmad"="false" "no-infs-fp-math"="true" "no-nans-fp-math"="false" "unsafe-fp-math"="false" }
 
-; NONANS: attributes #0 = { norecurse nounwind readnone "no-nans-fp-math"="true" }
-; NONANS: attributes #1 = { nofree norecurse nounwind "less-precise-fpmad"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="true" "unsafe-fp-math"="false" }
+; NONANS: attributes #0 = { noconvergent norecurse nounwind readnone "no-nans-fp-math"="true" }
+; NONANS: attributes #1 = { noconvergent nofree norecurse nounwind "less-precise-fpmad"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="true" "unsafe-fp-math"="false" }
 
 define float @foo(float %x) #0 {
 entry:
   %mul = fmul float %x, 1.500000e+01
   ret float %mul
 }
 
 define amdgpu_kernel void @caller(float addrspace(1)* %p) #1 {

llvm/test/CodeGen/AMDGPU/lds-output-queue.ll

entry:
 
   ; This will start a new clause for the vertex fetch
   %2 = load i32, i32 addrspace(1)* %in
   %3 = add i32 %1, %2
   store i32 %3, i32 addrspace(1)* %out
   ret void
 }
 
-declare void @llvm.r600.group.barrier() nounwind convergent
+declare void @llvm.r600.group.barrier() nounwind
 
 ; The machine scheduler does not do proper alias analysis and assumes that
 ; loads from global values (Note that a global value is different that a
 ; value from global memory.  A global value is a value that is declared
 ; outside of a function, it can reside in any address space) alias with
 ; all other loads.
 ;
 ; This is a problem for scheduling the reads from the local data share (lds).

llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.ll

 ;
 ; This used to crash.
 define amdgpu_ps void @init_unreachable() {
 main_body:
   call void @llvm.amdgcn.init.exec(i64 -1)
   unreachable
 }
 
-declare void @llvm.amdgcn.init.exec(i64) #1
-declare void @llvm.amdgcn.init.exec.from.input(i32, i32) #1
-
-attributes #1 = { convergent }
+declare void @llvm.amdgcn.init.exec(i64)
+declare void @llvm.amdgcn.init.exec.from.input(i32, i32)

llvm/test/CodeGen/AMDGPU/schedule-vs-if-nested-loop-failure.ll

 ; RUN: llc -O0 -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
 ; RUN: llc -O0 -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
 
-declare void @llvm.amdgcn.s.barrier() nounwind convergent
+declare void @llvm.amdgcn.s.barrier() nounwind
 
 ; GCN-LABEL: {{^}}main:
 define amdgpu_vs void @main(<4 x float> inreg %reg0, <4 x float> inreg %reg1) {
 main_body:
   %0 = extractelement <4 x float> %reg1, i32 0
   %1 = extractelement <4 x float> %reg1, i32 2
   %2 = fcmp ult float %0, 0.000000e+00
   %3 = select i1 %2, float 1.000000e+00, float 0.000000e+00

llvm/test/CodeGen/Mips/micromips-b-range.ll

 
 la:
   switch i32 %1, label %le [
     i32 9999, label %lb
     i32 19999, label %lc
   ]
 
 lb:
-  tail call void asm sideeffect ".space 0", ""()
+  tail call void asm sideeffect ".space 0", ""() noconvergent
   br label %le
 
 lc:
-  tail call void asm sideeffect ".space 0", ""()
+  tail call void asm sideeffect ".space 0", ""() noconvergent
   br label %le
 
 le:
-  tail call void asm sideeffect ".space 66500", ""()
+  tail call void asm sideeffect ".space 66500", ""() noconvergent
   br label %lg
 
 lf:
-  tail call void asm sideeffect ".space 0", ""()
+  tail call void asm sideeffect ".space 0", ""() noconvergent
   br label %lg
 
 lg:
-  tail call void asm sideeffect ".space 0", ""()
+  tail call void asm sideeffect ".space 0", ""() noconvergent
   br label %li
 
 li:
-  tail call void asm sideeffect ".space 0", ""()
+  tail call void asm sideeffect ".space 0", ""() noconvergent
   ret void
 }

llvm/test/CodeGen/NVPTX/convergent-mir-call.ll

 ; RUN: llc -mtriple nvptx64-nvidia-cuda -stop-after machine-cp -o - < %s 2>&1 | FileCheck %s
 
 ; Check that convergent calls are emitted using convergent MIR instructions,
 ; while non-convergent calls are not.
 
 target triple = "nvptx64-nvidia-cuda"
 
-declare void @conv() convergent
-declare void @not_conv()
+declare void @conv()
+declare void @not_conv() noconvergent
 
 define void @test(void ()* %f) {
   ; CHECK: ConvergentCallUniPrintCall
   ; CHECK-NEXT: @conv
   call void @conv()
 
   ; CHECK: CallUniPrintCall
   ; CHECK-NEXT: @not_conv
   call void @not_conv()
 
   ; CHECK: ConvergentCallPrintCall
-  call void %f() convergent
+  call void %f()
 
   ; CHECK: CallPrintCall
-  call void %f()
+  call void %f() noconvergent
 
   ret void
 }

llvm/test/CodeGen/X86/inline-asm-avx512f-x-constraint.ll

 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f -stop-after=finalize-isel | FileCheck %s
 
 ; CHECK: %[[REG1:.*]]:vr512_0_15 = COPY %1
 ; CHECK: %[[REG2:.*]]:vr512_0_15 = COPY %2
 ; CHECK: INLINEASM &"vpaddq\09$3, $2, $0 {$1}", 0, {{.*}}, def %{{.*}}, {{.*}}, %{{.*}}, {{.*}}, %[[REG1]], {{.*}}, %[[REG2]], 12, implicit-def early-clobber $df, 12, implicit-def early-clobber $fpsw, 12, implicit-def early-clobber $eflags
 
 define <8 x i64> @mask_Yk_i8(i8 signext %msk, <8 x i64> %x, <8 x i64> %y) {
 entry:
-  %0 = tail call <8 x i64> asm "vpaddq\09$3, $2, $0 {$1}", "=x,^Yk,x,x,~{dirflag},~{fpsr},~{flags}"(i8 %msk, <8 x i64> %x, <8 x i64> %y)
+  %0 = tail call <8 x i64> asm "vpaddq\09$3, $2, $0 {$1}", "=x,^Yk,x,x,~{dirflag},~{fpsr},~{flags}"(i8 %msk, <8 x i64> %x, <8 x i64> %y) noconvergent
   ret <8 x i64> %0
 }

llvm/test/CodeGen/X86/inline-asm-default-clobbers.ll

 ; RUN: llc < %s -mtriple=i686 -stop-after=finalize-isel | FileCheck %s
 
 ; CHECK: INLINEASM &"", 1, 12, implicit-def early-clobber $df, 12, implicit-def early-clobber $fpsw, 12, implicit-def early-clobber $eflags
 define void @foo() {
 entry:
-  call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"()
+  call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"() noconvergent
   ret void
 }

llvm/test/Feature/intrinsics.ll

 ; CHECK: declare void @llvm.trap() #1
 declare void @llvm.trap()
 
 define void @trap() {
   call void @llvm.trap()
   ret void
 }
 
-; CHECK: attributes #0 = { nounwind readnone speculatable willreturn }
-; CHECK: attributes #1 = { cold noreturn nounwind }
+; CHECK: attributes #0 = { noconvergent nounwind readnone speculatable willreturn }
+; CHECK: attributes #1 = { cold noconvergent noreturn nounwind }

llvm/test/Other/invariant.group.ll

; CHECK: call void @useBool(i1 %r2)
 
   ret void
 }
 
 declare void @use(i8* readonly)
 declare void @useBool(i1)
 
 declare void @clobber(i8*)
-; CHECK: Function Attrs: inaccessiblememonly nounwind speculatable willreturn{{$}}
+; CHECK: Function Attrs: inaccessiblememonly noconvergent nounwind speculatable willreturn{{$}}
 ; CHECK-NEXT: declare i8* @llvm.launder.invariant.group.p0i8(i8*)
 declare i8* @llvm.launder.invariant.group.p0i8(i8*)
 
-; CHECK: Function Attrs: nounwind readnone speculatable willreturn{{$}}
+; CHECK: Function Attrs: noconvergent nounwind readnone speculatable willreturn{{$}}
 ; CHECK-NEXT: declare i8* @llvm.strip.invariant.group.p0i8(i8*)
 declare i8* @llvm.strip.invariant.group.p0i8(i8*)
 
 
-!0 = !{}
+!0 = !{}
 

llvm/test/TableGen/intrin-side-effects.td

class Intrinsic<list<LLVMType> ret_types,
   bit isTarget = 0;
 }
 
 // ... this intrinsic.
 def int_random_gen   : Intrinsic<[llvm_i32_ty], [], [IntrNoMem, IntrHasSideEffects]>;
 
 // CHECK: 1, // llvm.random.gen
 // CHECK: case 1:
-// CHECK-NEXT: Atts[] = {Attribute::NoUnwind}
+// CHECK-NEXT: Atts[] = {Attribute::NoUnwind,Attribute::NoConvergent}

llvm/test/Transforms/CallSiteSplitting/callsite-instructions-before-call.ll

 ; CHECK-NEXT: br label %Tail
 ; CHECK-LABEL: TBB.split:
 ; CHECK-NEXT: store i32 %v, i32* %a
 ; CHECK-NEXT: %[[CALL2:.*]] = call i32 @callee(i32* nonnull %a, i32 1, i32 2)
 ; CHECK-NEXT br label %Tail
 ; CHECK-LABEL: Tail:
 ; CHECK: %[[MERGED:.*]] = phi i32 [ %[[CALL1]], %Header.split ], [ %[[CALL2]], %TBB.split ]
 ; CHECK: ret i32 %[[MERGED]]
-define i32 @callee(i32* %a, i32 %v, i32 %p) {
+define i32 @callee(i32* %a, i32 %v, i32 %p) noconvergent {
     ret i32 0
 }
 
 define void @test_no_remove_used_phi(i32* %ptrarg, i32 %i) {
 Header:
   %l1 = load i32, i32* undef, align 16
   %tobool = icmp ne i32* %ptrarg, null
   br i1 %tobool, label %TBB, label %CallSite

 ; CHECK-NEXT: br label %CallSite
 ; CHECK-LABEL: TBB.split:
 ; CHECK: call void @bar(i32* nonnull %ptrarg, i32 %l2)
 ; CHECK-NEXT br label %CallSite
 ; CHECK-LABEL: CallSite:
 ; CHECK-NEXT:  %l = phi i32 [ %l1, %Header.split ], [ %l2, %TBB.split ]
 ; CHECK: call void @bari(i32 %l)
 
-define void @bar(i32*, i32) {
+define void @bar(i32*, i32) noconvergent {
     ret void
 }
 
-define  void @bari(i32) {
+define  void @bari(i32) noconvergent {
     ret void
 }

llvm/test/Transforms/CallSiteSplitting/callsite-no-or-structure.ll

 Tail:
   %r = call i32 @callee(i32* %a, i32 %v, i32 %p)
   ret i32 %r
 
 End:
   ret i32 %v
 }
 
-define i32 @callee(i32* %a, i32 %v, i32 %p) {
+define i32 @callee(i32* %a, i32 %v, i32 %p) noconvergent {
   ret i32 10
 }

llvm/test/Transforms/CallSiteSplitting/callsite-split-debug.ll

 ; RUN: opt -S -callsite-splitting -o - < %s | FileCheck %s
 ; RUN: opt -S -strip-debug -callsite-splitting -o - < %s | FileCheck %s
 
-define internal i16 @bar(i16 %p1, i16 %p2) {
+define internal i16 @bar(i16 %p1, i16 %p2) noconvergent {
   %_tmp3 = mul i16 %p2, %p1
   ret i16 %_tmp3
 }
 
 define i16 @foo(i16 %in) {
 bb0:
   br label %bb1
 

llvm/test/Transforms/CallSiteSplitting/callsite-split-or-phi.ll

 ;CHECK: %[[MERGED:.*]] = phi i32 [ %[[CALL2]], %TBB.split ], [ %[[CALL1]], %Header.split ]
 ;CHECK: ret i32 %[[MERGED]]
 define i32 @test_nonconst_nonconst_phi(i32* %a, i32* %b, i32 %v, i32 %v2) {
 Header:
   %tobool1 = icmp eq i32* %a, %b
   br i1 %tobool1, label %Tail, label %TBB
 
 TBB:
-  %cmp = icmp eq i32 %v, %v2 
+  %cmp = icmp eq i32 %v, %v2
   br i1 %cmp, label %Tail, label %End
 
 Tail:
   %p = phi i32[1,%Header], [2, %TBB]
   %r = call i32 @callee(i32* %a, i32 %v, i32 %p)
   ret i32 %r
 
 End:

 ;CHECK: %r = call i32 @callee(i32* %a, i32 %v, i32 %p)
 ;CHECK: ret i32 %r
 define i32 @test_nonconst_nonconst_phi_noncost(i32* %a, i32* %b, i32 %v, i32 %v2) {
 Header:
   %tobool1 = icmp eq i32* %a, %b
   br i1 %tobool1, label %Tail, label %TBB
 
 TBB:
-  %cmp = icmp eq i32 %v, %v2 
+  %cmp = icmp eq i32 %v, %v2
   br i1 %cmp, label %Tail, label %End
 
 Tail:
   %p = phi i32[%v,%Header], [%v2, %TBB]
   %r = call i32 @callee(i32* %a, i32 %v, i32 %p)
   ret i32 %r
 
 End:
TBB:
   br i1 %cmp, label %Tail, label %Header
 Tail:
   %r = call i32 @callee(i32* %a, i32 %v, i32 %p)
   ret i32 %r
 End:
   ret i32 %v
 }
 
-define i32 @callee(i32* %a, i32 %v, i32 %p) {
+define i32 @callee(i32* %a, i32 %v, i32 %p) noconvergent {
 entry:
   %c = icmp ne i32* %a, null
   br i1 %c, label %BB1, label %BB2
 
 BB1:
   call void @dummy(i32* %a, i32 %p)
   br label %End
 
 BB2:
   call void @dummy2(i32 %v, i32 %p)
   br label %End
 
 End:
   ret i32 %p
 }
 
-declare void @dummy(i32*, i32)
-declare void @dummy2(i32, i32)
+declare void @dummy(i32*, i32) noconvergent
+declare void @dummy2(i32, i32) noconvergent
 
 ; Make sure we remove the non-nullness on constant paramater.
 ;
 ;CHECK-LABEL: @caller2
 ;CHECK-LABEL: Top1.split:
 ;CHECK: call i32 @callee(i32* inttoptr (i64 4643 to i32*)
 define void @caller2(i32 %c, i32* %a_elt, i32* %b_elt) {
 entry:
   br label %Top0
 
 Top0:
-  %tobool1 = icmp eq i32* %a_elt, inttoptr (i64 4643 to  i32*) 
+  %tobool1 = icmp eq i32* %a_elt, inttoptr (i64 4643 to  i32*)
   br i1 %tobool1, label %Top1, label %NextCond
 
 Top1:
   %tobool2 = icmp ne i32* %a_elt, null
   br i1 %tobool2, label %CallSiteBB, label %NextCond
 
 NextCond:
   %cmp = icmp ne i32* %b_elt, null

llvm/test/Transforms/CallSiteSplitting/callsite-split-preserve-debug.ll

CallSite:                                         ; preds = %TBB, %Header
   %cv = call i32 @callee(i32 0, i32 %i), !dbg !26
   %sub = sub nsw i32 %lv, %cv
   br label %End
 
 End:                                              ; preds = %CallSite, %TBB
   ret void
 }
 
-define i32 @callee(i32 %aa, i32 %bb) {
+define i32 @callee(i32 %aa, i32 %bb) noconvergent {
 entry:
   %add = add nsw i32 %aa, %bb
   ret i32 %add
 }
 
 !llvm.dbg.cu = !{!0}
 !llvm.debugify = !{!3, !4}
 !llvm.module.flags = !{!5}

llvm/test/Transforms/CallSiteSplitting/callsite-split.ll

CallSiteBB:
   %p = phi i1 [0, %Top], [%c, %NextCond]
   call void @callee(%struct.bitmap* %a_elt, %struct.bitmap* %a_elt, %struct.bitmap* %b_elt, i1 %p)
   br label %End
 
 End:
   ret void
 }
 
-define void @callee(%struct.bitmap* %dst_elt, %struct.bitmap* %a_elt, %struct.bitmap* %b_elt, i1 %c) {
+define void @callee(%struct.bitmap* %dst_elt, %struct.bitmap* %a_elt, %struct.bitmap* %b_elt, i1 %c) noconvergent {
 entry:
   %tobool = icmp ne %struct.bitmap* %a_elt, null
   %tobool1 = icmp ne %struct.bitmap* %b_elt, null
   %or.cond = and i1 %tobool, %tobool1
   br i1 %or.cond, label %Cond, label %Big
 
 Cond:
   %cmp = icmp eq %struct.bitmap*  %dst_elt, %a_elt
CallSiteBB:
   %u = call i1 @callee2(i1 %phi)
   call void @foo(i1 %u)
   br label %End
 
 End:
   ret void
 }
 
-define i1 @callee2(i1 %b) {
+define i1 @callee2(i1 %b) noconvergent {
 entry:
   br i1 %b, label %BB1, label %BB2
 
 BB1:
   call void @dummy3()
   br label %End
 
 BB2:
   call void @dummy4()
   br label %End
 
 End:
   ret i1 %b
 }
 
-declare void @dummy3()
-declare void @dummy4()
-declare void @foo(i1)
+declare void @dummy3() noconvergent
+declare void @dummy4() noconvergent
+declare void @foo(i1) noconvergent

llvm/test/Transforms/CallSiteSplitting/convergent.ll

 
 endif:
   call void @convergent_external(i8* %a_elt) #0
   ret void
 }
 
 ; Make sure an otherwise identical function is transformed
 ; CHECK-LABEL: define void @reference_caller(
-; CHECK: call void @nonconvergent_callee(
-; CHECK: call void @nonconvergent_callee(
+; CHECK: call void @noconvergent_callee(
+; CHECK: call void @noconvergent_callee(
 define void @reference_caller(i1 %c, i8* %a_elt, i8* %b_elt) #1 {
 entry:
   br label %Top
 
 Top:
   %tobool1 = icmp eq i8* %a_elt, null
   br i1 %tobool1, label %CallSiteBB, label %NextCond
 
 NextCond:
   %cmp = icmp ne i8* %b_elt, null
   br i1 %cmp, label %CallSiteBB, label %End
 
 CallSiteBB:
   %p = phi i1 [ false, %Top ], [ %c, %NextCond ]
-  call void @nonconvergent_callee(i8* %a_elt, i1 %p)
+  call void @noconvergent_callee(i8* %a_elt, i1 %p)
   br label %End
 
 End:
   ret void
 }
 
-; CHECK-LABEL: define void @nonconvergent_callee(
-; CHECK: call void @nonconvergent_external(
-; CHECK-NOT: call void @nonconvergent_external(
-define void @nonconvergent_callee(i8* %a_elt, i1 %c) #1 {
+; CHECK-LABEL: define void @noconvergent_callee(
+; CHECK: call void @noconvergent_external(
+; CHECK-NOT: call void @noconvergent_external(
+define void @noconvergent_callee(i8* %a_elt, i1 %c) #1 {
 entry:
   %tobool = icmp ne i8* %a_elt, null
   br i1 %tobool, label %then, label %endif
 
 then:
   br label %endif
 
 endif:
-  call void @nonconvergent_external(i8* %a_elt)
+  call void @noconvergent_external(i8* %a_elt)
   ret void
 }
 
 declare void @convergent_external(i8*) #0
-declare void @nonconvergent_external(i8*) #1
+declare void @noconvergent_external(i8*) #1
 
 attributes #0 = { convergent nounwind }
-attributes #1 = { nounwind }
+attributes #1 = { noconvergent nounwind }

llvm/test/Transforms/CallSiteSplitting/musttail.ll

 Tail:
   %ca = musttail call i8* @callee(i8* %a, i8* %b)
   %cb = bitcast i8* %ca to i8*
   ret i8* %cb
 End:
   ret i8* null
 }
 
-define i8* @callee(i8* %a, i8* %b) noinline {
+define i8* @callee(i8* %a, i8* %b) noconvergent noinline {
   ret i8* %a
 }
 
 ;CHECK-LABEL: @no_cast_caller
 ;CHECK-LABEL: Top.split:
 ;CHECK: %ca1 = musttail call i8* @callee(i8* null, i8* %b)
 ;CHECK: ret i8* %ca1
 ;CHECK-LABEL: TBB.split
TBB:
   br i1 %c2, label %Tail, label %End
 Tail:
   musttail call void @void_callee(i8* %a, i8* %b)
   ret void
 End:
   ret void
 }
 
-define void @void_callee(i8* %a, i8* %b) noinline {
+define void @void_callee(i8* %a, i8* %b) noconvergent noinline {
   ret void
 }
 
 ;   Include a test with a larger CFG that exercises the DomTreeUpdater
 ;   machinery a bit more.
 ;CHECK-LABEL: @larger_cfg_caller
 ;CHECK-LABEL: Top.split:
 ;CHECK: %r1 = musttail call i8* @callee(i8* null, i8* %b)

llvm/test/Transforms/CallSiteSplitting/noduplicate.ll

 endif:
   call void @nonnoduplicate_external(i8* %a_elt)
   ret void
 }
 
 declare void @noduplicate_external(i8*) #0
 declare void @nonnoduplicate_external(i8*) #1
 
-attributes #0 = { noduplicate nounwind }
-attributes #1 = { nounwind }
+attributes #0 = { noconvergent noduplicate nounwind }
+attributes #1 = { noconvergent nounwind }
 

llvm/test/Transforms/DeadArgElim/2010-04-30-DbgInfo.ll

 bb2:                                              ; preds = %bb1, %bb
   %.0 = phi i8* [ getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), %bb ], [ %name, %bb1 ] ; <i8*> [#uses=1]
   ret i8* %.0, !dbg !27
 }
 
 declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
 
 ; CHECK: attributes #0 = { nounwind ssp }
-; CHECK: attributes #1 = { nounwind readnone speculatable willreturn }
+; CHECK: attributes #1 = { noconvergent nounwind readnone speculatable willreturn }
 ; CHECK: attributes #2 = { noinline nounwind ssp }
 ; CHECK: attributes [[NUW]] = { nounwind }
 
 !llvm.dbg.cu = !{!3}
 !llvm.module.flags = !{!30}
 !0 = !DILocalVariable(name: "name", line: 8, arg: 1, scope: !1, file: !2, type: !6)
 !1 = distinct !DISubprogram(name: "vfs_addname", linkageName: "vfs_addname", line: 12, isLocal: false, isDefinition: true, virtualIndex: 6, isOptimized: false, unit: !3, file: !28, scope: !2, type: !4)
 !2 = !DIFile(filename: "tail.c", directory: "/Users/echeng/LLVM/radars/r7927803/")

llvm/test/Transforms/ForcedFunctionAttrs/noconvergent.ll

+; RUN: opt < %s -S -forceattrs | FileCheck %s --check-prefix=CHECK-CONTROL
+; RUN: opt < %s -S -forceattrs -force-attribute foo:noconvergent | FileCheck %s --check-prefix=CHECK-FOO
+; RUN: opt < %s -S -passes=forceattrs -force-attribute foo:noconvergent | FileCheck %s --check-prefix=CHECK-FOO
+
+; CHECK-CONTROL: define void @foo() {
+; CHECK-FOO: define void @foo() #0 {
+define void @foo() {
+  ret void
+}
+
+; CHECK-FOO: attributes #0 = { noconvergent }

llvm/test/Transforms/FunctionAttrs/arg_returned.ll

 ; RUN: opt -functionattrs -S < %s | FileCheck %s --check-prefix=FNATTR
 ; RUN: opt -attributor -attributor-manifest-internal -attributor-disable=false -attributor-max-iterations-verify -attributor-max-iterations=7 -S < %s | FileCheck %s --check-prefix=ATTRIBUTOR
 ; RUN: opt -attributor -attributor-manifest-internal -attributor-disable=false -functionattrs -S < %s | FileCheck %s --check-prefix=BOTH
 ;
 ; Test cases specifically designed for the "returned" argument attribute.
 ; We use FIXME's to indicate problems and missing attributes.
 ;
 
 ; TEST SCC test returning an integer value argument
 ;
-; BOTH: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable
+; BOTH: Function Attrs: noconvergent nofree noinline norecurse nosync nounwind readnone uwtable
 ; BOTH-NEXT: define i32 @sink_r0(i32 returned %r)
-; BOTH: Function Attrs: nofree noinline nosync nounwind readnone uwtable
+; BOTH: Function Attrs: noconvergent nofree noinline nosync nounwind readnone uwtable
 ; BOTH-NEXT: define i32 @scc_r1(i32 %a, i32 returned %r, i32 %b)
-; BOTH: Function Attrs: nofree noinline nosync nounwind readnone uwtable
+; BOTH: Function Attrs: noconvergent nofree noinline nosync nounwind readnone uwtable
 ; BOTH-NEXT: define i32 @scc_r2(i32 %a, i32 %b, i32 returned %r)
-; BOTH: Function Attrs: nofree noinline nosync nounwind readnone uwtable
+; BOTH: Function Attrs: noconvergent nofree noinline nosync nounwind readnone uwtable
 ; BOTH-NEXT: define i32 @scc_rX(i32 %a, i32 %b, i32 %r)
 ;
 ; FNATTR: define i32 @sink_r0(i32 returned %r)
 ; FNATTR: define i32 @scc_r1(i32 %a, i32 %r, i32 %b)
 ; FNATTR: define i32 @scc_r2(i32 %a, i32 %b, i32 %r)
 ; FNATTR: define i32 @scc_rX(i32 %a, i32 %b, i32 %r)
 ;
 ; ATTRIBUTOR: define i32 @sink_r0(i32 returned %r)

 
 
 ; TEST SCC test returning a pointer value argument
 ;
 ; FNATTR: define double* @ptr_sink_r0(double* readnone returned %r)
 ; FNATTR: define double* @ptr_scc_r1(double* %a, double* readnone %r, double* nocapture readnone %b)
 ; FNATTR: define double* @ptr_scc_r2(double* readnone %a, double* readnone %b, double* readnone %r)
 ;
-; ATTRIBUTOR: Function Attrs: nofree noinline nosync nounwind readnone uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noinline nosync nounwind readnone uwtable
 ; ATTRIBUTOR-NEXT: define double* @ptr_sink_r0(double* readnone returned "no-capture-maybe-returned" %r)
-; ATTRIBUTOR: Function Attrs: nofree noinline nosync nounwind readnone uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noinline nosync nounwind readnone uwtable
 ; ATTRIBUTOR-NEXT: define double* @ptr_scc_r1(double* readnone %a, double* readnone returned %r, double* nocapture readnone %b)
-; ATTRIBUTOR: Function Attrs: nofree noinline nosync nounwind readnone uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noinline nosync nounwind readnone uwtable
 ; ATTRIBUTOR-NEXT: define double* @ptr_scc_r2(double* readnone %a, double* readnone %b, double* readnone returned %r)
 ;
 ; double* ptr_scc_r1(double* a, double* b, double* r);
 ; double* ptr_scc_r2(double* a, double* b, double* r);
 ;
 ; __attribute__((noinline)) double* ptr_sink_r0(double* r) {
 ;   return r;
 ; }

 
 ; TEST a no-return singleton SCC
 ;
 ; int* rt0(int *a) {
 ;   return *a ? a : rt0(a);
 ; }
 ;
 ; FNATTR:  define i32* @rt0(i32* readonly %a)
-; BOTH: Function Attrs: nofree noinline noreturn nosync nounwind readonly uwtable
+; BOTH: Function Attrs: noconvergent nofree noinline noreturn nosync nounwind readonly uwtable
 ; BOTH-NEXT:    define noalias nonnull align 536870912 dereferenceable(4294967295) i32* @rt0(i32* nocapture nonnull readonly dereferenceable(4) %a)
 define i32* @rt0(i32* %a) #0 {
 entry:
   %v = load i32, i32* %a, align 4
   %tobool = icmp ne i32 %v, 0
   %call = call i32* @rt0(i32* %a)
   %sel = select i1 %tobool, i32* %a, i32* %call
   ret i32* %sel
 }
 
 ; TEST a no-return singleton SCC
 ;
 ; int* rt1(int *a) {
 ;   return *a ? undef : rt1(a);
 ; }
 ;
 ; FNATTR:  define noalias i32* @rt1(i32* nocapture readonly %a)
-; BOTH: Function Attrs: nofree noinline noreturn nosync nounwind readonly uwtable
+; BOTH: Function Attrs: noconvergent nofree noinline noreturn nosync nounwind readonly uwtable
 ; BOTH-NEXT:    define noalias nonnull align 536870912 dereferenceable(4294967295) i32* @rt1(i32* nocapture nonnull readonly dereferenceable(4) %a)
 define i32* @rt1(i32* %a) #0 {
 entry:
   %v = load i32, i32* %a, align 4
   %tobool = icmp ne i32 %v, 0
   %call = call i32* @rt1(i32* %a)
   %sel = select i1 %tobool, i32* undef, i32* %call
   ret i32* %sel

 ;
 ; double select_and_phi(double b) {
 ;   double x = b;
 ;   if (b > 0)
 ;     x = b;
 ;   return b == 0? b : x;
 ; }
 ;
-; BOTH: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable
+; BOTH: Function Attrs: noconvergent nofree noinline norecurse nosync nounwind readnone uwtable
 ; BOTH-NEXT: define double @select_and_phi(double returned %b)
 ;
 ; FNATTR:     define double @select_and_phi(double %b)
-; ATTRIBUTOR: Function Attrs: nofree noinline nosync nounwind readnone uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noinline nosync nounwind readnone uwtable
 ; ATTRIBUTOR-NEXT: define double @select_and_phi(double returned %b)
 define double @select_and_phi(double %b) #0 {
 entry:
   %cmp = fcmp ogt double %b, 0.000000e+00
   br i1 %cmp, label %if.then, label %if.end
 
 if.then:                                          ; preds = %entry
   br label %if.end

 ;
 ; double recursion_select_and_phi(int a, double b) {
 ;   double x = b;
 ;   if (a-- > 0)
 ;     x = recursion_select_and_phi(a, b);
 ;   return b == 0? b : x;
 ; }
 ;
-; BOTH: Function Attrs: nofree noinline nosync nounwind readnone uwtable
+; BOTH: Function Attrs: noconvergent nofree noinline nosync nounwind readnone uwtable
 ; BOTH-NEXT: define double @recursion_select_and_phi(i32 %a, double returned %b)
 ;
 ; FNATTR:     define double @recursion_select_and_phi(i32 %a, double %b)
 ;
-; ATTRIBUTOR: Function Attrs: nofree noinline nosync nounwind readnone uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noinline nosync nounwind readnone uwtable
 ; ATTRIBUTOR-NEXT: define double @recursion_select_and_phi(i32 %a, double returned %b)
 define double @recursion_select_and_phi(i32 %a, double %b) #0 {
 entry:
   %dec = add nsw i32 %a, -1
   %cmp = icmp sgt i32 %a, 0
   br i1 %cmp, label %if.then, label %if.end
 
 if.then:                                          ; preds = %entry

 
 
 ; TEST returned argument goes through bitcasts
 ;
 ; double* bitcast(int* b) {
 ;   return (double*)b;
 ; }
 ;
-; BOTH: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable
+; BOTH: Function Attrs: noconvergent nofree noinline norecurse nosync nounwind readnone uwtable
 ; BOTH-NEXT:  define double* @bitcast(i32* readnone returned "no-capture-maybe-returned" %b)
 ;
 ; FNATTR:     define double* @bitcast(i32* readnone %b)
 ;
-; ATTRIBUTOR: Function Attrs: nofree noinline nosync nounwind readnone uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noinline nosync nounwind readnone uwtable
 ; ATTRIBUTOR-NEXT: define double* @bitcast(i32* readnone returned "no-capture-maybe-returned" %b)
 define double* @bitcast(i32* %b) #0 {
 entry:
   %bc0 = bitcast i32* %b to double*
   ret double* %bc0
 }
 
 
 ; TEST returned argument goes through select and phi interleaved with bitcasts
 ;
 ; double* bitcasts_select_and_phi(int* b) {
 ;   double* x = b;
 ;   if (b == 0)
 ;     x = b;
 ;   return b != 0 ? b : x;
 ; }
 ;
-; BOTH: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable
+; BOTH: Function Attrs: noconvergent nofree noinline norecurse nosync nounwind readnone uwtable
 ; BOTH-NEXT: define double* @bitcasts_select_and_phi(i32* readnone returned %b)
 ;
 ; FNATTR:     define double* @bitcasts_select_and_phi(i32* readnone %b)
 ;
-; ATTRIBUTOR: Function Attrs: nofree noinline nosync nounwind readnone uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noinline nosync nounwind readnone uwtable
 ; ATTRIBUTOR-NEXT: define double* @bitcasts_select_and_phi(i32* readnone returned %b)
 define double* @bitcasts_select_and_phi(i32* %b) #0 {
 entry:
   %bc0 = bitcast i32* %b to double*
   %cmp = icmp eq double* %bc0, null
   br i1 %cmp, label %if.then, label %if.end
 
 if.then:                                          ; preds = %entry

 ; double* ret_arg_arg_undef(int* b) {
 ;   if (b == 0)
 ;     return (double*)b;
 ;   if (b == 0)
 ;     return (double*)b;
 ;   /* return undef */
 ; }
 ;
-; BOTH: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable
+; BOTH: Function Attrs: noconvergent nofree noinline norecurse nosync nounwind readnone uwtable
 ; BOTH-NEXT:  define double* @ret_arg_arg_undef(i32* readnone returned %b)
 ;
 ; FNATTR:     define double* @ret_arg_arg_undef(i32* readnone %b)
 ;
-; ATTRIBUTOR: Function Attrs: nofree noinline nosync nounwind readnone uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noinline nosync nounwind readnone uwtable
 ; ATTRIBUTOR-NEXT: define double* @ret_arg_arg_undef(i32* readnone returned %b)
 define double* @ret_arg_arg_undef(i32* %b) #0 {
 entry:
   %bc0 = bitcast i32* %b to double*
   %cmp = icmp eq double* %bc0, null
   br i1 %cmp, label %ret_arg0, label %if.end
 
 ret_arg0:

 ; double* ret_undef_arg_arg(int* b) {
 ;   if (b == 0)
 ;     return (double*)b;
 ;   if (b == 0)
 ;     return (double*)b;
 ;   /* return undef */
 ; }
 ;
-; BOTH: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable
+; BOTH: Function Attrs: noconvergent nofree noinline norecurse nosync nounwind readnone uwtable
 ; BOTH-NEXT:  define double* @ret_undef_arg_arg(i32* readnone returned %b)
 ;
 ; FNATTR:     define double* @ret_undef_arg_arg(i32* readnone %b)
 ;
-; ATTRIBUTOR: Function Attrs: nofree noinline nosync nounwind readnone uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noinline nosync nounwind readnone uwtable
 ; ATTRIBUTOR-NEXT: define double* @ret_undef_arg_arg(i32* readnone returned %b)
 define double* @ret_undef_arg_arg(i32* %b) #0 {
 entry:
   %bc0 = bitcast i32* %b to double*
   %cmp = icmp eq double* %bc0, null
   br i1 %cmp, label %ret_undef, label %if.end
 
 ret_undef:

 ; double* ret_undef_arg_undef(int* b) {
 ;   if (b == 0)
 ;     /* return undef */
 ;   if (b == 0)
 ;     return (double*)b;
 ;   /* return undef */
 ; }
 ;
-; BOTH: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable
+; BOTH: Function Attrs: noconvergent nofree noinline norecurse nosync nounwind readnone uwtable
 ; BOTH-NEXT:  define double* @ret_undef_arg_undef(i32* readnone returned %b)
 ;
 ; FNATTR:     define double* @ret_undef_arg_undef(i32* readnone %b)
 ; ATTRIBUTOR: define double* @ret_undef_arg_undef(i32* readnone returned %b)
 define double* @ret_undef_arg_undef(i32* %b) #0 {
 entry:
   %bc0 = bitcast i32* %b to double*
   %cmp = icmp eq double* %bc0, null
define i32* @dont_use_const() #0 {
   %c = musttail call i32* @ret_const()
   ; ATTRIBUTOR: ret i32* %c
   ret i32* %c
 }
 
 attributes #0 = { noinline nounwind uwtable }
 
 ; BOTH-NOT: attributes #
-; BOTH-DAG: attributes #{{[0-9]*}} = { nofree noinline norecurse nosync nounwind readnone uwtable willreturn }
-; BOTH-DAG: attributes #{{[0-9]*}} = { nofree noinline nosync nounwind readnone uwtable }
-; BOTH-DAG: attributes #{{[0-9]*}} = { nofree noinline noreturn nosync nounwind readonly uwtable }
+; BOTH-DAG: attributes #{{[0-9]*}} = { noconvergent nofree noinline norecurse nosync nounwind readnone uwtable willreturn }
+; BOTH-DAG: attributes #{{[0-9]*}} = { noconvergent nofree noinline nosync nounwind readnone uwtable }
+; BOTH-DAG: attributes #{{[0-9]*}} = { noconvergent nofree noinline noreturn nosync nounwind readonly uwtable }
 ; BOTH-DAG: attributes #{{[0-9]*}} = { noinline nounwind uwtable }
 ; BOTH-DAG: attributes #{{[0-9]*}} = { noreturn }
-; BOTH-DAG: attributes #{{[0-9]*}} = { nofree noinline norecurse nosync nounwind readnone uwtable }
-; BOTH-DAG: attributes #{{[0-9]*}} = { nofree nosync readnone willreturn }
-; BOTH-DAG: attributes #{{[0-9]*}} = { nofree nosync readnone }
-; BOTH-DAG: attributes #{{[0-9]*}} = { nofree noreturn nosync readonly }
+; BOTH-DAG: attributes #{{[0-9]*}} = { noconvergent nofree noinline norecurse nosync nounwind readnone uwtable }
+; BOTH-DAG: attributes #{{[0-9]*}} = { noconvergent nofree nosync readnone willreturn }
+; BOTH-DAG: attributes #{{[0-9]*}} = { noconvergent nofree nosync readnone }
+; BOTH-DAG: attributes #{{[0-9]*}} = { noconvergent nofree noreturn nosync readonly }
 ; BOTH-NOT: attributes #

llvm/test/Transforms/FunctionAttrs/atomic.ll

 ; A function with an Acquire load is not readonly.
 define i32 @test2(i32* %x) uwtable ssp {
 ; CHECK: define i32 @test2(i32* nocapture readonly %x) #1 {
 entry:
   %r = load atomic i32, i32* %x seq_cst, align 4
   ret i32 %r
 }
 
-; CHECK: attributes #0 = { norecurse nounwind readnone ssp uwtable }
-; CHECK: attributes #1 = { nofree norecurse nounwind ssp uwtable }
+; CHECK: attributes #0 = { noconvergent norecurse nounwind readnone ssp uwtable }
+; CHECK: attributes #1 = { noconvergent nofree norecurse nounwind ssp uwtable }

llvm/test/Transforms/FunctionAttrs/convergent.ll

-; FIXME: convert CHECK-INDIRECT into CHECK (and remove -check-prefixes) as soon
-; FIXME: as new-pass-manager's handling of indirect_non_convergent_call is fixed
-;
-; RUN: opt -functionattrs -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-INDIRECT
-; RUN: opt -passes=function-attrs -S < %s | FileCheck %s
-
-; CHECK: Function Attrs
-; CHECK-NOT: convergent
-; CHECK-NEXT: define i32 @nonleaf()
-define i32 @nonleaf() convergent {
-  %a = call i32 @leaf()
-  ret i32 %a
-}
-
-; CHECK: Function Attrs
-; CHECK-NOT: convergent
-; CHECK-NEXT: define i32 @leaf()
-define i32 @leaf() convergent {
-  ret i32 0
-}
-
-; CHECK: Function Attrs
-; CHECK-SAME: convergent
-; CHECK-NEXT: declare i32 @k()
-declare i32 @k() convergent
-
-; CHECK: Function Attrs
-; CHECK-SAME: convergent
-; CHECK-NEXT: define i32 @extern()
-define i32 @extern() convergent {
-  %a = call i32 @k() convergent
-  ret i32 %a
-}
-
-; Convergent should not be removed on the function here.  Although the call is
-; not explicitly convergent, it picks up the convergent attr from the callee.
-;
-; CHECK: Function Attrs
-; CHECK-SAME: convergent
-; CHECK-NEXT: define i32 @extern_non_convergent_call()
-define i32 @extern_non_convergent_call() convergent {
-  %a = call i32 @k()
-  ret i32 %a
-}
-
-; CHECK: Function Attrs
-; CHECK-SAME: convergent
-; CHECK-NEXT: define i32 @indirect_convergent_call(
-define i32 @indirect_convergent_call(i32 ()* %f) convergent {
-   %a = call i32 %f() convergent
-   ret i32 %a
-}
-; Give indirect_non_convergent_call the norecurse attribute so we get a
-; "Function Attrs" comment in the output.
-;
-; CHECK: Function Attrs
-; CHECK-INDIRECT-NOT: convergent
-; CHECK-INDIRECT-NEXT: define i32 @indirect_non_convergent_call(
-define i32 @indirect_non_convergent_call(i32 ()* %f) convergent norecurse {
-   %a = call i32 %f()
-   ret i32 %a
-}
-
-; CHECK: Function Attrs
-; CHECK-SAME: convergent
-; CHECK-NEXT: declare void @llvm.nvvm.barrier0()
-declare void @llvm.nvvm.barrier0() convergent
-
-; CHECK: Function Attrs
-; CHECK-SAME: convergent
-; CHECK-NEXT: define i32 @intrinsic()
-define i32 @intrinsic() convergent {
-  ; Implicitly convergent, because the intrinsic is convergent.
-  call void @llvm.nvvm.barrier0()
-  ret i32 0
-}
-
-; CHECK: Function Attrs
-; CHECK-NOT: convergent
-; CHECK-NEXT: define i32 @recursive1()
-define i32 @recursive1() convergent {
-  %a = call i32 @recursive2() convergent
-  ret i32 %a
-}
-
-; CHECK: Function Attrs
-; CHECK-NOT: convergent
-; CHECK-NEXT: define i32 @recursive2()
-define i32 @recursive2() convergent {
-  %a = call i32 @recursive1() convergent
-  ret i32 %a
-}
-
-; CHECK: Function Attrs
-; CHECK-SAME: convergent
-; CHECK-NEXT: define i32 @noopt()
-define i32 @noopt() convergent optnone noinline {
-  %a = call i32 @noopt_friend() convergent
-  ret i32 0
-}
-
-; A function which is mutually-recursive with a convergent, optnone function
-; shouldn't have its convergent attribute stripped.
-; CHECK: Function Attrs
-; CHECK-SAME: convergent
-; CHECK-NEXT: define i32 @noopt_friend()
-define i32 @noopt_friend() convergent {
-  %a = call i32 @noopt()
-  ret i32 0
-}

llvm/test/Transforms/FunctionAttrs/fn_noreturn.ll

 ; RUN: opt -functionattrs -attributor -attributor-disable=false -attributor-max-iterations-verify -attributor-max-iterations=3 -S < %s | FileCheck %s
 ;
 ; Test cases specifically designed for the "no-return" function attribute.
 ; We use FIXME's to indicate problems and missing attributes.
 
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 
 
 ; TEST 1, singleton SCC void return type
 ;
 ; void srec0() {
 ;   return srec0();
 ; }
 ;
-; CHECK: Function Attrs: nofree noinline noreturn nosync nounwind readnone uwtable
+; CHECK: Function Attrs: noconvergent nofree noinline noreturn nosync nounwind readnone uwtable
 ; CHECK: define void @srec0()
 ;
 define void @srec0() #0 {
 entry:
   call void @srec0()
   ret void
 }
 
 
 ; TEST 2: singleton SCC int return type with a lot of recursive calls
 ;
 ; int srec16(int a) {
 ;   return srec16(srec16(srec16(srec16(srec16(srec16(srec16(srec16(srec16(srec16(srec16(srec16(srec16(srec16(srec16(srec16(a))))))))))))))));
 ; }
 ;
-; CHECK: Function Attrs: nofree noinline noreturn nosync nounwind readnone uwtable
+; CHECK: Function Attrs: noconvergent nofree noinline noreturn nosync nounwind readnone uwtable
 ; CHECK: define i32 @srec16(i32 %a)
 ;
 define i32 @srec16(i32 %a) #0 {
 entry:
   %call = call i32 @srec16(i32 %a)
   %call1 = call i32 @srec16(i32 %call)
   %call2 = call i32 @srec16(i32 %call1)
   %call3 = call i32 @srec16(i32 %call2)

 
 
 ; TEST 3: endless loop, no return instruction
 ;
 ; int endless_loop(int a) {
 ;   while (1);
 ; }
 ;
-; CHECK: Function Attrs: nofree noinline norecurse noreturn nosync nounwind readnone uwtable
+; CHECK: Function Attrs: noconvergent nofree noinline norecurse noreturn nosync nounwind readnone uwtable
 ; CHECK: define i32 @endless_loop(i32 %a)
 ;
 define i32 @endless_loop(i32 %a) #0 {
 entry:
   br label %while.body
 
 while.body:                                       ; preds = %entry, %while.body
   br label %while.body
 }
 
 
 ; TEST 4: endless loop, dead return instruction
 ;
 ; int endless_loop(int a) {
 ;   while (1);
 ;   return a;
 ; }
 ;
 ; FIXME: no-return missing (D65243 should fix this)
-; CHECK: Function Attrs: nofree noinline norecurse noreturn nosync nounwind readnone uwtable
+; CHECK: Function Attrs: noconvergent nofree noinline norecurse noreturn nosync nounwind readnone uwtable
 ; CHECK: define i32 @dead_return(i32 returned %a)
 ;
 define i32 @dead_return(i32 %a) #0 {
 entry:
   br label %while.body
 
 while.body:                                       ; preds = %entry, %while.body
   br label %while.body
 
 return:                                           ; No predecessors!
   ret i32 %a
 }
 
 
 ; TEST 5: all paths contain a no-return function call
 ;
 ; int multiple_noreturn_calls(int a) {
 ;   return a == 0 ? endless_loop(a) : srec16(a);
 ; }
 ;
-; CHECK: Function Attrs: nofree noinline noreturn nosync nounwind readnone uwtable
+; CHECK: Function Attrs: noconvergent nofree noinline noreturn nosync nounwind readnone uwtable
 ; CHECK: define i32 @multiple_noreturn_calls(i32 %a)
 ;
 define i32 @multiple_noreturn_calls(i32 %a) #0 {
 entry:
   %cmp = icmp eq i32 %a, 0
   br i1 %cmp, label %cond.true, label %cond.false
 
 cond.true:                                        ; preds = %entry
   %call = call i32 @endless_loop(i32 %a)
   br label %cond.end
 
 cond.false:                                       ; preds = %entry
   %call1 = call i32 @srec16(i32 %a)
   br label %cond.end
 
 cond.end:                                         ; preds = %cond.false, %cond.true
   %cond = phi i32 [ %call, %cond.true ], [ %call1, %cond.false ]
   ret i32 %cond
 }
 
 
 ; TEST 6: willreturn means *not* no-return
-; CHECK:      Function Attrs: nofree norecurse nosync nounwind readnone willreturn
+; CHECK:      Function Attrs: noconvergent nofree norecurse nosync nounwind readnone willreturn
 ; CHECK-NEXT: define i32 @endless_loop_but_willreturn
 define i32 @endless_loop_but_willreturn(i32 %a) willreturn {
 entry:
   br label %while.body
 
 while.body:                                       ; preds = %entry, %while.body
   br label %while.body
 }
 
 attributes #0 = { noinline nounwind uwtable }

llvm/test/Transforms/FunctionAttrs/incompatible_fn_attrs.ll

 ; CHECK: define i32* @given_inaccessible_or_argmem_infer_readnone(i32* readnone returned %p) #0 {
 entry:
   ret i32* %p
 }
 
 attributes #0 = { argmemonly }
 attributes #1 = { inaccessiblememonly }
 attributes #2 = { inaccessiblemem_or_argmemonly }
-; CHECK: attributes #0 = { norecurse nounwind readnone }
+; CHECK: attributes #0 = { noconvergent norecurse nounwind readnone }
 ; CHECK-NOT: attributes

llvm/test/Transforms/FunctionAttrs/liveness.ll

 ; RUN: opt -attributor --attributor-disable=false -attributor-max-iterations-verify -attributor-max-iterations=3 -S < %s | FileCheck %s
 
-declare void @no_return_call() nofree noreturn nounwind readnone
+declare void @no_return_call() nofree noreturn nounwind readnone noconvergent
 
-declare void @normal_call() readnone
+declare void @normal_call() readnone noconvergent
 
-declare i32 @foo()
+declare i32 @foo() noconvergent
 
-declare i32 @foo_noreturn_nounwind() noreturn nounwind
+declare i32 @foo_noreturn_nounwind() noreturn nounwind noconvergent
 
-declare i32 @foo_noreturn() noreturn
+declare i32 @foo_noreturn() noreturn noconvergent
 
-declare i32 @bar() nosync readnone
+declare i32 @bar() nosync readnone noconvergent
 
 ; This internal function has no live call sites, so all its BBs are considered dead,
 ; and nothing should be deduced for it.
 
 ; CHECK-NOT: define internal i32 @dead_internal_func(i32 %0)
 define internal i32 @dead_internal_func(i32 %0) {
   %2 = icmp slt i32 %0, 1
   br i1 %2, label %3, label %5
 
 ; <label>:3:                                      ; preds = %5, %1
   %4 = phi i32 [ 1, %1 ], [ %8, %5 ]
   ret i32 %4
 
 ; <label>:5:                                      ; preds = %1, %5
   %6 = phi i32 [ %9, %5 ], [ 1, %1 ]
   %7 = phi i32 [ %8, %5 ], [ 1, %1 ]
   %8 = mul nsw i32 %6, %7
   %9 = add nuw nsw i32 %6, 1
   %10 = icmp eq i32 %6, %0
   br i1 %10, label %3, label %5
 }
 
-; CHECK: Function Attrs: nofree norecurse nounwind uwtable willreturn
+; CHECK: Function Attrs: noconvergent nofree norecurse nounwind uwtable willreturn
 define i32 @volatile_load(i32*) norecurse nounwind uwtable {
   %2 = load volatile i32, i32* %0, align 4
   ret i32 %2
 }
 
-; CHECK: Function Attrs: nofree norecurse nosync nounwind readonly uwtable willreturn
+; CHECK: Function Attrs: noconvergent nofree norecurse nosync nounwind readonly uwtable willreturn
 ; CHECK-NEXT: define internal i32 @internal_load(i32* nocapture nonnull readonly dereferenceable(4) %0)
 define internal i32 @internal_load(i32*) norecurse nounwind uwtable {
   %2 = load i32, i32* %0, align 4
   ret i32 %2
 }
 ; TEST 1: Only first block is live.
 
-; CHECK: Function Attrs: nofree noreturn nosync nounwind
+; CHECK: Function Attrs: noconvergent nofree noreturn nosync nounwind
 ; CHECK-NEXT: define i32 @first_block_no_return(i32 %a, i32* nocapture nonnull readonly %ptr1, i32* nocapture readnone %ptr2)
 define i32 @first_block_no_return(i32 %a, i32* nonnull %ptr1, i32* %ptr2) #0 {
 entry:
   call i32 @internal_load(i32* %ptr1)
   ; CHECK: call i32 @internal_load(i32* nocapture nonnull readonly %ptr1)
   call void @no_return_call()
   ; CHECK: call void @no_return_call()
   ; CHECK-NEXT: unreachable
cond.end:                                         ; preds = %cond.false, %cond.true
   ret i32 %cond
 }
 
 ; TEST 2: cond.true is dead, but cond.end is not, since cond.false is live
 
 ; This is just an example. For example we can put a sync call in a
 ; dead block and check if it is deduced.
 
-; CHECK: Function Attrs: nosync
+; CHECK: Function Attrs: noconvergent nosync
 ; CHECK-NEXT: define i32 @dead_block_present(i32 %a, i32* nocapture readnone %ptr1)
 define i32 @dead_block_present(i32 %a, i32* %ptr1) #0 {
 entry:
   %cmp = icmp eq i32 %a, 0
   br i1 %cmp, label %cond.true, label %cond.false
 
 cond.true:                                        ; preds = %entry
   call void @no_return_call()

 ; CHECK: define internal void @non_dead_d8()
 ; CHECK: define internal void @non_dead_d9()
 ; CHECK: define internal void @non_dead_d10()
 ; CHECK: define internal void @non_dead_d11()
 ; CHECK: define internal void @non_dead_d12()
 ; CHECK: define internal void @non_dead_d13()
 ; CHECK: define internal void @non_dead_d14()
 ; Verify we actually deduce information for these functions.
-; CHECK: Function Attrs: nofree nosync nounwind readnone willreturn
+; CHECK: Function Attrs: noconvergent nofree nosync nounwind readnone willreturn
 ; CHECK-NEXT: define internal void @non_dead_d15()
 ; CHECK-NOT: define internal void @dead_e
 
 
 declare void @blowup() noreturn
 define void @live_with_dead_entry() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
 ; CHECK:      define void @live_with_dead_entry(
 ; CHECK-NEXT: entry:

llvm/test/Transforms/FunctionAttrs/noconvergent.ll

+; FIXME: convert CHECK-OLDPM into CHECK (and remove -check-prefixes) as soon
+; FIXME: as new-pass-manager's handling of indirect_non_convergent_call is fixed
+; RUN: opt -S -functionattrs %s | FileCheck -check-prefixes=CHECK,CHECK-OLDPM %s
+; RUN: opt -S  -passes=function-attrs %s | FileCheck -check-prefixes=CHECK,CHECK-NEWPM %s
+; RUN: opt -S -attributor -attributor-disable=false -attributor-max-iterations=1 %s | FileCheck -check-prefixes=CHECK,CHECK-OLDPM %s
+; RUN: opt -S -passes=attributor -attributor-disable=false -attributor-max-iterations=1 %s | FileCheck -check-prefixes=CHECK,CHECK-NEWPM %s
+
+; CHECK: Function Attrs
+; CHECK: noconvergent
+; CHECK-NEXT: define i32 @nonleaf()
+define i32 @nonleaf() {
+  %a = call i32 @leaf()
+  ret i32 %a
+}
+
+; CHECK: Function Attrs
+; CHECK-SAME: noconvergent
+; CHECK-NEXT: define i32 @leaf()
+define i32 @leaf() {
+  ret i32 0
+}
+
+; CHECK: Function Attrs: noconvergent{{$}}
+; CHECK-NEXT: declare i32 @extern_noconvergent()
+declare i32 @extern_noconvergent() noconvergent
+
+; CHECK-NOT: Function Attrs
+; CHECK: declare i32 @extern_convergent(){{$}}
+declare i32 @extern_convergent()
+
+; CHECK-NOT: Function Attrs {{.*}}noconvergent{{.*}}
+; CHECK: define i32 @call_extern_convergent()
+define i32 @call_extern_convergent() {
+  %a = call i32 @extern_convergent()
+  ret i32 %a
+}
+;
+; CHECK: Function Attrs
+; CHECK-SAME: convergent
+; CHECK-NEXT: define i32 @extern_noconvergent_call()
+define i32 @extern_noconvergent_call() {
+  %a = call i32 @extern_noconvergent()
+  ret i32 %a
+}
+
+; FIXME: This should work
+; CHECK-NEWPM-NOT: Function Attrs {{.*}}noconvergent{{.*}}
+
+; CHECK-OLDPM: Function Attrs
+; CHECK-OLDPM-SAME: noconvergent
+; CHECK-OLDPM-NEXT: define i32 @indirect_noconvergent_call(
+define i32 @indirect_noconvergent_call(i32 ()* %f) {
+   %a = call i32 %f() noconvergent
+   ret i32 %a
+}
+; Give indirect_non_convergent_call the norecurse attribute so we get a
+; "Function Attrs" comment in the output.
+;
+; CHECK-OLDPM-NOT: Function Attrs {{.*}}noconvergent{{.*}}
+; CHECK-OLDPM: define i32 @indirect_non_convergent_call(
+define i32 @indirect_non_convergent_call(i32 ()* %f) norecurse {
+   %a = call i32 %f()
+   ret i32 %a
+}
+
+; CHECK-NOT: Function Attrs {{.*}}noconvergent{{.*}}
+; CHECK: declare void @llvm.nvvm.barrier0()
+declare void @llvm.nvvm.barrier0()
+
+; CHECK: Function Attrs
+; CHECK-NOT: noconvergent
+; CHECK-NEXT: define i32 @intrinsic()
+define i32 @intrinsic() {
+  ; Implicitly convergent, because the intrinsic is convergent.
+  call void @llvm.nvvm.barrier0()
+  ret i32 0
+}
+
+; CHECK: Function Attrs
+; CHECK-SAME: noconvergent
+; CHECK-NEXT: define i32 @convergent_intrinsic_noconvergent_callsite()
+define i32 @convergent_intrinsic_noconvergent_callsite() {
+  call void @llvm.nvvm.barrier0() noconvergent
+  ret i32 0
+}
+
+; CHECK: Function Attrs
+; CHECK: noconvergent
+; CHECK-NEXT: define i32 @recursive1()
+define i32 @recursive1() {
+  %a = call i32 @recursive2()
+  ret i32 %a
+}
+
+; CHECK: Function Attrs
+; CHECK: noconvergent
+; CHECK-NEXT: define i32 @recursive2()
+define i32 @recursive2() {
+  %a = call i32 @recursive1()
+  ret i32 %a
+}
+
+; CHECK: Function Attrs
+; CHECK-NOT: noconvergent
+; CHECK-NEXT: define i32 @noopt()
+define i32 @noopt() optnone noinline {
+  %a = call i32 @noopt_friend()
+  ret i32 0
+}
+
+; A function which is mutually-recursive with a convergent, optnone function
+; shouldn't have noconvergent attribute added.
+; CHECK-NOT: Function Attrs
+; CHECK: define i32 @noopt_friend()
+define i32 @noopt_friend() {
+  %a = call i32 @noopt()
+  ret i32 0
+}

llvm/test/Transforms/FunctionAttrs/nofree-attributor.ll

 ; RUN: opt -functionattrs --disable-nofree-inference=false -S < %s | FileCheck %s --check-prefix=FNATTR
 ; RUN: opt -attributor --attributor-disable=false -attributor-max-iterations-verify -attributor-max-iterations=4 -S < %s | FileCheck %s --check-prefix=ATTRIBUTOR
 
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 
 ; Test cases specifically designed for the "nofree" function attribute.
 ; We use FIXME's to indicate problems and missing attributes.
 
 ; Free functions
 declare void @free(i8* nocapture) local_unnamed_addr #1
 declare noalias i8* @realloc(i8* nocapture, i64) local_unnamed_addr #0
 declare void @_ZdaPv(i8*) local_unnamed_addr #2
 
 
 ; TEST 1 (positive case)
-; FNATTR: Function Attrs: noinline norecurse nounwind readnone uwtable
+; FNATTR: Function Attrs: noconvergent noinline norecurse nounwind readnone uwtable
 ; FNATTR-NEXT: define void @only_return()
-; ATTRIBUTOR: Function Attrs: nofree noinline nosync nounwind readnone uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noinline nosync nounwind readnone uwtable
 ; ATTRIBUTOR-NEXT: define void @only_return()
 define void @only_return() #0 {
     ret void
 }
 
 
 ; TEST 2 (negative case)
 ; Only free

 ; void mutual_recursion1(){
 ;    mutual_recursion2();
 ; }
 ; void mutual_recursion2(){
 ;     mutual_recursion1();
 ; }
 
 
-; FNATTR: Function Attrs: noinline nounwind readnone uwtable
+; FNATTR: Function Attrs: noconvergent noinline nounwind readnone uwtable
 ; FNATTR-NEXT: define void @mutual_recursion1()
-; ATTRIBUTOR: Function Attrs: nofree noinline noreturn nosync nounwind readnone uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noinline noreturn nosync nounwind readnone uwtable
 ; ATTRIBUTOR-NEXT: define void @mutual_recursion1()
 define void @mutual_recursion1() #0 {
   call void @mutual_recursion2()
   ret void
 }
 
-; FNATTR: Function Attrs: noinline nounwind readnone uwtable
+; FNATTR: Function Attrs: noconvergent noinline nounwind readnone uwtable
 ; FNATTR-NEXT: define void @mutual_recursion2()
-; ATTRIBUTOR: Function Attrs: nofree noinline noreturn nosync nounwind readnone uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noinline noreturn nosync nounwind readnone uwtable
 ; ATTRIBUTOR-NEXT: define void @mutual_recursion2()
 define void @mutual_recursion2() #0 {
   call void @mutual_recursion1()
   ret void
 }
 
 
 ; TEST 5
define noalias i8* @call_realloc(i8* nocapture %0, i64 %1) local_unnamed_addr #0 {
     ret i8* %ret
 }
 
 
 ; TEST 7 (positive case)
 ; Call function declaration with "nofree"
 
 
-; FNATTR: Function Attrs: nofree noinline nounwind readnone uwtable
+; FNATTR: Function Attrs: noconvergent nofree noinline nounwind readnone uwtable
 ; FNATTR-NEXT: declare void @nofree_function()
-; ATTRIBUTOR: Function Attrs:  nofree noinline nounwind readnone uwtable 
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noinline nounwind readnone uwtable
 ; ATTRIBUTOR-NEXT: declare void @nofree_function()
-declare void @nofree_function() nofree readnone #0
+declare void @nofree_function() nofree noconvergent readnone #0
 
-; FNATTR: Function Attrs: noinline nounwind readnone uwtable
+; FNATTR: Function Attrs: noconvergent noinline nounwind readnone uwtable
 ; FNATTR-NEXT: define void @call_nofree_function()
-; ATTRIBUTOR: Function Attrs: nofree noinline nosync nounwind readnone uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noinline nosync nounwind readnone uwtable
 ; ATTRIBUTOR-NEXT: define void @call_nofree_function()
 define void @call_nofree_function() #0 {
     tail call void @nofree_function()
     ret void
 }
 
 ; TEST 8 (negative case)
 ; Call function declaration without "nofree"
define void @call_both() #0 {
     ret void
 }
 
 
 ; TEST 10 (positive case)
 ; Call intrinsic function
 ; FNATTRS: Function Attrs: noinline readnone speculatable
 ; FNATTRS-NEXT: declare float @llvm.floor.f32(float %0)
-; ATTRIBUTOR: Function Attrs: nounwind readnone speculatable
+; ATTRIBUTOR: Function Attrs: noconvergent nounwind readnone speculatable
 ; ATTRIBUTOR-NEXT: declare float @llvm.floor.f32(float)
 declare float @llvm.floor.f32(float)
 
 ; FNATTRS: Function Attrs: noinline nounwind uwtable
 ; FNATTRS-NEXT: define void @call_floor(float %a)
 ; FIXME: missing nofree
-; ATTRIBUTOR: Function Attrs: noinline nosync nounwind readnone uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent noinline nosync nounwind readnone uwtable
 ; ATTRIBUTOR-NEXT: define void @call_floor(float %a)
 
 define void @call_floor(float %a) #0 {
     tail call float @llvm.floor.f32(float %a)
     ret void
 }
 
 ; TEST 11 (positive case)
 ; Check propagation.
 
 ; FNATTRS: Function Attrs: noinline nounwind uwtable
 ; FNATTRS-NEXT: define void @f1()
-; ATTRIBUTOR: Function Attrs: nofree noinline nosync nounwind readnone uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noinline nosync nounwind readnone uwtable
 ; ATTRIBUTOR-NEXT: define void @f1()
 define void @f1() #0 {
     tail call void @nofree_function()
     ret void
 }
 
 ; FNATTRS: Function Attrs: noinline nounwind uwtable
 ; FNATTRS-NEXT: define void @f2()
-; ATTRIBUTOR: Function Attrs: nofree noinline nosync nounwind readnone uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noinline nosync nounwind readnone uwtable
 ; ATTRIBUTOR-NEXT: define void @f2()
 define void @f2() #0 {
     tail call void @f1()
     ret void
 }
 
 
 attributes #0 = { nounwind uwtable noinline }
 attributes #1 = { nounwind }
 attributes #2 = { nobuiltin nounwind }

llvm/test/Transforms/FunctionAttrs/nofree.ll

 attributes #2 = { nounwind }
 attributes #3 = { norecurse nounwind readonly uwtable }
 attributes #4 = { nobuiltin nounwind }
 attributes #5 = { builtin nounwind }
 
 ; CHECK: attributes #0 = { uwtable }
 ; CHECK: attributes #1 = { nounwind uwtable }
 ; CHECK: attributes #2 = { nounwind }
-; CHECK: attributes #3 = { norecurse nounwind readonly uwtable }
+; CHECK: attributes #3 = { noconvergent norecurse nounwind readonly uwtable }
 ; CHECK: attributes #4 = { nobuiltin nounwind }
 ; CHECK: attributes #5 = { builtin nounwind }
 

llvm/test/Transforms/FunctionAttrs/norecurse.ll

 ; RUN: opt < %s -basicaa -functionattrs -rpo-functionattrs -S | FileCheck %s --check-prefixes=CHECK,BOTH
 ; RUN: opt < %s -aa-pipeline=basic-aa -passes='cgscc(function-attrs),rpo-functionattrs' -S | FileCheck %s --check-prefixes=CHECK,BOTH
 ; RUN: opt -passes=attributor --attributor-disable=false -attributor-max-iterations-verify -attributor-max-iterations=4 -S < %s | FileCheck %s --check-prefixes=ATTRIBUTOR,BOTH
 
 ; CHECK: Function Attrs
 ; CHECK-SAME: norecurse nounwind readnone
-; ATTRIBUTOR: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
+; ATTRIBUTOR: Function Attrs: noconvergent nofree norecurse nosync nounwind readnone willreturn
 ; BOTH-NEXT: define i32 @leaf()
 define i32 @leaf() {
   ret i32 1
 }
 
 ; BOTH: Function Attrs
 ; BOTH-SAME: readnone
 ; BOTH-NOT: norecurse

 ; BOTH-NEXT: define i32 @extern()
 define i32 @extern() {
   %a = call i32 @k()
   ret i32 %a
 }
 
 ; BOTH: Function Attrs
 ; BOTH-NEXT: declare i32 @k()
-declare i32 @k() readnone
+declare i32 @k() noconvergent readnone
 
 ; BOTH: Function Attrs
 ; CHECK-SAME: nounwind
 ; BOTH-NOT: norecurse
 ; CHECK-NEXT: define void @intrinsic(i8* nocapture %dest, i8* nocapture readonly %src, i32 %len)
 ; ATTRIBUTOR-NEXT: define void @intrinsic(i8* nocapture writeonly %dest, i8* nocapture readonly %src, i32 %len)
 define void @intrinsic(i8* %dest, i8* %src, i32 %len) {
   call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 %len, i1 false)
define internal void @o() {
   %a = call i32 @called_by_norecurse_indirectly()
   ret void
 }
 define void @p() norecurse {
   call void @o()
   ret void
 }
 
-; ATTRIBUTOR: Function Attrs: nofree nosync nounwind
+; ATTRIBUTOR: Function Attrs: noconvergent nofree nosync nounwind
 ; ATTRIBUTOR-NEXT: define void @f(i32 %x)
 define void @f(i32 %x)  {
 entry:
   %x.addr = alloca i32, align 4
   store i32 %x, i32* %x.addr, align 4
   %0 = load i32, i32* %x.addr, align 4
   %tobool = icmp ne i32 %0, 0
   br i1 %tobool, label %if.then, label %if.end

 ; ATTRIBUTOR: define i32 @eval_func2(i32 (i32)* nocapture %0, i32 %1)
 define i32 @eval_func2(i32 (i32)* , i32) local_unnamed_addr "null-pointer-is-valid"="true"{
   %3 = tail call i32 %0(i32 %1) #2
   ret i32 %3
 }
 
 declare void @unknown()
 ; Call an unknown function in a dead block.
-; ATTRIBUTOR: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
+; ATTRIBUTOR: Function Attrs: noconvergent nofree norecurse nosync nounwind readnone willreturn
 ; ATTRIBUTOR: define i32 @call_unknown_in_dead_block()
 define i32 @call_unknown_in_dead_block() local_unnamed_addr {
   ret i32 0
 Dead:
   tail call void @unknown()
   ret i32 1
 }
 

llvm/test/Transforms/FunctionAttrs/noreturn_async.ll

 @"??_C@_0BG@CMNEKHOP@Exception?5NOT?5caught?6?$AA@" = linkonce_odr dso_local unnamed_addr constant [22 x i8] c"Exception NOT caught\0A\00", align 1
 @"??_C@_0BC@NKPAGFFJ@Exception?5caught?6?$AA@" = linkonce_odr dso_local unnamed_addr constant [18 x i8] c"Exception caught\0A\00", align 1
 @"??_C@_0BK@JHJLGDKL@Done?5execution?5result?$DN?$CFi?6?$AA@" = linkonce_odr dso_local unnamed_addr constant [26 x i8] c"Done execution result=%i\0A\00", align 1
 @"?_OptionsStorage@?1??__local_stdio_printf_options@@9@4_KA" = linkonce_odr dso_local global i64 0, align 8
 
 
 define dso_local void @"?overflow@@YAXXZ"() {
 entry:
-; CHECK:      Function Attrs: nofree noreturn nosync nounwind
+; CHECK:      Function Attrs: noconvergent nofree noreturn nosync nounwind
 ; CHECK-NEXT: define
 ; CHECK-NEXT:   entry:
 ; CHECK-NEXT:   call void @"?overflow@@YAXXZ"()
 ; CHECK-NEXT:   unreachable
   call void @"?overflow@@YAXXZ"()
   %call3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @"??_C@_0BC@NKPAGFFJ@Exception?5caught?6?$AA@", i64 0, i64 0))
   ret void
 }

 ; CHECK-NOT:    nounwind
 ; CHECK-NOT:    noreturn
 ; CHECK:        define
 ; CHECK-SAME:   @"?catchoverflow@@YAHXZ_may_throw"()
 define dso_local i32 @"?catchoverflow@@YAHXZ_may_throw"()  personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) {
 entry:
   %retval = alloca i32, align 4
   %__exception_code = alloca i32, align 4
-; CHECK: invoke void @"?overflow@@YAXXZ_may_throw"() 
+; CHECK: invoke void @"?overflow@@YAXXZ_may_throw"()
 ; CHECK:          to label %invoke.cont unwind label %catch.dispatch
-  invoke void @"?overflow@@YAXXZ_may_throw"() 
+  invoke void @"?overflow@@YAXXZ_may_throw"()
           to label %invoke.cont unwind label %catch.dispatch
 
 invoke.cont:                                      ; preds = %entry
 ; CHECK:      invoke.cont:
 ; CHECK-NEXT: unreachable
   br label %invoke.cont1
 
 catch.dispatch:                                   ; preds = %invoke.cont, %entry

llvm/test/Transforms/FunctionAttrs/noreturn_sync.ll

 @"??_C@_0BG@CMNEKHOP@Exception?5NOT?5caught?6?$AA@" = linkonce_odr dso_local unnamed_addr constant [22 x i8] c"Exception NOT caught\0A\00", align 1
 @"??_C@_0BC@NKPAGFFJ@Exception?5caught?6?$AA@" = linkonce_odr dso_local unnamed_addr constant [18 x i8] c"Exception caught\0A\00", align 1
 @"??_C@_0BK@JHJLGDKL@Done?5execution?5result?$DN?$CFi?6?$AA@" = linkonce_odr dso_local unnamed_addr constant [26 x i8] c"Done execution result=%i\0A\00", align 1
 @"?_OptionsStorage@?1??__local_stdio_printf_options@@9@4_KA" = linkonce_odr dso_local global i64 0, align 8
 
 
 define dso_local void @"?overflow@@YAXXZ"() {
 entry:
-; CHECK:      Function Attrs: nofree noreturn nosync nounwind
+; CHECK:      Function Attrs: noconvergent nofree noreturn nosync nounwind
 ; CHECK-NEXT: define
 ; CHECK-NEXT:   entry:
 ; CHECK-NEXT:   call void @"?overflow@@YAXXZ"()
 ; CHECK-NEXT:   unreachable
   call void @"?overflow@@YAXXZ"()
   %call3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @"??_C@_0BC@NKPAGFFJ@Exception?5caught?6?$AA@", i64 0, i64 0))
   ret void
 }
 
 
-; CHECK:       Function Attrs: nofree noreturn nosync nounwind
+; CHECK:       Function Attrs: noconvergent nofree noreturn nosync nounwind
 ; CHECK-NEXT:   @"?catchoverflow@@YAHXZ"()
 define dso_local i32 @"?catchoverflow@@YAHXZ"()  personality i8* bitcast (i32 (...)* @__gcc_personality_v0 to i8*) {
 entry:
   %retval = alloca i32, align 4
   %__exception_code = alloca i32, align 4
-  invoke void @"?overflow@@YAXXZ"() 
+  invoke void @"?overflow@@YAXXZ"()
           to label %invoke.cont unwind label %catch.dispatch
 ; CHECK:      call void @"?overflow@@YAXXZ"()
 ; CHECK-NEXT: unreachable
 
 invoke.cont:                                      ; preds = %entry
   br label %invoke.cont1
 
 catch.dispatch:                                   ; preds = %invoke.cont, %entry

 ; CHECK-NOT:    nounwind
 ; CHECK-NOT:    noreturn
 ; CHECK:        define
 ; CHECK-SAME:   @"?catchoverflow@@YAHXZ_may_throw"()
 define dso_local i32 @"?catchoverflow@@YAHXZ_may_throw"()  personality i8* bitcast (i32 (...)* @__gcc_personality_v0 to i8*) {
 entry:
   %retval = alloca i32, align 4
   %__exception_code = alloca i32, align 4
-; CHECK: invoke void @"?overflow@@YAXXZ_may_throw"() 
+; CHECK: invoke void @"?overflow@@YAXXZ_may_throw"()
 ; CHECK:          to label %invoke.cont unwind label %catch.dispatch
-  invoke void @"?overflow@@YAXXZ_may_throw"() 
+  invoke void @"?overflow@@YAXXZ_may_throw"()
           to label %invoke.cont unwind label %catch.dispatch
 
 invoke.cont:                                      ; preds = %entry
 ; CHECK:      invoke.cont:
 ; CHECK-NEXT: unreachable
   br label %invoke.cont1
 
 catch.dispatch:                                   ; preds = %invoke.cont, %entry

llvm/test/Transforms/FunctionAttrs/nosync.ll

 ;   return &s[1].Z.B[5][13];
 ; }
 
 ; TEST 1
 ; non-convergent and readnone implies nosync
 %struct.RT = type { i8, [10 x [20 x i32]], i8 }
 %struct.ST = type { i32, double, %struct.RT }
 
-; FNATTR: Function Attrs: norecurse nounwind optsize readnone ssp uwtable
+; FNATTR: Function Attrs: noconvergent norecurse nounwind optsize readnone ssp uwtable
 ; FNATTR-NEXT: define nonnull i32* @foo(%struct.ST* readnone %s)
-; ATTRIBUTOR: Function Attrs: nofree nosync nounwind optsize readnone ssp uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree nosync nounwind optsize readnone ssp uwtable
 ; ATTRIBUTOR-NEXT: define nonnull i32* @foo(%struct.ST* readnone "no-capture-maybe-returned" %s)
 define i32* @foo(%struct.ST* %s) nounwind uwtable readnone optsize ssp {
 entry:
   %arrayidx = getelementptr inbounds %struct.ST, %struct.ST* %s, i64 1, i32 2, i32 1, i64 5, i64 13
   ret i32* %arrayidx
 }
 
 ; TEST 2
 ; atomic load with monotonic ordering
 ; int load_monotonic(_Atomic int *num) {
 ;   int n = atomic_load_explicit(num, memory_order_relaxed);
 ;   return n;
 ; }
 
-; FNATTR: Function Attrs: nofree norecurse nounwind uwtable
+; FNATTR: Function Attrs: noconvergent nofree norecurse nounwind uwtable
 ; FNATTR-NEXT: define i32 @load_monotonic(i32* nocapture readonly %0)
-; ATTRIBUTOR: Function Attrs: nofree norecurse nosync nounwind uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree norecurse nosync nounwind uwtable
 ; ATTRIBUTOR-NEXT: define i32 @load_monotonic(i32* nocapture nonnull readonly dereferenceable(4) %0)
 define i32 @load_monotonic(i32* nocapture readonly %0) norecurse nounwind uwtable {
   %2 = load atomic i32, i32* %0 monotonic, align 4
   ret i32 %2
 }
 
 
 ; TEST 3
 ; atomic store with monotonic ordering.
 ; void store_monotonic(_Atomic int *num) {
 ;   atomic_load_explicit(num, memory_order_relaxed);
 ; }
 
-; FNATTR: Function Attrs: nofree norecurse nounwind uwtable
+; FNATTR: Function Attrs: noconvergent nofree norecurse nounwind uwtable
 ; FNATTR-NEXT: define void @store_monotonic(i32* nocapture %0)
-; ATTRIBUTOR: Function Attrs: nofree norecurse nosync nounwind uwtable
-; ATTRIBUTOR-NEXT: define void @store_monotonic(i32* nocapture nonnull writeonly dereferenceable(4) %0) 
+; ATTRIBUTOR: Function Attrs: noconvergent nofree norecurse nosync nounwind uwtable
+; ATTRIBUTOR-NEXT: define void @store_monotonic(i32* nocapture nonnull writeonly dereferenceable(4) %0)
 define void @store_monotonic(i32* nocapture %0) norecurse nounwind uwtable {
   store atomic i32 10, i32* %0 monotonic, align 4
   ret void
 }
 
 ; TEST 4 - negative, should not deduce nosync
 ; atomic load with acquire ordering.
 ; int load_acquire(_Atomic int *num) {
 ;   int n = atomic_load_explicit(num, memory_order_acquire);
 ;   return n;
 ; }
 
-; FNATTR: Function Attrs: nofree norecurse nounwind uwtable
+; FNATTR: Function Attrs: noconvergent nofree norecurse nounwind uwtable
 ; FNATTR-NEXT: define i32 @load_acquire(i32* nocapture readonly %0)
-; ATTRIBUTOR: Function Attrs: nofree norecurse nounwind uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree norecurse nounwind uwtable
 ; ATTRIBUTOR-NOT: nosync
 ; ATTRIBUTOR-NEXT: define i32 @load_acquire(i32* nocapture nonnull readonly dereferenceable(4) %0)
 define i32 @load_acquire(i32* nocapture readonly %0) norecurse nounwind uwtable {
   %2 = load atomic i32, i32* %0 acquire, align 4
   ret i32 %2
 }
 
 ; TEST 5 - negative, should not deduce nosync
 ; atomic load with release ordering
 ; void load_release(_Atomic int *num) {
 ;   atomic_store_explicit(num, 10, memory_order_release);
 ; }
 
-; FNATTR: Function Attrs: nofree norecurse nounwind uwtable
+; FNATTR: Function Attrs: noconvergent nofree norecurse nounwind uwtable
 ; FNATTR-NEXT: define void @load_release(i32* nocapture %0)
-; ATTRIBUTOR: Function Attrs: nofree norecurse nounwind uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree norecurse nounwind uwtable
 ; ATTRIBUTOR-NOT: nosync
 ; ATTRIBUTOR-NEXT: define void @load_release(i32* nocapture writeonly %0)
 define void @load_release(i32* nocapture %0) norecurse nounwind uwtable {
   store atomic volatile i32 10, i32* %0 release, align 4
   ret void
 }
 
 ; TEST 6 - negative volatile, relaxed atomic
 
-; FNATTR: Function Attrs: nofree norecurse nounwind uwtable
+; FNATTR: Function Attrs: noconvergent nofree norecurse nounwind uwtable
 ; FNATTR-NEXT: define void @load_volatile_release(i32* nocapture %0)
-; ATTRIBUTOR: Function Attrs: nofree norecurse nounwind uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree norecurse nounwind uwtable
 ; ATTRIBUTOR-NOT: nosync
 ; ATTRIBUTOR-NEXT: define void @load_volatile_release(i32* nocapture writeonly %0)
 define void @load_volatile_release(i32* nocapture %0) norecurse nounwind uwtable {
   store atomic volatile i32 10, i32* %0 release, align 4
   ret void
 }
 
 ; TEST 7 - negative, should not deduce nosync
 ; volatile store.
 ; void volatile_store(volatile int *num) {
 ;   *num = 14;
 ; }
 
-; FNATTR: Function Attrs: nofree norecurse nounwind uwtable
+; FNATTR: Function Attrs: noconvergent nofree norecurse nounwind uwtable
 ; FNATTR-NEXT: define void @volatile_store(i32* %0)
-; ATTRIBUTOR: Function Attrs: nofree norecurse nounwind uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree norecurse nounwind uwtable
 ; ATTRIBUTOR-NOT: nosync
 ; ATTRIBUTOR-NEXT: define void @volatile_store(i32* %0)
 define void @volatile_store(i32* %0) norecurse nounwind uwtable {
   store volatile i32 14, i32* %0, align 4
   ret void
 }
 
 ; TEST 8 - negative, should not deduce nosync
 ; volatile load.
 ; int volatile_load(volatile int *num) {
 ;   int n = *num;
 ;   return n;
 ; }
 
-; FNATTR: Function Attrs: nofree norecurse nounwind uwtable
+; FNATTR: Function Attrs: noconvergent nofree norecurse nounwind uwtable
 ; FNATTR-NEXT: define i32 @volatile_load(i32* %0)
-; ATTRIBUTOR: Function Attrs: nofree norecurse nounwind uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree norecurse nounwind uwtable
 ; ATTRIBUTOR-NOT: nosync
 ; ATTRIBUTOR-NEXT: define i32 @volatile_load(i32* %0)
 define i32 @volatile_load(i32* %0) norecurse nounwind uwtable {
   %2 = load volatile i32, i32* %0, align 4
   ret i32 %2
 }
 
 ; TEST 9

 define void @call_might_sync() nounwind uwtable noinline {
   tail call void @might_sync() noinline nounwind uwtable
   ret void
 }
 
 ; TEST 11 - positive, should deduce nosync
 ; volatile operation in same scc but dead. Call volatile_load defined in TEST 8.
 
-; FNATTR: Function Attrs: nofree noinline nounwind uwtable
+; FNATTR: Function Attrs: noconvergent nofree noinline nounwind uwtable
 ; FNATTR-NEXT: define i32 @scc1(i32* %0)
-; ATTRIBUTOR: Function Attrs: nofree noinline noreturn nosync nounwind readnone uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noinline noreturn nosync nounwind readnone uwtable
 ; ATTRIBUTOR-NEXT: define i32 @scc1(i32* nocapture readnone %0)
 define i32 @scc1(i32* %0) noinline nounwind uwtable {
   tail call void @scc2(i32* %0);
   %val = tail call i32 @volatile_load(i32* %0);
   ret i32 %val;
 }
 
-; FNATTR: Function Attrs: nofree noinline nounwind uwtable
+; FNATTR: Function Attrs: noconvergent nofree noinline nounwind uwtable
 ; FNATTR-NEXT: define void @scc2(i32* %0)
-; ATTRIBUTOR: Function Attrs: nofree noinline noreturn nosync nounwind readnone uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noinline noreturn nosync nounwind readnone uwtable
 ; ATTRIBUTOR-NEXT: define void @scc2(i32* nocapture readnone %0)
 define void @scc2(i32* %0) noinline nounwind uwtable {
   tail call i32 @scc1(i32* %0);
   ret void;
 }
 
 ; TEST 12 - fences, negative
 ;

 ;
 ;   atomic_thread_fence(std::memory_order_acquire);
 ;   int b = *a;
 ; }
 
 %"struct.std::atomic" = type { %"struct.std::__atomic_base" }
 %"struct.std::__atomic_base" = type { i8 }
 
-; FNATTR: Function Attrs: nofree norecurse nounwind
+; FNATTR: Function Attrs: noconvergent nofree norecurse nounwind
 ; FNATTR-NEXT: define void @foo1(i32* nocapture %0, %"struct.std::atomic"* nocapture %1)
 ; ATTRIBUTOR-NOT: nosync
 ; ATTRIBUTOR: define void @foo1(i32* nocapture nonnull writeonly dereferenceable(4) %0, %"struct.std::atomic"* nocapture writeonly %1)
 
 define void @foo1(i32* %0, %"struct.std::atomic"* %1) {
   store i32 100, i32* %0, align 4
   fence release
   %3 = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* %1, i64 0, i32 0, i32 0
   store atomic i8 1, i8* %3 monotonic, align 1
   ret void
 }
 
-; FNATTR: Function Attrs: nofree norecurse nounwind
+; FNATTR: Function Attrs: noconvergent nofree norecurse nounwind
 ; FNATTR-NEXT: define void @bar(i32* nocapture readnone %0, %"struct.std::atomic"* nocapture readonly %1)
 ; ATTRIBUTOR-NOT: nosync
 ; ATTRIBUTOR: define void @bar(i32* nocapture readnone %0, %"struct.std::atomic"* nocapture readonly %1)
 define void @bar(i32* %0, %"struct.std::atomic"* %1) {
   %3 = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* %1, i64 0, i32 0, i32 0
   br label %4
 
 4:                                                ; preds = %4, %2
   %5 = load atomic i8, i8* %3  monotonic, align 1
   %6 = and i8 %5, 1
   %7 = icmp eq i8 %6, 0
   br i1 %7, label %4, label %8
 
 8:                                                ; preds = %4
   fence acquire
   ret void
 }
 
 ; TEST 13 - Fence syncscope("singlethread") seq_cst
-; FNATTR: Function Attrs: nofree norecurse nounwind
+; FNATTR: Function Attrs: noconvergent nofree norecurse nounwind
 ; FNATTR-NEXT: define void @foo1_singlethread(i32* nocapture %0, %"struct.std::atomic"* nocapture %1)
-; ATTRIBUTOR: Function Attrs: nofree nosync nounwind willreturn
+; ATTRIBUTOR: Function Attrs: noconvergent nofree nosync nounwind willreturn
 ; ATTRIBUTOR: define void @foo1_singlethread(i32* nocapture nonnull writeonly dereferenceable(4) %0, %"struct.std::atomic"* nocapture writeonly %1)
 
 define void @foo1_singlethread(i32* %0, %"struct.std::atomic"* %1) {
   store i32 100, i32* %0, align 4
   fence syncscope("singlethread") release
   %3 = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* %1, i64 0, i32 0, i32 0
   store atomic i8 1, i8* %3 monotonic, align 1
   ret void
 }
 
-; FNATTR: Function Attrs: nofree norecurse nounwind
+; FNATTR: Function Attrs: noconvergent nofree norecurse nounwind
 ; FNATTR-NEXT: define void @bar_singlethread(i32* nocapture readnone %0, %"struct.std::atomic"* nocapture readonly %1)
-; ATTRIBUTOR: Function Attrs: nofree nosync nounwind
+; ATTRIBUTOR: Function Attrs: noconvergent nofree nosync nounwind
 ; ATTRIBUTOR: define void @bar_singlethread(i32* nocapture readnone %0, %"struct.std::atomic"* nocapture readonly %1)
 define void @bar_singlethread(i32* %0, %"struct.std::atomic"* %1) {
   %3 = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* %1, i64 0, i32 0, i32 0
   br label %4
 
 4:                                                ; preds = %4, %2
   %5 = load atomic i8, i8* %3  monotonic, align 1
   %6 = and i8 %5, 1
   %7 = icmp eq i8 %6, 0
   br i1 %7, label %4, label %8
 
 8:                                                ; preds = %4
   fence syncscope("singlethread") acquire
   ret void
 }
 
 declare void @llvm.memcpy(i8* %dest, i8* %src, i32 %len, i1 %isvolatile)
 declare void @llvm.memset(i8* %dest, i8 %val, i32 %len, i1 %isvolatile)
 
 ; TEST 14 - negative, checking volatile intrinsics.
 
 ; It is odd to add nocapture but a result of the llvm.memcpy nocapture.
 ;
-; ATTRIBUTOR: Function Attrs: nounwind
+; ATTRIBUTOR: Function Attrs: noconvergent nounwind
 ; ATTRIBUTOR-NOT: nosync
 ; ATTRIBUTOR-NEXT: define i32 @memcpy_volatile(i8* nocapture writeonly %ptr1, i8* nocapture readonly %ptr2)
 define i32 @memcpy_volatile(i8* %ptr1, i8* %ptr2) {
   call void @llvm.memcpy(i8* %ptr1, i8* %ptr2, i32 8, i1 1)
   ret i32 4
 }
 
 ; TEST 15 - positive, non-volatile intrinsic.
 
 ; It is odd to add nocapture but a result of the llvm.memset nocapture.
 ;
-; ATTRIBUTOR: Function Attrs: nosync
+; ATTRIBUTOR: Function Attrs: noconvergent nosync
 ; ATTRIBUTOR-NEXT: define i32 @memset_non_volatile(i8* nocapture writeonly %ptr1, i8 %val)
 define i32 @memset_non_volatile(i8* %ptr1, i8 %val) {
   call void @llvm.memset(i8* %ptr1, i8 %val, i32 8, i1 0)
   ret i32 4
 }
 
 ; TEST 16 - negative, inline assembly.
 
 ; ATTRIBUTOR: define i32 @inline_asm_test(i32 %x)
 define i32 @inline_asm_test(i32 %x) {
   call i32 asm "bswap $0", "=r,r"(i32 %x)
   ret i32 4
 }
 
-declare void @readnone_test() convergent readnone
+; convergent
+declare void @readnone_test() readnone
 
 ; ATTRIBUTOR: define void @convergent_readnone()
 ; TEST 17 - negative. Convergent
-define void @convergent_readnone(){
+define void @convergent_readnone() {
     call void @readnone_test()
     ret void
 }
 
-; ATTRIBUTOR: Function Attrs: nounwind
+; ATTRIBUTOR: Function Attrs: noconvergent nounwind
 ; ATTRIBUTOR-NEXT: declare void @llvm.x86.sse2.clflush(i8*)
 declare void @llvm.x86.sse2.clflush(i8*)
 @a = common global i32 0, align 4
 
 ; TEST 18 - negative. Synchronizing intrinsic
 
-; ATTRIBUTOR: Function Attrs: nounwind
+; ATTRIBUTOR: Function Attrs: noconvergent nounwind
 ; ATTRIBUTOR-NOT: nosync
 ; ATTRIBUTOR-NEXT: define void @i_totally_sync()
 define void @i_totally_sync() {
   tail call void @llvm.x86.sse2.clflush(i8* bitcast (i32* @a to i8*))
   ret void
 }
 
-declare float @llvm.cos(float %val) readnone
+declare float @llvm.cos(float %val) noconvergent readnone
 
 ; TEST 19 - positive, readnone & non-convergent intrinsic.
 
-; ATTRIBUTOR: Function Attrs: nosync nounwind
+; ATTRIBUTOR: Function Attrs: noconvergent nosync nounwind
 ; ATTRIBUTOR-NEXT: define i32 @cos_test(float %x)
 define i32 @cos_test(float %x) {
   call float @llvm.cos(float %x)
   ret i32 4
 }

llvm/test/Transforms/FunctionAttrs/nounwind.ll

 ; RUN: opt < %s -functionattrs -S | FileCheck %s
 ; RUN: opt < %s -attributor -attributor-disable=false -attributor-max-iterations-verify -attributor-max-iterations=3 -S | FileCheck %s --check-prefix=ATTRIBUTOR
 
 ; TEST 1
-; CHECK: Function Attrs: norecurse nounwind readnone
+; CHECK: Function Attrs: noconvergent norecurse nounwind readnone
 ; CHECK-NEXT: define i32 @foo1()
-; ATTRIBUTOR: Function Attrs: nofree nosync nounwind
+; ATTRIBUTOR: Function Attrs: noconvergent nofree nosync nounwind
 ; ATTRIBUTOR-NEXT: define i32 @foo1()
 define i32 @foo1() {
   ret i32 1
 }
 
 ; TEST 2
-; CHECK: Function Attrs: nounwind readnone
+; CHECK: Function Attrs: noconvergent nounwind readnone
 ; CHECK-NEXT: define i32 @scc1_foo()
-; ATTRIBUTOR: Function Attrs: nofree noreturn nosync nounwind
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noreturn nosync nounwind
 ; ATTRIBUTOR-NEXT: define i32 @scc1_foo()
 define i32 @scc1_foo() {
   %1 = call i32 @scc1_bar()
   ret i32 1
 }
 
 
 ; TEST 3
-; CHECK: Function Attrs: nounwind readnone
+; CHECK: Function Attrs: noconvergent nounwind readnone
 ; CHECK-NEXT: define i32 @scc1_bar()
-; ATTRIBUTOR: Function Attrs: nofree noreturn nosync nounwind
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noreturn nosync nounwind
 ; ATTRIBUTOR-NEXT: define i32 @scc1_bar()
 define i32 @scc1_bar() {
   %1 = call i32 @scc1_foo()
   ret i32 1
 }
 
 ; CHECK: declare i32 @non_nounwind()
 declare i32 @non_nounwind()

llvm/test/Transforms/FunctionAttrs/operand-bundles-scc.ll

 ; RUN: opt -S -functionattrs < %s | FileCheck %s
 ; RUN: opt -S -passes=function-attrs < %s | FileCheck %s
 
 define void @f() {
 ; CHECK-LABEL:  define void @f() #0 {
  call void @g() [ "unknown"() ]
  ret void
 }
 
 define void @g() {
 ; CHECK-LABEL:  define void @g() #0 {
  call void @f()
  ret void
 }
 
 
-; CHECK: attributes #0 = { nofree nounwind }
+; CHECK: attributes #0 = { noconvergent nofree nounwind }

llvm/test/Transforms/FunctionAttrs/optnone.ll

; CHECK: (i8* %p) #1 {
   ret void
 }
 
 declare i8 @strlen(i8*) noinline optnone
 ; CHECK-LABEL: @strlen
 ; CHECK: (i8*) #1
 
 ; CHECK-LABEL: attributes #0
-; CHECK: = { norecurse nounwind readnone }
+; CHECK: = { noconvergent norecurse nounwind readnone }
 ; CHECK-LABEL: attributes #1
 ; CHECK: = { noinline optnone }

llvm/test/Transforms/FunctionAttrs/read-write-scc.ll

 
 define void @bar() {
 ; CHECK-LABEL: define void @bar() #0 {
   %i = load i32, i32* @i
   call void @foo()
   ret void
 }
 
-; CHECK: attributes #0 = { nofree nounwind }
+; CHECK: attributes #0 = { noconvergent nofree nounwind }

llvm/test/Transforms/FunctionAttrs/read_write_returned_arguments_scc.ll

 ;  16 - Number of arguments marked nocapture
 ;   4 - Number of arguments marked readnone
 ;   6 - Number of arguments marked writeonly
 ;   6 - Number of arguments marked readonly
 ;   6 - Number of arguments marked returned
 ;
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 
-; CHECK: Function Attrs: nofree nosync nounwind
+; CHECK: Function Attrs: noconvergent nofree nosync nounwind
 ; CHECK-NEXT: define i32* @external_ret2_nrw(i32* %n0, i32* %r0, i32* returned %w0)
 define i32* @external_ret2_nrw(i32* %n0, i32* %r0, i32* %w0) {
 entry:
   %call = call i32* @internal_ret0_nw(i32* %n0, i32* %w0)
   %call1 = call i32* @internal_ret1_rrw(i32* %r0, i32* %r0, i32* %w0)
   %call2 = call i32* @external_sink_ret2_nrw(i32* %n0, i32* %r0, i32* %w0)
   %call3 = call i32* @internal_ret1_rw(i32* %r0, i32* %w0)
   ret i32* %call3
 }
 
-; CHECK: Function Attrs: nofree nosync nounwind
+; CHECK: Function Attrs: noconvergent nofree nosync nounwind
 ; CHECK-NEXT: define internal i32* @internal_ret0_nw(i32* returned %n0, i32* %w0)
 define internal i32* @internal_ret0_nw(i32* %n0, i32* %w0) {
 entry:
   %r0 = alloca i32, align 4
   %r1 = alloca i32, align 4
   %tobool = icmp ne i32* %n0, null
   br i1 %tobool, label %if.end, label %if.then
 
if.end:                                           ; preds = %entry
   %call5 = call i32* @internal_ret0_nw(i32* %n0, i32* %w0)
   br label %return
 
 return:                                           ; preds = %if.end, %if.then
   %retval.0 = phi i32* [ %call5, %if.end ], [ %n0, %if.then ]
   ret i32* %retval.0
 }
 
-; CHECK: Function Attrs: nofree nosync nounwind
+; CHECK: Function Attrs: noconvergent nofree nosync nounwind
 ; CHECK-NEXT: define internal i32* @internal_ret1_rrw(i32* nonnull dereferenceable(4) %r0, i32* returned %r1, i32* %w0)
 define internal i32* @internal_ret1_rrw(i32* %r0, i32* %r1, i32* %w0) {
 entry:
   %0 = load i32, i32* %r0, align 4
   %tobool = icmp ne i32 %0, 0
   br i1 %tobool, label %if.end, label %if.then
 
 if.then:                                          ; preds = %entry
if.end:                                           ; preds = %entry
   %call8 = call i32* @internal_ret0_nw(i32* %r1, i32* %w0)
   br label %return
 
 return:                                           ; preds = %if.end, %if.then
   %retval.0 = phi i32* [ %call8, %if.end ], [ %r1, %if.then ]
   ret i32* %retval.0
 }
 
-; CHECK: Function Attrs: nofree norecurse nosync nounwind
+; CHECK: Function Attrs: noconvergent nofree norecurse nosync nounwind
 ; CHECK-NEXT: define i32* @external_sink_ret2_nrw(i32* readnone %n0, i32* nocapture readonly %r0, i32* returned writeonly "no-capture-maybe-returned" %w0)
 define i32* @external_sink_ret2_nrw(i32* %n0, i32* %r0, i32* %w0) {
 entry:
   %tobool = icmp ne i32* %n0, null
   br i1 %tobool, label %if.end, label %if.then
 
 if.then:                                          ; preds = %entry
   br label %return
 
 if.end:                                           ; preds = %entry
   %0 = load i32, i32* %r0, align 4
   store i32 %0, i32* %w0, align 4
   br label %return
 
 return:                                           ; preds = %if.end, %if.then
   ret i32* %w0
 }
 
-; CHECK: Function Attrs: nofree nosync nounwind
+; CHECK: Function Attrs: noconvergent nofree nosync nounwind
 ; CHECK-NEXT: define internal i32* @internal_ret1_rw(i32* nonnull dereferenceable(4) %r0, i32* returned %w0)
 define internal i32* @internal_ret1_rw(i32* %r0, i32* %w0) {
 entry:
   %0 = load i32, i32* %r0, align 4
   %tobool = icmp ne i32 %0, 0
   br i1 %tobool, label %if.end, label %if.then
 
 if.then:                                          ; preds = %entry
if.end:                                           ; preds = %entry
   %call4 = call i32* @external_ret2_nrw(i32* %r0, i32* %r0, i32* %w0)
   br label %return
 
 return:                                           ; preds = %if.end, %if.then
   %retval.0 = phi i32* [ %call4, %if.end ], [ %w0, %if.then ]
   ret i32* %retval.0
 }
 
-; CHECK: Function Attrs: nofree nosync nounwind
+; CHECK: Function Attrs: noconvergent nofree nosync nounwind
 ; CHECK-NEXT: define i32* @external_source_ret2_nrw(i32* %n0, i32* %r0, i32* returned %w0)
 define i32* @external_source_ret2_nrw(i32* %n0, i32* %r0, i32* %w0) {
 entry:
   %call = call i32* @external_sink_ret2_nrw(i32* %n0, i32* %r0, i32* %w0)
   %call1 = call i32* @external_ret2_nrw(i32* %n0, i32* %r0, i32* %w0)
   ret i32* %call1
 }
 
 ; Verify that we see only expected attribute sets, the above lines only check
 ; for a subset relation.
 ;
 ; CHECK-NOT: attributes #
-; CHECK: attributes #{{.*}} = { nofree nosync nounwind }
-; CHECK: attributes #{{.*}} = { nofree norecurse nosync nounwind }
+; CHECK: attributes #{{.*}} = { noconvergent nofree nosync nounwind }
+; CHECK: attributes #{{.*}} = { noconvergent nofree norecurse nosync nounwind }
 ; CHECK: attributes #{{.*}} = { nosync }
 ; CHECK-NOT: attributes #

llvm/test/Transforms/FunctionAttrs/willreturn.ll

 ; RUN: opt -functionattrs -S < %s | FileCheck %s --check-prefix=FNATTR
 ; RUN: opt -passes=attributor --attributor-disable=false -attributor-max-iterations-verify -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefix=ATTRIBUTOR
 
 
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 
 ; Test cases specifically designed for the "willreturn" function attribute.
 ; We use FIXME's to indicate problems and missing attributes.
 
 
 ; TEST 1 (positive case)
-; FNATTR: Function Attrs: noinline norecurse nounwind readnone uwtable
+; FNATTR: Function Attrs: noconvergent noinline norecurse nounwind readnone uwtable
 ; FNATTR-NEXT: define void @only_return()
-; ATTRIBUTOR: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noinline norecurse nosync nounwind readnone uwtable willreturn
 ; ATTRIBUTOR-NEXT: define void @only_return()
 define void @only_return() #0 {
     ret void
 }
 
 
 ; TEST 2 (positive & negative case)
 ; 2.1 (positive case)
 ; recursive function which will halt
 ; int fib(int n){
 ;    return n<=1? n : fib(n-1) + fib(n-2);
 ; }
 
-; FNATTR: Function Attrs: noinline nounwind readnone uwtable
+; FNATTR: Function Attrs: noconvergent noinline nounwind readnone uwtable
 ; FNATTR-NEXT: define i32 @fib(i32 %0)
 ; FIXME: missing willreturn
-; ATTRIBUTOR: Function Attrs: nofree noinline nosync nounwind readnone uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noinline nosync nounwind readnone uwtable
 ; ATTRIBUTOR-NEXT: define i32 @fib(i32 %0) local_unnamed_addr
 define i32 @fib(i32 %0) local_unnamed_addr #0 {
   %2 = icmp slt i32 %0, 2
   br i1 %2, label %9, label %3
 
 ; <label>:3:                                      ; preds = %1
   %4 = add nsw i32 %0, -1
   %5 = tail call i32 @fib(i32 %4)

 ; int fact_maybe_not_halt(int n) {
 ;   if (n==0) {
 ;     return 1;
 ;   }
 ;   return fact_maybe_not_halt( n > 0 ? n-1 : n) * n;
 ; }
 ; fact_maybe_not(-1) doesn't stop.
 
-; FNATTR: Function Attrs: noinline norecurse nounwind readnone uwtable
+; FNATTR: Function Attrs: noconvergent noinline norecurse nounwind readnone uwtable
 ; FNATTR-NOT: willreturn
 ; FNATTR-NEXT: define i32 @fact_maybe_not_halt(i32 %0) local_unnamed_addr
-; ATTRIBUTOR: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noinline norecurse nosync nounwind readnone uwtable
 ; ATTRIBUTOR-NOT: willreturn
 ; ATTRIBUTOR-NEXT: define i32 @fact_maybe_not_halt(i32 %0) local_unnamed_addr
 define i32 @fact_maybe_not_halt(i32 %0) local_unnamed_addr #0 {
   %2 = icmp eq i32 %0, 0
   br i1 %2, label %11, label %3
 
 ; <label>:3:                                      ; preds = %1, %3
   %4 = phi i32 [ %8, %3 ], [ %0, %1 ]

 ;   int ans = 1;
 ;   for(int i = 1;i<=n;i++){
 ;     ans *= i;
 ;   }
 ;   return ans;
 ; }
 
 ; FIXME: missing willreturn
-; FNATTR: Function Attrs: noinline norecurse nounwind readnone uwtable
+; FNATTR: Function Attrs: noconvergent noinline norecurse nounwind readnone uwtable
 ; FNATTR-NEXT: define i32 @fact_loop(i32 %0)
-; ATTRIBUTOR: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noinline norecurse nosync nounwind readnone uwtable
 ; ATTRIBUTOR-NEXT: define i32 @fact_loop(i32 %0) local_unnamed_addr
 define i32 @fact_loop(i32 %0) local_unnamed_addr #0 {
   %2 = icmp slt i32 %0, 1
   br i1 %2, label %3, label %5
 
 ; <label>:3:                                      ; preds = %5, %1
   %4 = phi i32 [ 1, %1 ], [ %8, %5 ]
   ret i32 %4

 ; mutual recursion
 ; void mutual_recursion1(){
 ;    mutual_recursion2();
 ; }
 ; void mutual_recursion2(){
 ;     mutual_recursion1();
 ; }
 
-; FNATTR: Function Attrs: noinline nounwind readnone uwtable
+; FNATTR: Function Attrs: noconvergent noinline nounwind readnone uwtable
 ; FNATTR-NOT: willreturn
 ; FNATTR-NEXT: define void @mutual_recursion1(i1 %c)
-; ATTRIBUTOR: Function Attrs: nofree noinline nosync nounwind readnone uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noinline nosync nounwind readnone uwtable
 ; ATTRIBUTOR-NOT: willreturn
 ; ATTRIBUTOR-NEXT: define void @mutual_recursion1(i1 %c)
 define void @mutual_recursion1(i1 %c) #0 {
   br i1 %c, label %rec, label %end
 rec:
   call void @mutual_recursion2(i1 %c)
   br label %end
 end:
   ret void
 }
 
 
-; FNATTR: Function Attrs: noinline nounwind readnone uwtable
+; FNATTR: Function Attrs: noconvergent noinline nounwind readnone uwtable
 ; FNATTR-NOT: willreturn
 ; FNATTR-NEXT: define void @mutual_recursion2(i1 %c)
-; ATTRIBUTOR: Function Attrs: nofree noinline nosync nounwind readnone uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noinline nosync nounwind readnone uwtable
 ; ATTRIBUTOR-NOT: willreturn
 ; ATTRIBUTOR-NEXT: define void @mutual_recursion2(i1 %c)
 define void @mutual_recursion2(i1 %c) #0 {
   call void @mutual_recursion1(i1 %c)
   ret void
 }
 
 
; <label>:9:                                      ; preds = %5
   ret void
 }
 
 ; TEST 6 (positive case)
 ; Call intrinsic function
 ; FIXME: missing willreturn
 ; FNATTRS: Function Attrs: noinline readnone speculatable
 ; FNATTRS-NEXT: declare float @llvm.floor.f32(float %0)
-; ATTRIBUTOR: Function Attrs: nounwind readnone speculatable
+; ATTRIBUTOR: Function Attrs: noconvergent nounwind readnone speculatable
 ; ATTRIBUTOR-NEXT: declare float @llvm.floor.f32(float)
 declare float @llvm.floor.f32(float)
 
 ; FNATTRS: Function Attrs: noinline nounwind readnone uwtable
 ; FNATTRS-NEXT: define void @call_floor(float %a)
 ; FIXME: missing willreturn
-; ATTRIBUTOR: Function Attrs: noinline nosync nounwind readnone uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent noinline nosync nounwind readnone uwtable
 ; ATTRIBUTOR-NEXT: define void @call_floor(float %a)
 define void @call_floor(float %a) #0 {
     tail call float @llvm.floor.f32(float %a)
     ret void
 }
 
 
 ; TEST 7 (negative case)

 ;    int ans = 0;
 ;    for(int i = 0;i<10;i++){
 ;        ans += p[i];
 ;    }
 ;    return ans;
 ; }
 
 ; FIXME: missing willreturn
-; FNATTR: Function Attrs: noinline norecurse nounwind readonly uwtable
+; FNATTR: Function Attrs: noconvergent noinline norecurse nounwind readonly uwtable
 ; FNATTR-NEXT: define i32 @loop_constant_trip_count(i32* nocapture readonly %0)
-; ATTRIBUTOR: Function Attrs: nofree noinline norecurse nosync nounwind readonly uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noinline norecurse nosync nounwind readonly uwtable
 ; ATTRIBUTOR-NEXT: define i32 @loop_constant_trip_count(i32* nocapture readonly %0)
 define i32 @loop_constant_trip_count(i32* nocapture readonly %0) #0 {
   br label %3
 
 ; <label>:2:                                      ; preds = %3
   ret i32 %8
 
 ; <label>:3:                                      ; preds = %3, %1

 
 ; int loop_trip_count_unbound(unsigned s,unsigned e, int *p, int offset){
 ;     int ans = 0;
 ;     for(unsigned i = s;i != e;i+=offset){
 ;         ans += p[i];
 ;     }
 ;     return ans;
 ; }
-; FNATTR: Function Attrs: noinline norecurse nounwind readonly uwtable
+; FNATTR: Function Attrs: noconvergent noinline norecurse nounwind readonly uwtable
 ; FNATTR-NOT: willreturn
 ; FNATTR-NEXT: define i32 @loop_trip_count_unbound(i32 %0, i32 %1, i32* nocapture readonly %2, i32 %3) local_unnamed_addr
-; ATTRIBUTOR: Function Attrs: nofree noinline norecurse nosync nounwind readonly uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noinline norecurse nosync nounwind readonly uwtable
 ; ATTRIBUTOR-NOT: willreturn
 ; ATTRIBUTOR-NEXT: define i32 @loop_trip_count_unbound(i32 %0, i32 %1, i32* nocapture readonly %2, i32 %3) local_unnamed_addr
 define i32 @loop_trip_count_unbound(i32 %0, i32 %1, i32* nocapture readonly %2, i32 %3) local_unnamed_addr #0 {
   %5 = icmp eq i32 %0, %1
   br i1 %5, label %6, label %8
 
 ; <label>:6:                                      ; preds = %8, %4
   %7 = phi i32 [ 0, %4 ], [ %14, %8 ]

 ;    for(;n >= 0;n--){
 ;        ans += p[n];
 ;    }
 ;    return ans;
 ;  }
 
 
 ; FIXME: missing willreturn
-; FNATTR: Function Attrs: noinline norecurse nounwind readonly uwtable
+; FNATTR: Function Attrs: noconvergent noinline norecurse nounwind readonly uwtable
 ; FNATTR-NEXT: define i32 @loop_trip_dec(i32 %0, i32* nocapture readonly %1)
-; ATTRIBUTOR: Function Attrs: nofree noinline norecurse nosync nounwind readonly uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noinline norecurse nosync nounwind readonly uwtable
 ; ATTRIBUTOR-NEXT: define i32 @loop_trip_dec(i32 %0, i32* nocapture readonly %1) local_unnamed_addr
 
 define i32 @loop_trip_dec(i32 %0, i32* nocapture readonly %1) local_unnamed_addr #0 {
   %3 = icmp sgt i32 %0, -1
   br i1 %3, label %4, label %14
 
 ; <label>:4:                                      ; preds = %2
   %5 = sext i32 %0 to i64

 ; <label>:14:                                     ; preds = %6, %2
   %15 = phi i32 [ 0, %2 ], [ %11, %6 ]
   ret i32 %15
 }
 
 ; TEST 14 (positive case)
 ; multiple return
 
-; FNATTR: Function Attrs: noinline norecurse nounwind readnone uwtable
+; FNATTR: Function Attrs: noconvergent noinline norecurse nounwind readnone uwtable
 ; FNATTR-NEXT: define i32 @multiple_return(i32 %a)
-; ATTRIBUTOR: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noinline norecurse nosync nounwind readnone uwtable willreturn
 ; ATTRIBUTOR-NEXT: define i32 @multiple_return(i32 %a)
 define i32 @multiple_return(i32 %a) #0 {
   %b =  icmp eq i32 %a, 0
   br i1 %b, label %t, label %f
 
 t:
   ret i32 1
 f:

 unreachable_label:
   tail call void @exit(i32 0)
   unreachable
 }
 
 ; FIXME: missing willreturn
 ; FNATTR: Function Attrs: noinline nounwind uwtable
 ; FNATTR-NEXT: define i32 @unreachable_exit_positive2(i32 %0)
-; ATTRIBUTOR: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noinline norecurse nosync nounwind readnone uwtable
 ; ATTRIBUTOR-NEXT: define i32 @unreachable_exit_positive2(i32 %0)
 define i32 @unreachable_exit_positive2(i32) local_unnamed_addr #0 {
   %2 = icmp slt i32 %0, 1
   br i1 %2, label %3, label %5
 
 ; <label>:3:                                      ; preds = %5, %1
   %4 = phi i32 [ 1, %1 ], [ %8, %5 ]
   ret i32 %4

 unreachable_label:
   tail call void @exit(i32 0)
   unreachable
 }
 
 ; FNATTR: Function Attrs: noinline nounwind uwtable
 ; FNATTR-NOT: willreturn
 ; FNATTR-NEXT: define void @unreachable_exit_negative2()
-; ATTRIBUTOR: Function Attrs: nofree noinline norecurse noreturn nosync nounwind readnone uwtable
+; ATTRIBUTOR: Function Attrs: noconvergent nofree noinline norecurse noreturn nosync nounwind readnone uwtable
 ; ATTRIBUTOR-NOT: willreturn
 ; ATTRIBUTOR-NEXT: define void @unreachable_exit_negative2()
 define void @unreachable_exit_negative2() #0 {
 
   br label %L1
 L1:
   br label %L2
 L2:
   br label %L1
 
 unreachable_label:
   tail call void @exit(i32 0)
   unreachable
 }
 
-; FNATTR: Function Attrs: noreturn nounwind
+; FNATTR: Function Attrs: noconvergent noreturn nounwind
 ; FNATTR-NEXT: declare void @llvm.eh.sjlj.longjmp(i8*)
-; ATTRIBUTOR: Function Attrs: noreturn nounwind
+; ATTRIBUTOR: Function Attrs: noconvergent noreturn nounwind
 ; ATTRIBUTOR-NEXT: declare void @llvm.eh.sjlj.longjmp(i8*)
 declare void @llvm.eh.sjlj.longjmp(i8*)
 
-; FNATTR: Function Attrs: noinline nounwind uwtable
+; FNATTR: Function Attrs: noconvergent noinline nounwind uwtable
 ; FNATTR-NOT: willreturn
-; FNATTR-NEXT: define void @call_longjmp(i8* nocapture readnone %0) local_unnamed_addr #3 {
-; ATTRIBUTOR: Function Attrs: noinline noreturn nounwind uwtable
+; FNATTR-NEXT: define void @call_longjmp(i8* nocapture readnone %0) local_unnamed_addr #11 {
+; ATTRIBUTOR: Function Attrs: noconvergent noinline noreturn nounwind uwtable
 ; ATTRIBUTOR-NOT: willreturn
 ; ATTRIBUTOR-NEXT: define void @call_longjmp(i8* nocapture readnone %0) local_unnamed_addr
 define void @call_longjmp(i8* nocapture readnone %0) local_unnamed_addr #0 {
   tail call void @llvm.eh.sjlj.longjmp(i8* %0)
   ret void
 }
 
 
 attributes #0 = { nounwind uwtable noinline }
 attributes #1 = { uwtable noinline }

llvm/test/Transforms/GVNHoist/hoist-convergent.ll

if.else:
   br label %if.end
 
 if.end:
   %tmax.0 = phi float [ %mul2, %if.then ], [ %mul6, %if.else ]
   %add = fadd float %tmax.0, 10.0
   ret float %add
 }
 
-; The call site is convergent but the declaration is not.
-; CHECK-LABEL: @no_convergent_call_hoisting(
-
-; CHECK: if.then:
-; CHECK: call float @func(
-
-; CHECK: if.else:
-; CHECK: call float @func(
-define float @no_convergent_call_hoisting(float %d, float %min, float %max, float %a) {
-entry:
-  %div = fdiv float 1.000000e+00, %d
-  %cmp = fcmp oge float %div, 0.000000e+00
-  br i1 %cmp, label %if.then, label %if.else
-
-if.then:
-  %sub1 = fsub float %max, %a
-  %mul2 = call float @func(float %sub1, float %div) #0
-  br label %if.end
-
-if.else:
-  %sub5 = fsub float %max, %a
-  %mul6 = call float @func(float %sub5, float %div) #0
-  br label %if.end
-
-if.end:
-  %tmax.0 = phi float [ %mul2, %if.then ], [ %mul6, %if.else ]
-  %add = fadd float %tmax.0, 10.0
-  ret float %add
-}
-
-; The call site is convergent but the declaration is not.
-; CHECK-LABEL: @call_hoisting(
-; CHECK: call float @func(
-; CHECK-NOT: call float @func(
-define float @call_hoisting(float %d, float %min, float %max, float %a) {
+; The call site is noconvergent but the declaration is not.
+; CHECK-LABEL: @noconvergent_callsite_hoisting(
+; CHECK: call float @convergent_func(
+; CHECK-NOT: call float @convergent_func(
+define float @noconvergent_callsite_hoisting(float %d, float %min, float %max, float %a) {
 entry:
   %div = fdiv float 1.000000e+00, %d
   %cmp = fcmp oge float %div, 0.000000e+00
   br i1 %cmp, label %if.then, label %if.else
 
 if.then:
   %sub1 = fsub float %max, %a
-  %mul2 = call float @func(float %sub1, float %div)
+  %mul2 = call float @convergent_func(float %sub1, float %div) noconvergent
   br label %if.end
 
 if.else:
   %sub5 = fsub float %max, %a
-  %mul6 = call float @func(float %sub5, float %div)
+  %mul6 = call float @convergent_func(float %sub5, float %div) noconvergent
   br label %if.end
 
 if.end:
   %tmax.0 = phi float [ %mul2, %if.then ], [ %mul6, %if.else ]
   %add = fadd float %tmax.0, 10.0
   ret float %add
 }
 
 declare float @convergent_func(float, float) #0
-declare float @func(float, float) #1
 
-attributes #0 = { nounwind readnone convergent }
-attributes #1 = { nounwind readnone }
+attributes #0 = { nounwind readnone }

llvm/test/Transforms/GVNHoist/hoist-pr31891.ll

 ; CHECK-LABEL: define void @hoistit
 ; CHECK-SAME:     !dbg ![[sp_hoistit:[0-9]+]]
 ; CHECK: call float @fabsf(float %f) {{.*}} !dbg ![[dbgloc:[0-9]+]]
 ; CHECK: br i1 %tobool, label %if.then, label %if.else
 
 ; CHECK: ![[sp_hoistit]] = distinct !DISubprogram(name: "hoistit", {{.*}})
 ; CHECK: ![[dbgloc]] = !DILocation({{.*}}, scope: ![[sp_hoistit]])
 
-declare void @useit1(float)
+declare void @useit1(float) noconvergent
 
-declare void @useit2(float)
+declare void @useit2(float) noconvergent
 
 attributes #0 = { noinline nounwind readnone uwtable }
-attributes #1 = { nounwind readnone }
+attributes #1 = { noconvergent nounwind readnone }
 attributes #2 = { noinline nounwind uwtable }
 
 !llvm.dbg.cu = !{!0}
 !llvm.module.flags = !{!3, !4, !5}
 !llvm.ident = !{!6}
 
 !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 5.0.0 ", isOptimized: false, runtimeVersion: 0, emissionKind: LineTablesOnly, enums: !2)
 !1 = !DIFile(filename: "t.c", directory: "C:\5Csrc\5Cllvm\5Cbuild")

llvm/test/Transforms/InferAddressSpaces/NVPTX/clone_constexpr.ll

entry:
   tail call void @f2(i64* null, i64 %L.sroa.0.0.insert.ext.i) #0
   ret void
 }
 
 declare void @f1(i32*, i32) local_unnamed_addr #0
 declare void @f2(i64*, i64) local_unnamed_addr #0
 declare i32 @llvm.nvvm.read.ptx.sreg.tid.x() #1
 
-attributes #0 = { convergent nounwind }
-attributes #1 = { nounwind readnone }
-attributes #2 = { nounwind }
+attributes #0 = { nounwind }
+attributes #1 = { noconvergent nounwind readnone }
+attributes #2 = { noconvergent nounwind }

llvm/test/Transforms/InferFunctionAttrs/norecurse_debug.ll

 !17 = !{!""}
 !18 = !DILocation(line: 3, column: 14, scope: !2)
 !19 = !DILocation(line: 7, column: 6, scope: !2)
 !24 = !DILocation(line: 7, column: 14, scope: !2)
 !27 = !DILocation(line: 9, column: 20, scope: !2)
 !28 = !DILocation(line: 9, column: 18, scope: !2)
 !29 = !DILocation(line: 10, column: 1, scope: !2)
 
-; CHECK: attributes #0 = { nofree norecurse nounwind }
+; CHECK: attributes #0 = { noconvergent nofree norecurse nounwind }
 ; CHECK-NOT foo.coefficient1

llvm/test/Transforms/Inline/cgscc-update.ll

 
 ; The 'test4_' prefixed functions are designed to trigger forming a new direct
 ; call in the inlined body of the function similar to 'test1_'. However, after
 ; that we continue to inline another edge of the graph forcing us to do a more
 ; interesting call graph update for the new call edge. Eventually, we still
 ; form a new SCC and should use that can deduce precise function attrs.
 
 ; This function should have had 'readnone' deduced for its SCC.
-; CHECK: Function Attrs: noinline nounwind readnone
+; CHECK: Function Attrs: noconvergent noinline nounwind readnone
 ; CHECK-NEXT: define void @test4_f1()
 define void @test4_f1() noinline {
 entry:
   call void @test4_h()
   ret void
 }
 
 ; CHECK-NOT: @test4_f2
 define internal void @test4_f2() {
 entry:
   call void @test4_f1()
   ret void
 }
 
 ; CHECK-NOT: @test4_g
 define internal void @test4_g(void()* %p) {
 entry:
   call void %p()
   ret void
 }
 
 ; This function should have had 'readnone' deduced for its SCC.
-; CHECK: Function Attrs: noinline nounwind readnone
+; CHECK: Function Attrs: noconvergent noinline nounwind readnone
 ; CHECK-NEXT: define void @test4_h()
 define void @test4_h() noinline {
 entry:
   call void @test4_g(void()* @test4_f2)
   ret void
 }

llvm/test/Transforms/Inline/inline_invoke.ll

 ; CHECK-NEXT:   catch i8* bitcast (i8** @_ZTIi to i8*)
 ; CHECK-NEXT: br label %[[FIX]]
 ; CHECK:    [[FIX]]:
 ; CHECK-NEXT: [[T1:%.*]] = phi i32 [ 0, %[[JOIN]] ], [ 1, %lpad ]
 ; CHECK-NEXT: call void @use(i32 [[T1]])
 ; CHECK-NEXT: call void @_ZSt9terminatev()
 
 ; CHECK: attributes [[NUW]] = { nounwind }
-; CHECK: attributes #1 = { nounwind readnone }
+; CHECK: attributes #1 = { noconvergent nounwind readnone }
 ; CHECK: attributes #2 = { ssp uwtable }
-; CHECK: attributes #3 = { argmemonly nounwind willreturn }
+; CHECK: attributes #3 = { argmemonly noconvergent nounwind willreturn }
 ; CHECK: attributes #4 = { noreturn nounwind }

llvm/test/Transforms/Inline/noalias-calls.ll

 }
 
 define void @foo(i8* nocapture %a, i8* nocapture readonly %c, i8* nocapture %b) #2 {
 entry:
   tail call void @hello(i8* %a, i8* %c, i8* %b)
   ret void
 }
 
-; CHECK: define void @foo(i8* nocapture %a, i8* nocapture readonly %c, i8* nocapture %b) #2 {
+; CHECK: define void @foo(i8* nocapture %a, i8* nocapture readonly %c, i8* nocapture %b) #3 {
 ; CHECK: entry:
-; CHECK:   call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 %a, i8* align 16 %b, i64 16, i1 false) #1, !noalias !0
-; CHECK:   call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 %b, i8* align 16 %c, i64 16, i1 false) #1, !noalias !3
-; CHECK:   call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 %a, i8* align 16 %c, i64 16, i1 false) #1, !alias.scope !5
-; CHECK:   call void @hey() #1, !noalias !5
-; CHECK:   call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 %{{.*}}, i8* align 16 %c, i64 16, i1 false) #1, !noalias !3
+; CHECK:   call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 %a, i8* align 16 %b, i64 16, i1 false) #2, !noalias !0
+; CHECK:   call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 %b, i8* align 16 %c, i64 16, i1 false) #2, !noalias !3
+; CHECK:   call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 %a, i8* align 16 %c, i64 16, i1 false) #2, !alias.scope !5
+; CHECK:   call void @hey() #2, !noalias !5
+; CHECK:   call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 %{{.*}}, i8* align 16 %c, i64 16, i1 false) #2, !noalias !3
 ; CHECK:   ret void
 ; CHECK: }
 
 attributes #0 = { nounwind argmemonly willreturn }
 attributes #1 = { nounwind }
 attributes #2 = { nounwind uwtable }
 
 ; CHECK: !0 = !{!1}
 ; CHECK: !1 = distinct !{!1, !2, !"hello: %c"}
 ; CHECK: !2 = distinct !{!2, !"hello"}
 ; CHECK: !3 = !{!4}
 ; CHECK: !4 = distinct !{!4, !2, !"hello: %a"}
 ; CHECK: !5 = !{!4, !1}
 

llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll

;
   %med = call float @llvm.amdgcn.fmed3.f32(float 0.0, float 1.0, float undef)
   ret float %med
 }
 
 ; --------------------------------------------------------------------
 ; llvm.amdgcn.icmp
 ; --------------------------------------------------------------------
 
-declare i64 @llvm.amdgcn.icmp.i64.i32(i32, i32, i32 immarg) nounwind readnone convergent
-declare i64 @llvm.amdgcn.icmp.i64.i64(i64, i64, i32 immarg) nounwind readnone convergent
-declare i64 @llvm.amdgcn.icmp.i64.i1(i1, i1, i32 immarg) nounwind readnone convergent
+declare i64 @llvm.amdgcn.icmp.i64.i32(i32, i32, i32 immarg) nounwind readnone
+declare i64 @llvm.amdgcn.icmp.i64.i64(i64, i64, i32 immarg) nounwind readnone
+declare i64 @llvm.amdgcn.icmp.i64.i1(i1, i1, i32 immarg) nounwind readnone
 
 define i64 @invalid_icmp_code(i32 %a, i32 %b) {
 ; CHECK-LABEL: @invalid_icmp_code(
 ; CHECK-NEXT:    [[UNDER:%.*]] = call i64 @llvm.amdgcn.icmp.i64.i32(i32 [[A:%.*]], i32 [[B:%.*]], i32 31)
 ; CHECK-NEXT:    [[OVER:%.*]] = call i64 @llvm.amdgcn.icmp.i64.i32(i32 [[A]], i32 [[B]], i32 42)
 ; CHECK-NEXT:    [[OR:%.*]] = or i64 [[UNDER]], [[OVER]]
 ; CHECK-NEXT:    ret i64 [[OR]]
 ;
   %under = call i64 @llvm.amdgcn.icmp.i64.i32(i32 %a, i32 %b, i32 31)
   %over = call i64 @llvm.amdgcn.icmp.i64.i32(i32 %a, i32 %b, i32 42)
   %or = or i64 %under, %over
   ret i64 %or
 }
 
 define i64 @icmp_constant_inputs_false() {
 ; CHECK-LABEL: @icmp_constant_inputs_false(
 ; CHECK-NEXT:    ret i64 0
 ;
   %result = call i64 @llvm.amdgcn.icmp.i64.i32(i32 9, i32 8, i32 32)
   ret i64 %result
 }
 
 define i64 @icmp_constant_inputs_true() {
 ; CHECK-LABEL: @icmp_constant_inputs_true(
-; CHECK-NEXT:    [[RESULT:%.*]] = call i64 @llvm.read_register.i64(metadata !0) [[CONVERGENT:#[0-9]*]]
+; CHECK-NEXT:    [[RESULT:%.*]] = call i64 @llvm.read_register.i64(metadata !0){{$}}
 ; CHECK-NEXT:    ret i64 [[RESULT]]
 ;
   %result = call i64 @llvm.amdgcn.icmp.i64.i32(i32 9, i32 8, i32 34)
   ret i64 %result
 }
 
 define i64 @icmp_constant_to_rhs_slt(i32 %x) {
 ; CHECK-LABEL: @icmp_constant_to_rhs_slt(
;
   %mask = call i64 @llvm.amdgcn.icmp.i64.i1(i1 %cmp, i1 false, i32 33)
   ret i64 %mask
 }
 
 ; --------------------------------------------------------------------
 ; llvm.amdgcn.fcmp
 ; --------------------------------------------------------------------
 
-declare i64 @llvm.amdgcn.fcmp.i64.f32(float, float, i32 immarg) nounwind readnone convergent
+declare i64 @llvm.amdgcn.fcmp.i64.f32(float, float, i32 immarg) nounwind readnone
 
 define i64 @invalid_fcmp_code(float %a, float %b) {
 ; CHECK-LABEL: @invalid_fcmp_code(
 ; CHECK-NEXT:    [[UNDER:%.*]] = call i64 @llvm.amdgcn.fcmp.i64.f32(float [[A:%.*]], float [[B:%.*]], i32 -1)
 ; CHECK-NEXT:    [[OVER:%.*]] = call i64 @llvm.amdgcn.fcmp.i64.f32(float [[A]], float [[B]], i32 16)
 ; CHECK-NEXT:    [[OR:%.*]] = or i64 [[UNDER]], [[OVER]]
 ; CHECK-NEXT:    ret i64 [[OR]]
 ;
   %under = call i64 @llvm.amdgcn.fcmp.i64.f32(float %a, float %b, i32 -1)
   %over = call i64 @llvm.amdgcn.fcmp.i64.f32(float %a, float %b, i32 16)
   %or = or i64 %under, %over
   ret i64 %or
 }
 
 define i64 @fcmp_constant_inputs_false() {
 ; CHECK-LABEL: @fcmp_constant_inputs_false(
 ; CHECK-NEXT:    ret i64 0
 ;
   %result = call i64 @llvm.amdgcn.fcmp.i64.f32(float 2.0, float 4.0, i32 1)
   ret i64 %result
 }
 
 define i64 @fcmp_constant_inputs_true() {
 ; CHECK-LABEL: @fcmp_constant_inputs_true(
-; CHECK-NEXT:    [[RESULT:%.*]] = call i64 @llvm.read_register.i64(metadata !0) [[CONVERGENT]]
+; CHECK-NEXT:    [[RESULT:%.*]] = call i64 @llvm.read_register.i64(metadata !0){{$}}
 ; CHECK-NEXT:    ret i64 [[RESULT]]
 ;
   %result = call i64 @llvm.amdgcn.fcmp.i64.f32(float 2.0, float 4.0, i32 4)
   ret i64 %result
 }
 
 define i64 @fcmp_constant_to_rhs_olt(float %x) {
 ; CHECK-LABEL: @fcmp_constant_to_rhs_olt(

 ; CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.amdgcn.update.dpp.i32(i32 undef, i32 [[IN1:%.*]], i32 4, i32 15, i32 15, i1 true)
 ; CHECK-NEXT:    store i32 [[TMP0]], i32 addrspace(1)* [[OUT:%.*]], align 4
 ; CHECK-NEXT:    ret void
 ;
   %tmp0 = call i32 @llvm.amdgcn.update.dpp.i32(i32 undef, i32 %in1, i32 4, i32 15, i32 15, i1 1)
   store i32 %tmp0, i32 addrspace(1)* %out
   ret void
 }
-
-; CHECK: attributes [[CONVERGENT]] = { convergent }
-

llvm/test/Transforms/InstCombine/convergent.ll

-; RUN: opt -instcombine -S < %s | FileCheck -enable-var-scope %s
-
-declare i32 @k() convergent
-declare i32 @f()
-
-declare i64 @llvm.read_register.i64(metadata) nounwind
-
-define i32 @extern() {
-  ; Convergent attr shouldn't be removed here; k is convergent.
-  ; CHECK: call i32 @k() [[$CONVERGENT_ATTR:#[0-9]+]]
-  %a = call i32 @k() convergent
-  ret i32 %a
-}
-
-define i32 @extern_no_attr() {
-  ; Convergent attr shouldn't be added here, even though k is convergent.
-  ; CHECK: call i32 @k(){{$}}
-  %a = call i32 @k()
-  ret i32 %a
-}
-
-define i32 @no_extern() {
-  ; Convergent should be removed here, as the target is convergent.
-  ; CHECK: call i32 @f(){{$}}
-  %a = call i32 @f() convergent
-  ret i32 %a
-}
-
-define i32 @indirect_call(i32 ()* %f) {
-  ; CHECK: call i32 %f() [[$CONVERGENT_ATTR]]
-  %a = call i32 %f() convergent
-  ret i32 %a
-}
-
-; do not remove from convergent intrinsic call sites
-; CHECK-LABEL: @convergent_intrinsic_call(
-; CHECK: call i64 @llvm.read_register.i64(metadata !0) [[$CONVERGENT_ATTR]]
-define i64 @convergent_intrinsic_call() {
-  %val = call i64 @llvm.read_register.i64(metadata !0) convergent
-  ret i64 %val
-}
-
-; CHECK: [[$CONVERGENT_ATTR]] = { convergent }
-!0 = !{!"foo"}

llvm/test/Transforms/InstCombine/sdiv-guard.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -instcombine -S | FileCheck %s
 
 declare void @llvm.experimental.guard(i1, ...)
 
 ; Regression test. If %flag is false then %s == 0 and guard should be triggered.
 define i32 @a(i1 %flag, i32 %X) nounwind readnone {
 ; CHECK-LABEL: @a(
 ; CHECK-NEXT:    [[CMP1:%.*]] = icmp ne i32 [[X:%.*]], 0
 ; CHECK-NEXT:    [[CMP:%.*]] = and i1 [[CMP1]], [[FLAG:%.*]]
-; CHECK-NEXT:    call void (i1, ...) @llvm.experimental.guard(i1 [[CMP]]) #1 [ "deopt"() ]
+; CHECK-NEXT:    call void (i1, ...) @llvm.experimental.guard(i1 [[CMP]]) #2 [ "deopt"() ]
 ; CHECK-NEXT:    [[R:%.*]] = sdiv i32 100, [[X]]
 ; CHECK-NEXT:    ret i32 [[R]]
 ;
   %s = select i1 %flag, i32 %X, i32 0
   %cmp = icmp ne i32 %s, 0
   call void(i1, ...) @llvm.experimental.guard( i1 %cmp )[ "deopt"() ]
   %r = sdiv i32 100, %s
   ret i32 %r
 }

llvm/test/Transforms/JumpThreading/2010-08-26-and.ll

_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit134: ; preds = %if.then.i132, %land.lhs.true5.i129, %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit115
   %call22 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str7, i64 0, i64 0), i32 %retval.0.i) ; <i32> [#uses=0]
   %exitcond = icmp eq i64 %tmp146, %tmp145        ; <i1> [#uses=1]
   br i1 %exitcond, label %for.end, label %land.lhs.true.i
 
 for.end:                                          ; preds = %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit134, %entry
   ret i32 0
 }
 
-declare i32 @printf(i8* nocapture, ...) nounwind
+declare i32 @printf(i8* nocapture, ...) noconvergent nounwind
 
-declare i32 @memcmp(i8* nocapture, i8* nocapture, i64) nounwind readonly
+declare i32 @memcmp(i8* nocapture, i8* nocapture, i64) noconvergent nounwind readonly
 
-declare i64 @strlen(i8* nocapture) nounwind readonly
+declare i64 @strlen(i8* nocapture) noconvergent nounwind readonly

llvm/test/Transforms/JumpThreading/and-and-cond.ll

 ; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg  -S | FileCheck %s
 
-declare i32 @f1()
-declare i32 @f2()
-declare void @f3()
+declare i32 @f1() noconvergent
+declare i32 @f2() noconvergent
+declare void @f3() noconvergent
 
 define i32 @test(i1 %cond, i1 %cond2, i1 %cond3) {
 ; CHECK: test
   br i1 %cond, label %T1, label %F1
 
 ; CHECK-NOT: T1:
 T1:
   %v1 = call i32 @f1()

llvm/test/Transforms/JumpThreading/and-cond.ll

 ; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg  -S | FileCheck %s
 
-declare i32 @f1()
-declare i32 @f2()
-declare void @f3()
+declare i32 @f1() noconvergent
+declare i32 @f2() noconvergent
+declare void @f3() noconvergent
 
 define i32 @test(i1 %cond, i1 %cond2) {
 ; CHECK: test
   br i1 %cond, label %T1, label %F1
 
 ; CHECK-NOT: T1
 T1:
   %v1 = call i32 @f1()

llvm/test/Transforms/JumpThreading/assume-edge-dom.ll

 ; RUN: opt -S -jump-threading < %s | FileCheck %s
 
-declare i8* @escape()
+declare i8* @escape() noconvergent
 declare void @llvm.assume(i1)
 
 define i1 @test1(i1 %cond) {
 entry:
     br i1 %cond, label %taken, label %not_taken
 
 ; CHECK-LABEL: @test1
 ; CHECK: br i1 %cond, label %no, label %yes

llvm/test/Transforms/JumpThreading/assume.ll

 normal:
   ret void
 
 error:
   store atomic i32 0, i32* @g unordered, align 4
   ret void
 }
 
-declare void @f(i1)
-declare void @exit()
+declare void @f(i1) noconvergent
+declare void @exit() noconvergent
 ; We can fold the assume but not the uses before the assume.
 define void @cannot_fold_use_before_assume(i32* %array) {
 ; CHECK-LABEL:@cannot_fold_use_before_assume
 ; CHECK: @f(i1 %notnull)
 ; CHECK-NEXT: exit()
 ; CHECK-NOT: assume
 ; CHECK-NEXT: ret void
   %notnull = icmp ne i32* %array, null
   call void @f(i1 %notnull)
   call void @exit()
   call void @llvm.assume(i1 %notnull)
   br i1 %notnull, label %normal, label %error
 
 normal:
   ret void
 
 error:
   store atomic i32 0, i32* @g unordered, align 4
   ret void
 }
 
-declare void @dummy(i1) nounwind argmemonly
+declare void @dummy(i1) noconvergent nounwind argmemonly
 define void @can_fold_some_use_before_assume(i32* %array) {
 
 ; CHECK-LABEL:@can_fold_some_use_before_assume
 ; CHECK: @f(i1 %notnull)
 ; CHECK-NEXT: @dummy(i1 true)
 ; CHECK-NOT: assume
 ; CHECK-NEXT: ret void
   %notnull = icmp ne i32* %array, null
normal:
   call void @f(i1 %notnull2)
   ret void
 
 error:
   store atomic i32 0, i32* @g unordered, align 4
   ret void
 }
 
-declare void @fz(i8)
+declare void @fz(i8) noconvergent
 ; FIXME: We can fold assume to true, and the use after assume, but we do not do so
 ; currently, because of the function call after the assume.
 define void @can_fold_assume2(i32* %array) {
 
 ; CHECK-LABEL:@can_fold_assume2
 ; CHECK: @f(i1 %notnull)
 ; CHECK-NEXT: assume(i1 %notnull)
 ; CHECK-NEXT: znotnull = zext i1 %notnull to i8
normal:
   call void @fz(i8 %znotnull)
   ret void
 
 error:
   store atomic i32 0, i32* @g unordered, align 4
   ret void
 }
 
-declare void @llvm.experimental.guard(i1, ...)
+declare void @llvm.experimental.guard(i1, ...) noconvergent
 ; FIXME: We can fold assume to true, but we do not do so
 ; because of the guard following the assume.
 define void @can_fold_assume3(i32* %array){
 
 ; CHECK-LABEL:@can_fold_assume3
 ; CHECK: @f(i1 %notnull)
 ; CHECK-NEXT: assume(i1 %notnull)
 ; CHECK-NEXT: guard(i1 %notnull)

 
 error:
   store atomic i32 0, i32* @g unordered, align 4
   ret void
 }
 ; Function Attrs: nounwind
 declare void @llvm.assume(i1) #1
 
-declare void @bar(...)
+declare void @bar(...) noconvergent
 
-declare void @car(...)
+declare void @car(...) noconvergent
 
-attributes #0 = { nounwind uwtable }
-attributes #1 = { nounwind }
+attributes #0 = { noconvergent nounwind uwtable }
+attributes #1 = { noconvergent nounwind }
 

llvm/test/Transforms/JumpThreading/basic.ll

 ; RUN: opt -jump-threading -S < %s | FileCheck %s
 
-declare i32 @f1()
-declare i32 @f2()
-declare void @f3()
+declare i32 @f1() noconvergent
+declare i32 @f2() noconvergent
+declare void @f3() noconvergent
 
 define i32 @test1(i1 %cond) {
 ; CHECK-LABEL: @test1(
 
   br i1 %cond, label %T1, label %F1
 
 T1:
   %v1 = call i32 @f1()
F2:
   ret i32 %B
 ; CHECK: F2:
 ; CHECK-NEXT: phi i32
 }
 
 ; In this test we check that block duplication is inhibited by the presence
 ; of a function with the 'noduplicate' attribute.
 
-declare void @g()
-declare void @j()
-declare void @k()
+declare void @g() noconvergent
+declare void @j() noconvergent
+declare void @k() noconvergent
 
 ; CHECK-LABEL: define void @h(i32 %p) {
 define void @h(i32 %p) {
   %x = icmp ult i32 %p, 5
   br i1 %x, label %l1, label %l2
 
 l1:
   call void @j()
l1:
   call void @j()
   br label %l3
 
 l2:
   call void @k()
   br label %l3
 
 l3:
-; CHECK: call void @g() [[$CON:#[0-9]+]]
+; CHECK: call void @g(){{$}}
 ; CHECK-NOT: call void @g() [[$CON]]
-  call void @g() convergent
+  call void @g()
   %y = icmp ult i32 %p, 5
   br i1 %y, label %l4, label %l5
 
 l4:
   call void @j()
   ret void
 
 l5:
   call void @k()
   ret void
 ; CHECK: }
 }
 
 
 ; CHECK: attributes [[$NOD]] = { noduplicate }
-; CHECK: attributes [[$CON]] = { convergent }

llvm/test/Transforms/JumpThreading/branch-no-const.ll

 ; RUN: opt < %s -jump-threading -S | not grep phi
 
-declare i8 @mcguffin()
+declare i8 @mcguffin() noconvergent
 
 define i32 @test(i1 %foo, i8 %b) {
 entry:
   %a = call i8 @mcguffin()
   br i1 %foo, label %bb1, label %bb2
 bb1:
   br label %jt
 bb2:

llvm/test/Transforms/JumpThreading/callbr-edge-split.ll

 if.then2:                                         ; preds = %if.end
   %call3 = call i32 @b()
   br label %if.end4
 
 if.end4:                                          ; preds = %if.then2, %if.end
   ret i32 undef
 }
 
-declare i32 @b()
+declare i32 @b() noconvergent

llvm/test/Transforms/JumpThreading/combine-metadata.ll

 ; RUN: opt < %s -jump-threading -S | FileCheck %s
 
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
 target triple = "i386-apple-darwin7"
 
-declare void @use(i32 *)
+declare void @use(i32 *) noconvergent
 
 ; Check that we propagate nonnull to dominated loads, when we find an available
 ; loaded value.
 ; CHECK-LABEL: @test1(
 ; CHECK-LABEL: ret1:
 ; CHECK-NEXT: %[[p1:.*]] = load i32*, i32** %ptr
 ; CHECK-NOT: !nonnull
 ; CHECK-NEXT: store i32 1, i32* %[[p1]]

llvm/test/Transforms/JumpThreading/compare.ll

 ; There should be no phi nodes left.
 ; RUN: opt < %s -jump-threading  -S | not grep "phi i32"
 
-declare i32 @f1()
-declare i32 @f2()
-declare void @f3()
+declare i32 @f1() noconvergent
+declare i32 @f2() noconvergent
+declare void @f3() noconvergent
 
 define i32 @test(i1 %cond) {
   br i1 %cond, label %T1, label %F1
 
 T1:
   %v1 = call i32 @f1()
   br label %Merge
 

llvm/test/Transforms/JumpThreading/crash.ll

 bb13:   ; preds = %bb
   br label %bb
 
 bb110:    ; preds = %bb
   %mrv_gr124 = extractvalue %struct.system__secondary_stack__mark_id %tmp120, 1    ; <i64> [#uses=0]
   unreachable
 }
 
-declare %struct.system__secondary_stack__mark_id @system__secondary_stack__ss_mark()
+declare %struct.system__secondary_stack__mark_id @system__secondary_stack__ss_mark() noconvergent
 
 
 
 define fastcc void @findratio(double* nocapture %res1, double* nocapture %res2) nounwind ssp {
 entry:
   br label %bb12
 
-bb6.us:                                        
-  %tmp = icmp eq i32 undef, undef              
-  %tmp1 = fsub double undef, undef             
-  %tmp2 = fcmp ult double %tmp1, 0.000000e+00  
+bb6.us:
+  %tmp = icmp eq i32 undef, undef
+  %tmp1 = fsub double undef, undef
+  %tmp2 = fcmp ult double %tmp1, 0.000000e+00
   br i1 %tmp, label %bb6.us, label %bb13
 
 
-bb12:                                            
-  %tmp3 = fcmp ult double undef, 0.000000e+00  
+bb12:
+  %tmp3 = fcmp ult double undef, 0.000000e+00
   br label %bb13
 
-bb13:                                            
+bb13:
   %.lcssa31 = phi double [ undef, %bb12 ], [ %tmp1, %bb6.us ]
-  %.lcssa30 = phi i1 [ %tmp3, %bb12 ], [ %tmp2, %bb6.us ] 
+  %.lcssa30 = phi i1 [ %tmp3, %bb12 ], [ %tmp2, %bb6.us ]
   br i1 %.lcssa30, label %bb15, label %bb61
 
-bb15:                                            
-  %tmp4 = fsub double -0.000000e+00, %.lcssa31   
+bb15:
+  %tmp4 = fsub double -0.000000e+00, %.lcssa31
   ret void
 
 
-bb61:                                            
+bb61:
   ret void
 }
 
 
 ; PR5258
 define i32 @test(i1 %cond, i1 %cond2, i32 %a) {
 A:
   br i1 %cond, label %F, label %A1
 F:
   br label %A1
 
-A1:  
+A1:
   %d = phi i1 [false, %A], [true, %F]
   %e = add i32 %a, %a
   br i1 %d, label %B, label %G
-  
 G:
   br i1 %cond2, label %B, label %D
-  
 B:
   %f = phi i32 [%e, %G], [%e, %A1]
   %b = add i32 0, 0
   switch i32 %a, label %C [
     i32 7, label %D
     i32 8, label %D
     i32 9, label %D
   ]
 
 C:
   br label %D
-  
 D:
   %c = phi i32 [%e, %B], [%e, %B], [%e, %B], [%f, %C], [%e, %G]
   ret i32 %c
 E:
   ret i32 412
 }
 
 

 }
 
 
 define fastcc void @test5(i1 %tmp, i32 %tmp1) nounwind ssp {
 entry:
   br i1 %tmp, label %bb12, label %bb13
 
 
-bb12:                                            
+bb12:
   br label %bb13
 
-bb13:                                            
+bb13:
   %.lcssa31 = phi i32 [ undef, %bb12 ], [ %tmp1, %entry ]
   %A = and i1 undef, undef
   br i1 %A, label %bb15, label %bb61
 
-bb15:                                            
+bb15:
   ret void
 
 
-bb61:                                            
+bb61:
   ret void
 }
 
 
 ; PR5640
 define fastcc void @test6(i1 %tmp, i1 %tmp1) nounwind ssp {
 entry:
   br i1 %tmp, label %bb12, label %bb14
 
-bb12:           
+bb12:
   br label %bb14
 
-bb14:           
+bb14:
   %A = phi i1 [ %A, %bb13 ],  [ true, %bb12 ], [%tmp1, %entry]
   br label %bb13
 
-bb13:                                            
+bb13:
   br i1 %A, label %bb14, label %bb61
 
 
-bb61:                                            
+bb61:
   ret void
 }
 
 
 ; PR5698
 define void @test7(i32 %x) {
 entry:
   br label %tailrecurse
 
 tailrecurse:
   switch i32 %x, label %return [
     i32 2, label %bb2
     i32 3, label %bb
   ]
 
-bb:         
+bb:
   switch i32 %x, label %return [
     i32 2, label %bb2
     i32 3, label %tailrecurse
   ]
 
-bb2:        
+bb2:
   ret void
 
-return:     
+return:
   ret void
 }
 
 ; PR6119
 define i32 @test8(i32 %action) nounwind {
 entry:
   switch i32 %action, label %lor.rhs [
     i32 1, label %if.then

 
 
 ; PR6305
 define void @test11() nounwind {
 entry:
   br label %A
 
 A:                                             ; preds = %entry
-  call void undef(i64 ptrtoint (i8* blockaddress(@test11, %A) to i64)) nounwind
+  call void undef(i64 ptrtoint (i8* blockaddress(@test11, %A) to i64)) noconvergent nounwind
   unreachable
 }
 
 ; PR6743
 define void @test12() nounwind ssp {
 entry:
   br label %lbl_51
 

 }
 
 
 
 ; PR7356
 define i32 @test13(i32* %P, i8* %Ptr) {
 entry:
   indirectbr i8* %Ptr, [label %BrBlock, label %B2]
-  
 B2:
   store i32 4, i32 *%P
   br label %BrBlock
 
 BrBlock:
   %L = load i32, i32* %P
   %C = icmp eq i32 %L, 42
   br i1 %C, label %T, label %F
-  
 T:
   ret i32 123
 F:
   ret i32 1422
 }
 
 
 ; PR7498

 if.end:                                           ; preds = %land.end69
   ret void
 }
 
 ; PR7647
 define void @test15() nounwind {
 entry:
   ret void
-  
 if.then237:
   br label %lbl_664
 
 lbl_596:                                          ; preds = %lbl_664, %for.end37
   store volatile i64 undef, i64* undef, align 4
   br label %for.cond111
 
 for.cond111:                                      ; preds = %safe_sub_func_int64_t_s_s.exit, %lbl_596
   %storemerge = phi i8 [ undef, %cond.true.i100 ], [ 22, %lbl_596 ] ; <i8> [#uses=1]
   %l_678.5 = phi i64 [ %l_678.3, %cond.true.i100 ], [ undef, %lbl_596 ] ; <i64> [#uses=2]
   %cmp114 = icmp slt i8 %storemerge, -2           ; <i1> [#uses=1]
   br i1 %cmp114, label %lbl_664, label %if.end949
 
 lbl_664:                                          ; preds = %for.end1058, %if.then237, %for.cond111
   %l_678.3 = phi i64 [ %l_678.5, %for.cond111 ], [ %l_678.2, %for.cond1035 ], [ 5, %if.then237 ] ; <i64> [#uses=1]
   %tobool118 = icmp eq i32 undef, 0               ; <i1> [#uses=1]
   br i1 %tobool118, label %cond.true.i100, label %lbl_596
 
 cond.true.i100:                                   ; preds = %for.inc120
   br label %for.cond111
 
 lbl_709:
   br label %if.end949
-  
 for.cond603:                                      ; preds = %for.body607, %if.end336
   br i1 undef, label %for.cond603, label %if.end949
 
 if.end949:                                        ; preds = %for.cond603, %lbl_709, %for.cond111
   %l_678.2 = phi i64 [ %l_678.5, %for.cond111 ], [ undef, %lbl_709 ], [ 5, %for.cond603 ] ; <i64> [#uses=1]
   br label %for.body1016
 
 for.body1016:                                     ; preds = %for.cond1012
entry:
   br i1 %c, label %land.end, label %land.rhs
 
 land.rhs:                                         ; preds = %entry
   br i1 %c2, label %lor.lhs.false.i, label %land.end
 
 lor.lhs.false.i:                                  ; preds = %land.rhs
   br i1 %c3, label %land.end, label %land.end
 
-land.end:                            
+land.end:
   %0 = phi i1 [ true, %entry ], [ false, %land.rhs ], [false, %lor.lhs.false.i], [false, %lor.lhs.false.i] ; <i1> [#uses=1]
-  %cmp12 = and i1 %cmp, %0 
+  %cmp12 = and i1 %cmp, %0
   %xor1 = xor i1 %cmp12, %c4
   br i1 %xor1, label %if.then, label %if.end
 
-if.then:                      
+if.then:
   ret void
 
-if.end:                       
+if.end:
   ret void
 }
 
 define void @test17() {
 entry:
   br i1 undef, label %bb269.us.us, label %bb269.us.us.us
 
 bb269.us.us.us:

 
 bb4:
   unreachable
 
 ur:
   unreachable
 }
 
-declare i8* @PR14233.f1()
+declare i8* @PR14233.f1() noconvergent
 
-declare i8* @PR14233.f2()
+declare i8* @PR14233.f2() noconvergent
 
 ; Make sure the following compiles in a sane amount of time, as opposed
 ; to taking exponential time.
 ; (CHECK to make sure the condition doesn't get simplified somehow;
 ; if it does, the testcase will need to be revised.)
 ; CHECK-LABEL: define void @almost_infinite_loop
 ; CHECK: %x39 = or i1 %x38, %x38
 ; CHECK: br i1 %x39, label %dest1, label %dest2

llvm/test/Transforms/JumpThreading/ddt-crash.ll

 ; RUN: opt < %s -jump-threading -disable-output
 
 %struct.ham = type { i8, i8, i16, i32 }
 %struct.zot = type { i32 (...)** }
 %struct.quux.0 = type { %struct.wombat }
 %struct.wombat = type { %struct.zot }
 
 @global = external global %struct.ham*, align 8
 @global.1 = external constant i8*
 
-declare i32 @wombat.2()
+declare i32 @wombat.2() noconvergent
 
 define void @blam() {
 bb:
   %tmp = load i32, i32* undef
   %tmp1 = icmp eq i32 %tmp, 0
   br i1 %tmp1, label %bb11, label %bb2
 
 bb2:
bb39:
   %tmp40 = load %struct.ham*, %struct.ham** @global
   br label %bb41
 
 bb41:
   %tmp42 = select i1 %tmp36, %struct.ham* undef, %struct.ham* undef
   ret void
 }
 
-declare i32 @foo(...)
+declare i32 @foo(...) noconvergent
 
 define void @zot() align 2 personality i8* bitcast (i32 (...)* @foo to i8*) {
 bb:
   invoke void @bar()
           to label %bb1 unwind label %bb3
 
 bb1:
   invoke void @bar()

 bb30:
   %tmp31 = icmp eq %struct.quux.0* %tmp24, null
   br i1 %tmp31, label %bb32, label %bb29
 
 bb32:
   unreachable
 }
 
-declare void @bar()
+declare void @bar() noconvergent

llvm/test/Transforms/JumpThreading/ddt-crash2.ll

 
 bb13:
   unreachable
 
 bb14:
   ret void
 }
 
-declare i32 @chrome2(...)
+declare i32 @chrome2(...) noconvergent

llvm/test/Transforms/JumpThreading/fold-not-thread.ll

 ; RUN: opt -jump-threading -S -verify < %s | FileCheck %s
 
-declare i32 @f1()
-declare i32 @f2()
-declare void @f3()
-declare void @f4(i32)
+declare i32 @f1() noconvergent
+declare i32 @f2() noconvergent
+declare void @f3() noconvergent
+declare void @f4(i32) noconvergent
 
 
 ; Make sure we update the phi node properly.
 ;
 ; CHECK-LABEL: define void @test_br_folding_not_threading_update_phi(
 ; CHECK: br label %L1
 ; Make sure we update the phi node properly here, i.e. we only have 2 predecessors, entry and L0
 ; CHECK: %res.0 = phi i32 [ 0, %L0 ], [ 1, %entry ]

 ; CHECK: L1:
 ; CHECK: call i32 @f2()
 ; CHECK: call void @f3()
 ; CHECK-NEXT: ret void
 ; CHECK-NOT: br
 ; CHECK: L3:
 define void @test_br_folding_not_threading(i1 %cond) nounwind {
 entry:
-  br i1 %cond, label %L0, label %L3 
+  br i1 %cond, label %L0, label %L3
 L0:
   call i32 @f2()
   call i32 @f2()
   call i32 @f2()
   call i32 @f2()
   call i32 @f2()
   call i32 @f2()
   call i32 @f2()
   call i32 @f2()
   call i32 @f2()
   call i32 @f2()
   call i32 @f2()
   call i32 @f2()
   call i32 @f2()
-  br i1 %cond, label %L1, label %L2 
+  br i1 %cond, label %L1, label %L2
 
 L1:
   call void @f3()
   ret void
 L2:
   call void @f3()
   ret void
 L3:

 ; CHECK-NEXT: ret void
 ; CHECK-NOT: br
 ; CHECK: L3:
 define void @test_br_folding_not_threading_multiple_preds(i1 %condx, i1 %cond) nounwind {
 entry:
   br i1 %condx, label %X0, label %X1
 
 X0:
-  br i1 %cond, label %L0, label %L3 
+  br i1 %cond, label %L0, label %L3
 
 X1:
-  br i1 %cond, label %L0, label %L3 
+  br i1 %cond, label %L0, label %L3
 
 L0:
   call i32 @f2()
   call i32 @f2()
   call i32 @f2()
   call i32 @f2()
   call i32 @f2()
   call i32 @f2()
   call i32 @f2()
   call i32 @f2()
   call i32 @f2()
   call i32 @f2()
   call i32 @f2()
   call i32 @f2()
   call i32 @f2()
-  br i1 %cond, label %L1, label %L2 
+  br i1 %cond, label %L1, label %L2
 
 L1:
   call void @f3()
   ret void
 L2:
   call void @f3()
   ret void
 L3:
   call void @f3()
   ret void
 }
 
 ; Make sure we can do the RAUW for %add...
 ;
 ; CHECK-LABEL: @rauw_if_possible(
 ; CHECK: call void @f4(i32 96)
 define void @rauw_if_possible(i32 %value) nounwind {
 entry:
   %cmp = icmp eq i32 %value, 32
-  br i1 %cmp, label %L0, label %L3 
+  br i1 %cmp, label %L0, label %L3
 L0:
   call i32 @f2()
   call i32 @f2()
   %add = add i32 %value, 64
   switch i32 %add, label %L3 [
     i32 32, label %L1
     i32 96, label %L2
     ]
 
 L1:
   call void @f3()
   ret void
 L2:
   call void @f4(i32 %add)
   ret void
 L3:
   call void @f3()
   ret void
 }
 
 ; Make sure we can NOT do the RAUW for %add...
 ;
 ; CHECK-LABEL: @rauw_if_possible2(
-; CHECK: call void @f4(i32 %add) 
+; CHECK: call void @f4(i32 %add)
 define void @rauw_if_possible2(i32 %value) nounwind {
 entry:
   %cmp = icmp eq i32 %value, 32
   %add = add i32 %value, 64
-  br i1 %cmp, label %L0, label %L2 
+  br i1 %cmp, label %L0, label %L2
 L0:
   call i32 @f2()
   call i32 @f2()
   switch i32 %add, label %L3 [
     i32 32, label %L1
     i32 96, label %L2
     ]
 

 }
 
 ; Make sure we can fold this branch ... We will not be able to thread it as
 ; L0 is too big to duplicate.
 ; We do not attempt to rewrite the indirectbr target here, but we still take
 ; its target after L0 into account and that enables us to fold.
 ;
 ; L2 is the unreachable block here.
-; 
+;
 ; CHECK-LABEL: @test_br_folding_not_threading_indirect_branch(
 ; CHECK: L1:
 ; CHECK: call i32 @f2()
 ; CHECK: call void @f3()
 ; CHECK-NEXT: ret void
 ; CHECK-NOT: br
 ; CHECK: L3:
 define void @test_br_folding_not_threading_indirect_branch(i1 %condx, i1 %cond) nounwind {

llvm/test/Transforms/JumpThreading/guards.ll

 ; RUN: opt < %s -jump-threading -dce -S | FileCheck %s
 
-declare void @llvm.experimental.guard(i1, ...)
+declare void @llvm.experimental.guard(i1, ...) noconvergent
 
-declare i32 @f1()
-declare i32 @f2()
+declare i32 @f1() noconvergent
+declare i32 @f2() noconvergent
 
 define i32 @branch_implies_guard(i32 %a) {
 ; CHECK-LABEL: @branch_implies_guard(
   %cond = icmp slt i32 %a, 10
   br i1 %cond, label %T1, label %F1
 
 T1:
 ; CHECK:       T1.split

 
 Exit:
 ; CHECK:       Merge:
 ; CHECK-NEXT:    call void (i1, ...) @llvm.experimental.guard(i1 %cond1) [ "deopt"() ]
 ; CHECK-NEXT:    ret void
   ret void
 }
 
-declare void @never_called(i1)
+declare void @never_called(i1) noconvergent
 
 ; LVI uses guard to identify value of %c2 in branch as true, we cannot replace that
 ; guard with guard(true & c1).
 define void @dont_fold_guard(i8* %addr, i32 %i, i32 %length) {
 ; CHECK-LABEL: dont_fold_guard
 ; CHECK: %wide.chk = and i1 %c1, %c2
 ; CHECK-NEXT: experimental.guard(i1 %wide.chk)
 ; CHECK-NEXT: call void @never_called(i1 true)
 ; CHECK-NEXT: ret void
   %c1 = icmp ult i32 %i, %length
   %c2 = icmp eq i32 %i, 0
   %wide.chk = and i1 %c1, %c2
   call void(i1, ...) @llvm.experimental.guard(i1 %wide.chk) [ "deopt"() ]
   br i1 %c2, label %BB1, label %BB2
 
 BB1:
   call void @never_called(i1 %c2)
   ret void
 
 BB2:
   ret void
 }
 
-declare void @dummy(i1) nounwind argmemonly
+declare void @dummy(i1) noconvergent nounwind argmemonly
 ; same as dont_fold_guard1 but there's a use immediately after guard and before
 ; branch. We can fold that use.
 define void @dont_fold_guard2(i8* %addr, i32 %i, i32 %length) {
 ; CHECK-LABEL: dont_fold_guard2
 ; CHECK: %wide.chk = and i1 %c1, %c2
 ; CHECK-NEXT: experimental.guard(i1 %wide.chk)
 ; CHECK-NEXT: dummy(i1 true)
 ; CHECK-NEXT: call void @never_called(i1 true)

 BB1:
   call void @never_called(i1 %cmp)
   ret void
 
 BB2:
   ret void
 }
 
-declare void @f(i1)
+declare void @f(i1) noconvergent
 ; Same as dont_fold_guard1 but use switch instead of branch.
 ; triggers source code `ProcessThreadableEdges`.
 define void @dont_fold_guard4(i1 %cmp1, i32 %i) nounwind {
-; CHECK-LABEL: dont_fold_guard4 
+; CHECK-LABEL: dont_fold_guard4
 ; CHECK-LABEL: L2:
-; CHECK-NEXT: %cmp = icmp eq i32 %i, 0 
+; CHECK-NEXT: %cmp = icmp eq i32 %i, 0
 ; CHECK-NEXT: guard(i1 %cmp)
 ; CHECK-NEXT: dummy(i1 true)
 ; CHECK-NEXT: @f(i1 true)
 ; CHECK-NEXT: ret void
 entry:
-  br i1 %cmp1, label %L0, label %L3 
+  br i1 %cmp1, label %L0, label %L3
 L0:
   %cmp = icmp eq i32 %i, 0
   call void(i1, ...) @llvm.experimental.guard(i1 %cmp) [ "deopt"() ]
   call void @dummy(i1 %cmp)
   switch i1 %cmp, label %L3 [
     i1 false, label %L1
     i1 true, label %L2
     ]

llvm/test/Transforms/JumpThreading/header-succ.ll

 ; RUN: opt -S -jump-threading < %s | FileCheck %s
 
 ; Check that the heuristic for avoiding accidental introduction of irreducible
 ; loops doesn't also prevent us from threading simple constructs where this
 ; isn't a problem.
 
-declare void @opaque_body()
+declare void @opaque_body() noconvergent
 
 define void @jump_threading_loopheader() {
 ; CHECK-LABEL: @jump_threading_loopheader
 top:
     br label %entry
 
 entry:
     %ind = phi i32 [0, %top], [%nextind, %latch]

llvm/test/Transforms/JumpThreading/implied-cond.ll

 ; RUN: opt -jump-threading -S < %s | FileCheck %s
 
-declare void @side_effect(i32)
+declare void @side_effect(i32) noconvergent
 
 define void @test0(i32 %i, i32 %len) {
 ; CHECK-LABEL: @test0(
  entry:
   call void @side_effect(i32 0)
   %i.inc = add nuw i32 %i, 1
   %c0 = icmp ult i32 %i.inc, %len
   br i1 %c0, label %left, label %right

 
 if.end:
   br label %if.end3
 
 if.end3:
   ret void
 }
 
-declare void @is(i1)
+declare void @is(i1) noconvergent
 
 ; If A >=s B is false then A <=s B is implied true.
 ; CHECK-LABEL: @test_sge_sle
 ; CHECK: call void @is(i1 true)
 ; CHECK-NOT: call void @is(i1 false)
 define void @test_sge_sle(i32 %a, i32 %b) {
   %cmp1 = icmp sge i32 %a, %b
   br i1 %cmp1, label %untaken, label %taken

llvm/test/Transforms/JumpThreading/indirectbr.ll

 ; RUN: opt -S < %s -jump-threading | FileCheck %s
 
 ; Keep block addresses alive.
 @addresses = constant [4 x i8*] [
   i8* blockaddress(@test1, %L1), i8* blockaddress(@test1, %L2),
   i8* blockaddress(@test2, %L1), i8* blockaddress(@test2, %L2)
 ]
 
-declare void @bar()
-declare void @baz()
+declare void @bar() noconvergent
+declare void @baz() noconvergent
 
 
 
 ; Check basic jump threading for indirectbr instructions.
 
 ; CHECK: void @test1
 ; CHECK: br i1 %tobool, label %L1, label %indirectgoto
 ; CHECK-NOT: if.else:
__here1:                                          ; preds = %__here
   %call2 = call i32 (...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64 ptrtoint (i8* blockaddress(@test3, %__here1) to i64)) nounwind noredzone
   br label %__here3
 
 __here3:                                          ; preds = %__here1
   %call4 = call i32 (...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64 ptrtoint (i8* blockaddress(@test3, %__here3) to i64)) nounwind noredzone
   ret void
 }
 
-declare i32 @printf(...) noredzone
+declare i32 @printf(...) noconvergent noredzone

llvm/test/Transforms/JumpThreading/landing-pad.ll

 define void @_ZN1DC2Ev(%class.D* nocapture %this) unnamed_addr uwtable align 2 {
 entry:
   call void @_ZN24CompositeEditCommandImplC2Ev()
   %0 = getelementptr inbounds %class.D, %class.D* %this, i64 0, i32 0, i32 0, i32 0
   store i32 (...)** bitcast (i8** getelementptr inbounds ([3 x i8*], [3 x i8*]* @_ZTV1D, i64 0, i64 2) to i32 (...)**), i32 (...)*** %0, align 8
   ret void
 }
 
-declare void @_ZN24CompositeEditCommandImplC2Ev() #1
+declare void @_ZN24CompositeEditCommandImplC2Ev() noconvergent
 
 define void @_ZN1D7doApplyEv(%class.D* nocapture %this) unnamed_addr nounwind readnone uwtable align 2 {
 entry:
   ret void
 }
 
 define void @_Z3fn1v() uwtable personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
 entry:
entry:
   store %class.D* %p1, %class.D** %m_ptr.i, align 8
   %_ref.i.i = getelementptr inbounds %class.D, %class.D* %p1, i64 0, i32 0, i32 0, i32 1, i32 0, i32 0
   %0 = load i32, i32* %_ref.i.i, align 4
   %inc.i.i = add nsw i32 %0, 1
   store i32 %inc.i.i, i32* %_ref.i.i, align 4
   ret void
 }
 
-declare noalias i8* @_Znwm()
+declare noalias i8* @_Znwm() noconvergent
 
-declare i32 @__gxx_personality_v0(...)
+declare i32 @__gxx_personality_v0(...) noconvergent
 
-declare void @_ZdlPv()
+declare void @_ZdlPv() noconvergent
 
 define %class.D* @_ZN1BI1DEptEv(%class.B* nocapture readonly %this) nounwind readonly uwtable align 2 {
 entry:
   %m_ptr = getelementptr inbounds %class.B, %class.B* %this, i64 0, i32 0
   %0 = load %class.D*, %class.D** %m_ptr, align 8
   ret %class.D* %0
 }
 
-declare void @_ZN1D16deleteKeyPressedEv()
+declare void @_ZN1D16deleteKeyPressedEv() noconvergent
 
 define void @_ZN1BI1DED1Ev(%class.B* nocapture readonly %this) unnamed_addr uwtable align 2 {
 entry:
   %m_ptr.i = getelementptr inbounds %class.B, %class.B* %this, i64 0, i32 0
   %0 = load %class.D*, %class.D** %m_ptr.i, align 8
   %_ref.i.i = getelementptr inbounds %class.D, %class.D* %0, i64 0, i32 0, i32 0, i32 1, i32 0, i32 0
   %1 = load i32, i32* %_ref.i.i, align 4
   %tobool.i.i = icmp eq i32 %1, 0
   br i1 %tobool.i.i, label %_ZN1BI1DED2Ev.exit, label %if.then.i.i
 
 if.then.i.i:                                      ; preds = %entry
   br i1 undef, label %_ZN1BI1DED2Ev.exit, label %delete.notnull.i.i
 
 delete.notnull.i.i:                               ; preds = %if.then.i.i
   call void @_ZdlPv() #9
   unreachable
 
 _ZN1BI1DED2Ev.exit:                               ; preds = %entry, %if.then.i.i
   ret void
 }
 
-declare hidden void @__clang_call_terminate()
+declare hidden void @__clang_call_terminate() noconvergent
 
 define void @_ZN1BI1DED2Ev(%class.B* nocapture readonly %this) unnamed_addr uwtable align 2 {
 entry:
   %m_ptr = getelementptr inbounds %class.B, %class.B* %this, i64 0, i32 0
   %0 = load %class.D*, %class.D** %m_ptr, align 8
   %_ref.i = getelementptr inbounds %class.D, %class.D* %0, i64 0, i32 0, i32 0, i32 1, i32 0, i32 0
   %1 = load i32, i32* %_ref.i, align 4
   %tobool.i = icmp eq i32 %1, 0

llvm/test/Transforms/JumpThreading/lvi-load.ll

bb:                                               ; preds = %_ZN4llvm8dyn_castINS_11InstructionEPNS_5ValueEEENS_10cast_rettyIT_T0_E8ret_typeERKS6_.exit
   tail call void @_ZNK4llvm5Value4dumpEv(%"struct.llvm::Value"* %V)
 ; CHECK: ret
   ret i8 1
 
 bb2:                                              ; preds = %entry, %_ZN4llvm8dyn_castINS_11InstructionEPNS_5ValueEEENS_10cast_rettyIT_T0_E8ret_typeERKS6_.exit
   ret i8 0
 }
 
-declare void @__assert_rtn(i8*, i8*, i32, i8*) noreturn
+declare void @__assert_rtn(i8*, i8*, i32, i8*) noconvergent noreturn
 
-declare void @_ZNK4llvm5Value4dumpEv(%"struct.llvm::Value"*)
+declare void @_ZNK4llvm5Value4dumpEv(%"struct.llvm::Value"*) noconvergent

llvm/test/Transforms/JumpThreading/lvi-tristate.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -jump-threading -simplifycfg -S < %s | FileCheck %s
-declare void @ham()
+declare void @ham() noconvergent
 
 define void @hoge() {
 ; CHECK-LABEL: @hoge(
 ; CHECK-NEXT:  bb:
 ; CHECK-NEXT:    [[TMP:%.*]] = and i32 undef, 1073741823
 ; CHECK-NEXT:    [[COND:%.*]] = icmp eq i32 [[TMP]], 5
 ; CHECK-NEXT:    br i1 [[COND]], label [[BB10:%.*]], label [[BB13:%.*]]
 ; CHECK:       bb10:

llvm/test/Transforms/JumpThreading/or-undef.ll

bb8:                                              ; preds = %bb6
   %tmp14 = call i64 @f5(i8* %tmp13) nounwind      ; <i64> [#uses=0]
   br label %bb9
 
 bb9:                                              ; preds = %bb8, %bb7
   call void @f4(i8* %tmp) nounwind
   ret void
 }
 
-declare noalias i8** @buildargv(i8*)
+declare noalias i8** @buildargv(i8*) noconvergent
 
-declare void @f2(i8**)
+declare void @f2(i8**) noconvergent
 
-declare void @f4(i8*)
+declare void @f4(i8*) noconvergent
 
-declare i8* @f3(void (i8*)*, i8*)
+declare i8* @f3(void (i8*)*, i8*) noconvergent
 
-declare void @f1()
+declare void @f1() noconvergent
 
-declare i64 @f5(i8*)
+declare i64 @f5(i8*) noconvergent

llvm/test/Transforms/JumpThreading/phi-eq.ll

 ; RUN: opt < %s -jump-threading -S | FileCheck %s
 ; Test whether two consecutive switches with identical structures assign the
-; proper value to the proper variable.  This is really testing 
-; Instruction::isIdenticalToWhenDefined, as previously that function was 
-; returning true if the value part of the operands of two phis were identical, 
+; proper value to the proper variable.  This is really testing
+; Instruction::isIdenticalToWhenDefined, as previously that function was
+; returning true if the value part of the operands of two phis were identical,
 ; even if the incoming blocks were not.
 ; NB: this function should be pruned down more.
 
 %struct._GList = type { i8*, %struct._GList*, %struct._GList* }
 %struct.filter_def = type { i8*, i8* }
 
 @capture_filters = external hidden global %struct._GList*, align 8
 @display_filters = external hidden global %struct._GList*, align 8
 @.str2 = external hidden unnamed_addr constant [10 x i8], align 1
 @__PRETTY_FUNCTION__.copy_filter_list = external hidden unnamed_addr constant [62 x i8], align 1
 @.str12 = external hidden unnamed_addr constant [22 x i8], align 1
 @.str13 = external hidden unnamed_addr constant [31 x i8], align 1
 @capture_edited_filters = external hidden global %struct._GList*, align 8
 @display_edited_filters = external hidden global %struct._GList*, align 8
 @__PRETTY_FUNCTION__.get_filter_list = external hidden unnamed_addr constant [44 x i8], align 1
 
-declare void @g_assertion_message(i8*, i8*, i32, i8*, i8*) noreturn
+declare void @g_assertion_message(i8*, i8*, i32, i8*, i8*) noconvergent noreturn
 
-declare void @g_free(i8*)
+declare void @g_free(i8*) noconvergent
 
-declare %struct._GList* @g_list_first(%struct._GList*)
+declare %struct._GList* @g_list_first(%struct._GList*) noconvergent
 
-declare noalias i8* @g_malloc(i64)
+declare noalias i8* @g_malloc(i64) noconvergent
 
 define void @copy_filter_list(i32 %dest_type, i32 %src_type) nounwind uwtable ssp {
 entry:
   br label %do.body
 
 do.body:                                          ; preds = %entry
   %cmp = icmp ne i32 %dest_type, %src_type
   br i1 %cmp, label %if.then, label %if.else

 cond.end:                                         ; preds = %cond.false, %cond.true
   %cond = phi %struct._GList* [ %19, %cond.true ], [ null, %cond.false ]
   br label %while.cond11
 
 while.end16:                                      ; preds = %while.cond11
   ret void
 }
 
-declare void @g_assertion_message_expr(i8*, i8*, i32, i8*, i8*) noreturn
+declare void @g_assertion_message_expr(i8*, i8*, i32, i8*, i8*) noconvergent noreturn
 
-declare i32 @g_list_length(%struct._GList*)
+declare i32 @g_list_length(%struct._GList*) noconvergent
 
-declare noalias i8* @g_strdup(i8*)
+declare noalias i8* @g_strdup(i8*) noconvergent
 
-declare %struct._GList* @g_list_append(%struct._GList*, i8*)
+declare %struct._GList* @g_list_append(%struct._GList*, i8*) noconvergent
 
-declare %struct._GList* @g_list_remove_link(%struct._GList*, %struct._GList*)
+declare %struct._GList* @g_list_remove_link(%struct._GList*, %struct._GList*) noconvergent

llvm/test/Transforms/JumpThreading/phi-known.ll

loop:
   %cmp1 = icmp eq i8* %p1, null
   br i1 %cmp1, label %exit, label %backedge
 backedge:
 ; CHECK-LABEL: backedge:
 ; CHECK-NEXT: phi
 ; CHECK-NEXT: bitcast
 ; CHECK-NEXT: load
 ; CHECK-NEXT: cmp
-; CHECK-NEXT: br 
+; CHECK-NEXT: br
 ; CHECK-DAG: label %backedge
   %addr = bitcast i8* %p1 to i8**
   %p2 = load i8*, i8** %addr
   %cmp2 = icmp eq i8* %p2, null
   br i1 %cmp2, label %exit, label %loop
 exit:
   ret void
 }
; CHECK-NEXT: br i1 %cmp1
   br i1 %cmp1, label %exit, label %loop
 exit:
   ret void
 }
 
 ; The eq predicate is always true if we go through the path from
 ; L1 to L3, no matter the phi result %t5 is on the lhs or rhs of
 ; the predicate.
-declare void @goo()
-declare void @hoo()
+declare void @goo() noconvergent
+declare void @hoo() noconvergent
 
 define void @test3(i32 %m, i32** %t1) {
 L1:
   %t0 = add i32 %m, 7
   %t2 = load i32*, i32** %t1, align 8
 ; CHECK-LABEL: @test3
 ; CHECK: %t3 = icmp eq i32* %t2, null
 ; CHECK: br i1 %t3, label %[[LABEL2:.*]], label %[[LABEL1:.*]]

llvm/test/Transforms/JumpThreading/pr26096.ll

 cond.end4:                                        ; preds = %cond.end
   call void @__assert_fail(i8* null)
   unreachable
 
 for.end:                                          ; No predecessors!
   ret void
 }
 
-declare void @__assert_fail(i8*)
+declare void @__assert_fail(i8*) noconvergent
 
 ; Function Attrs: noreturn nounwind
 declare void @llvm.trap() #0
 
-attributes #0 = { noreturn nounwind }
+attributes #0 = { noconvergent noreturn nounwind }

llvm/test/Transforms/JumpThreading/pr27840.ll

 ; RUN: opt -jump-threading -S < %s | FileCheck %s
 
 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-apple-macosx10.11.0"
 
-declare void @helper()
-declare i32 @__gxx_personality_v0(...)
+declare void @helper() noconvergent
+declare i32 @__gxx_personality_v0(...) noconvergent
 
 
 define void @pr27840(i8* %call, i1 %A) personality i32(...)* @__gxx_personality_v0 {
 entry:
   invoke void @helper()
           to label %invoke.cont unwind label %lpad
 
 ; Don't jump threading; we can't split the critical edge from entry to lpad.

llvm/test/Transforms/JumpThreading/pr33917.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -jump-threading -correlated-propagation %s -S | FileCheck %s
 
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
 
-declare i8* @foo()
+declare i8* @foo() noconvergent
 
-declare i32 @rust_eh_personality() unnamed_addr
+declare i32 @rust_eh_personality() unnamed_addr noconvergent
 
 ; Function Attrs: nounwind
 declare void @llvm.assume(i1) #0
 
 define void @patatino() personality i32 ()* @rust_eh_personality {
 ; CHECK-LABEL: @patatino(
 ; CHECK-NEXT:  bb9:
 ; CHECK-NEXT:    [[T9:%.*]] = invoke i8* @foo()

llvm/test/Transforms/JumpThreading/range-compare.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ;RUN: opt < %s -jump-threading -S | FileCheck %s
 
 
-declare void @bar(...)
-declare void @baz(...)
+declare void @bar(...) noconvergent
+declare void @baz(...) noconvergent
 
 ; Make sure we thread the end of the bar block to the end of the function.
 define void @test1(i32 %x) {
 ; CHECK-LABEL: @test1(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], 9
 ; CHECK-NEXT:    br i1 [[CMP]], label [[IF_END_THREAD:%.*]], label [[IF_END:%.*]]
 ; CHECK:       if.end.thread:

llvm/test/Transforms/JumpThreading/select.ll

 ; RUN: opt -S -jump-threading < %s | FileCheck %s
 
-declare void @foo()
-declare void @bar()
-declare void @baz()
-declare void @quux()
+declare void @foo() noconvergent
+declare void @bar() noconvergent
+declare void @baz() noconvergent
+declare void @quux() noconvergent
 
 
 ; Jump threading of branch with select as condition.
 ; Mostly theoretical since instruction combining simplifies all selects of
 ; booleans where at least one operand is true/false/undef.
 
 ; CHECK-LABEL: @test_br(
 ; CHECK-NEXT: entry:

llvm/test/Transforms/JumpThreading/stale-loop-info-after-unfold-select.ll

func1.exit:                  ; preds = %if.end.i, %while.cond, %while.cond
   %retval.0.i = phi i32 [ 9, %if.end.i ], [ 0, %while.cond ], [ 0, %while.cond ]
   %call2 = tail call signext i32 @func3(i32 signext %retval.0.i, i32 signext 1, i32 signext 3)
   %cmp = icmp slt i32 %call2, 1
   %add = add nsw i32 %call2, 2
   %month.0.be = select i1 %cmp, i32 %add, i32 %call2
   br label %while.cond
 }
 
-declare i32 @func3(i32, i32, i32)
+declare i32 @func3(i32, i32, i32) noconvergent
 

llvm/test/Transforms/JumpThreading/static-profile.ll

 ;      \             |
 ;       `--------- latch
 ;                    |
 ;               (back edge)
 ;
 ; As a result, the loop exit edge ends up with 0 frequency which in turn makes
 ; the loop header to have maximum frequency.
 
-declare void @bar()
+declare void @bar() noconvergent
 
 define void @foo(i32 *%p, i32 %n) !prof !0 {
 entry:
   %enter_loop = icmp eq i32 %n, 0
   br i1 %enter_loop, label %exit, label %check_1, !prof !1
 ; CHECK: br i1 %enter_loop, label %exit, label %check_1, !prof !1
 
 check_1:

llvm/test/Transforms/JumpThreading/thread-cmp.ll

 ; RUN: opt -S -jump-threading %s | FileCheck %s
-; When simplify a branch based on LVI predicates, we should replace the 
+; When simplify a branch based on LVI predicates, we should replace the
 ; comparison itself with a constant (when possible) in case it's otherwise used.
 
 define i32 @test(i32* %p) {
 ; CHECK-LABEL: @test
 ; CHECK: icmp eq
 ; CHECK-NEXT: br i1 %cmp, label %exit2, label %exit1
 ; CHECK-NOT: icmp ne
 entry:
   %cmp = icmp eq i32* %p, null
   br i1 %cmp, label %is_null, label %not_null
 is_null:
   %cmp2 = icmp ne i32* %p, null
   br i1 %cmp2, label %exit1, label %exit2
 not_null:
   %cmp3 = icmp ne i32* %p, null
   br i1 %cmp3, label %exit1, label %exit2
 exit1:
   ret i32 0
 exit2:
   ret i32 1
 }
 
-declare void @use(i1)
+declare void @use(i1) noconvergent
 
-; It would not be legal to replace %cmp2 (well, in this case it actually is, 
+; It would not be legal to replace %cmp2 (well, in this case it actually is,
 ; but that's a CSE problem, not a LVI/jump threading problem)
 define i32 @test_negative(i32* %p) {
 ; CHECK-LABEL: @test
 ; CHECK: icmp ne
 ; CHECK: icmp eq
 ; CHECK-NEXT: br i1 %cmp, label %exit2, label %exit1
 ; CHECK-NOT: icmp ne
 entry:

llvm/test/Transforms/JumpThreading/thread-loads.ll

 ; RUN: opt < %s -jump-threading -S | FileCheck %s
 ; RUN: opt < %s -aa-pipeline=basic-aa -passes=jump-threading -S | FileCheck %s
 
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
 target triple = "i386-apple-darwin7"
 
 ; Test that we can thread through the block with the partially redundant load (%2).
 ; rdar://6402033
-define i32 @test1(i32* %P) nounwind {
+define i32 @test1(i32* %P) noconvergent nounwind {
 ; CHECK-LABEL: @test1(
 entry:
   %0 = tail call i32 (...) @f1() nounwind    ; <i32> [#uses=1]
   %1 = icmp eq i32 %0, 0    ; <i1> [#uses=1]
   br i1 %1, label %bb1, label %bb
 
 bb:   ; preds = %entry
 ; CHECK: bb1.thread:

 
 bb3:    ; preds = %bb1
 ; CHECK: bb3:
 ; CHECK: %res.02 = phi i32 [ 1, %bb1.thread ], [ 0, %bb1 ]
 ; CHECK: ret i32 %res.02
   ret i32 %res.0
 }
 
-declare i32 @f1(...)
+declare i32 @f1(...) noconvergent
 
-declare i32 @f2(...)
+declare i32 @f2(...) noconvergent
 
 
 ;; Check that we preserve TBAA information.
 ; rdar://11039258
 
-define i32 @test2(i32* %P) nounwind {
+define i32 @test2(i32* %P) noconvergent nounwind {
 ; CHECK-LABEL: @test2(
 entry:
   %0 = tail call i32 (...) @f1() nounwind    ; <i32> [#uses=1]
   %1 = icmp eq i32 %0, 0    ; <i1> [#uses=1]
   br i1 %1, label %bb1, label %bb
 
 bb:   ; preds = %entry
 ; CHECK: bb1.thread:

 
 bb3:    ; preds = %bb1
 ; CHECK: bb3:
 ; CHECK: %res.02 = phi i32 [ 1, %bb1.thread ], [ 0, %bb1 ]
 ; CHECK: ret i32 %res.02
   ret i32 %res.0
 }
 
-define i32 @test3(i8** %x, i1 %f) {
+define i32 @test3(i8** %x, i1 %f) noconvergent {
 ; Correctly thread loads of different (but compatible) types, placing bitcasts
 ; as necessary in the predecessors. This is especially tricky because the same
 ; predecessor ends up with two entries in the PHI node and they must share
 ; a single cast.
 ; CHECK-LABEL: @test3(
 entry:
   %0 = bitcast i8** %x to i32**
   %1 = load i32*, i32** %0, align 8

 
 if.then60:
   ret i32 42
 
 return:
   ret i32 13
 }
 
-define i32 @test4(i32* %P) {
+define i32 @test4(i32* %P) noconvergent {
 ; CHECK-LABEL: @test4(
 entry:
   %v0 = tail call i32 (...) @f1()
   %v1 = icmp eq i32 %v0, 0
   br i1 %v1, label %bb1, label %bb
 
 bb:
 ; CHECK: bb1.thread:

 bb2:
   %v4 = tail call i32 (...) @f2()
   ret i32 %res.0
 
 bb3:
   ret i32 %res.0
 }
 
-define i32 @test5(i32* %P) {
+define i32 @test5(i32* %P) noconvergent {
 ; Negative test
 
 ; CHECK-LABEL: @test5(
 entry:
   %v0 = tail call i32 (...) @f1()
   %v1 = icmp eq i32 %v0, 0
   br i1 %v1, label %bb1, label %bb
 

 bb2:
   %v4 = tail call i32 (...) @f2()
   ret i32 %res.0
 
 bb3:
   ret i32 %res.0
 }
 
-define i32 @test6(i32* %P) {
+define i32 @test6(i32* %P) noconvergent {
 ; Negative test
 
 ; CHECK-LABEL: @test6(
 entry:
   %v0 = tail call i32 (...) @f1()
   %v1 = icmp eq i32 %v0, 0
   br i1 %v1, label %bb1, label %bb
 

 bb2:
   %v4 = tail call i32 (...) @f2()
   ret i32 %res.0
 
 bb3:
   ret i32 %res.0
 }
 
-define i32 @test7(i32* %P) {
+define i32 @test7(i32* %P) noconvergent {
 ; Negative test
 
 ; CHECK-LABEL: @test7(
 entry:
   %v0 = tail call i32 (...) @f1()
   %v1 = icmp eq i32 %v0, 0
   br i1 %v1, label %bb1, label %bb
 

 
 bb3:
   ret i32 %res.0
 }
 
 ; Make sure we merge the aliasing metadata. We keep the range metadata for the
 ; first load, as it dominates the second load. Hence we can eliminate the
 ; branch.
-define void @test8(i32*, i32*, i32*) {
+define void @test8(i32*, i32*, i32*) noconvergent{
 ; CHECK-LABEL: @test8(
 ; CHECK: %a = load i32, i32* %0, !range ![[RANGE4:[0-9]+]]
 ; CHECK-NEXT: store i32 %a
 ; CHECK-NEXT: %xxx = tail call i32 (...) @f1()
 ; CHECK-NEXT: ret void
   %a = load i32, i32* %0, !tbaa !0, !range !4, !alias.scope !9, !noalias !10
   %b = load i32, i32* %0, !range !5
   store i32 %a, i32* %1
   %c = icmp eq i32 %b, 8
   br i1 %c, label %ret1, label %ret2
 
 ret1:
   ret void
 
 ret2:
   %xxx = tail call i32 (...) @f1() nounwind
   ret void
 }
 
 ; Make sure we merge/PRE aliasing metadata correctly.  That means that
 ; we need to remove metadata from the existing load, and add appropriate
 ; metadata to the newly inserted load.
-define void @test9(i32*, i32*, i32*, i1 %c) {
+define void @test9(i32*, i32*, i32*, i1 %c) noconvergent {
 ; CHECK-LABEL: @test9(
   br i1 %c, label %d1, label %d2
 
 ; CHECK: d1:
 ; CHECK-NEXT: %a = load i32, i32* %0{{$}}
 d1:
   %a = load i32, i32* %0, !range !4, !alias.scope !9, !noalias !10
   br label %d3

 ret1:
   ret void
 
 ret2:
   %xxx = tail call i32 (...) @f1() nounwind
   ret void
 }
 
-define i32 @fn_noalias(i1 %c2,i64* noalias %P, i64* noalias %P2) {
+define i32 @fn_noalias(i1 %c2,i64* noalias %P, i64* noalias %P2) noconvergent {
 ; CHECK-LABEL: @fn_noalias
 ; CHECK-LABEL: cond1:
 ; CHECK: %[[LD1:.*]] = load i64, i64* %P
 ; CHECK: br i1 %c, label %[[THREAD:.*]], label %end
 ; CHECK-LABEL: cond2:
 ; CHECK: %[[LD2:.*]] = load i64, i64* %P
 ; CHECK-LABEL: cond3:
 ; CHECK: %[[PHI:.*]] = phi i64 [ %[[LD1]], %[[THREAD]] ], [ %[[LD2]], %cond2 ]

 ; %sw.bb21.i. To make this happen, %l2 should be detected as a partically
 ; redundant load with %l3 across the store to %phase in %sw.bb21.i.
 
 %struct.NEXT_MOVE = type { i32, i32, i32* }
 @hash_move = unnamed_addr global [65 x i32] zeroinitializer, align 4
 @current_move = internal global [65 x i32] zeroinitializer, align 4
 @last = internal unnamed_addr global [65 x i32*] zeroinitializer, align 8
 @next_status = internal unnamed_addr global [65 x %struct.NEXT_MOVE] zeroinitializer, align 8
-define fastcc i32 @Search(i64 %idxprom.i, i64 %idxprom.i89, i32 %c) {
+define fastcc i32 @Search(i64 %idxprom.i, i64 %idxprom.i89, i32 %c) noconvergent {
 ; CHECK-LABEL: @Search
 ; CHECK-LABEL: sw.bb.i:
 ; CHECK: %[[LD1:.*]] = load i32, i32* %arrayidx185, align 4
 ; CHECK: %[[C1:.*]] = icmp eq i32 %[[LD1]], 0
 ; CHECK: br i1 %[[C1]], label %sw.bb21.i.thread, label %if.then.i64
 ; CHECK-LABEL: sw.bb21.i.thread:
 ; CHECK: br label %[[THREAD_TO:.*]]
 ; CHECK-LABEL: sw.bb21.i:
do.body.preheader.i67:
   call void @f67()
   ret  i32 67
 
 cleanup:
   call void @Cleanup()
   ret  i32 0
 }
 
-declare fastcc i32* @GenerateCheckEvasions()
-declare fastcc i32 @ValidMove(i32 %move)
-declare void @f67()
-declare void @Cleanup()
-declare void @f65()
+declare fastcc i32* @GenerateCheckEvasions() noconvergent
+declare fastcc i32 @ValidMove(i32 %move) noconvergent
+declare void @f67() noconvergent
+declare void @Cleanup() noconvergent
+declare void @f65() noconvergent
 
-define i32 @fn_SinglePred(i1 %c2,i64* %P) {
+define i32 @fn_SinglePred(i1 %c2,i64* %P) noconvergent {
 ; CHECK-LABEL: @fn_SinglePred
 ; CHECK-LABEL: entry:
 ; CHECK: %[[L1:.*]] = load i64, i64* %P
 ; CHECK: br i1 %c, label %cond3, label %cond1
 ; CHECK-LABEL: cond2:
 ; CHECK-NOT: load
 ; CHECK: %[[PHI:.*]] = phi i64 [ %[[L1]], %cond1 ]
 ; CHECK: call void @fn2(i64 %[[PHI]])

 cond3:
   call void @fn3(i64 %l2)
   br label %end
 
 end:
   ret i32 0
 }
 
-define i32 @fn_SinglePredMultihop(i1 %c1, i1 %c2,i64* %P) {
+define i32 @fn_SinglePredMultihop(i1 %c1, i1 %c2,i64* %P) noconvergent {
 ; CHECK-LABEL: @fn_SinglePredMultihop
 ; CHECK-LABEL: entry:
 ; CHECK: %[[L1:.*]] = load i64, i64* %P
 ; CHECK: br i1 %c0, label %cond3, label %cond0
 ; CHECK-LABEL: cond2:
 ; CHECK-NOT: load
 ; CHECK: %[[PHI:.*]] = phi i64 [ %[[L1]], %cond1 ]
 ; CHECK: call void @fn2(i64 %[[PHI]])

 cond3:
   call void @fn3(i64 %l2)
   br label %end
 
 end:
   ret i32 0
 }
 
-declare void @fn2(i64)
-declare void @fn3(i64)
+declare void @fn2(i64) noconvergent
+declare void @fn3(i64) noconvergent
 
 
 ; Make sure we phi-translate and make the partially redundant load in
 ; merge fully redudant and then we can jump-thread the block with the
 ; store.
 ;
 ; CHECK-LABEL: define i32 @phi_translate_partial_redundant_loads(i32 %0, i32* %1, i32* %2
 ; CHECK: merge.thread:
 ; CHECK: store
 ; CHECK: br label %left_x
 ;
 ; CHECK: left_x:
 ; CHECK-NEXT: ret i32 20
-define i32 @phi_translate_partial_redundant_loads(i32, i32*, i32*)  {
+define i32 @phi_translate_partial_redundant_loads(i32, i32*, i32*) noconvergent {
   %cmp0 = icmp ne i32 %0, 0
   br i1 %cmp0, label %left, label %right
 
 left:
   store i32 1, i32* %1, align 4
   br label %merge
 
 right:

llvm/test/Transforms/JumpThreading/threading_prof1.ll

 define void @test_single_pred1() {
 ; CHECK-LABEL: @test_single_pred1()
 bb:
   %tmp = call i32 @a()
   %tmp1 = icmp eq i32 %tmp, 1
   br i1 %tmp1, label %bb5_1, label %bb2
 ; CHECK: br i1 %tmp1,{{.*}} !prof ![[PROF1:[0-9]+]]
 
-bb5_1:                                             
+bb5_1:
   br label %bb5;
 
-bb2:                                              
+bb2:
   %tmp3 = call i32 @b()
   %tmp4 = icmp ne i32 %tmp3, 1
   br label %bb5
 ; CHECK: br i1 %tmp4, {{.*}} !prof ![[PROF2:[0-9]+]]
 
-bb5:                                             
+bb5:
   %tmp6 = phi i1 [ false, %bb5_1 ], [ %tmp4, %bb2 ]
   br i1 %tmp6, label %bb8, label %bb7, !prof !0
 
-bb7:                                            
+bb7:
   call void @bar()
   br label %bb8
 
-bb8:                                           
+bb8:
   ret void
 }
 
 define void @test_single_pred2() {
 ; CHECK-LABEL: @test_single_pred2()
 bb:
   %tmp = call i32 @a()
   %tmp1 = icmp eq i32 %tmp, 1
   br i1 %tmp1, label %bb5_1, label %bb2
 ; CHECK: br i1 %tmp1,{{.*}} !prof ![[PROF1:[0-9]+]]
 
-bb5_1:                                             
+bb5_1:
   br label %bb5_2;
 
-bb5_2:                                             
+bb5_2:
   br label %bb5;
 
-bb2:                          
+bb2:
   %tmp3 = call i32 @b()
   %tmp4 = icmp ne i32 %tmp3, 1
   br label %bb5
 ; CHECK: br i1 %tmp4, {{.*}} !prof ![[PROF2:[0-9]+]]
 
-bb5:                         
+bb5:
   %tmp6 = phi i1 [ false, %bb5_2 ], [ %tmp4, %bb2 ]
   br i1 %tmp6, label %bb8, label %bb7, !prof !0
 
-bb7:                        
+bb7:
   call void @bar()
   br label %bb8
 
-bb8:                       
+bb8:
   ret void
 }
 
-declare void @bar()
+declare void @bar() noconvergent
 
-declare i32 @a()
+declare i32 @a() noconvergent
 
-declare i32 @b()
+declare i32 @b() noconvergent
 
 !0 = !{!"branch_weights", i32 2146410443, i32 1073205}
 ;CHECK: ![[PROF1]] = !{!"branch_weights", i32 1073205, i32 2146410443}
 ;CHECK: ![[PROF2]] = !{!"branch_weights", i32 2146410443, i32 1073205}

llvm/test/Transforms/JumpThreading/threading_prof2.ll

 ; RUN: opt -jump-threading -S < %s | FileCheck %s
 ; RUN: opt -passes=jump-threading -S < %s | FileCheck %s
 define void @test() {
 bb:
   %tmp = call i32 @a()
   %tmp1 = icmp eq i32 %tmp, 1
   br i1 %tmp1, label %bb5, label %bb2
 ; CHECK: br i1 %tmp1,{{.*}} !prof ![[PROF1:[0-9]+]]
 
-bb2:                                              
+bb2:
   %tmp3 = call i32 @b()
   %tmp4 = icmp ne i32 %tmp3, 1
   br label %bb5
 ; CHECK: br i1 %tmp4, {{.*}} !prof ![[PROF2:[0-9]+]]
 
-bb5:                                             
+bb5:
   %tmp6 = phi i1 [ false, %bb ], [ %tmp4, %bb2 ]
   br i1 %tmp6, label %bb8, label %bb7, !prof !0
 
-bb7:                                            
+bb7:
   call void @bar()
   br label %bb9
 
-bb8: 
+bb8:
   call void @foo()
   br label %bb9
 
-bb9:                                           
+bb9:
   ret void
 }
 
-declare void @bar()
+declare void @bar() noconvergent
 
-declare void @foo()
+declare void @foo() noconvergent
 
-declare i32 @a()
+declare i32 @a() noconvergent
 
-declare i32 @b()
+declare i32 @b() noconvergent
 
 !0 = !{!"branch_weights", i32 2146410443, i32 1073205}
 ;CHECK: ![[PROF1]] = !{!"branch_weights", i32 1073205, i32 2146410443}
 ;CHECK: ![[PROF2]] = !{!"branch_weights", i32 2146410443, i32 1073205}

llvm/test/Transforms/JumpThreading/unreachable-loops.ll

bb5:                                              ; preds = %bb2, %bb
   br i1 %tmp6, label %bb8, label %bb7, !prof !0
 
 bb7:                                              ; preds = %bb5
   br label %bb8
 
 bb8:                                              ; preds = %bb8, %bb7, %bb5, %bb2
   ret void
 }
-declare i32 @a()
+declare i32 @a() noconvergent
 
 !0 = !{!"branch_weights", i32 2146410443, i32 1073205}

llvm/test/Transforms/JumpThreading/update-edge-weight.ll

 if.else.2:
   tail call void @d()
   br label %if.end
 
 if.end:
   ret void
 }
 
-declare void @a()
-declare void @b()
-declare void @c()
-declare void @d()
+declare void @a() noconvergent
+declare void @b() noconvergent
+declare void @c() noconvergent
+declare void @d() noconvergent
 
 !0 = !{!"function_entry_count", i64 1}
 !1 = !{!"branch_weights", i32 10, i32 5}
 !2 = !{!"branch_weights", i32 10, i32 1}

llvm/test/Transforms/LoopDistribute/basic-with-memchecks.ll

for.body:                                         ; preds = %for.body, %entry
 
   %exitcond = icmp eq i64 %add, 20
   br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !0
 
 for.end:                                          ; preds = %for.body
   ret void
 }
 
-attributes #0 = { nounwind readnone convergent }
-attributes #1 = { nounwind convergent }
+attributes #0 = { nounwind readnone }
+attributes #1 = { nounwind }
 
 !0 = distinct !{!0, !1}
 !1 = !{!"llvm.loop.distribute.enable", i1 true}

llvm/test/Transforms/LoopRotate/convergent.ll

 ; RUN: opt -S -loop-rotate < %s | FileCheck %s
 ; RUN: opt -S -loop-rotate -enable-mssa-loop-dependency=true -verify-memoryssa < %s | FileCheck %s
 
 @e = global i32 10
 
-declare void @f1(i32) convergent
-declare void @f2(i32)
+declare void @f1(i32)
+declare void @f2(i32) noconvergent
 
 ; The call to f1 in the loop header shouldn't be duplicated (meaning, loop
 ; rotation shouldn't occur), because f1 is convergent.
 
 ; CHECK: call void @f1
 ; CHECK-NOT: call void @f1
 
 define void @test(i32 %x) {

llvm/test/Transforms/LoopUnroll/2011-08-08-PhiUpdate.ll

 ; RUN: opt < %s -loop-unroll -S -unroll-count=4 | FileCheck %s
 ; Test phi update after partial unroll.
 
-declare i1 @check() nounwind
+declare i1 @check() noconvergent nounwind
 
 ; CHECK: @test
 ; CHECK: if.else:
 ; CHECK: if.then.loopexit
 ; CHECK: %sub5.lcssa = phi i32 [ %sub{{.*}}, %if.else{{.*}} ], [ %sub{{.*}}, %if.else{{.*}} ], [ %sub{{.*}}, %if.else{{.*}} ], [ %sub{{.*}}, %if.else{{.*}} ]
 ; CHECK: if.else.3
 define void @test1(i32 %i, i32 %j) nounwind uwtable ssp {
 entry:

llvm/test/Transforms/LoopUnroll/2011-08-09-PhiUpdate.ll

 ; RUN: opt -S < %s -instcombine -inline -jump-threading -loop-unroll -unroll-count=4 | FileCheck %s
 ;
 ; This is a test case that required a number of setup passes because
 ; it depends on block order.
 
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
 target triple = "x86_64-apple-macosx10.6.8"
 
-declare i1 @check() nounwind
-declare i32 @getval() nounwind
+declare i1 @check() noconvergent nounwind
+declare i32 @getval() noconvergent nounwind
 
 ; Check that the loop exit merges values from all the iterations. This
 ; could be a tad fragile, but it's a good test.
 ;
 ; CHECK-LABEL: @foo(
 ; CHECK: return:
 ; CHECK: %retval.0 = phi i32 [ %tmp7.i, %land.lhs.true ], [ 0, %do.cond ], [ %tmp7.i.1, %land.lhs.true.1 ], [ 0, %do.cond.1 ], [ %tmp7.i.2, %land.lhs.true.2 ], [ 0, %do.cond.2 ], [ %tmp7.i.3, %land.lhs.true.3 ], [ 0, %do.cond.3 ]
 ; CHECK-NOT: @bar(

llvm/test/Transforms/LoopUnroll/convergent.ll

 ; RUN: opt < %s -loop-unroll -unroll-runtime -unroll-allow-partial -S | FileCheck %s
 
-declare void @f() convergent
+declare void @f()
 
 ; Although this loop contains a convergent instruction, it should be
 ; fully unrolled.
 ;
 ; CHECK-LABEL: @full_unroll(
 define i32 @full_unroll() {
 entry:
   br label %l3

 
 l3:
   %x.0 = phi i32 [ 0, %entry ], [ %inc, %l3 ]
 ; CHECK: call void @f()
 ; CHECK: call void @f()
 ; CHECK: call void @f()
 ; CHECK: call void @f()
 ; CHECK-NOT: call void @f()
-  call void @f() convergent
+  call void @f() ; convergent
   %inc = add nsw i32 %x.0, 1
   %exitcond = icmp eq i32 %inc, %loop_ctl
   br i1 %exitcond, label %exit, label %l3
 
 exit:
   ret i32 0
 }
 

 ; CHECK: call void @f()
 ; CHECK: call void @f()
 ; CHECK: call void @f()
 ; CHECK: call void @f()
 ; CHECK: call void @f()
 ; CHECK: call void @f()
 ; CHECK: call void @f()
 ; CHECK-NOT: call void @f()
-  call void @f() convergent
+  call void @f() ; convergent
   %inc = add nsw i32 %x.0, 1
   %exitcond = icmp eq i32 %inc, %loop_ctl
   br i1 %exitcond, label %exit, label %l3, !llvm.loop !0
 
 exit:
   ret i32 0
 }
 
 ; This loop contains a convergent instruction. Since the pragma loop unroll
 ; count 2 divides trip count 4. The loop unroll should respect the pragma.
 ; CHECK-LABEL: @pragma_unroll_divisible_trip_count
 define void @pragma_unroll_divisible_trip_count() {
 entry:
   br label %l3, !llvm.loop !1
 
 l3:
   %x.0 = phi i32 [ 0, %entry ], [ %inc, %l3 ]
 ; CHECK: call void @f()
 ; CHECK: call void @f()
 ; CHECK-NOT: call void @f()
-  call void @f() convergent
+  call void @f() ; convergent
   %inc = add nsw i32 %x.0, 1
   %exitcond = icmp eq i32 %inc, 4
   br i1 %exitcond, label %exit, label %l3, !llvm.loop !1
 
 exit:
   ret void
 }
 
 ; This loop contains a convergent instruction. Since the pragma loop unroll
 ; count 2 divides trip multiple 2. The loop unroll should respect the pragma.
 ; CHECK-LABEL: @pragma_unroll_divisible_trip_multiple
 define i32 @pragma_unroll_divisible_trip_multiple(i32 %n) {
 entry:
   %loop_ctl = mul nsw i32 %n, 2
   br label %l3, !llvm.loop !1
 
 l3:
   %x.0 = phi i32 [ 0, %entry ], [ %inc, %l3 ]
 ; CHECK: call void @f()
 ; CHECK: call void @f()
 ; CHECK-NOT: call void @f()
-  call void @f() convergent
+  call void @f() ; convergent
   %inc = add nsw i32 %x.0, 1
   %exitcond = icmp eq i32 %inc, %loop_ctl
   br i1 %exitcond, label %exit, label %l3, !llvm.loop !1
 
 exit:
   ret i32 0
 }
 
 ; This loop contains a convergent instruction. Since the pragma loop unroll
 ; count 2 is unknown to divide runtime trip count, the loop is not unrolled
 ; since remainder is forbidden for unrolling convergent loop.
 ; ToDo: Forbidding remainder for unrolling convergent loop may be relaxed
 ; in the future.
 ; CHECK-LABEL: @pragma_unroll_indivisible_runtime_trip_count
 define i32 @pragma_unroll_indivisible_runtime_trip_count(i32 %n) {
 entry:
   br label %l3, !llvm.loop !1
 
 l3:
   %x.0 = phi i32 [ 0, %entry ], [ %inc, %l3 ]
 ; CHECK: call void @f()
 ; CHECK-NOT: call void @f()
-  call void @f() convergent
+  call void @f() ; convergent
   %inc = add nsw i32 %x.0, 1
   %exitcond = icmp eq i32 %inc, %n
   br i1 %exitcond, label %exit, label %l3, !llvm.loop !1
 
 exit:
   ret i32 0
 }
 

 l3:
   %x.0 = phi i32 [ 0, %entry ], [ %inc, %l3 ]
 ; CHECK: call void @f()
 ; CHECK: call void @f()
 ; CHECK: call void @f()
 ; CHECK: call void @f()
 ; CHECK: call void @f()
 ; CHECK-NOT: call void @f()
-  call void @f() convergent
+  call void @f() ; convergent
   %inc = add nsw i32 %x.0, 1
   %exitcond = icmp eq i32 %inc, 5
   br i1 %exitcond, label %exit, label %l3, !llvm.loop !1
 
 exit:
   ret i32 0
 }
 
 !0 = !{!0, !{!"llvm.loop.unroll.count", i32 16}}
 !1 = !{!1, !{!"llvm.loop.unroll.count", i32 2}}
-

llvm/test/Transforms/LoopUnroll/loop-remarks-with-hotness.ll

for.body:                                         ; preds = %for.body, %entry
   %inc = add nsw i32 %i.05, 1
   %exitcond = icmp eq i32 %inc, 16
   br i1 %exitcond, label %for.end, label %for.body, !prof !1
 
 for.end:                                          ; preds = %for.body
   ret i32 %add1
 }
 
-declare i32 @baz(i32)
+declare i32 @baz(i32) noconvergent
 
 !0 = !{!"function_entry_count", i64 3}
 !1 = !{!"branch_weights", i32 1, i32 99}

llvm/test/Transforms/LoopUnroll/loop-remarks.ll

for.body:                                         ; preds = %for.body, %entry
   %inc = add nsw i32 %i.05, 1
   %exitcond = icmp eq i32 %inc, %n
   br i1 %exitcond, label %for.end, label %for.body
 
 for.end:                                          ; preds = %for.body
   ret i32 %add1
 }
 
-declare i32 @baz(i32)
+declare i32 @baz(i32) noconvergent
 

llvm/test/Transforms/LoopUnroll/runtime-loop-multiple-exits.ll

 latch:                                              ; preds = %innerH
   %tmp6 = icmp ult i64 %tmp4, 100
   br i1 %tmp6, label %innerH, label %exit
 
 exit:                                              ; preds = %latch
   ret void
 }
 
-declare i8 addrspace(1)* @foo(i32)
+declare i8 addrspace(1)* @foo(i32) noconvergent
 ; inner loop prolog unrolled
 ; a value from outer loop is used in exit block of inner loop.
 ; Don't create VMap entries for such values (%trip).
 define i8 addrspace(1)* @test9(i8* nocapture readonly %arg, i32 %n) {
 ; PROLOG: test9(
 ; PROLOG: header.prol:
 ; PROLOG-NEXT: %phi.prol = phi i64 [ 0, %header.prol.preheader ], [ %iv.next.prol, %latch.prol ]
 ; PROLOG: latch.prol:

llvm/test/Transforms/LoopUnswitch/2008-11-03-Invariant.ll

 
 bb3.bb4_crit_edge:    ; preds = %bb3
   br label %bb4
 
 bb4:    ; preds = %bb3.bb4_crit_edge, %entry
   ret i32 0
 }
 
-declare i32 @b(...)
+declare i32 @b(...) noconvergent

llvm/test/Transforms/LoopUnswitch/2011-11-18-SimpleSwitch.ll

dec:
   call void @decf() noreturn nounwind
   br label %loop_begin
 default:
   br label %loop_exit
 loop_exit:
   ret i32 0
 }
 
-declare void @incf() noreturn
-declare void @decf() noreturn
+declare void @incf() noconvergent noreturn
+declare void @decf() noconvergent noreturn
 
-; CHECK: attributes #0 = { noreturn }
+; CHECK: attributes #0 = { noconvergent noreturn }
 ; CHECK: attributes [[NOR_NUW]] = { noreturn nounwind }

llvm/test/Transforms/LoopUnswitch/2011-11-18-TwoSwitches-Threshold.ll

 
 default:
   br label %loop_begin
 
 loop_exit:
   ret i32 0
 }
 
-declare void @incf() noreturn
-declare void @decf() noreturn
+declare void @incf() noconvergent noreturn
+declare void @decf() noconvergent noreturn
 
-; CHECK: attributes #0 = { noreturn }
+; CHECK: attributes #0 = { noconvergent noreturn }
 ; CHECK: attributes [[NOR_NUW]] = { noreturn nounwind }

llvm/test/Transforms/LoopUnswitch/2011-11-18-TwoSwitches.ll

 
 default:
   br label %loop_begin
 
 loop_exit:
   ret i32 0
 }
 
-declare void @incf() noreturn
-declare void @decf() noreturn
+declare void @incf() noconvergent noreturn
+declare void @decf() noconvergent noreturn
 
-; CHECK: attributes #0 = { noreturn }
+; CHECK: attributes #0 = { noconvergent noreturn }
 ; CHECK: attributes [[NOR_NUW]] = { noreturn nounwind }

llvm/test/Transforms/LoopUnswitch/basictest.ll

loop_begin:
   %var_val = load i32, i32* %var
 
   switch i32 %c, label %default [
       i32 1, label %inc
       i32 2, label %dec
   ]
 
 inc:
-  call void @incf() noreturn nounwind
+  call void @incf() noconvergent noreturn nounwind
   br label %loop_begin
 dec:
 ; CHECK: call void @decf()
 ; CHECK-NOT: call void @decf()
-  call void @decf() noreturn nounwind noduplicate
+  call void @decf() noconvergent noreturn nounwind noduplicate
   br label %loop_begin
 default:
   br label %loop_exit
 loop_exit:
   ret i32 0
 ; CHECK: }
 }
 
define i32 @test3(i32* %var) {
   br label %loop_begin
 
 loop_begin:
 
   %var_val = load i32, i32* %var
 
 ; CHECK: call void @conv()
 ; CHECK-NOT: call void @conv()
-  call void @conv() convergent
+  call void @conv()
 
   switch i32 %c, label %default [
       i32 1, label %inc
       i32 2, label %dec
   ]
 
 inc:
-  call void @incf() noreturn nounwind
+  call void @incf() noconvergent noreturn nounwind
   br label %loop_begin
 dec:
-  call void @decf() noreturn nounwind
+  call void @decf() noconvergent noreturn nounwind
   br label %loop_begin
 default:
   br label %loop_exit
 loop_exit:
   ret i32 0
 ; CHECK: }
 }
 

 sw.default:
   br label %sw.epilog
 
 sw.epilog:
   br label %for.inc
 
 for.inc:
   %inc = add nsw i2 %i, 1
-  %cmp = icmp slt i2 %inc, 3 
+  %cmp = icmp slt i2 %inc, 3
   br i1 %cmp, label %for.body, label %for.end
 
 for.end:
   ret void
 }
 
 ; Make sure we unswitch %a == !0 out of the loop.
 ;

 sw.default:
   br label %sw.epilog
 
 sw.epilog:
   br label %for.inc
 
 for.inc:
   %inc = add nsw i2 %i, 1
-  %cmp = icmp slt i2 %inc, 3 
+  %cmp = icmp slt i2 %inc, 3
   br i1 %cmp, label %for.body, label %for.end
 
 for.end:
   ret void
 }
 
 ; Make sure we unswitch %a == !0 out of the loop. Even we do not
 ; have it as a case value. Unswitching it out allows us to simplify

 sw.default:
   br label %sw.epilog
 
 sw.epilog:
   br label %for.inc
 
 for.inc:
   %inc = add nsw i2 %i, 1
-  %cmp = icmp slt i2 %inc, 3 
+  %cmp = icmp slt i2 %inc, 3
   br i1 %cmp, label %for.body, label %for.end
 
 for.end:
   ret void
 }
 
 ; Make sure we don't unswitch, as we can not find an input value %a
 ; that will effectively unswitch 0 or 3 out of the loop.
 ;
 ; CHECK: define void @and_or_i2_as_switch_input(i2
 ; CHECK: entry:
 ; This is an indication that the loop has NOT been unswitched.
 ; CHECK-NOT: icmp
 ; CHECK: br
 define void @and_or_i2_as_switch_input(i2 %a) {
 entry:
   br label %for.body
 
 for.body:
   %i = phi i2 [ 0, %entry ], [ %inc, %for.inc ]
-  %and = and i2 %a, %i 
+  %and = and i2 %a, %i
   %or = or i2 %and, %i
   switch i2 %or, label %sw.default [
     i2 0, label %sw.bb
     i2 3, label %sw.bb1
   ]
 
 sw.bb:
   br label %sw.epilog
 
 sw.bb1:
   br label %sw.epilog
 
 sw.default:
   br label %sw.epilog
 
 sw.epilog:
   br label %for.inc
 
 for.inc:
   %inc = add nsw i2 %i, 1
-  %cmp = icmp slt i2 %inc, 3 
+  %cmp = icmp slt i2 %inc, 3
   br i1 %cmp, label %for.body, label %for.end
 
 for.end:
   ret void
 }
 
 ; Make sure we don't unswitch, as we can not find an input value %a
 ; that will effectively unswitch true/false out of the loop.
 ;
 ; CHECK: define void @and_or_i1_as_branch_input(i1
 ; CHECK: entry:
 ; This is an indication that the loop has NOT been unswitched.
 ; CHECK-NOT: icmp
 ; CHECK: br
 define void @and_or_i1_as_branch_input(i1 %a) {
 entry:
   br label %for.body
 
 for.body:
   %i = phi i1 [ 0, %entry ], [ %inc, %for.inc ]
-  %and = and i1 %a, %i 
+  %and = and i1 %a, %i
   %or = or i1 %and, %i
   br i1 %or, label %sw.bb, label %sw.bb1
 
 sw.bb:
   br label %sw.epilog
 
 sw.bb1:
   br label %sw.epilog
 
 sw.epilog:
   br label %for.inc
 
 for.inc:
   %inc = add nsw i1 %i, 1
-  %cmp = icmp slt i1 %inc, 1 
+  %cmp = icmp slt i1 %inc, 1
   br i1 %cmp, label %for.body, label %for.end
 
 for.end:
   ret void
 }
 
-declare void @incf() noreturn
-declare void @decf() noreturn
-declare void @conv() convergent
+declare void @incf() noconvergent noreturn
+declare void @decf() noconvergent noreturn
+declare void @conv()

llvm/test/Transforms/LoopUnswitch/simplify-with-nonvalness.ll

 for.inc:
   %inc = add nsw i32 %i.0, 1
   br label %for.cond
 
 for.end:
   ret void
 }
 
-declare void @bar(...) 
+declare void @bar(...) noconvergent

llvm/test/Transforms/LoopVectorize/ARM/arm-ieee-vectorize.ll

for.body:                                         ; preds = %entry, %for.body
   %inc = add nuw nsw i32 %i.011, 1
   %exitcond = icmp eq i32 %inc, %N
   br i1 %exitcond, label %for.end, label %for.body
 
 for.end:                                          ; preds = %for.body, %entry
   ret void
 }
 
-declare float @fabsf(float)
+declare float @fabsf(float) noconvergent
 
 attributes #1 = { nounwind readnone "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="cortex-a8" "target-features"="+dsp,+neon,+vfp3" "unsafe-fp-math"="false" "use-soft-float"="false" }
 attributes #2 = { nounwind readnone "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="cortex-a8" "target-features"="+dsp,+neon,+vfp3" "unsafe-fp-math"="true" "use-soft-float"="false" }

llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll

 ; RUN: opt -vector-library=MASSV -loop-vectorize -force-vector-interleave=1 -S < %s | FileCheck %s
 
-target datalayout = "e-m:e-i64:64-n32:64" 
+target datalayout = "e-m:e-i64:64-n32:64"
 target triple = "powerpc64le-unknown-linux-gnu"
 
 declare double @cbrt(double) #0
 declare float @cbrtf(float) #0
 
 declare double @pow(double, double) #0
 declare double @llvm.pow.f64(double, double) #0
 declare float @powf(float, float) #0
for.body:
   %iv.next = add nuw nsw i64 %iv, 1
   %exitcond = icmp eq i64 %iv.next, 1000
   br i1 %exitcond, label %for.end, label %for.body
 
 for.end:
   ret void
 }
 
-attributes #0 = { nounwind }
+attributes #0 = { noconvergent nounwind }

llvm/test/Transforms/LoopVectorize/X86/svml-calls-finite.ll

for.body:                                         ; preds = %for.body, %entry
   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
   %exitcond = icmp eq i64 %indvars.iv.next, 1000
   br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !51
 
 for.end:                                          ; preds = %for.body
   ret void
 }
 
+attributes #0 = { noconvergent nounwind readnone }
+
 !51 = distinct !{!51, !52, !53}
 !52 = !{!"llvm.loop.vectorize.width", i32 4}
 !53 = !{!"llvm.loop.vectorize.enable", i1 true}

llvm/test/Transforms/LoopVectorize/X86/svml-calls.ll

for.body:
   %iv.next = add nuw nsw i64 %iv, 1
   %exitcond = icmp eq i64 %iv.next, 1000
   br i1 %exitcond, label %for.end, label %for.body
 
 for.end:
   ret void
 }
 
-attributes #0 = { nounwind readnone }
+attributes #0 = { noconvergent nounwind readnone }
 

llvm/test/Transforms/LoopVectorize/X86/veclib-calls.ll

 ; RUN: opt < %s -vector-library=Accelerate -loop-vectorize -S | FileCheck %s
 
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
 
 ;CHECK-LABEL: @sqrt_f32(
 ;CHECK: vsqrtf{{.*}}<4 x float>
 ;CHECK: ret void
-declare float @sqrtf(float) nounwind readnone
+declare float @sqrtf(float) noconvergent nounwind readnone
 define void @sqrt_f32(i32 %n, float* noalias %y, float* noalias %x) nounwind uwtable {
 entry:
   %cmp6 = icmp sgt i32 %n, 0
   br i1 %cmp6, label %for.body, label %for.end
 
 for.body:                                         ; preds = %entry, %for.body
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
   %arrayidx = getelementptr inbounds float, float* %y, i64 %indvars.iv
   %0 = load float, float* %arrayidx, align 4
   %call = tail call float @sqrtf(float %0) nounwind readnone
   %arrayidx2 = getelementptr inbounds float, float* %x, i64 %indvars.iv
   store float %call, float* %arrayidx2, align 4
   %indvars.iv.next = add i64 %indvars.iv, 1
   %lftr.wideiv = trunc i64 %indvars.iv.next to i32
   %exitcond = icmp eq i32 %lftr.wideiv, %n
   br i1 %exitcond, label %for.end, label %for.body
 
 for.end:                                          ; preds = %for.body, %entry
   ret void
 }
 
 ;CHECK-LABEL: @exp_f32(
 ;CHECK: vexpf{{.*}}<4 x float>
 ;CHECK: ret void
-declare float @expf(float) nounwind readnone
+declare float @expf(float) noconvergent nounwind readnone
 define void @exp_f32(i32 %n, float* noalias %y, float* noalias %x) nounwind uwtable {
 entry:
   %cmp6 = icmp sgt i32 %n, 0
   br i1 %cmp6, label %for.body, label %for.end
 
 for.body:                                         ; preds = %entry, %for.body
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
   %arrayidx = getelementptr inbounds float, float* %y, i64 %indvars.iv
   %0 = load float, float* %arrayidx, align 4
   %call = tail call float @expf(float %0) nounwind readnone
   %arrayidx2 = getelementptr inbounds float, float* %x, i64 %indvars.iv
   store float %call, float* %arrayidx2, align 4
   %indvars.iv.next = add i64 %indvars.iv, 1
   %lftr.wideiv = trunc i64 %indvars.iv.next to i32
   %exitcond = icmp eq i32 %lftr.wideiv, %n
   br i1 %exitcond, label %for.end, label %for.body
 
 for.end:                                          ; preds = %for.body, %entry
   ret void
 }
 
 ;CHECK-LABEL: @log_f32(
 ;CHECK: vlogf{{.*}}<4 x float>
 ;CHECK: ret void
-declare float @logf(float) nounwind readnone
+declare float @logf(float) noconvergent nounwind readnone
 define void @log_f32(i32 %n, float* noalias %y, float* noalias %x) nounwind uwtable {
 entry:
   %cmp6 = icmp sgt i32 %n, 0
   br i1 %cmp6, label %for.body, label %for.end
 
 for.body:                                         ; preds = %entry, %for.body
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
   %arrayidx = getelementptr inbounds float, float* %y, i64 %indvars.iv

 for.end:                                          ; preds = %for.body, %entry
   ret void
 }
 
 ; For abs instruction we'll generate vector intrinsic, as it's cheaper than a lib call.
 ;CHECK-LABEL: @fabs_f32(
 ;CHECK: fabs{{.*}}<4 x float>
 ;CHECK: ret void
-declare float @fabsf(float) nounwind readnone
+declare float @fabsf(float) noconvergent nounwind readnone
 define void @fabs_f32(i32 %n, float* noalias %y, float* noalias %x) nounwind uwtable {
 entry:
   %cmp6 = icmp sgt i32 %n, 0
   br i1 %cmp6, label %for.body, label %for.end
 
 for.body:                                         ; preds = %entry, %for.body
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
   %arrayidx = getelementptr inbounds float, float* %y, i64 %indvars.iv

 for.end:                                          ; preds = %for.body, %entry
   ret void
 }
 
 ; Test that we can vectorize an intrinsic into a vector call.
 ;CHECK-LABEL: @exp_f32_intrin(
 ;CHECK: vexpf{{.*}}<4 x float>
 ;CHECK: ret void
-declare float @llvm.exp.f32(float) nounwind readnone
+declare float @llvm.exp.f32(float) noconvergent nounwind readnone
 define void @exp_f32_intrin(i32 %n, float* noalias %y, float* noalias %x) nounwind uwtable {
 entry:
   %cmp6 = icmp sgt i32 %n, 0
   br i1 %cmp6, label %for.body, label %for.end
 
 for.body:                                         ; preds = %entry, %for.body
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
   %arrayidx = getelementptr inbounds float, float* %y, i64 %indvars.iv

 for.end:                                          ; preds = %for.body, %entry
   ret void
 }
 
 ; Test that we don't vectorize arbitrary functions.
 ;CHECK-LABEL: @foo_f32(
 ;CHECK-NOT: foo{{.*}}<4 x float>
 ;CHECK: ret void
-declare float @foo(float) nounwind readnone
+declare float @foo(float) noconvergent nounwind readnone
 define void @foo_f32(i32 %n, float* noalias %y, float* noalias %x) nounwind uwtable {
 entry:
   %cmp6 = icmp sgt i32 %n, 0
   br i1 %cmp6, label %for.body, label %for.end
 
 for.body:                                         ; preds = %entry, %for.body
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
   %arrayidx = getelementptr inbounds float, float* %y, i64 %indvars.iv

 
 for.end:                                          ; preds = %for.body, %entry
   ret void
 }
 
 ;CHECK-LABEL: @ceil_f32(
 ;CHECK: vceilf{{.*}}<4 x float>
 ;CHECK: ret void
-declare float @ceilf(float) nounwind readnone
+declare float @ceilf(float) noconvergent nounwind readnone
 define void @ceil_f32(i32 %n, float* noalias %y, float* noalias %x) nounwind uwtable {
 entry:
   %cmp6 = icmp sgt i32 %n, 0
   br i1 %cmp6, label %for.body, label %for.end
 
 for.body:                                         ; preds = %entry, %for.body
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
   %arrayidx = getelementptr inbounds float, float* %y, i64 %indvars.iv
   %0 = load float, float* %arrayidx, align 4
   %call = tail call float @ceilf(float %0) nounwind readnone
   %arrayidx2 = getelementptr inbounds float, float* %x, i64 %indvars.iv
   store float %call, float* %arrayidx2, align 4
   %indvars.iv.next = add i64 %indvars.iv, 1
   %lftr.wideiv = trunc i64 %indvars.iv.next to i32
   %exitcond = icmp eq i32 %lftr.wideiv, %n
   br i1 %exitcond, label %for.end, label %for.body
 
 for.end:                                          ; preds = %for.body, %entry
   ret void
 }
 
 ;CHECK-LABEL: @floor_f32(
 ;CHECK: vfloorf{{.*}}<4 x float>
 ;CHECK: ret void
-declare float @floorf(float) nounwind readnone
+declare float @floorf(float) noconvergent nounwind readnone
 define void @floor_f32(i32 %n, float* noalias %y, float* noalias %x) nounwind uwtable {
 entry:
   %cmp6 = icmp sgt i32 %n, 0
   br i1 %cmp6, label %for.body, label %for.end
 
 for.body:                                         ; preds = %entry, %for.body
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
   %arrayidx = getelementptr inbounds float, float* %y, i64 %indvars.iv
   %0 = load float, float* %arrayidx, align 4
   %call = tail call float @floorf(float %0) nounwind readnone
   %arrayidx2 = getelementptr inbounds float, float* %x, i64 %indvars.iv
   store float %call, float* %arrayidx2, align 4
   %indvars.iv.next = add i64 %indvars.iv, 1
   %lftr.wideiv = trunc i64 %indvars.iv.next to i32
   %exitcond = icmp eq i32 %lftr.wideiv, %n
   br i1 %exitcond, label %for.end, label %for.body
 
 for.end:                                          ; preds = %for.body, %entry
   ret void
 }
 
 ;CHECK-LABEL: @expm1_f32(
 ;CHECK: vexpm1f{{.*}}<4 x float>
 ;CHECK: ret void
-declare float @expm1f(float) nounwind readnone
+declare float @expm1f(float) noconvergent nounwind readnone
 define void @expm1_f32(i32 %n, float* noalias %y, float* noalias %x) nounwind uwtable {
 entry:
   %cmp6 = icmp sgt i32 %n, 0
   br i1 %cmp6, label %for.body, label %for.end
 
 for.body:                                         ; preds = %entry, %for.body
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
   %arrayidx = getelementptr inbounds float, float* %y, i64 %indvars.iv
   %0 = load float, float* %arrayidx, align 4
   %call = tail call float @expm1f(float %0) nounwind readnone
   %arrayidx2 = getelementptr inbounds float, float* %x, i64 %indvars.iv
   store float %call, float* %arrayidx2, align 4
   %indvars.iv.next = add i64 %indvars.iv, 1
   %lftr.wideiv = trunc i64 %indvars.iv.next to i32
   %exitcond = icmp eq i32 %lftr.wideiv, %n
   br i1 %exitcond, label %for.end, label %for.body
 
 for.end:                                          ; preds = %for.body, %entry
   ret void
 }
 
 ;CHECK-LABEL: @log1p_f32(
 ;CHECK: vlog1pf{{.*}}<4 x float>
 ;CHECK: ret void
-declare float @log1pf(float) nounwind readnone
+declare float @log1pf(float) noconvergent nounwind readnone
 define void @log1p_f32(i32 %n, float* noalias %y, float* noalias %x) nounwind uwtable {
 entry:
   %cmp6 = icmp sgt i32 %n, 0
   br i1 %cmp6, label %for.body, label %for.end
 
 for.body:                                         ; preds = %entry, %for.body
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
   %arrayidx = getelementptr inbounds float, float* %y, i64 %indvars.iv
   %0 = load float, float* %arrayidx, align 4
   %call = tail call float @log1pf(float %0) nounwind readnone
   %arrayidx2 = getelementptr inbounds float, float* %x, i64 %indvars.iv
   store float %call, float* %arrayidx2, align 4
   %indvars.iv.next = add i64 %indvars.iv, 1
   %lftr.wideiv = trunc i64 %indvars.iv.next to i32
   %exitcond = icmp eq i32 %lftr.wideiv, %n
   br i1 %exitcond, label %for.end, label %for.body
 
 for.end:                                          ; preds = %for.body, %entry
   ret void
 }
 
 ;CHECK-LABEL: @log10_f32(
 ;CHECK: vlog10f{{.*}}<4 x float>
 ;CHECK: ret void
-declare float @log10f(float) nounwind readnone
+declare float @log10f(float) noconvergent nounwind readnone
 define void @log10_f32(i32 %n, float* noalias %y, float* noalias %x) nounwind uwtable {
 entry:
   %cmp6 = icmp sgt i32 %n, 0
   br i1 %cmp6, label %for.body, label %for.end
 
 for.body:                                         ; preds = %entry, %for.body
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
   %arrayidx = getelementptr inbounds float, float* %y, i64 %indvars.iv
   %0 = load float, float* %arrayidx, align 4
   %call = tail call float @log10f(float %0) nounwind readnone
   %arrayidx2 = getelementptr inbounds float, float* %x, i64 %indvars.iv
   store float %call, float* %arrayidx2, align 4
   %indvars.iv.next = add i64 %indvars.iv, 1
   %lftr.wideiv = trunc i64 %indvars.iv.next to i32
   %exitcond = icmp eq i32 %lftr.wideiv, %n
   br i1 %exitcond, label %for.end, label %for.body
 
 for.end:                                          ; preds = %for.body, %entry
   ret void
 }
 
 ;CHECK-LABEL: @logb_f32(
 ;CHECK: vlogbf{{.*}}<4 x float>
 ;CHECK: ret void
-declare float @logbf(float) nounwind readnone
+declare float @logbf(float) noconvergent nounwind readnone
 define void @logb_f32(i32 %n, float* noalias %y, float* noalias %x) nounwind uwtable {
 entry:
   %cmp6 = icmp sgt i32 %n, 0
   br i1 %cmp6, label %for.body, label %for.end
 
 for.body:                                         ; preds = %entry, %for.body
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
   %arrayidx = getelementptr inbounds float, float* %y, i64 %indvars.iv
   %0 = load float, float* %arrayidx, align 4
   %call = tail call float @logbf(float %0) nounwind readnone
   %arrayidx2 = getelementptr inbounds float, float* %x, i64 %indvars.iv
   store float %call, float* %arrayidx2, align 4
   %indvars.iv.next = add i64 %indvars.iv, 1
   %lftr.wideiv = trunc i64 %indvars.iv.next to i32
   %exitcond = icmp eq i32 %lftr.wideiv, %n
   br i1 %exitcond, label %for.end, label %for.body
 
 for.end:                                          ; preds = %for.body, %entry
   ret void
 }
 
 ;CHECK-LABEL: @sin_f32(
 ;CHECK: vsinf{{.*}}<4 x float>
 ;CHECK: ret void
-declare float @sinf(float) nounwind readnone
+declare float @sinf(float) noconvergent nounwind readnone
 define void @sin_f32(i32 %n, float* noalias %y, float* noalias %x) nounwind uwtable {
 entry:
   %cmp6 = icmp sgt i32 %n, 0
   br i1 %cmp6, label %for.body, label %for.end
 
 for.body:                                         ; preds = %entry, %for.body
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
   %arrayidx = getelementptr inbounds float, float* %y, i64 %indvars.iv
   %0 = load float, float* %arrayidx, align 4
   %call = tail call float @sinf(float %0) nounwind readnone
   %arrayidx2 = getelementptr inbounds float, float* %x, i64 %indvars.iv
   store float %call, float* %arrayidx2, align 4
   %indvars.iv.next = add i64 %indvars.iv, 1
   %lftr.wideiv = trunc i64 %indvars.iv.next to i32
   %exitcond = icmp eq i32 %lftr.wideiv, %n
   br i1 %exitcond, label %for.end, label %for.body
 
 for.end:                                          ; preds = %for.body, %entry
   ret void
 }
 
 ;CHECK-LABEL: @cos_f32(
 ;CHECK: vcosf{{.*}}<4 x float>
 ;CHECK: ret void
-declare float @cosf(float) nounwind readnone
+declare float @cosf(float) noconvergent nounwind readnone
 define void @cos_f32(i32 %n, float* noalias %y, float* noalias %x) nounwind uwtable {
 entry:
   %cmp6 = icmp sgt i32 %n, 0
   br i1 %cmp6, label %for.body, label %for.end
 
 for.body:                                         ; preds = %entry, %for.body
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
   %arrayidx = getelementptr inbounds float, float* %y, i64 %indvars.iv
   %0 = load float, float* %arrayidx, align 4
   %call = tail call float @cosf(float %0) nounwind readnone
   %arrayidx2 = getelementptr inbounds float, float* %x, i64 %indvars.iv
   store float %call, float* %arrayidx2, align 4
   %indvars.iv.next = add i64 %indvars.iv, 1
   %lftr.wideiv = trunc i64 %indvars.iv.next to i32
   %exitcond = icmp eq i32 %lftr.wideiv, %n
   br i1 %exitcond, label %for.end, label %for.body
 
 for.end:                                          ; preds = %for.body, %entry
   ret void
 }
 
 ;CHECK-LABEL: @tan_f32(
 ;CHECK: vtanf{{.*}}<4 x float>
 ;CHECK: ret void
-declare float @tanf(float) nounwind readnone
+declare float @tanf(float) noconvergent nounwind readnone
 define void @tan_f32(i32 %n, float* noalias %y, float* noalias %x) nounwind uwtable {
 entry:
   %cmp6 = icmp sgt i32 %n, 0
   br i1 %cmp6, label %for.body, label %for.end
 
 for.body:                                         ; preds = %entry, %for.body
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
   %arrayidx = getelementptr inbounds float, float* %y, i64 %indvars.iv
   %0 = load float, float* %arrayidx, align 4
   %call = tail call float @tanf(float %0) nounwind readnone
   %arrayidx2 = getelementptr inbounds float, float* %x, i64 %indvars.iv
   store float %call, float* %arrayidx2, align 4
   %indvars.iv.next = add i64 %indvars.iv, 1
   %lftr.wideiv = trunc i64 %indvars.iv.next to i32
   %exitcond = icmp eq i32 %lftr.wideiv, %n
   br i1 %exitcond, label %for.end, label %for.body
 
 for.end:                                          ; preds = %for.body, %entry
   ret void
 }
 
 ;CHECK-LABEL: @asin_f32(
 ;CHECK: vasinf{{.*}}<4 x float>
 ;CHECK: ret void
-declare float @asinf(float) nounwind readnone
+declare float @asinf(float) noconvergent nounwind readnone
 define void @asin_f32(i32 %n, float* noalias %y, float* noalias %x) nounwind uwtable {
 entry:
   %cmp6 = icmp sgt i32 %n, 0
   br i1 %cmp6, label %for.body, label %for.end
 
 for.body:                                         ; preds = %entry, %for.body
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
   %arrayidx = getelementptr inbounds float, float* %y, i64 %indvars.iv
   %0 = load float, float* %arrayidx, align 4
   %call = tail call float @asinf(float %0) nounwind readnone
   %arrayidx2 = getelementptr inbounds float, float* %x, i64 %indvars.iv
   store float %call, float* %arrayidx2, align 4
   %indvars.iv.next = add i64 %indvars.iv, 1
   %lftr.wideiv = trunc i64 %indvars.iv.next to i32
   %exitcond = icmp eq i32 %lftr.wideiv, %n
   br i1 %exitcond, label %for.end, label %for.body
 
 for.end:                                          ; preds = %for.body, %entry
   ret void
 }
 
 ;CHECK-LABEL: @acos_f32(
 ;CHECK: vacosf{{.*}}<4 x float>
 ;CHECK: ret void
-declare float @acosf(float) nounwind readnone
+declare float @acosf(float) noconvergent nounwind readnone
 define void @acos_f32(i32 %n, float* noalias %y, float* noalias %x) nounwind uwtable {
 entry:
   %cmp6 = icmp sgt i32 %n, 0
   br i1 %cmp6, label %for.body, label %for.end
 
 for.body:                                         ; preds = %entry, %for.body
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
   %arrayidx = getelementptr inbounds float, float* %y, i64 %indvars.iv
   %0 = load float, float* %arrayidx, align 4
   %call = tail call float @acosf(float %0) nounwind readnone
   %arrayidx2 = getelementptr inbounds float, float* %x, i64 %indvars.iv
   store float %call, float* %arrayidx2, align 4
   %indvars.iv.next = add i64 %indvars.iv, 1
   %lftr.wideiv = trunc i64 %indvars.iv.next to i32
   %exitcond = icmp eq i32 %lftr.wideiv, %n
   br i1 %exitcond, label %for.end, label %for.body
 
 for.end:                                          ; preds = %for.body, %entry
   ret void
 }
 
 ;CHECK-LABEL: @atan_f32(
 ;CHECK: vatanf{{.*}}<4 x float>
 ;CHECK: ret void
-declare float @atanf(float) nounwind readnone
+declare float @atanf(float) noconvergent nounwind readnone
 define void @atan_f32(i32 %n, float* noalias %y, float* noalias %x) nounwind uwtable {
 entry:
   %cmp6 = icmp sgt i32 %n, 0
   br i1 %cmp6, label %for.body, label %for.end
 
 for.body:                                         ; preds = %entry, %for.body
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
   %arrayidx = getelementptr inbounds float, float* %y, i64 %indvars.iv
   %0 = load float, float* %arrayidx, align 4
   %call = tail call float @atanf(float %0) nounwind readnone
   %arrayidx2 = getelementptr inbounds float, float* %x, i64 %indvars.iv
   store float %call, float* %arrayidx2, align 4
   %indvars.iv.next = add i64 %indvars.iv, 1
   %lftr.wideiv = trunc i64 %indvars.iv.next to i32
   %exitcond = icmp eq i32 %lftr.wideiv, %n
   br i1 %exitcond, label %for.end, label %for.body
 
 for.end:                                          ; preds = %for.body, %entry
   ret void
 }
 
 ;CHECK-LABEL: @sinh_f32(
 ;CHECK: vsinhf{{.*}}<4 x float>
 ;CHECK: ret void
-declare float @sinhf(float) nounwind readnone
+declare float @sinhf(float) noconvergent nounwind readnone
 define void @sinh_f32(i32 %n, float* noalias %y, float* noalias %x) nounwind uwtable {
 entry:
   %cmp6 = icmp sgt i32 %n, 0
   br i1 %cmp6, label %for.body, label %for.end
 
 for.body:                                         ; preds = %entry, %for.body
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
   %arrayidx = getelementptr inbounds float, float* %y, i64 %indvars.iv
   %0 = load float, float* %arrayidx, align 4
   %call = tail call float @sinhf(float %0) nounwind readnone
   %arrayidx2 = getelementptr inbounds float, float* %x, i64 %indvars.iv
   store float %call, float* %arrayidx2, align 4
   %indvars.iv.next = add i64 %indvars.iv, 1
   %lftr.wideiv = trunc i64 %indvars.iv.next to i32
   %exitcond = icmp eq i32 %lftr.wideiv, %n
   br i1 %exitcond, label %for.end, label %for.body
 
 for.end:                                          ; preds = %for.body, %entry
   ret void
 }
 
 ;CHECK-LABEL: @cosh_f32(
 ;CHECK: vcoshf{{.*}}<4 x float>
 ;CHECK: ret void
-declare float @coshf(float) nounwind readnone
+declare float @coshf(float) noconvergent nounwind readnone
 define void @cosh_f32(i32 %n, float* noalias %y, float* noalias %x) nounwind uwtable {
 entry:
   %cmp6 = icmp sgt i32 %n, 0
   br i1 %cmp6, label %for.body, label %for.end
 
 for.body:                                         ; preds = %entry, %for.body
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
   %arrayidx = getelementptr inbounds float, float* %y, i64 %indvars.iv
   %0 = load float, float* %arrayidx, align 4
   %call = tail call float @coshf(float %0) nounwind readnone
   %arrayidx2 = getelementptr inbounds float, float* %x, i64 %indvars.iv
   store float %call, float* %arrayidx2, align 4
   %indvars.iv.next = add i64 %indvars.iv, 1
   %lftr.wideiv = trunc i64 %indvars.iv.next to i32
   %exitcond = icmp eq i32 %lftr.wideiv, %n
   br i1 %exitcond, label %for.end, label %for.body
 
 for.end:                                          ; preds = %for.body, %entry
   ret void
 }
 
 ;CHECK-LABEL: @tanh_f32(
 ;CHECK: vtanhf{{.*}}<4 x float>
 ;CHECK: ret void
-declare float @tanhf(float) nounwind readnone
+declare float @tanhf(float) noconvergent nounwind readnone
 define void @tanh_f32(i32 %n, float* noalias %y, float* noalias %x) nounwind uwtable {
 entry:
   %cmp6 = icmp sgt i32 %n, 0
   br i1 %cmp6, label %for.body, label %for.end
 
 for.body:                                         ; preds = %entry, %for.body
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
   %arrayidx = getelementptr inbounds float, float* %y, i64 %indvars.iv
   %0 = load float, float* %arrayidx, align 4
   %call = tail call float @tanhf(float %0) nounwind readnone
   %arrayidx2 = getelementptr inbounds float, float* %x, i64 %indvars.iv
   store float %call, float* %arrayidx2, align 4
   %indvars.iv.next = add i64 %indvars.iv, 1
   %lftr.wideiv = trunc i64 %indvars.iv.next to i32
   %exitcond = icmp eq i32 %lftr.wideiv, %n
   br i1 %exitcond, label %for.end, label %for.body
 
 for.end:                                          ; preds = %for.body, %entry
   ret void
 }
 
 ;CHECK-LABEL: @asinh_f32(
 ;CHECK: vasinhf{{.*}}<4 x float>
 ;CHECK: ret void
-declare float @asinhf(float) nounwind readnone
+declare float @asinhf(float) noconvergent nounwind readnone
 define void @asinh_f32(i32 %n, float* noalias %y, float* noalias %x) nounwind uwtable {
 entry:
   %cmp6 = icmp sgt i32 %n, 0
   br i1 %cmp6, label %for.body, label %for.end
 
 for.body:                                         ; preds = %entry, %for.body
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
   %arrayidx = getelementptr inbounds float, float* %y, i64 %indvars.iv
   %0 = load float, float* %arrayidx, align 4
   %call = tail call float @asinhf(float %0) nounwind readnone
   %arrayidx2 = getelementptr inbounds float, float* %x, i64 %indvars.iv
   store float %call, float* %arrayidx2, align 4
   %indvars.iv.next = add i64 %indvars.iv, 1
   %lftr.wideiv = trunc i64 %indvars.iv.next to i32
   %exitcond = icmp eq i32 %lftr.wideiv, %n
   br i1 %exitcond, label %for.end, label %for.body
 
 for.end:                                          ; preds = %for.body, %entry
   ret void
 }
 
 ;CHECK-LABEL: @acosh_f32(
 ;CHECK: vacoshf{{.*}}<4 x float>
 ;CHECK: ret void
-declare float @acoshf(float) nounwind readnone
+declare float @acoshf(float) noconvergent nounwind readnone
 define void @acosh_f32(i32 %n, float* noalias %y, float* noalias %x) nounwind uwtable {
 entry:
   %cmp6 = icmp sgt i32 %n, 0
   br i1 %cmp6, label %for.body, label %for.end
 
 for.body:                                         ; preds = %entry, %for.body
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
   %arrayidx = getelementptr inbounds float, float* %y, i64 %indvars.iv
   %0 = load float, float* %arrayidx, align 4
   %call = tail call float @acoshf(float %0) nounwind readnone
   %arrayidx2 = getelementptr inbounds float, float* %x, i64 %indvars.iv
   store float %call, float* %arrayidx2, align 4
   %indvars.iv.next = add i64 %indvars.iv, 1
   %lftr.wideiv = trunc i64 %indvars.iv.next to i32
   %exitcond = icmp eq i32 %lftr.wideiv, %n
   br i1 %exitcond, label %for.end, label %for.body
 
 for.end:                                          ; preds = %for.body, %entry
   ret void
 }
 
 ;CHECK-LABEL: @atanh_f32(
 ;CHECK: vatanhf{{.*}}<4 x float>
 ;CHECK: ret void
-declare float @atanhf(float) nounwind readnone
+declare float @atanhf(float) noconvergent nounwind readnone
 define void @atanh_f32(i32 %n, float* noalias %y, float* noalias %x) nounwind uwtable {
 entry:
   %cmp6 = icmp sgt i32 %n, 0
   br i1 %cmp6, label %for.body, label %for.end
 
 for.body:                                         ; preds = %entry, %for.body
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
   %arrayidx = getelementptr inbounds float, float* %y, i64 %indvars.iv

llvm/test/Transforms/MemCpyOpt/memcpy.ll

 
 declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) nounwind
 declare void @llvm.memcpy.p1i8.p0i8.i64(i8 addrspace(1)* nocapture, i8* nocapture, i64, i1) nounwind
 
 declare void @f1(%struct.big* nocapture sret)
 declare void @f2(%struct.big*)
 
 ; CHECK: attributes [[$NUW]] = { nounwind }
-; CHECK: attributes #1 = { argmemonly nounwind willreturn }
+; CHECK: attributes #1 = { argmemonly noconvergent nounwind willreturn }
 ; CHECK: attributes #2 = { nounwind ssp }
 ; CHECK: attributes #3 = { nounwind ssp uwtable }

llvm/test/Transforms/ObjCARC/basic.ll

 ; CHECK: entry:
 ; CHECK: call i8* @llvm.objc.retain(i8* %p)
 ; CHECK: loop:
 ; CHECK-NOT: @llvm.objc.
 ; CHECK: done:
 ; CHECK: call void @llvm.objc.release
 ; CHECK: }
 define void @test27(i8* %p, i1 %x, i1 %y) {
-entry: 
+entry:
   %f0 = call i8* @llvm.objc.retain(i8* %p)
   br i1 %x, label %loop, label %done
 
 loop:
   call void @callee()
   store i8 0, i8* %p
   br i1 %y, label %done, label %loop
-  
-done: 
+done:
   call void @llvm.objc.release(i8* %p)
   ret void
 }
 
 ; Trivial code motion case: Triangle.
 
 ; CHECK-LABEL: define void @test28(
 ; CHECK-NOT: @llvm.objc.
define void @test54() {
   ret void
 }
 
 ; Nested retain+release pairs. Delete them both.
 
 ; CHECK-LABEL: define void @test55(
 ; CHECK-NOT: @objc
 ; CHECK: }
-define void @test55(i8* %x) { 
-entry: 
-  %0 = call i8* @llvm.objc.retain(i8* %x) nounwind 
-  %1 = call i8* @llvm.objc.retain(i8* %x) nounwind 
-  call void @llvm.objc.release(i8* %x) nounwind 
-  call void @llvm.objc.release(i8* %x) nounwind 
-  ret void 
+define void @test55(i8* %x) {
+entry:
+  %0 = call i8* @llvm.objc.retain(i8* %x) nounwind
+  %1 = call i8* @llvm.objc.retain(i8* %x) nounwind
+  call void @llvm.objc.release(i8* %x) nounwind
+  call void @llvm.objc.release(i8* %x) nounwind
+  ret void
 }
 
 ; Nested retain+release pairs where the inner pair depends
 ; on the outer pair to be removed, and then the outer pair
 ; can be partially eliminated. Plus an extra outer pair to
 ; eliminate, for fun.
 
 ; CHECK-LABEL: define void @test56(

 !2 = distinct !DISubprogram(unit: !3)
 !3 = distinct !DICompileUnit(language: DW_LANG_C99, producer: "clang",
                              file: !4,
                              isOptimized: true, flags: "-O2",
                              splitDebugFilename: "abc.debug", emissionKind: 2)
 !4 = !DIFile(filename: "path/to/file", directory: "/path/to/dir")
 !5 = !{i32 2, !"Debug Info Version", i32 3}
 
+; CHECK: attributes #0 = { noconvergent nounwind }
+; CHECK: attributes #1 = { noconvergent nounwind readnone speculatable willreturn }
 ; CHECK: attributes [[NUW]] = { nounwind }
-; CHECK: attributes #1 = { nounwind readnone speculatable willreturn }
 ; CHECK: ![[RELEASE]] = !{}

llvm/test/Transforms/ObjCARC/cfg-hazards.ll

 for.end:                                          ; preds = %for.body
   call void @use_pointer(i8* %digits)
   call void @llvm.objc.release(i8* %digits) nounwind, !clang.imprecise_release !0
   ret void
 }
 
 ; Delete nested retain+release pairs around loops.
 
-;      CHECK: define void @test3(i8* %a) #0 {
+;      CHECK: define void @test3(i8* %a) #1 {
 ; CHECK-NEXT: entry:
 ; CHECK-NEXT:   tail call i8* @llvm.objc.retain(i8* %a) [[NUW:#[0-9]+]]
 ; CHECK-NEXT:   br label %loop
 ;  CHECK-NOT:   @llvm.objc.
 ;      CHECK: exit:
 ; CHECK-NEXT:   call void @llvm.objc.release(i8* %a)
 ; CHECK-NEXT:   ret void
 ; CHECK-NEXT: }
loop:
   br i1 undef, label %loop, label %exit
 
 exit:
   call void @llvm.objc.release(i8* %a) nounwind
   call void @llvm.objc.release(i8* %a) nounwind, !clang.imprecise_release !0
   ret void
 }
 
-;      CHECK: define void @test4(i8* %a) #0 {
+;      CHECK: define void @test4(i8* %a) #1 {
 ; CHECK-NEXT: entry:
 ; CHECK-NEXT:   tail call i8* @llvm.objc.retain(i8* %a) [[NUW]]
 ; CHECK-NEXT:   br label %loop
 ;  CHECK-NOT:   @llvm.objc.
 ;      CHECK: exit:
 ; CHECK-NEXT:   call void @llvm.objc.release(i8* %a)
 ; CHECK-NEXT:   ret void
 ; CHECK-NEXT: }
more:
   br i1 undef, label %loop, label %exit
 
 exit:
   call void @llvm.objc.release(i8* %a) nounwind
   call void @llvm.objc.release(i8* %a) nounwind, !clang.imprecise_release !0
   ret void
 }
 
-;      CHECK: define void @test5(i8* %a) #0 {
+;      CHECK: define void @test5(i8* %a) #1 {
 ; CHECK-NEXT: entry:
 ; CHECK-NEXT:   tail call i8* @llvm.objc.retain(i8* %a) [[NUW]]
 ; CHECK-NEXT:   call void @callee()
 ; CHECK-NEXT:   br label %loop
 ;  CHECK-NOT:   @llvm.objc.
 ;      CHECK: exit:
 ; CHECK-NEXT:   call void @use_pointer(i8* %a)
 ; CHECK-NEXT:   call void @llvm.objc.release(i8* %a)

 
 exit:
   call void @use_pointer(i8* %a)
   call void @llvm.objc.release(i8* %a) nounwind
   call void @llvm.objc.release(i8* %a) nounwind, !clang.imprecise_release !0
   ret void
 }
 
-;      CHECK: define void @test6(i8* %a) #0 {
+;      CHECK: define void @test6(i8* %a) #1 {
 ; CHECK-NEXT: entry:
 ; CHECK-NEXT:   tail call i8* @llvm.objc.retain(i8* %a) [[NUW]]
 ; CHECK-NEXT:   br label %loop
 ;  CHECK-NOT:   @llvm.objc.
 ;      CHECK: exit:
 ; CHECK-NEXT:   call void @use_pointer(i8* %a)
 ; CHECK-NEXT:   call void @llvm.objc.release(i8* %a)
 ; CHECK-NEXT:   ret void

 
 exit:
   call void @use_pointer(i8* %a)
   call void @llvm.objc.release(i8* %a) nounwind
   call void @llvm.objc.release(i8* %a) nounwind, !clang.imprecise_release !0
   ret void
 }
 
-;      CHECK: define void @test7(i8* %a) #0 {
+;      CHECK: define void @test7(i8* %a) #1 {
 ; CHECK-NEXT: entry:
 ; CHECK-NEXT:   tail call i8* @llvm.objc.retain(i8* %a) [[NUW]]
 ; CHECK-NEXT:   call void @callee()
 ; CHECK-NEXT:   br label %loop
 ;  CHECK-NOT:   @llvm.objc.
 ;      CHECK: exit:
 ; CHECK-NEXT:   call void @llvm.objc.release(i8* %a)
 ; CHECK-NEXT:   ret void
more:
   br i1 undef, label %exit, label %loop
 
 exit:
   call void @llvm.objc.release(i8* %a) nounwind
   call void @llvm.objc.release(i8* %a) nounwind, !clang.imprecise_release !0
   ret void
 }
 
-;      CHECK: define void @test8(i8* %a) #0 {
+;      CHECK: define void @test8(i8* %a) #1 {
 ; CHECK-NEXT: entry:
 ; CHECK-NEXT:   tail call i8* @llvm.objc.retain(i8* %a) [[NUW]]
 ; CHECK-NEXT:   br label %loop
 ;  CHECK-NOT:   @llvm.objc.
 ;      CHECK: exit:
 ; CHECK-NEXT:   call void @llvm.objc.release(i8* %a)
 ; CHECK-NEXT:   ret void
 ; CHECK-NEXT: }
more:
   br i1 undef, label %exit, label %loop
 
 exit:
   call void @llvm.objc.release(i8* %a) nounwind
   call void @llvm.objc.release(i8* %a) nounwind, !clang.imprecise_release !0
   ret void
 }
 
-;      CHECK: define void @test9(i8* %a) #0 {
+;      CHECK: define void @test9(i8* %a) #1 {
 ; CHECK-NEXT: entry:
 ; CHECK-NEXT:   br label %loop
 ;  CHECK-NOT:   @llvm.objc.
 ;      CHECK: exit:
 ; CHECK-NEXT:   ret void
 ; CHECK-NEXT: }
 define void @test9(i8* %a) nounwind {
 entry:
more:
   br i1 undef, label %exit, label %loop
 
 exit:
   call void @llvm.objc.release(i8* %a) nounwind
   call void @llvm.objc.release(i8* %a) nounwind, !clang.imprecise_release !0
   ret void
 }
 
-;      CHECK: define void @test10(i8* %a) #0 {
+;      CHECK: define void @test10(i8* %a) #1 {
 ; CHECK-NEXT: entry:
 ; CHECK-NEXT:   br label %loop
 ;  CHECK-NOT:   @llvm.objc.
 ;      CHECK: exit:
 ; CHECK-NEXT:   ret void
 ; CHECK-NEXT: }
 define void @test10(i8* %a) nounwind {
 entry:
more:
   br i1 undef, label %exit, label %loop
 
 exit:
   call void @llvm.objc.release(i8* %a) nounwind
   call void @llvm.objc.release(i8* %a) nounwind, !clang.imprecise_release !0
   ret void
 }
 
-;      CHECK: define void @test11(i8* %a) #0 {
+;      CHECK: define void @test11(i8* %a) #1 {
 ; CHECK-NEXT: entry:
 ; CHECK-NEXT:   br label %loop
 ;  CHECK-NOT:   @llvm.objc.
 ;      CHECK: exit:
 ; CHECK-NEXT:   ret void
 ; CHECK-NEXT: }
 define void @test11(i8* %a) nounwind {
 entry:

 exit:
   call void @llvm.objc.release(i8* %a) nounwind
   call void @llvm.objc.release(i8* %a) nounwind, !clang.imprecise_release !0
   ret void
 }
 
 ; Don't delete anything if they're not balanced.
 
-;      CHECK: define void @test12(i8* %a) #0 {
+;      CHECK: define void @test12(i8* %a) #1 {
 ; CHECK-NEXT: entry:
 ; CHECK-NEXT:   %outer = tail call i8* @llvm.objc.retain(i8* %a) [[NUW]]
 ; CHECK-NEXT:   %inner = tail call i8* @llvm.objc.retain(i8* %a) [[NUW]]
 ; CHECK-NEXT:   br label %loop
 ;  CHECK-NOT:   @llvm.objc.
 ;      CHECK: exit:
 ; CHECK-NEXT: call void @llvm.objc.release(i8* %a) [[NUW]]
 ; CHECK-NEXT: call void @llvm.objc.release(i8* %a) [[NUW]], !clang.imprecise_release !0

 loop:
   %a2 = tail call i8* @llvm.objc.retain(i8* %a) nounwind
   store i8* %a, i8** %block, align 8
   %casted_block = bitcast i8** %block to void ()*
   call void @block_callee(void ()* %casted_block)
   %reloaded_a = load i8*, i8** %block, align 8
   call void @llvm.objc.release(i8* %reloaded_a) nounwind, !clang.imprecise_release !0
   br i1 undef, label %loop, label %exit
-  
 exit:
   call void @llvm.objc.release(i8* %a) nounwind, !clang.imprecise_release !0
   ret void
 }
 
 ; CHECK: attributes [[NUW]] = { nounwind }
 
 !0 = !{}

llvm/test/Transforms/ObjCARC/contract-storestrong-funclet.ll

ehcleanup:
   %call1 = tail call i8* @llvm.objc.retain(i8* %p) nounwind [ "funclet"(token %1) ]
   %tmp1 = load i8*, i8** @x, align 4
   store i8* %call1, i8** @x, align 4
   tail call void @llvm.objc.release(i8* %tmp1) nounwind [ "funclet"(token %1) ]
   cleanupret from %1 unwind to caller
 }
 
 ; CHECK-LABEL: invoke.cont:
-; CHECK: tail call void @llvm.objc.storeStrong(i8** @x, i8* %p) #0{{$}}
+; CHECK: tail call void @llvm.objc.storeStrong(i8** @x, i8* %p) #1{{$}}
 ; CHECK: ret void
 
 ; CHECK-LABEL: ehcleanup:
 ; CHECK: %1 = cleanuppad within none []
-; CHECK: tail call void @llvm.objc.storeStrong(i8** @x, i8* %p) #0 [ "funclet"(token %1) ]
+; CHECK: tail call void @llvm.objc.storeStrong(i8** @x, i8* %p) #1 [ "funclet"(token %1) ]
 ; CHECK: cleanupret from %1 unwind to caller

llvm/test/Transforms/ObjCARC/ensure-that-exception-unwind-path-is-visited.ll

 
 declare void @llvm.objc.release(i8*) nonlazybind
 
 declare void @NSLog(i8*, ...)
 
 declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
 
 ; CHECK: attributes #0 = { ssp uwtable }
-; CHECK: attributes #1 = { nounwind readnone speculatable willreturn }
+; CHECK: attributes #1 = { noconvergent nounwind readnone speculatable willreturn }
 ; CHECK: attributes #2 = { nonlazybind }
-; CHECK: attributes [[NUW]] = { nounwind }
 ; CHECK: attributes #4 = { noinline ssp uwtable }
+; CHECK: attributes [[NUW]] = { nounwind }
 
 !llvm.dbg.cu = !{!0}
 !llvm.module.flags = !{!33, !34, !35, !36, !61}
 
 !0 = distinct !DICompileUnit(language: DW_LANG_ObjC, producer: "clang version 3.3 ", isOptimized: true, runtimeVersion: 2, emissionKind: FullDebug, file: !60, enums: !1, retainedTypes: !1, globals: !1)
 !1 = !{}
 !5 = distinct !DISubprogram(name: "main", line: 9, isLocal: false, isDefinition: true, virtualIndex: 6, isOptimized: true, unit: !0, scopeLine: 10, file: !60, scope: !6, type: !7, retainedNodes: !11)
 !6 = !DIFile(filename: "test.m", directory: "/Volumes/Files/gottesmmcab/Radar/12906997")

llvm/test/Transforms/ObjCARC/escape.ll

 declare i8* @llvm.objc.retainBlock(i8*)
 declare i8* @llvm.objc.storeWeak(i8**, i8*)
 declare i8* @not_really_objc_storeWeak(i8**, i8*)
 declare void @llvm.objc.release(i8*)
 
 !0 = !{}
 
 ; CHECK: attributes [[NUW]] = { nounwind }
-; CHECK: attributes #1 = { nounwind ssp }
+; CHECK: attributes #2 = { nounwind ssp }

llvm/test/Transforms/ObjCARC/nested.ll

entry:
   call void @llvm.objc.release(i8* %foo21) nounwind
   %strongdestroy25 = load i8*, i8** %foo10, align 8
   call void @llvm.objc.release(i8* %strongdestroy25) nounwind, !clang.imprecise_release !0
   call void @llvm.objc.release(i8* %call) nounwind, !clang.imprecise_release !0
   ret void
 }
 
 
-; CHECK: attributes [[NUW]] = { nounwind }
-; CHECK: attributes #1 = { argmemonly nounwind willreturn }
+; CHECK: attributes #1 = { argmemonly noconvergent nounwind willreturn }
 ; CHECK: attributes #2 = { nonlazybind }
+; CHECK: attributes [[NUW]] = { nounwind }

llvm/test/Transforms/ObjCARC/opt-catchswitch.ll

 ; CHECK-NEXT:            to label %invoke.cont unwind label %catch.dispatch
 
 ; CHECK-LABEL: catch.dispatch:
 ; CHECK-NEXT:    %1 = catchswitch within none [label %catch] unwind to caller
 
 ; CHECK-LABEL: cleanup:
 ; CHECK:         tail call void @llvm.objc.release(i8* %p) #0
 
-attributes #0 = { nounwind }
+attributes #0 = { noconvergent nounwind }
 
 !0 = !{}

llvm/test/Transforms/ObjCARC/rle-s2l.ll

 define void @test7(i8** %p, i8* %n, i8** %q, i8* %m) {
   call i8* @llvm.objc.initWeak(i8** %p, i8* %n)
   call i8* @llvm.objc.storeWeak(i8** %q, i8* %m)
   %y = call i8* @llvm.objc.loadWeak(i8** %p)
   call void @use_pointer(i8* %y)
   ret void
 }
 
-; CHECK: attributes #0 = { nounwind }
+; CHECK: attributes #0 = { noconvergent nounwind }
 ; CHECK: attributes [[RO]] = { readonly }

llvm/test/Transforms/PreISelIntrinsicLowering/objc-arc.ll

 ; CHECK: declare i8* @objc_unsafeClaimAutoreleasedReturnValue(i8*)
 ; CHECK: declare i8* @objc_retainedObject(i8*)
 ; CHECK: declare i8* @objc_unretainedObject(i8*)
 ; CHECK: declare i8* @objc_unretainedPointer(i8*)
 ; CHECK: declare i8* @objc_retain_autorelease(i8*)
 ; CHECK: declare i32 @objc_sync_enter(i8*)
 ; CHECK: declare i32 @objc_sync_exit(i8*)
 
-; CHECK: attributes #0 = { nounwind }
+; CHECK: attributes #0 = { noconvergent nounwind }
 ; CHECK: attributes [[NLB]] = { nonlazybind }

llvm/test/Transforms/RewriteStatepointsForGC/statepoint-attrs.ll

 ; RUN: opt -S -rewrite-statepoints-for-gc < %s | FileCheck %s
 ; RUN: opt -S -passes=rewrite-statepoints-for-gc < %s | FileCheck %s
 ; Ensure statepoints copy (valid) attributes from callsites.
 
-declare void @f(i8 addrspace(1)* %obj)
+declare void @f(i8 addrspace(1)* %obj) noconvergent
 
 ; copy over norecurse noimplicitfloat to statepoint call
 define void @test1(i8 addrspace(1)* %arg) gc "statepoint-example" {
 ; CHECK-LABEL: test1(
-; CHECK: call token (i64, i32, void (i8 addrspace(1)*)*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidp1i8f(i64 2882400000, i32 0, void (i8 addrspace(1)*)* @f, i32 1, i32 0, i8 addrspace(1)* %arg, i32 0, i32 0, i8 addrspace(1)* %arg) #1
+; CHECK: call token (i64, i32, void (i8 addrspace(1)*)*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidp1i8f(i64 2882400000, i32 0, void (i8 addrspace(1)*)* @f, i32 1, i32 0, i8 addrspace(1)* %arg, i32 0, i32 0, i8 addrspace(1)* %arg) #2
 
  call void @f(i8 addrspace(1)* %arg) #1
  ret void
 }
 
 
-attributes #1 = { norecurse noimplicitfloat }
+attributes #1 = { norecurse noconvergent noimplicitfloat }

llvm/test/Transforms/SLPVectorizer/X86/call.ll

 }
 
 
 ; CHECK: declare <2 x double> @llvm.sin.v2f64(<2 x double>) [[ATTR0:#[0-9]+]]
 ; CHECK: declare <2 x double> @llvm.cos.v2f64(<2 x double>) [[ATTR0]]
 ; CHECK: declare <2 x double> @llvm.pow.v2f64(<2 x double>, <2 x double>) [[ATTR0]]
 ; CHECK: declare <2 x double> @llvm.exp2.v2f64(<2 x double>) [[ATTR0]]
 
-; CHECK: attributes [[ATTR0]] = { nounwind readnone speculatable willreturn }
+; CHECK: attributes [[ATTR0]] = { noconvergent nounwind readnone speculatable willreturn }
 

llvm/test/Transforms/SimpleLoopUnswitch/basictest.ll

define i32 @test3(i32* %var) {
   br label %loop_begin
 
 loop_begin:
 
   %var_val = load i32, i32* %var
 
 ; CHECK: call void @conv()
 ; CHECK-NOT: call void @conv()
-  call void @conv() convergent
+  call void @conv()
 
   switch i32 %c, label %default [
       i32 1, label %inc
       i32 2, label %dec
   ]
 
 inc:
   call void @incf() noreturn nounwind

 ; CHECK-NOT: icmp
 ; CHECK: br
 define void @and_or_i2_as_switch_input(i2 %a) {
 entry:
   br label %for.body
 
 for.body:
   %i = phi i2 [ 0, %entry ], [ %inc, %for.inc ]
-  %and = and i2 %a, %i 
+  %and = and i2 %a, %i
   %or = or i2 %and, %i
   switch i2 %or, label %sw.default [
     i2 0, label %sw.bb
     i2 3, label %sw.bb1
   ]
 
 sw.bb:
   br label %sw.epilog
 
 sw.bb1:
   br label %sw.epilog
 
 sw.default:
   br label %sw.epilog
 
 sw.epilog:
   br label %for.inc
 
 for.inc:
   %inc = add nsw i2 %i, 1
-  %cmp = icmp slt i2 %inc, 3 
+  %cmp = icmp slt i2 %inc, 3
   br i1 %cmp, label %for.body, label %for.end
 
 for.end:
   ret void
 }
 
 ; Make sure we don't unswitch, as we can not find an input value %a
 ; that will effectively unswitch true/false out of the loop.
 ;
 ; CHECK: define void @and_or_i1_as_branch_input(i1
 ; CHECK: entry:
 ; This is an indication that the loop has NOT been unswitched.
 ; CHECK-NOT: icmp
 ; CHECK: br
 define void @and_or_i1_as_branch_input(i1 %a) {
 entry:
   br label %for.body
 
 for.body:
   %i = phi i1 [ 0, %entry ], [ %inc, %for.inc ]
-  %and = and i1 %a, %i 
+  %and = and i1 %a, %i
   %or = or i1 %and, %i
   br i1 %or, label %sw.bb, label %sw.bb1
 
 sw.bb:
   br label %sw.epilog
 
 sw.bb1:
   br label %sw.epilog
 
 sw.epilog:
   br label %for.inc
 
 for.inc:
   %inc = add nsw i1 %i, 1
-  %cmp = icmp slt i1 %inc, 1 
+  %cmp = icmp slt i1 %inc, 1
   br i1 %cmp, label %for.body, label %for.end
 
 for.end:
   ret void
 }
 
-declare void @incf() noreturn
-declare void @decf() noreturn
-declare void @conv() convergent
+declare void @incf() noconvergent noreturn
+declare void @decf() noconvergent noreturn
+declare void @conv()

llvm/test/Transforms/SimpleLoopUnswitch/delete-dead-blocks.ll

 ; RUN: opt < %s -simple-loop-unswitch -enable-nontrivial-unswitch -S 2>&1 | FileCheck %s
 ; RUN: opt < %s -passes='unswitch<nontrivial>' -S 2>&1 | FileCheck %s
 ; RUN: opt < %s -passes='loop-mssa(unswitch<nontrivial>)' -S 2>&1 | FileCheck %s
 ;
 ; Checking that (dead) blocks from inner loop are deleted after unswitch.
 ;
-declare void @foo()
+declare void @foo() noconvergent
 
 ; CHECK-LABEL: @Test
 define void @Test(i32) {
 entry:
   br label %outer
 outer:
   %oi = phi i32 [ 0, %entry ], [ %oinc, %outer_continue]
   br label %inner
 inner:
   %ii = phi i32 [ 0, %outer ], [ %iinc, %continue]
-  call void @foo() 
+  call void @foo()
   switch i32 %0, label %get_out2 [
     i32 0, label %continue
     i32 1, label %case1
     i32 2, label %get_out
   ]
 ;
 ; since we unswitch on the above switch, %case1 and %continue blocks
 ; become dead in the original loop

llvm/test/Transforms/SimpleLoopUnswitch/exponential-nontrivial-unswitch-nested.ll

 ; LOOP-UNSCALE4-DIV2-NOT:      Loop at depth {{[0-9]+}} containing:
 ;
 ; 32 loop nests, fully unswitched
 ; LOOP32-COUNT-32: Loop at depth 1 containing:
 ; LOOP32-COUNT-32: Loop at depth 2 containing:
 ; LOOP32-COUNT-32: Loop at depth 3 containing:
 ; LOOP32-NOT:      Loop at depth {{[0-9]+}} containing:
 
-declare void @bar()
+declare void @bar() noconvergent
 
 define void @loop_nested3_conds5(i32* %addr, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5) {
 entry:
   %addr1 = getelementptr i32, i32* %addr, i64 0
   %addr2 = getelementptr i32, i32* %addr, i64 1
   %addr3 = getelementptr i32, i32* %addr, i64 2
   br label %outer
 outer:

llvm/test/Transforms/SimpleLoopUnswitch/exponential-nontrivial-unswitch-nested2.ll

 ; Maximally unswitched (copy of the outer loop per each condition)
 ; LOOP-MAX-COUNT-6: Loop at depth 1 containing:
 ; LOOP-MAX-NOT:      Loop at depth 1 containing:
 ; LOOP-MAX-COUNT-1: Loop at depth 2 containing:
 ; LOOP-MAX-NOT:      Loop at depth 2 containing:
 ; LOOP-MAX-COUNT-1: Loop at depth 3 containing:
 ; LOOP-MAX-NOT:      Loop at depth 3 containing:
 
-declare void @bar()
+declare void @bar() noconvergent
 
 define void @loop_nested3_conds5(i32* %addr, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5) {
 entry:
   %addr1 = getelementptr i32, i32* %addr, i64 0
   %addr2 = getelementptr i32, i32* %addr, i64 1
   %addr3 = getelementptr i32, i32* %addr, i64 2
   br label %outer
 outer:

llvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch-cost.ll

 ; Specifically exercise the cost modeling for non-trivial loop unswitching.
 ;
 ; RUN: opt -passes='loop(unswitch<nontrivial>),verify<loops>' -unswitch-threshold=5 -S < %s | FileCheck %s
 ; RUN: opt -passes='loop-mssa(unswitch<nontrivial>),verify<loops>' -unswitch-threshold=5 -S < %s | FileCheck %s
 ; RUN: opt -simple-loop-unswitch -enable-nontrivial-unswitch -unswitch-threshold=5 -S < %s | FileCheck %s
 ; RUN: opt -simple-loop-unswitch -enable-nontrivial-unswitch -unswitch-threshold=5 -enable-mssa-loop-dependency=true -verify-memoryssa -S < %s | FileCheck %s
 
-declare void @a()
-declare void @b()
-declare void @x()
+declare void @a() noconvergent
+declare void @b() noconvergent
+declare void @x() noconvergent
 
 ; First establish enough code size in the duplicated 'loop_begin' block to
 ; suppress unswitching.
 define void @test_no_unswitch(i1* %ptr, i1 %cond) {
 ; CHECK-LABEL: @test_no_unswitch(
 entry:
   br label %loop_begin
 ; CHECK-NEXT:  entry:

llvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch.ll

 ; RUN: opt -passes='loop(unswitch<nontrivial>),verify<loops>' -S < %s | FileCheck %s
 ; RUN: opt -passes='loop-mssa(unswitch<nontrivial>),verify<loops>' -S < %s | FileCheck %s
 ; RUN: opt -simple-loop-unswitch -enable-nontrivial-unswitch -S < %s | FileCheck %s
 ; RUN: opt -simple-loop-unswitch -enable-nontrivial-unswitch -enable-mssa-loop-dependency=true -verify-memoryssa -S < %s | FileCheck %s
 
-declare i32 @a()
-declare i32 @b()
-declare i32 @c()
-declare i32 @d()
+declare i32 @a() noconvergent
+declare i32 @b() noconvergent
+declare i32 @c() noconvergent
+declare i32 @d() noconvergent
 
-declare void @sink1(i32)
-declare void @sink2(i32)
+declare i32 @convergent()
 
-declare i1 @cond()
-declare i32 @cond.i32()
+declare void @sink1(i32) noconvergent
+declare void @sink2(i32) noconvergent
+
+declare i1 @cond() noconvergent
+declare i32 @cond.i32() noconvergent
 
 ; Negative test: we cannot unswitch convergent calls.
 define void @test_no_unswitch_convergent(i1* %ptr, i1 %cond) {
 ; CHECK-LABEL: @test_no_unswitch_convergent(
 entry:
   br label %loop_begin
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br label %loop_begin
 ;
 ; We shouldn't have unswitched into any other block either.
 ; CHECK-NOT:     br i1 %cond
 
 loop_begin:
   br i1 %cond, label %loop_a, label %loop_b
 ; CHECK:       loop_begin:
 ; CHECK-NEXT:    br i1 %cond, label %loop_a, label %loop_b
 
 loop_a:
-  call i32 @a() convergent
+  call i32 @convergent()
   br label %loop_latch
 
 loop_b:
   call i32 @b()
   br label %loop_latch
 
 loop_latch:
   %v = load i1, i1* %ptr

 loop_latch:
   %v = load i1, i1* %ptr
   br i1 %v, label %loop_begin, label %loop_exit
 
 loop_exit:
   ret void
 }
 
-declare i32 @__CxxFrameHandler3(...)
+declare i32 @__CxxFrameHandler3(...) noconvergent
 
 ; Negative test: we cannot unswitch when tokens are used across blocks as we
 ; might introduce PHIs.
 define void @test_no_unswitch_cross_block_token(i1* %ptr, i1 %cond) nounwind personality i32 (...)* @__CxxFrameHandler3 {
 ; CHECK-LABEL: @test_no_unswitch_cross_block_token(
 entry:
   br label %loop_begin
 ; CHECK-NEXT:  entry:
bb23:
   br label %bb3
 }
 
 ; A test reduced out of 400.perlbench that when unswitching the `%stop`
 ; condition clones a loop nest outside of a containing loop. This excercises a
 ; different cloning path from our other test cases and in turn verifying the
 ; resulting structure can catch any failures to correctly clone these nested
 ; loops.
-declare void @f()
-declare void @g()
-declare i32 @h(i32 %arg)
+declare void @f() noconvergent
+declare void @g() noconvergent
+declare i32 @h(i32 %arg) noconvergent
 define void @test22(i32 %arg) {
 ; CHECK-LABEL: define void @test22(
 entry:
   br label %loop1.header
 
 loop1.header:
   %stop = phi i1 [ true, %loop1.latch ], [ false, %entry ]
   %i = phi i32 [ %i.lcssa, %loop1.latch ], [ %arg, %entry ]

llvm/test/Transforms/SimplifyCFG/attr-convergent.ll

 ; RUN: opt < %s -simplifycfg -S | FileCheck %s
 
-; Checks that the SimplifyCFG pass won't duplicate a call to a function marked
-; convergent.
+; Checks that the SimplifyCFG pass won't duplicate a call to a
+; potentially convergent function
+
 ;
 ; CHECK: call void @barrier
 ; CHECK-NOT: call void @barrier
 define void @check(i1 %cond, i32* %out) {
 entry:
   br i1 %cond, label %if.then, label %if.end
 
 if.then:
   store i32 5, i32* %out
   br label %if.end
 
 if.end:
   %x = phi i1 [ true, %entry ], [ false, %if.then ]
   call void @barrier()
   br i1 %x, label %cond.end, label %cond.false
 
 cond.false:
   br label %cond.end
 
 cond.end:
   ret void
 }
 
-declare void @barrier() convergent
+declare void @barrier()

llvm/test/Transforms/SimplifyCFG/branch-phi-thread.ll

 ; RUN: opt < %s -simplifycfg -adce -S | \
 ; RUN:   not grep "call void @f1"
 ; END.
 
-declare void @f1()
+declare void @f1() noconvergent
 
-declare void @f2()
+declare void @f2() noconvergent
 
-declare void @f3()
+declare void @f3() noconvergent
 
-declare void @f4()
+declare void @f4() noconvergent
 
 define i32 @test1(i32 %X, i1 %D) {
 E:
   %C = icmp eq i32 %X, 0    ; <i1> [#uses=2]
   br i1 %C, label %T, label %F
 T:    ; preds = %A, %E
   br i1 %C, label %B, label %A
 A:    ; preds = %T

llvm/test/Transforms/SimplifyCFG/switch-on-const-select.ll

 a:
   ret i32 -1
 bees:
   tail call void @llvm.trap()
   unreachable
 }
 
 declare void @llvm.trap() nounwind noreturn
-declare void @bees.a() nounwind
-declare void @bees.b() nounwind
+declare void @bees.a() noconvergent nounwind
+declare void @bees.b() noconvergent nounwind
 
-; CHECK: attributes #1 = { cold noreturn nounwind }
+; CHECK: attributes #1 = { cold noconvergent noreturn nounwind }

llvm/test/Transforms/Sink/call.ll

 ; RUN: opt < %s -basicaa -sink -S | FileCheck %s
 
-declare i32 @f_load_global() nounwind readonly
-declare i32 @f_load_arg(i32*) nounwind readonly argmemonly
-declare void @f_store_global(i32) nounwind
-declare void @f_store_arg(i32*) nounwind argmemonly
-declare void @f_readonly_arg(i32* readonly, i32*) nounwind argmemonly
-declare i32 @f_readnone(i32) nounwind readnone
+declare i32 @f_load_global() noconvergent nounwind readonly
+declare i32 @f_load_arg(i32*) noconvergent nounwind readonly argmemonly
+declare void @f_store_global(i32) noconvergent nounwind
+declare void @f_store_arg(i32*) noconvergent nounwind argmemonly
+declare void @f_readonly_arg(i32* readonly, i32*) noconvergent nounwind argmemonly
+declare i32 @f_readnone(i32) noconvergent nounwind readnone
 
 @A = external global i32
 @B = external global i32
 
 ; Sink readonly call if no stores are in the way.
 ;
 ; CHECK-LABEL: @test_sink_no_stores(
 ; CHECK: true:

llvm/test/Transforms/Sink/convergent.ll

 ; RUN: opt -sink -S < %s | FileCheck %s
 
 ; Verify that IR sinking does not move convergent operations to
 ; blocks that are not control equivalent.
 
 ; CHECK: define i32 @foo
 ; CHECK: entry
 ; CHECK-NEXT: call i32 @bar
 ; CHECK-NEXT: br i1 %arg
 
 define i32 @foo(i1 %arg) {
 entry:
-  %c = call i32 @bar() readonly convergent
+  %c = call i32 @bar() readonly
   br i1 %arg, label %then, label %end
 
 then:
   ret i32 %c
 
 end:
   ret i32 0
 }
 
-declare i32 @bar() readonly convergent
+declare i32 @bar() readonly

llvm/test/Transforms/SpeculateAroundPHIs/convergent.ll

 
 exit:
   %p = phi i32 [ 7, %a ], [ 11, %b ]
   %sum = call i32 @llvm.regular(i32 %p)
   ret i32 %sum
 }
 
 
-attributes #0 = { nounwind readnone convergent speculatable }
+attributes #0 = { nounwind readnone speculatable }
 attributes #1 = { nounwind readnone noduplicate speculatable }
-attributes #2 = { nounwind readnone speculatable }
+attributes #2 = { noconvergent nounwind readnone speculatable }

llvm/test/Verifier/fp-intrinsics.ll

 ; RUN: opt -verify -S < %s 2>&1 | FileCheck --check-prefix=CHECK1 %s
 ; RUN: sed -e s/.T2:// %s | not opt -verify -disable-output 2>&1 | FileCheck --check-prefix=CHECK2 %s
 ; RUN: sed -e s/.T3:// %s | not opt -verify -disable-output 2>&1 | FileCheck --check-prefix=CHECK3 %s
 ; RUN: sed -e s/.T4:// %s | not opt -verify -disable-output 2>&1 | FileCheck --check-prefix=CHECK4 %s
 ; RUN: sed -e s/.T5:// %s | not opt -verify -disable-output 2>&1 | FileCheck --check-prefix=CHECK5 %s
 
 ; Common declarations used for all runs.
 declare double @llvm.experimental.constrained.fadd.f64(double, double, metadata, metadata)
 declare double @llvm.experimental.constrained.sqrt.f64(double, metadata, metadata)
 
 ; Test that the verifier accepts legal code, and that the correct attributes are
 ; attached to the FP intrinsic.
 ; CHECK1: declare double @llvm.experimental.constrained.fadd.f64(double, double, metadata, metadata) #[[ATTR:[0-9]+]]
 ; CHECK1: declare double @llvm.experimental.constrained.sqrt.f64(double, metadata, metadata) #[[ATTR]]
-; CHECK1: attributes #[[ATTR]] = { inaccessiblememonly nounwind willreturn }
+; CHECK1: attributes #[[ATTR]] = { inaccessiblememonly noconvergent nounwind willreturn }
 ; Note: FP exceptions aren't usually caught through normal unwind mechanisms,
 ;       but we may want to revisit this for asynchronous exception handling.
 define double @f1(double %a, double %b) #0 {
 entry:
   %fadd = call double @llvm.experimental.constrained.fadd.f64(
                                                double %a, double %b,
                                                metadata !"round.dynamic",
                                                metadata !"fpexcept.strict") #0

llvm/utils/TableGen/IntrinsicEmitter.cpp

if (ae) {
         OS << "      AS[" << numAttrs++ << "] = AttributeList::get(C, "
            << attrIdx << ", AttrParam" << attrIdx << ");\n";
       }
     }
 
     if (!intrinsic.canThrow ||
         (intrinsic.ModRef != CodeGenIntrinsic::ReadWriteMem && !intrinsic.hasSideEffects) ||
         intrinsic.isNoReturn || intrinsic.isWillReturn || intrinsic.isCold ||
-        intrinsic.isNoDuplicate || intrinsic.isConvergent ||
+        intrinsic.isNoDuplicate || !intrinsic.isConvergent ||
         intrinsic.isSpeculatable) {
       OS << "      const Attribute::AttrKind Atts[] = {";
       bool addComma = false;
       if (!intrinsic.canThrow) {
         OS << "Attribute::NoUnwind";
         addComma = true;
       }
       if (intrinsic.isNoReturn) {
if (!intrinsic.canThrow ||
         addComma = true;
       }
       if (intrinsic.isNoDuplicate) {
         if (addComma)
           OS << ",";
         OS << "Attribute::NoDuplicate";
         addComma = true;
       }
-      if (intrinsic.isConvergent) {
+      if (!intrinsic.isConvergent) {
         if (addComma)
           OS << ",";
-        OS << "Attribute::Convergent";
+        OS << "Attribute::NoConvergent";
         addComma = true;
       }
       if (intrinsic.isSpeculatable) {
         if (addComma)
           OS << ",";
         OS << "Attribute::Speculatable";
         addComma = true;
       }

llvm/utils/emacs/llvm-mode.el

(let ((table (make-syntax-table)))
     (modify-syntax-entry ?\n "> " table)
     table)
   "Syntax table used while in LLVM mode.")
 
 (defvar llvm-font-lock-keywords
   (list
    ;; Attributes
    `(,(regexp-opt
-       '("alwaysinline" "argmemonly" "builtin" "cold" "convergent" "inaccessiblememonly"
+       '("alwaysinline" "argmemonly" "builtin" "cold" "noconvergent" "inaccessiblememonly"
          "inaccessiblemem_or_argmemonly" "inlinehint" "jumptable" "minsize" "naked" "nobuiltin"
          "noduplicate" "noimplicitfloat" "noinline" "nonlazybind" "noredzone" "noreturn"
          "norecurse" "nounwind" "optnone" "optsize" "readnone" "readonly" "returns_twice"
          "speculatable" "ssp" "sspreq" "sspstrong" "safestack" "sanitize_address" "sanitize_hwaddress" "sanitize_memtag"
          "sanitize_thread" "sanitize_memory" "strictfp" "uwtable" "writeonly" "immarg") 'symbols) . font-lock-constant-face)
    ;; Variables
    '("%[-a-zA-Z$._][-a-zA-Z$._0-9]*" . font-lock-variable-name-face)
    ;; Labels

llvm/utils/vim/syntax/llvm.vim

syn keyword llvmKeyword
       \ monotonic
       \ msp430_intrcc
       \ musttail
       \ naked
       \ nest
       \ noalias
       \ nobuiltin
       \ nocapture
+      \ noconvergent
       \ noimplicitfloat
       \ noinline
       \ nonlazybind
       \ nonnull
       \ norecurse
       \ noredzone
       \ noreturn
       \ nounwind