nhaehnle (Nicolai Hähnle)
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User Since
Oct 9 2015, 4:06 AM (137 w, 1 d)

Recent Activity

Yesterday

nhaehnle accepted D47027: [AMDGPU] Fixed WWM bug in block otherwise entirely in WQM.

Oops :)
LGTM.

Sat, May 26, 1:35 PM

Thu, May 17

nhaehnle accepted D46340: AMDGPU/SI: Handle infinite loop for the structurizer to work with CFG with infinite loops..

LGTM

Thu, May 17, 8:26 AM

Wed, May 9

nhaehnle added a comment to D45994: AMDGPU/GlobalISel: Enable TableGen'd instruction selector.

Hmm, you may have a point about trying to push the boundaries of what's possible by folding immediately. It would certainly be nice if it was possible.

Wed, May 9, 10:36 AM
nhaehnle added inline comments to D45994: AMDGPU/GlobalISel: Enable TableGen'd instruction selector.
Wed, May 9, 1:09 AM

Mon, May 7

nhaehnle added a comment to D46340: AMDGPU/SI: Handle infinite loop for the structurizer to work with CFG with infinite loops..

Thanks. This change introduces more branches, but since it should only do so in an infinite loop it should be fine.

Mon, May 7, 12:45 AM
nhaehnle accepted D46438: AMDGPU: Use eraseFromParent to delete am instruction when it is no longer needed..
Mon, May 7, 12:31 AM

Fri, May 4

nhaehnle accepted D46051: [AMDGPU] Don't force WQM for DS op.

Should be good to go. Please add a reference to Mesa commit "amd/common: use llvm.amdgcn.wqm for explicit derivatives" to the commit message.

Fri, May 4, 2:05 AM

Thu, May 3

nhaehnle accepted D46054: [TableGen] Add a general-purpose JSON backend..

Great, LGTM!

Thu, May 3, 9:29 AM
nhaehnle added a comment to D46054: [TableGen] Add a general-purpose JSON backend..

Thanks, this already looks very good. I do have some suggestions though.

Thu, May 3, 8:06 AM
nhaehnle added a comment to D46340: AMDGPU/SI: Handle infinite loop for the structurizer to work with CFG with infinite loops..

So this does not cover all possible cases of "irreducible" infinite loops, e.g. consider the case with basic blocks A and B where both end with a conditional branch that can go to either A or B. I.e., there are no unconditional branches in the loop.

Thu, May 3, 7:46 AM
nhaehnle accepted D46272: AMDGPU: Remove #include "MCTargetDesc/AMDGPUMCTargetDesc.h" from common headers.

There are some unrelated changes, which I think should be mentioned in the commit description. Apart from that LGTM.

Thu, May 3, 2:56 AM

Wed, May 2

nhaehnle accepted D46352: [TableGen] Don't quote variable name when printing !foreach..

Good catch! I agree that this is a very useful change.

Wed, May 2, 6:09 AM

Mon, Apr 30

nhaehnle accepted D46170: AMDGPU/GlobalISel: Implement select() for G_FCONSTANT.

LGTM

Mon, Apr 30, 1:19 AM
nhaehnle added a comment to D46150: AMDGPU/GlobalISel: Implement select() for G_IMPLICIT_DEF.

Is the default implementation really unable to do this? That seems a bit silly...

Mon, Apr 30, 1:12 AM
nhaehnle accepted D46151: AMDGPU/GlobalISel: Implement select() for COPY.

LGTM

Mon, Apr 30, 1:11 AM
nhaehnle accepted D46149: AMDGPU/GlobalISel: Don't try to lower hull shaders.

One typo, LGTM apart from that.

Mon, Apr 30, 1:07 AM
nhaehnle accepted D46041: AMDGPU/GlobalISel: Don't try to lower geometry shaders.

LGTM

Mon, Apr 30, 1:01 AM

Fri, Apr 27

nhaehnle added a comment to D46051: [AMDGPU] Don't force WQM for DS op.

Thanks. I'll update here once I've finished all the testing.

Fri, Apr 27, 8:07 AM

Apr 26 2018

nhaehnle added a comment to D46054: [TableGen] Add a general-purpose JSON backend..

Consider what to do about integer values that don't fit exactly into a 'double'. This code will simply emit them as decimal integer literals, which JSON parsers are within their rights to round to the nearest double precision float, losing data. Some JSON readers (e.g. Python json.load) will deliver accurate integer values anyway, but it might be better not to rely on that, and instead output very large integers in some other form, such as a JSON object containing an identifying type field and two doubles whose sum is the desired integer, or a string representation of the integer, or both.

Apr 26 2018, 2:54 AM

Apr 24 2018

nhaehnle added a comment to D45883: AMDGPU/GlobalISel: Implement select() for 32-bit G_FPTOUI.

Looks reasonable.

Apr 24 2018, 12:46 AM
nhaehnle accepted D45989: AMDGPU/R600: Move int_r600_store_stream_output to the public intrinsic file.

Who is using this actually? Anyway, LGTM.

Apr 24 2018, 12:40 AM
nhaehnle accepted D45988: AMDGPU: Remove deprecated llvm.AMDGPU.kilp intrinsic.

LGTM

Apr 24 2018, 12:39 AM
nhaehnle accepted D45888: [AMDGPU][Waitcnt] Add debug options.

Thanks, LGTM.

Apr 24 2018, 12:37 AM · Restricted Project

Apr 23 2018

nhaehnle added a comment to D45888: [AMDGPU][Waitcnt] Add debug options.

This is hard to review because it contains a whole bunch of unrelated spelling changes. Do you think you could separate those out?

Apr 23 2018, 4:08 AM · Restricted Project
nhaehnle accepted D45883: AMDGPU/GlobalISel: Implement select() for 32-bit G_FPTOUI.

One bikeshed, apart of that LGTM.

Apr 23 2018, 4:04 AM
nhaehnle accepted D45881: AMDGPU/GlobalISel: Implement select() for G_BITCAST s32 <--> <2 x s16>.

LGTM

Apr 23 2018, 4:01 AM

Apr 20 2018

nhaehnle created D45886: AMDGPU: Fix SDWA peephole for V_AND_B32.
Apr 20 2018, 8:56 AM
nhaehnle created D45885: AMDGPU: Fix a corner case crash in SIOptimizeExecMasking.
Apr 20 2018, 8:51 AM

Apr 19 2018

nhaehnle accepted D45861: AMDGPU/GlobalISel: Implement select() for 32-bit G_OR.

One nit, LGTM.

Apr 19 2018, 11:59 PM
nhaehnle accepted D45843: AMDGPU/GlobalISel: Fall-back to SelectionDAG for non-void functions.

LGTM

Apr 19 2018, 11:51 PM
nhaehnle accepted D45818: Fix BNF nits in TableGen language reference..

Thanks, LGTM.

Apr 19 2018, 11:48 AM
nhaehnle added inline comments to D45826: AMDGPU: Legalize the operand of SI_INIT_M0.
Apr 19 2018, 11:43 AM
nhaehnle created D45826: AMDGPU: Legalize the operand of SI_INIT_M0.
Apr 19 2018, 10:25 AM

Apr 11 2018

nhaehnle accepted D45503: [AMDGPU] Ensure there are enough registers for wave dispatch.

That seems reasonable.

Apr 11 2018, 12:50 AM

Apr 10 2018

nhaehnle created D45477: AMDGPU/MC: Allow disassembling without symbol info.
Apr 10 2018, 1:45 AM

Apr 4 2018

nhaehnle accepted D45246: Add AMDPAL Code Conventions section to AMD docs.

Thanks, that should be useful. One typo :)

Apr 4 2018, 4:27 AM
nhaehnle added inline comments to D43743: StructurizeCFG: Test for branch divergence correctly.
Apr 4 2018, 4:05 AM

Apr 2 2018

nhaehnle added a comment to D44468: [AMDGPU] For OS type AMDPAL, fixed scratch on compute shader.
In D44468#1050348, @tpr wrote:

What's the protocol for a fix to a change that I had to revert due to test failure? Does it need to come back to review here? Or should I just have landed it?

Apr 2 2018, 12:07 AM

Mar 27 2018

nhaehnle added inline comments to D43743: StructurizeCFG: Test for branch divergence correctly.
Mar 27 2018, 8:44 AM
nhaehnle added a dependency for D44936: TableGen: More helpful error messages: D44935: TableGen: Support Intrinsic values in SearchableTable.
Mar 27 2018, 8:41 AM
nhaehnle added a dependent revision for D44935: TableGen: Support Intrinsic values in SearchableTable: D44936: TableGen: More helpful error messages.
Mar 27 2018, 8:41 AM
nhaehnle abandoned D44929: MachineMemOperand: Don't crash when printing custom source values.

That looks more thorough than my quick hack. Dropping this one.

Mar 27 2018, 8:41 AM
nhaehnle accepted D44871: [CodeGen] Fixed unreachable with -print-machineinstrs and custom pseudo source value.
Mar 27 2018, 8:41 AM
nhaehnle added reviewers for D44939: AMDGPU: Dimension-aware image intrinsics: mareko, bnieuwenhuizen, tpr, dstuttard.
Mar 27 2018, 8:31 AM
nhaehnle added a dependency for D44939: AMDGPU: Dimension-aware image intrinsics: D44938: AMDGPU: Make isIntrinsicSourceOfDivergence table-driven.
Mar 27 2018, 8:30 AM
nhaehnle added a dependent revision for D44938: AMDGPU: Make isIntrinsicSourceOfDivergence table-driven: D44939: AMDGPU: Dimension-aware image intrinsics.
Mar 27 2018, 8:30 AM
nhaehnle created D44939: AMDGPU: Dimension-aware image intrinsics.
Mar 27 2018, 8:30 AM
nhaehnle added a dependency for D44938: AMDGPU: Make isIntrinsicSourceOfDivergence table-driven: D44937: AMDGPU: Make getTgtMemIntrinsic table-driven for resource-based intrinsics.
Mar 27 2018, 8:29 AM
nhaehnle added a dependent revision for D44937: AMDGPU: Make getTgtMemIntrinsic table-driven for resource-based intrinsics: D44938: AMDGPU: Make isIntrinsicSourceOfDivergence table-driven.
Mar 27 2018, 8:29 AM
nhaehnle created D44938: AMDGPU: Make isIntrinsicSourceOfDivergence table-driven.
Mar 27 2018, 8:29 AM
nhaehnle added a dependency for D44937: AMDGPU: Make getTgtMemIntrinsic table-driven for resource-based intrinsics: D44936: TableGen: More helpful error messages.
Mar 27 2018, 8:29 AM
nhaehnle created D44937: AMDGPU: Make getTgtMemIntrinsic table-driven for resource-based intrinsics.
Mar 27 2018, 8:28 AM
nhaehnle created D44936: TableGen: More helpful error messages.
Mar 27 2018, 8:28 AM
nhaehnle created D44935: TableGen: Support Intrinsic values in SearchableTable.
Mar 27 2018, 8:28 AM
nhaehnle created D44929: MachineMemOperand: Don't crash when printing custom source values.
Mar 27 2018, 6:59 AM
nhaehnle added a comment to D44401: [AMDGPU] Always use IDX for load/store format intrinsics..

Indexed atomic ops are a good point. radeonsi and radv should be generating those as well for image atomics on texture buffers.

Mar 27 2018, 3:13 AM
nhaehnle accepted D44795: [AMDGPU][MC] Added PCK variants of image load/store instructions.

Thanks, LGTM.

Mar 27 2018, 1:03 AM

Mar 26 2018

nhaehnle added inline comments to D44795: [AMDGPU][MC] Added PCK variants of image load/store instructions.
Mar 26 2018, 3:34 AM

Mar 23 2018

nhaehnle added a comment to D43743: StructurizeCFG: Test for branch divergence correctly.

Ping!

Mar 23 2018, 4:43 AM
nhaehnle added a comment to D40547: AMDGPU: Fix copying i1 value out of loop with non-uniform exit.

Ping!

Mar 23 2018, 4:41 AM
nhaehnle added a comment to D44806: [AMDGPU] MessagePack reader/writer.

Since MsgPack is certainly not AMDGPU-specific, this should go into a target-independent utils directory, possibly lib/Support/.

Mar 23 2018, 2:50 AM
nhaehnle added inline comments to D44795: [AMDGPU][MC] Added PCK variants of image load/store instructions.
Mar 23 2018, 2:45 AM
nhaehnle created D44820: AMDGPU: Introduce common SOP_Pseudo and VOP_Pseudo TableGen base classes.
Mar 23 2018, 2:27 AM

Mar 20 2018

nhaehnle added a comment to D44521: [InstSimplify] fp_binop X, NaN --> NaN.

Thank you for making this change. The rest looks good to me, too.

Mar 20 2018, 7:49 AM

Mar 19 2018

nhaehnle added a dependency for D44624: TableGen: Remove redundant loop in ListInit::resolveReferences: D44478: TableGen: Streamline how defs are instantiated.
Mar 19 2018, 7:32 AM
nhaehnle added a dependent revision for D44478: TableGen: Streamline how defs are instantiated: D44624: TableGen: Remove redundant loop in ListInit::resolveReferences.
Mar 19 2018, 7:32 AM
nhaehnle created D44624: TableGen: Remove redundant loop in ListInit::resolveReferences.
Mar 19 2018, 7:32 AM
nhaehnle added inline comments to D44478: TableGen: Streamline how defs are instantiated.
Mar 19 2018, 7:16 AM
nhaehnle updated the diff for D44478: TableGen: Streamline how defs are instantiated.

Address minor review comments and add a new test case that demonstrates
the inconsistencies in name resolution.

Mar 19 2018, 7:13 AM
nhaehnle added a comment to D44426: Fix llvm + clang build with Intel compiler .

Is that compiler really supported? Look at this:

void operator delete(void *) = delete;

It's been there in the code since early 2015. The bitwise OR on ELF::xxx has been there even longer.

Mar 19 2018, 5:27 AM
nhaehnle added a comment to D44521: [InstSimplify] fp_binop X, NaN --> NaN.

Do you mean bitcast back and forth? Example:

Mar 19 2018, 5:24 AM

Mar 17 2018

nhaehnle added a comment to D44521: [InstSimplify] fp_binop X, NaN --> NaN.

For the AMDGPU imm tests, you could please change the affected ones to operate on i32/i16 instead, so that the result uses v_add_u32? Thanks!

Mar 17 2018, 5:41 AM
nhaehnle accepted D44401: [AMDGPU] Always use IDX for load/store format intrinsics..

I think the unit change is a hint we should use different intrinsics for this

The current intrinsic is unusable on GFX9 though. Why should we keep it as-is if it's unusable? This patch is reasonable because it picks the most expected behavior for GFX9 while it disallows the least expected and problematic behavior.

Mar 17 2018, 5:34 AM
nhaehnle added a comment to D40556: SIFixSGPRCopies should not change non-divergent PHI.

Is this related to D40547? I sent a ping on that, but no response...

Mar 17 2018, 5:27 AM
nhaehnle accepted D44466: AMDGPU/GlobalISel: Basic G_GEP legality.
Mar 17 2018, 5:19 AM
nhaehnle accepted D44465: AMDGPU/GlobalISel: Basic legality for load/store.
Mar 17 2018, 5:15 AM
nhaehnle added a comment to D44426: Fix llvm + clang build with Intel compiler .

I don't think we should add workarounds for broken compilers.

Mar 17 2018, 5:12 AM

Mar 14 2018

nhaehnle updated the diff for D44478: TableGen: Streamline how defs are instantiated.

Updating with a cleanup that I missed.

Mar 14 2018, 8:38 AM
nhaehnle added a dependent revision for D44476: TableGen: Explicitly forbid self-references to field members: D44478: TableGen: Streamline how defs are instantiated.
Mar 14 2018, 8:25 AM
nhaehnle added a dependency for D44478: TableGen: Streamline how defs are instantiated: D44476: TableGen: Explicitly forbid self-references to field members.
Mar 14 2018, 8:25 AM
nhaehnle created D44478: TableGen: Streamline how defs are instantiated.
Mar 14 2018, 8:24 AM
nhaehnle added a dependency for D44476: TableGen: Explicitly forbid self-references to field members: D44475: TableGen: Check the dynamic type of !cast<Rec>(string).
Mar 14 2018, 8:24 AM
nhaehnle added a dependent revision for D44475: TableGen: Check the dynamic type of !cast<Rec>(string): D44476: TableGen: Explicitly forbid self-references to field members.
Mar 14 2018, 8:24 AM
nhaehnle created D44476: TableGen: Explicitly forbid self-references to field members.
Mar 14 2018, 8:24 AM
nhaehnle added a dependency for D44475: TableGen: Check the dynamic type of !cast<Rec>(string): D44474: TableGen: Explicitly test some cases of self-references and !cast errors.
Mar 14 2018, 8:23 AM
nhaehnle added a dependent revision for D44474: TableGen: Explicitly test some cases of self-references and !cast errors: D44475: TableGen: Check the dynamic type of !cast<Rec>(string).
Mar 14 2018, 8:23 AM
nhaehnle created D44475: TableGen: Check the dynamic type of !cast<Rec>(string).
Mar 14 2018, 8:23 AM
nhaehnle added a dependent revision for D44198: TableGen: Only fold when some operand made resolve progress: D44474: TableGen: Explicitly test some cases of self-references and !cast errors.
Mar 14 2018, 8:21 AM
nhaehnle added a dependency for D44474: TableGen: Explicitly test some cases of self-references and !cast errors: D44198: TableGen: Only fold when some operand made resolve progress.
Mar 14 2018, 8:21 AM
nhaehnle created D44474: TableGen: Explicitly test some cases of self-references and !cast errors.
Mar 14 2018, 8:21 AM
nhaehnle updated the diff for D44198: TableGen: Only fold when some operand made resolve progress.

Better error messages.

Mar 14 2018, 7:51 AM
nhaehnle updated the diff for D44195: TableGen: Remove the cast-from-string-to-variable-reference feature.

More explicit error message on undefined reference.

Mar 14 2018, 7:44 AM
nhaehnle added a comment to D44195: TableGen: Remove the cast-from-string-to-variable-reference feature.
In D44195#1033009, @tra wrote:

What happens now when someone attempts to cast a variable name?
Will the !cast remain unresolved or will we see a "symbol X not found" error? Both would be somewhat confusing as that X may be something that is obviously there (e.g. template parameter). I'd rather see an explicit error telling me exactly what's wrong. Something like "!cast to a local symbol is not allowed".

Mar 14 2018, 7:44 AM
nhaehnle closed D44106: TableGen: More helpful error messages.

r327118

Mar 14 2018, 3:47 AM
nhaehnle closed D44107: TableGen: Remove unused ParseForeachMode.

r327119

Mar 14 2018, 3:47 AM
nhaehnle closed D44108: TableGen: Allow arbitrary list values as ranges of foreach.
Mar 14 2018, 3:46 AM
nhaehnle added a comment to D44401: [AMDGPU] Always use IDX for load/store format intrinsics..

We need tests for the store case as well.

Mar 14 2018, 3:44 AM

Mar 9 2018

nhaehnle updated the diff for D44112: TableGen: Type-check BinOps.

Update the docs, relax operands to !add, !and, !or in the same
way as shifts and add tests for it.

Mar 9 2018, 3:38 AM
nhaehnle added inline comments to D44110: TableGen: Add !dag function for construction.
Mar 9 2018, 3:38 AM
nhaehnle added a comment to D44112: TableGen: Type-check BinOps.
In D44112#1030389, @tra wrote:

This change should come with an update to the docs.

Mar 9 2018, 3:37 AM