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[ARM] Add a batch of MVE integer instructions.
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Authored by simon_tatham on May 30 2019, 8:21 AM.

Details

Summary

This includes integer arithmetic of various kinds (add/sub/multiply,
saturating and not), and the VMOVs that load an immediate into all
lanes of a vector.

Event Timeline

simon_tatham created this revision.May 30 2019, 8:21 AM

Remastered patch to apply cleanly against current trunk.

miyuki added a subscriber: miyuki.Jun 11 2019, 5:54 AM

Updated to current trunk, and renamed instruction ids in line with new
consistent MVE_ prefix.

ostannard added inline comments.
llvm/lib/Target/ARM/ARMInstrMVE.td
1567

Bit 28 could be a parameter of MVE_VQxDMULH, and this could be a multiclass to avoid repetition of the types below. (Common pattern in this file).

llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
3454

What does this mean?

llvm/test/MC/ARM/mve-integer.s
8

We should also test that invalid immediates are rejected.

llvm/test/MC/Disassembler/ARM/mve-integer.txt
5

Should these instructions have CHECK-NOMVE lines?

32

These ERROR check lines aren't used by and RUN lines.

simon_tatham marked 5 inline comments as done.Jun 20 2019, 2:48 AM
simon_tatham added inline comments.
llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
3454

Looks as if it was left in from some preliminary work in which the author wasn't sure what further range of instructions that decoder function would end up applying to. I'll take it out.

Addressed all review comments. In particular, completely removed the mve.fp test run from the mve-integer.s test file, because it was only there due to copy and paste error (I split all these tests out of one far-too-big input file with a single set of run commands).

Added the integer VMINA / VMAXA instructions to this patch, which were
mistakenly included in D62677 despite not being derived from the
latter patch's shared base class.

This revision is now accepted and ready to land.Jun 20 2019, 6:42 AM
This revision was automatically updated to reflect the committed changes.