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samparker (Sam Parker)
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User Since
May 11 2015, 7:59 AM (367 w, 3 h)

Recent Activity

Fri, May 13

samparker committed rG6d53d35efd3b: [TypePromotion] Avoid some unnecessary truncs (authored by samparker).
[TypePromotion] Avoid some unnecessary truncs
Fri, May 13, 1:46 AM · Restricted Project, Restricted Project
Herald added a project to D115451: [TypePromotion] Avoid some unnecessary truncs: Restricted Project.
Fri, May 13, 1:46 AM · Restricted Project, Restricted Project
samparker committed rG84b5f7c38c72: [NFC][TypePromotion][AArch64] Tests (authored by samparker).
[NFC][TypePromotion][AArch64] Tests
Fri, May 13, 1:30 AM · Restricted Project, Restricted Project

Thu, May 12

samparker accepted D123174: [TypePromotion] Promote undef by converting to 0..

Thanks!

Thu, May 12, 12:39 AM · Restricted Project, Restricted Project
samparker added a comment to D123174: [TypePromotion] Promote undef by converting to 0..

@craig.topper ping, I'd like to get this committed. So would you be happy to continue or for me to commandeer this? Although I would just ask you for the review :)

Thu, May 12, 12:16 AM · Restricted Project, Restricted Project

Tue, May 10

samparker accepted D125294: [TypePromotion] Fix sext vs zext in promoted constant.

LGTM, cheers

Tue, May 10, 2:48 AM · Restricted Project, Restricted Project

Apr 6 2022

samparker added a comment to D123174: [TypePromotion] Promote undef by converting to 0..

Hi @craig.topper, so this is interesting because the AArch64 trunc-zext-chain.ll test file is a reproducer for a bug that I couldn't solve. The test function has two versions, because I couldn't figure out if having an undef was the underlying issue. I think it was causing some trouble with GetDemandedBits, but I was unable to figure it out with some very dense logic in the AArch64 backend. So I'm certainly happy to entertain this idea and matching the behaviour of InstCombine/InstSimplify sounds good to me.

Apr 6 2022, 12:33 AM · Restricted Project, Restricted Project

Mar 3 2022

samparker committed rGa8b4f5bbab62: [NFC] TypePromotion test (authored by samparker).
[NFC] TypePromotion test
Mar 3 2022, 3:49 AM · Restricted Project

Mar 1 2022

samparker added a reverting change for rG281d29b8fed3: [TypePromotion] Avoid some unnecessary truncs: rG20d75059a2ea: Revert "[TypePromotion] Avoid some unnecessary truncs".
Mar 1 2022, 1:00 AM
samparker committed rG20d75059a2ea: Revert "[TypePromotion] Avoid some unnecessary truncs" (authored by samparker).
Revert "[TypePromotion] Avoid some unnecessary truncs"
Mar 1 2022, 1:00 AM
samparker added a reverting change for D115451: [TypePromotion] Avoid some unnecessary truncs: rG20d75059a2ea: Revert "[TypePromotion] Avoid some unnecessary truncs".
Mar 1 2022, 1:00 AM · Restricted Project, Restricted Project

Feb 28 2022

samparker abandoned D118906: [TypePromotion] Search from Phis.

Finally got around to benchmarking this and it mainly just results in increased code size.

Feb 28 2022, 12:40 AM · Restricted Project

Feb 3 2022

samparker requested review of D118907: [TypePromotion] Allow SExtInst as sink.
Feb 3 2022, 7:12 AM · Restricted Project
samparker requested review of D118906: [TypePromotion] Search from Phis.
Feb 3 2022, 7:09 AM · Restricted Project
samparker requested review of D118905: [TypePromotion] Avoid unnecessary trunc zext pairs.
Feb 3 2022, 7:07 AM · Restricted Project, Restricted Project
samparker committed rG0c02c2c60a27: [NFC] TypePromotion test for AArch64 (authored by samparker).
[NFC] TypePromotion test for AArch64
Feb 3 2022, 5:58 AM
samparker abandoned D71992: [ARM] Unrestrict Armv8 IT blocks.

Abandoning in favour of D118044.

Feb 3 2022, 5:13 AM · Restricted Project
samparker updated the diff for D118883: [TypePromotion] Remove signext args support.

Updated AArch64 tests.

Feb 3 2022, 5:11 AM · Restricted Project
samparker requested review of D118883: [TypePromotion] Remove signext args support.
Feb 3 2022, 3:28 AM · Restricted Project

Feb 2 2022

samparker committed rG158a73466322: [NFC] TypePromotion tests (authored by samparker).
[NFC] TypePromotion tests
Feb 2 2022, 9:54 AM
samparker committed rG281d29b8fed3: [TypePromotion] Avoid some unnecessary truncs (authored by samparker).
[TypePromotion] Avoid some unnecessary truncs
Feb 2 2022, 2:06 AM
samparker closed D115451: [TypePromotion] Avoid some unnecessary truncs.
Feb 2 2022, 2:06 AM · Restricted Project, Restricted Project

Jan 25 2022

samparker accepted D117573: [AArch64] Add patterns for relaxed atomic ld/st into fp registers.

Okay, fair enough. I understand there's a chance of producing some illegal IR with float types for aarch64 so it's probably safer, and easier, to perform the folding here.

Jan 25 2022, 3:58 AM · Restricted Project

Jan 20 2022

samparker added a comment to D117573: [AArch64] Add patterns for relaxed atomic ld/st into fp registers.

You mention unimplemented hooks in D60394 and on the github issue, so why did you go for this approach instead? Solving this in a generic manner seems like the 'good' thing to do, no?

Jan 20 2022, 8:44 AM · Restricted Project

Jan 17 2022

samparker accepted D117457: [DAG] Extend SearchForAndLoads with any_extend handling.

LGTM

Jan 17 2022, 12:57 AM · Restricted Project

Jan 13 2022

samparker added a comment to D109676: [HardwareLoops] put +1 for loop count before zero extension.

As I said previously, the behaviour of the intrinsics should better defined and then this transform should adhere to those semantics. We're already using different pairs of intrinsics for each backend, so this shouldn't be a problem; however, we may have to ensure the Arm backend rejects the 'old' set.loop.iterations just to be safe.

Jan 13 2022, 1:22 AM · Restricted Project

Dec 10 2021

samparker updated the summary of D115451: [TypePromotion] Avoid some unnecessary truncs.
Dec 10 2021, 1:27 AM · Restricted Project, Restricted Project

Dec 9 2021

samparker added a comment to D111237: [TypePromotion] Promote PHI + [SZ]Ext.

Sorry for missing your last comment @avieira , I've uploaded a suggested change in D115451, though I still think something is off with isSink.

Dec 9 2021, 8:48 AM · Restricted Project
samparker requested review of D115451: [TypePromotion] Avoid some unnecessary truncs.
Dec 9 2021, 8:47 AM · Restricted Project, Restricted Project

Dec 6 2021

samparker added a comment to D111237: [TypePromotion] Promote PHI + [SZ]Ext.

I could alternatively try to avoid generating the trunc

Yes, there's a TODO about avoiding the insertion in TypePromotion::isSink

Dec 6 2021, 9:06 AM · Restricted Project
samparker added a comment to D111237: [TypePromotion] Promote PHI + [SZ]Ext.

My knee jerk reaction is that this looks like a lot of code to add little functionality... the pass can already promote phis, so, IIUC, the only functional change is to enable the use of sign extends for their operands? If so, I don't really understand why this couldn't be added more gracefully into the existing search. My handwavey suggestion would be to search from SExt nodes (in the same manner as icmp, but with a search depth limit of 2), create a dedicated function to estimate the cost of promotion and modify the IRPromoter to enable sign extending some sources. Does any of that sound reasonable?

Dec 6 2021, 1:53 AM · Restricted Project

Dec 1 2021

samparker added a comment to D79483: [CostModel] Replace getUserCost with getInstructionCost..

cheers!

Dec 1 2021, 1:11 AM · Restricted Project

Nov 12 2021

samparker accepted D113678: [TypePromotion] Extend TypePromotion::isSafeWrap.

Good bit of brain exercise for the morning... Nice addition and cleanup too, thanks. Just a couple of function renaming requests from me.

Nov 12 2021, 1:23 AM · Restricted Project

Nov 10 2021

samparker accepted D113495: [TypePromotion] Fix a hardcoded use of 32 as the size being promoted to..

Thanks.

Nov 10 2021, 6:43 AM · Restricted Project

Oct 21 2021

samparker added inline comments to D109676: [HardwareLoops] put +1 for loop count before zero extension.
Oct 21 2021, 3:13 AM · Restricted Project
samparker updated subscribers of D109676: [HardwareLoops] put +1 for loop count before zero extension.

I would like to start a top-level discussion so everything isn't lost within the review comments, and pull in the Arm people who still work on this... @dmgreen @samtebbs

Oct 21 2021, 1:04 AM · Restricted Project
samparker added inline comments to D109676: [HardwareLoops] put +1 for loop count before zero extension.
Oct 21 2021, 12:08 AM · Restricted Project

Oct 20 2021

samparker added inline comments to D109676: [HardwareLoops] put +1 for loop count before zero extension.
Oct 20 2021, 7:27 AM · Restricted Project
samparker added inline comments to D109676: [HardwareLoops] put +1 for loop count before zero extension.
Oct 20 2021, 4:27 AM · Restricted Project

Oct 18 2021

samparker added inline comments to D109676: [HardwareLoops] put +1 for loop count before zero extension.
Oct 18 2021, 1:43 AM · Restricted Project

Oct 15 2021

samparker added inline comments to D109676: [HardwareLoops] put +1 for loop count before zero extension.
Oct 15 2021, 3:11 AM · Restricted Project

Oct 7 2021

samparker added inline comments to D91354: [AArch64] Lower @llvm.complex.multiply using fcmla (WIP)..
Oct 7 2021, 6:01 AM · Restricted Project
samparker added a comment to D91346: [AArch64] Add FCMLA AArch64ISD node..

Doesn't make much sense to me having this on it's own... merging with D91354 seems like the sensible choice.

Oct 7 2021, 6:00 AM · Restricted Project

Sep 23 2021

samparker accepted D110239: [AArch64] Enable type promotion for AArch64.

Okay, fair enough.

Sep 23 2021, 2:12 AM · Restricted Project

Sep 22 2021

samparker added a comment to D110242: [Target][CodeGen] Remove default CostKind arguments on inner/impl TTI overrides.

cheers!

Sep 22 2021, 6:34 AM · Restricted Project
samparker added a comment to D110239: [AArch64] Enable type promotion for AArch64.

I didn't think about the extra latency of a uxt cmp, and I wouldn't have thought it useful with GISel either - so this is a pleasant surprise. Do you reckon it's worth sorting out the sign extend dag patterns before enabling? Or do you think that the change is really gonna be in the noise so much that no-one will notice?

Sep 22 2021, 6:31 AM · Restricted Project
samparker added a comment to D110100: [NFCI][CodeGen, AArch64] Fix inconsistent TargetCostKind types..

Do you think we should stop using default cost kinds entirely?

I think this would be for the best, and I thought I already changed most of the calls to be explicit.

Sep 22 2021, 2:41 AM · Restricted Project

Sep 21 2021

samparker accepted D110161: [TypePromotion][InterleaveAccess] Mark CFG as preserved in TypePromotion and InterleaveAccess passes.

cheers

Sep 21 2021, 8:00 AM · Restricted Project

Sep 17 2021

samparker added inline comments to D109676: [HardwareLoops] put +1 for loop count before zero extension.
Sep 17 2021, 12:30 AM · Restricted Project

Sep 16 2021

samparker committed rGc98a8a09b5eb: [HardwareLoops] Loop guard intrinsic to recognise zext (authored by samparker).
[HardwareLoops] Loop guard intrinsic to recognise zext
Sep 16 2021, 12:34 AM
samparker closed D109631: [HardwareLoops] Loop guard intrinsic to recognise zext.
Sep 16 2021, 12:33 AM · Restricted Project
samparker added a comment to D109631: [HardwareLoops] Loop guard intrinsic to recognise zext.

Ok, will do.

Sep 16 2021, 12:05 AM · Restricted Project

Sep 15 2021

samparker accepted D109631: [HardwareLoops] Loop guard intrinsic to recognise zext.

are you happy with this?

Yep!
Thanks @sherwin-dc

Sep 15 2021, 9:02 AM · Restricted Project

Sep 14 2021

samparker added inline comments to D109631: [HardwareLoops] Loop guard intrinsic to recognise zext.
Sep 14 2021, 12:55 AM · Restricted Project

Sep 13 2021

samparker added inline comments to D109631: [HardwareLoops] Loop guard intrinsic to recognise zext.
Sep 13 2021, 12:19 AM · Restricted Project

Sep 9 2021

samparker added a comment to D109388: [AArch64][CostModel] Use cost of target trunc type when only use of a non-register sized load.

Bah! I'm too used to thinking about extend in this case rather than trunc! Please ignore my previous comments!

Sep 9 2021, 5:54 AM · Restricted Project
samparker added inline comments to D109388: [AArch64][CostModel] Use cost of target trunc type when only use of a non-register sized load.
Sep 9 2021, 5:49 AM · Restricted Project

Sep 2 2021

samparker added a comment to D91724: [HardwareLoops] Change order of SCEV expression construction for InitLoopCount..

Unless there's something in the code which prevents BTC=UINT_MAX/TC=0

And I thought there was!

Sep 2 2021, 11:46 PM · Restricted Project

Aug 23 2021

samparker added a comment to D79483: [CostModel] Replace getUserCost with getInstructionCost..

@RKSimon I'm not really doing much work on LLVM currently, so no.... But I'd be happy to help out with reviews if someone else wanted to pick it up.

Aug 23 2021, 1:07 AM · Restricted Project

Aug 19 2021

samparker accepted D108333: [TypePromotion] Use Instruction* instead of Value* for a couple functions. NFC.

Cheers!

Aug 19 2021, 12:58 AM · Restricted Project

Aug 16 2021

samparker accepted D108084: [TypePromotion] Don't mutate the result type of SwitchInst..

Thanks.

Aug 16 2021, 1:29 AM · Restricted Project

Aug 3 2021

samparker added a reviewer for D107351: [RDA] Attempt to make RDA subreg aware: rogfer01.
Aug 3 2021, 7:21 AM · Restricted Project

Jul 26 2021

samparker added inline comments to D106261: [ARM][LowOverheadLoops] Allow unpredicated VORRs if the operand def produces zeroed false lanes.
Jul 26 2021, 1:58 AM · Restricted Project

Jul 22 2021

samparker added inline comments to D106039: [AArch64] Fix i128 cmpxchg using ldxp/stxp..
Jul 22 2021, 12:32 AM · Restricted Project

Jul 21 2021

samparker added inline comments to D106039: [AArch64] Fix i128 cmpxchg using ldxp/stxp..
Jul 21 2021, 12:22 AM · Restricted Project

Jul 20 2021

samparker accepted D106039: [AArch64] Fix i128 cmpxchg using ldxp/stxp..

This made my brain melt a little... anyway, from Section B 2.2.1 of Arm ARM:

Jul 20 2021, 3:19 AM · Restricted Project

Jun 1 2021

samparker added inline comments to D102942: Remove or use variables which are unused but set..
Jun 1 2021, 5:27 AM · Restricted Project, Restricted Project

Apr 27 2021

samparker accepted D101174: [IRCE] Add tests for conservative bound check.

Thanks, LGTM

Apr 27 2021, 1:12 AM · Restricted Project

Apr 26 2021

samparker added a comment to D101174: [IRCE] Add tests for conservative bound check.

Okay, thanks. Could you just add a couple more tests then, so that we cover steps other than one. Also, if they don't exist already, a couple of tests where the start value is already at the limit.

Apr 26 2021, 5:40 AM · Restricted Project
samparker added a comment to D101174: [IRCE] Add tests for conservative bound check.

I think this looks fine to me, and now I'm trying to remember what the difference was which these functions and cannotBe[Min/Max]InLoop. Have you looked into using these?

Apr 26 2021, 4:30 AM · Restricted Project

Apr 23 2021

samparker accepted D101151: [TTI] NFC: Use InstructionCost to store ScalarizationCost in IntrinsicCostAttributes..

Thanks

Apr 23 2021, 3:32 AM · Restricted Project

Apr 13 2021

samparker accepted D100313: [TTI] NFC: Change getCFInstrCost to return InstructionCost.

LGTM

Apr 13 2021, 8:16 AM · Restricted Project

Apr 12 2021

samparker accepted D100291: [AArch64] Use type-legalization cost for code size memop cost..

Makes sense to me.

Apr 12 2021, 2:31 AM · Restricted Project

Apr 6 2021

samparker added inline comments to D99171: [WebAssembly] Fold xor by inverting branch target.
Apr 6 2021, 1:01 AM · Restricted Project
samparker committed rGf1313b3b249a: [NFC][WebAssembly] Removed mangled name from test. (authored by samparker).
[NFC][WebAssembly] Removed mangled name from test.
Apr 6 2021, 12:59 AM

Apr 1 2021

samparker committed rG92e777148359: [WebAssembly] Invert branch condition on xor input (authored by samparker).
[WebAssembly] Invert branch condition on xor input
Apr 1 2021, 1:24 AM
samparker closed D99171: [WebAssembly] Fold xor by inverting branch target.
Apr 1 2021, 1:24 AM · Restricted Project
samparker added a comment to D99171: [WebAssembly] Fold xor by inverting branch target.

Cheers! And no thanks - I've had commit access for a few years.

Apr 1 2021, 1:07 AM · Restricted Project

Mar 31 2021

samparker added inline comments to D99649: [ARM] Updates to arm-block-placement pass.
Mar 31 2021, 5:00 AM · Restricted Project
samparker added a reviewer for D99649: [ARM] Updates to arm-block-placement pass: samtebbs.
Mar 31 2021, 4:55 AM · Restricted Project
samparker updated the diff for D99171: [WebAssembly] Fold xor by inverting branch target.
  • Moved PatLeaf to top-level file.
  • Added tests for missing FP conditions.
  • Added switch tests.
Mar 31 2021, 1:33 AM · Restricted Project
samparker added a comment to D99171: [WebAssembly] Fold xor by inverting branch target.

Can you add tests that do explicit xors in the IR to show that it is not folded out where it shouldn't be?

Well this is what I mean, that I don't think this is possible. Writing a test in IR, the br has to take an i1, though this is expanded to i32 during codegen. I could write some IR tests with xors, but they should all be valid. AFAIK, I'd need a way of writing a test input in selection dag form to write a negative test. I have missed some FP conditions in the existing tests, so I'm going to add those.

Mar 31 2021, 12:54 AM · Restricted Project

Mar 24 2021

samparker updated the diff for D99171: [WebAssembly] Fold xor by inverting branch target.

Thanks all. I've added a PatLeaf to detect a boolean, but I wasn't sure how to write a negative test using LLVM IR considering that the branch always takes an i1. Any ideas?

Mar 24 2021, 12:54 AM · Restricted Project

Mar 23 2021

samparker added inline comments to D99171: [WebAssembly] Fold xor by inverting branch target.
Mar 23 2021, 7:19 AM · Restricted Project
samparker updated the summary of D99171: [WebAssembly] Fold xor by inverting branch target.
Mar 23 2021, 4:11 AM · Restricted Project
samparker updated the summary of D99171: [WebAssembly] Fold xor by inverting branch target.
Mar 23 2021, 4:11 AM · Restricted Project
samparker requested review of D99171: [WebAssembly] Fold xor by inverting branch target.
Mar 23 2021, 4:09 AM · Restricted Project

Mar 10 2021

samparker added a comment to D71992: [ARM] Unrestrict Armv8 IT blocks.

Hi Yvan,

Mar 10 2021, 5:58 AM · Restricted Project

Feb 17 2021

samparker added a comment to D94308: [MachineSink] SinkIntoLoop: analyse stores and aliases in between.

The X86 test is indeed large! Considering that it's just an unrolled loop with the same sequence repeated MANY times, could you not just delete 3/4 of the loop and update the indvar accordingly?

Feb 17 2021, 1:20 AM · Restricted Project

Feb 16 2021

samparker abandoned D76716: [ARM][MVE] Tail predicate VMAXV(unsigned) and VMAXAV.

Maybe? Not something that I'll be continuing with though.

Feb 16 2021, 9:13 AM · Restricted Project
samparker abandoned D65567: [ARM][ParallelDSP] Generate SMUAD.

No, don't think I have the time/energy to possibly introduce a bug :)

Feb 16 2021, 9:12 AM
samparker added inline comments to D96772: [LSR] Cleanup of getPreferredAddresingMode. NFC..
Feb 16 2021, 9:11 AM · Restricted Project

Feb 15 2021

samparker added a comment to D96600: [TTI] Unify FavorPostInc and FavorBackedgeIndex into getAddressingMode.

Nothing else from me.

Feb 15 2021, 1:40 AM · Restricted Project

Feb 12 2021

samparker added a comment to D96600: [TTI] Unify FavorPostInc and FavorBackedgeIndex into getAddressingMode.

But why not just order the logic so that it is an NFC?

Feb 12 2021, 6:51 AM · Restricted Project
samparker added a comment to D96600: [TTI] Unify FavorPostInc and FavorBackedgeIndex into getAddressingMode.

Shouldn't this be an NFC..? Looks like we should be favouring post-incs for MVE, even at optsize.

Feb 12 2021, 6:16 AM · Restricted Project
samparker added a comment to D89693: [AArch64] Favor pre-increments and implement TTI::getPreferredAddressingMode.

Sounds good. How about unifying it to one call to get the type of preferred indexing: none, pre and post?

Feb 12 2021, 2:35 AM · Restricted Project

Feb 10 2021

samparker accepted D91857: [ARM] Remove dead mov's in preheader of tail predicated loops.

cheers!

Feb 10 2021, 1:20 AM · Restricted Project
samparker added a comment to D95125: [WebAssembly] Enable loop unrolling.

Thanks! Yes, agreed. I've also added a couple of tests before committing, just to check that unrolling is indeed disabled at -Os and -Oz.

Feb 10 2021, 12:27 AM · Restricted Project
samparker committed rG9d81ccc02ffb: [WebAssembly] Enable loop unrolling (authored by samparker).
[WebAssembly] Enable loop unrolling
Feb 10 2021, 12:27 AM
samparker closed D95125: [WebAssembly] Enable loop unrolling.
Feb 10 2021, 12:26 AM · Restricted Project