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samparker (Sam Parker)
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User Since
May 11 2015, 7:59 AM (215 w, 19 h)

Recent Activity

Today

samparker added inline comments to D63476: [ARM] DLS/LE low-overhead loop code generation.
Tue, Jun 25, 2:43 AM · Restricted Project
samparker added a comment to D63476: [ARM] DLS/LE low-overhead loop code generation.

I will add some comments, but I really don't think this belongs in constant islands. This doesn't have to worry about iterative changes, the loop size may only vary by 8 bytes, which is nothing compared to the 4KB that we need to concern ourselves with. Plus this is a very specific pass, especially once we start having to handle the tail predicated loops!

Tue, Jun 25, 12:36 AM · Restricted Project

Yesterday

samparker accepted D63711: [ARM] MVE VPT Blocks.

Ok, please ignore my nonsense. LGTM

Mon, Jun 24, 9:18 AM · Restricted Project
samparker added inline comments to D63711: [ARM] MVE VPT Blocks.
Mon, Jun 24, 8:54 AM · Restricted Project
samparker added inline comments to D63711: [ARM] MVE VPT Blocks.
Mon, Jun 24, 6:35 AM · Restricted Project
samparker accepted D63430: [ARM] Add support for the MVE long shift instructions.

LGTM.

Mon, Jun 24, 2:34 AM · Restricted Project
samparker updated the diff for D63476: [ARM] DLS/LE low-overhead loop code generation.
  • Renamed all the things to low-overhead loops.
  • Used the arm.space intrinsic and added another test for the edge case.
  • Reversed the order of the search for LoopEnd and LoopDec, breaking early if possible.
  • Switched the order of constant island and low-overhead loops.
Mon, Jun 24, 2:20 AM · Restricted Project
samparker added a comment to D63476: [ARM] DLS/LE low-overhead loop code generation.

I will try to reorder the final passes. I hope that I can change the size of the pseudo instructions to be pessimistically big enough to be a cmp and br. I imagine that TTI will have to try to calculate the size, or at least the amount of live variables, so that these loops don't cause unnecessary register pressure and actually slow things down because of spills.

Mon, Jun 24, 1:03 AM · Restricted Project
samparker added inline comments to D63476: [ARM] DLS/LE low-overhead loop code generation.
Mon, Jun 24, 1:03 AM · Restricted Project

Tue, Jun 18

samparker updated the diff for D63440: [WIP][LoopUnroll] Enable unrolled loops to have scevable trip counts..

Currently using a mask to calculate the unrolled body test value, this looks like it solves the problem but causes regressions! Next I will try counting up with adds instead of down...

Tue, Jun 18, 7:58 AM · Restricted Project
samparker accepted D63478: [HardwareLoops] NFC - move some hardware loop judgement code to a common place for other using.

LGTM.

Tue, Jun 18, 2:24 AM · Restricted Project
samparker added a comment to D62132: [RFC] Intrinsics for Hardware Loops.

Patch to enable Arm code generation for do-while loops: https://reviews.llvm.org/D63476

Tue, Jun 18, 12:47 AM
samparker created D63476: [ARM] DLS/LE low-overhead loop code generation.
Tue, Jun 18, 12:36 AM · Restricted Project
samparker added inline comments to D63430: [ARM] Add support for the MVE long shift instructions.
Tue, Jun 18, 12:24 AM · Restricted Project

Mon, Jun 17

samparker created D63440: [WIP][LoopUnroll] Enable unrolled loops to have scevable trip counts..
Mon, Jun 17, 9:25 AM · Restricted Project
samparker committed rG1bd3d00e7e5a: [CodeGen] Check for HardwareLoop Latch ExitBlock (authored by samparker).
[CodeGen] Check for HardwareLoop Latch ExitBlock
Mon, Jun 17, 6:40 AM
samparker accepted D63419: [ARM] Thumb2CondExecution. NFC.

LGTM

Mon, Jun 17, 6:35 AM · Restricted Project
samparker accepted D63418: [ARM] Rename Thumb2ITBlockPass.cpp to Thumb2CondExecution.cpp.

LGTM. Remember to add and remove the files in SVN too ;)

Mon, Jun 17, 6:28 AM · Restricted Project
samparker updated the diff for D63336: [CodeGen] Check for HardwareLoop Latch ExitBlock.

Cheers Dave. I've removed the ExitBlock check in the ARM backend. Also, currently we'd need CounterInReg == RequiresLoopLatchExit so I've just switched to querying CounterInReg instead of introducing a new parameter. If, later, there's another target which has a separate requirement, then we can re-add the option.

Mon, Jun 17, 3:51 AM · Restricted Project
samparker committed rG60d6fb2a6344: [SCEV] Use NoWrapFlags when expanding a simple mul (authored by samparker).
[SCEV] Use NoWrapFlags when expanding a simple mul
Mon, Jun 17, 3:04 AM
samparker committed rGa059efa885f0: [ARM] Remove ARMComputeBlockSize (authored by samparker).
[ARM] Remove ARMComputeBlockSize
Mon, Jun 17, 2:12 AM
samparker committed rGf7c0b3aeb227: [ARM] Add ARMBasicBlockInfo.cpp (authored by samparker).
[ARM] Add ARMBasicBlockInfo.cpp
Mon, Jun 17, 2:06 AM
samparker added a comment to D43256: [MBP] Move a latch block with conditional exit and multi predecessors to top of loop.

Do you have any benchmark numbers to show that this is generally profitable? From our downstream testing, it is not clear that this change is beneficial.

Mon, Jun 17, 1:52 AM · Restricted Project
samparker committed rG966f4e874e06: [ARM] Extract some code from ARMConstantIslandPass (authored by samparker).
[ARM] Extract some code from ARMConstantIslandPass
Mon, Jun 17, 1:47 AM

Fri, Jun 14

samparker created D63336: [CodeGen] Check for HardwareLoop Latch ExitBlock.
Fri, Jun 14, 8:37 AM · Restricted Project
samparker accepted D63247: [ARM] MVE VPT Block Pass.

LGTM.

Fri, Jun 14, 2:30 AM · Restricted Project
samparker committed rG0cf9639a9c3e: [SCEV] Pass NoWrapFlags when expanding an AddExpr (authored by samparker).
[SCEV] Pass NoWrapFlags when expanding an AddExpr
Fri, Jun 14, 2:20 AM
samparker added inline comments to D63247: [ARM] MVE VPT Block Pass.
Fri, Jun 14, 1:21 AM · Restricted Project
samparker added a comment to D63255: [ARM] Select MVE add and sub.

Bit confusing this, which other patch(es) is this dependent upon?

Fri, Jun 14, 12:58 AM · Restricted Project
samparker added inline comments to D63247: [ARM] MVE VPT Block Pass.
Fri, Jun 14, 12:50 AM · Restricted Project
samparker accepted D63252: [ARM] Initial LE bitconvert patterns.

What's big-endian anyway..? LGTM.

Fri, Jun 14, 12:44 AM · Restricted Project

Thu, Jun 13

samparker created D63265: [ARM] Extract some code from ARMConstantIslandPass.
Thu, Jun 13, 7:03 AM · Restricted Project
samparker committed rG179e0fa8815e: [NFC] Simplify Call query (authored by samparker).
[NFC] Simplify Call query
Thu, Jun 13, 1:30 AM
samparker committed rG9d28473a3555: [ARM][TTI] Scan for existing loop intrinsics (authored by samparker).
[ARM][TTI] Scan for existing loop intrinsics
Thu, Jun 13, 1:27 AM

Wed, Jun 12

samparker added inline comments to D63212: [ARM] Scan for existing loop intrinsics.
Wed, Jun 12, 9:24 AM · Restricted Project
samparker updated the diff for D63212: [ARM] Scan for existing loop intrinsics.

Sorry!

Wed, Jun 12, 9:07 AM · Restricted Project
samparker created D63212: [ARM] Scan for existing loop intrinsics.
Wed, Jun 12, 8:50 AM · Restricted Project
samparker committed rG3d42959dd8a6: Revert rL363156. (authored by samparker).
Revert rL363156.
Wed, Jun 12, 8:26 AM
samparker committed rG52d7326f3269: [NFC] Add HardwareLoops lit.local.cfg file (authored by samparker).
[NFC] Add HardwareLoops lit.local.cfg file
Wed, Jun 12, 5:52 AM
samparker added a comment to D62907: [ARM] Implement TTI::isHardwareLoopProfitable.

Thanks both. I went for the REQUIRES option, though slightly different, and I'll also add that config file.

Wed, Jun 12, 5:51 AM · Restricted Project
samparker committed rGece316b56a23: Attempt to fix non-Arm buildbots (authored by samparker).
Attempt to fix non-Arm buildbots
Wed, Jun 12, 5:46 AM
samparker committed rG757ac02dc8fd: [ARM] Implement TTI::isHardwareLoopProfitable (authored by samparker).
[ARM] Implement TTI::isHardwareLoopProfitable
Wed, Jun 12, 4:58 AM
samparker committed rG61de6a4e9c51: [NFC][SCEV] Add NoWrapFlag argument to InsertBinOp (authored by samparker).
[NFC][SCEV] Add NoWrapFlag argument to InsertBinOp
Wed, Jun 12, 4:53 AM
samparker added a comment to D61934: [SCEV] Use wrap flags in InsertBinop.

First part: https://reviews.llvm.org/rL363147

Wed, Jun 12, 4:53 AM · Restricted Project
samparker added a comment to D61934: [SCEV] Use wrap flags in InsertBinop.

Thanks @reames - this is the approach I will take and I'll pay particular attention to the add/sub case. I'll link the commits back to this review as I go.

Wed, Jun 12, 4:14 AM · Restricted Project
samparker updated the diff for D62907: [ARM] Implement TTI::isHardwareLoopProfitable.
  • Now checking for loop invariant trip count.
  • Added tests for double and half precision floats.
  • Now checking the new hasLOB target feature.
Wed, Jun 12, 3:58 AM · Restricted Project

Tue, Jun 11

samparker accepted D62667: [ARM] Add the non-MVE instructions in Arm v8.1-M..

Cheers!

Tue, Jun 11, 2:17 AM · Restricted Project

Mon, Jun 10

samparker accepted D62667: [ARM] Add the non-MVE instructions in Arm v8.1-M..

Thanks! LGTM.

Mon, Jun 10, 7:36 AM · Restricted Project
samparker added inline comments to D62907: [ARM] Implement TTI::isHardwareLoopProfitable.
Mon, Jun 10, 3:52 AM · Restricted Project
samparker updated the diff for D62907: [ARM] Implement TTI::isHardwareLoopProfitable.
  • Folded saturation into the overflow case.
  • Allow scalar sqrt.
Mon, Jun 10, 1:06 AM · Restricted Project

Sun, Jun 9

samparker added inline comments to D62907: [ARM] Implement TTI::isHardwareLoopProfitable.
Sun, Jun 9, 11:47 PM · Restricted Project
samparker abandoned D62144: [LoopUnroll] Add FlagNUW for backedge count.

This is broken, as well as the patch is depends on!

Sun, Jun 9, 11:15 PM
samparker accepted D63064: [ARM] Enable Unroll UpperBound.

LGTM.

Sun, Jun 9, 11:15 PM · Restricted Project

Fri, Jun 7

samparker added a comment to D61934: [SCEV] Use wrap flags in InsertBinop.

Thanks Philip. This has been reverted, so something is wrong. I'm finding it difficult to wrap, pun intended, my head around how adding users affects the semantics of a given expression. Are they any reviews/threads that you could point me to?

Fri, Jun 7, 7:17 AM · Restricted Project
samparker accepted D62967: [ARM] Add MVE addressing to isLegalT2AddressImmediate.

LGTM.

Fri, Jun 7, 7:11 AM · Restricted Project
samparker accepted D62966: [ARM] Add fp16 addressing to isLegalT2AddressImmediate.

LGTM.

Fri, Jun 7, 7:10 AM · Restricted Project
samparker updated the diff for D62907: [ARM] Implement TTI::isHardwareLoopProfitable.

Now implemented isLoweredToCall to look at intrinsics.

Fri, Jun 7, 5:52 AM · Restricted Project
samparker committed rG67f9dc60b8da: Fix for lld buildbot (authored by samparker).
Fix for lld buildbot
Fri, Jun 7, 1:02 AM
samparker added inline comments to D62966: [ARM] Add fp16 addressing to isLegalT2AddressImmediate.
Fri, Jun 7, 12:53 AM · Restricted Project
samparker committed rGc5ef502ee816: [CodeGen] Generic Hardware Loop Support (authored by samparker).
[CodeGen] Generic Hardware Loop Support
Fri, Jun 7, 12:36 AM
samparker closed D62604: [CodeGen] Generic Hardware Loop Support.

Committed in rL362774.

Fri, Jun 7, 12:36 AM
samparker added inline comments to D62967: [ARM] Add MVE addressing to isLegalT2AddressImmediate.
Fri, Jun 7, 12:32 AM · Restricted Project
samparker accepted D62945: [ARM] Add HasNEON for all neon patterns in ARMInstrNEON.td. NFCI.

LGTM. Yes, a bit difficult to test atm!

Fri, Jun 7, 12:26 AM · Restricted Project

Thu, Jun 6

samparker added inline comments to D61934: [SCEV] Use wrap flags in InsertBinop.
Thu, Jun 6, 5:32 AM · Restricted Project
samparker updated the diff for D62604: [CodeGen] Generic Hardware Loop Support.

Cheers, NumElements has been renamed to LoopDecrement.

Thu, Jun 6, 5:26 AM
samparker updated the diff for D62604: [CodeGen] Generic Hardware Loop Support.

Removed initialisation in HardwareLoopInfo constructor and, instead, added two more options to do the same.

Thu, Jun 6, 3:23 AM
samparker added inline comments to D62604: [CodeGen] Generic Hardware Loop Support.
Thu, Jun 6, 2:14 AM
samparker added inline comments to D61934: [SCEV] Use wrap flags in InsertBinop.
Thu, Jun 6, 2:09 AM · Restricted Project
samparker committed rG7cc580f5e95e: [SCEV] Use wrap flags in InsertBinop (authored by samparker).
[SCEV] Use wrap flags in InsertBinop
Thu, Jun 6, 1:54 AM

Wed, Jun 5

samparker added a parent revision for D62907: [ARM] Implement TTI::isHardwareLoopProfitable: D62604: [CodeGen] Generic Hardware Loop Support.
Wed, Jun 5, 7:48 AM · Restricted Project
samparker added a child revision for D62604: [CodeGen] Generic Hardware Loop Support: D62907: [ARM] Implement TTI::isHardwareLoopProfitable.
Wed, Jun 5, 7:48 AM
samparker created D62907: [ARM] Implement TTI::isHardwareLoopProfitable.
Wed, Jun 5, 7:48 AM · Restricted Project
samparker updated the diff for D61934: [SCEV] Use wrap flags in InsertBinop.

Using FlagAnyWrap for lshr and udiv.

Wed, Jun 5, 1:59 AM · Restricted Project
samparker added inline comments to D61934: [SCEV] Use wrap flags in InsertBinop.
Wed, Jun 5, 1:52 AM · Restricted Project
samparker updated the diff for D61934: [SCEV] Use wrap flags in InsertBinop.

Updated comments.

Wed, Jun 5, 1:34 AM · Restricted Project
samparker added inline comments to D61934: [SCEV] Use wrap flags in InsertBinop.
Wed, Jun 5, 1:33 AM · Restricted Project
samparker updated the diff for D62604: [CodeGen] Generic Hardware Loop Support.
  • Added expand safety check..
  • Made mightUseCTR into a private method. I tried static but since it uses many PPCTTIImpl members it just makes sense to have it as part of the class.
Wed, Jun 5, 1:26 AM

Tue, Jun 4

samparker added inline comments to D62604: [CodeGen] Generic Hardware Loop Support.
Tue, Jun 4, 11:33 PM
samparker added inline comments to D62667: [ARM] Add the non-MVE instructions in Arm v8.1-M..
Tue, Jun 4, 5:24 AM · Restricted Project
samparker updated the diff for D62604: [CodeGen] Generic Hardware Loop Support.

Updated llvm.loop.decrement.reg comment description.

Tue, Jun 4, 5:13 AM
samparker added a comment to D62604: [CodeGen] Generic Hardware Loop Support.

Sure!

Tue, Jun 4, 4:52 AM
samparker updated the summary of D62604: [CodeGen] Generic Hardware Loop Support.
Tue, Jun 4, 3:54 AM
samparker added a comment to D62604: [CodeGen] Generic Hardware Loop Support.

I would expect many targets to have some kind of validity check late on in the pipeline. loop.decrement.reg is designed so that it be just be selected to a machine sub, as the IV chain still exists along with the icmp and br. I have assumed that because the intrinsic behaves like a sub, any target should be able to, hopefully trivially, fall back to a machine sub late on. Is this something that would be difficult for you..? The loop.decrement, which produces an i1, would cause more problems but this framework allows the backend to make the best decision for itself.

Tue, Jun 4, 3:51 AM
samparker added inline comments to D62680: [ARM] Add MVE vector load/store instructions..
Tue, Jun 4, 2:30 AM · Restricted Project

Mon, Jun 3

samparker updated the diff for D62604: [CodeGen] Generic Hardware Loop Support.

Removed RequiresNewPreheader from HardwareLoopInfo.

Mon, Jun 3, 7:09 AM
samparker added inline comments to D62604: [CodeGen] Generic Hardware Loop Support.
Mon, Jun 3, 6:58 AM
samparker updated the diff for D62604: [CodeGen] Generic Hardware Loop Support.
  • Added comments describing the intrinsics.
  • loop_decrement now just returns an i1, instead of being declared anyint. This allowed removing some changes from PPC backend.
Mon, Jun 3, 6:03 AM
samparker added inline comments to D62604: [CodeGen] Generic Hardware Loop Support.
Mon, Jun 3, 5:11 AM
samparker added inline comments to D62669: [ARM] Set up infrastructure for MVE vector instructions..
Mon, Jun 3, 4:56 AM · Restricted Project
samparker updated the diff for D61934: [SCEV] Use wrap flags in InsertBinop.

Thanks both, I've moved the logic into InsertBinop.

Mon, Jun 3, 3:40 AM · Restricted Project
samparker committed rGa0bd6f8a1ae7: [AArch64] Check for simple type in FPToUInt (authored by samparker).
[AArch64] Check for simple type in FPToUInt
Mon, Jun 3, 1:47 AM

Fri, May 31

samparker created D62734: [AArch64] Check for simple type in FPToUInt.
Fri, May 31, 7:13 AM · Restricted Project
samparker added inline comments to D62667: [ARM] Add the non-MVE instructions in Arm v8.1-M..
Fri, May 31, 6:41 AM · Restricted Project
samparker added inline comments to D62667: [ARM] Add the non-MVE instructions in Arm v8.1-M..
Fri, May 31, 6:32 AM · Restricted Project
samparker added inline comments to D62667: [ARM] Add the non-MVE instructions in Arm v8.1-M..
Fri, May 31, 3:13 AM · Restricted Project
samparker added inline comments to D62667: [ARM] Add the non-MVE instructions in Arm v8.1-M..
Fri, May 31, 2:56 AM · Restricted Project
samparker added inline comments to D62667: [ARM] Add the non-MVE instructions in Arm v8.1-M..
Fri, May 31, 1:28 AM · Restricted Project

Thu, May 30

samparker committed rG913604a637d5: [NFC][ARM][ParallelDSP] Refactor narrow sequence (authored by samparker).
[NFC][ARM][ParallelDSP] Refactor narrow sequence
Thu, May 30, 11:11 AM
samparker added a comment to D62667: [ARM] Add the non-MVE instructions in Arm v8.1-M..

I will continue going over this tomorrow.

Thu, May 30, 9:08 AM · Restricted Project
samparker abandoned D37472: [ARM] Enable QADD and QSUB instruction selection.

Hopefully can now be handled by using generic saturating nodes.

Thu, May 30, 6:02 AM