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samparker (Sam Parker)
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User Since
May 11 2015, 7:59 AM (231 w, 3 d)

Recent Activity

Yesterday

samparker committed rG8e6a638c74dc: [ARM][MVE] Enable truncating masked stores (authored by samparker).
[ARM][MVE] Enable truncating masked stores
Thu, Oct 17, 5:17 AM
samparker closed D68461: [ARM][MVE] Enable truncating masked stores.
Thu, Oct 17, 5:16 AM · Restricted Project
samparker updated the diff for D68461: [ARM][MVE] Enable truncating masked stores.
  • Rebased.
  • Removed support for unaligned accesses.
  • Added a couple of fp tests.
Thu, Oct 17, 3:33 AM · Restricted Project
samparker added a comment to D69040: [TTI][LV] preferPredicateOverEpilogue.

Thinking about this some more, I think it would be best to at least check some features of the loop for legality:

  • no vector widths greater than 128 bits.
  • all vector operations should have the same number of lanes.
Thu, Oct 17, 2:06 AM · Restricted Project
samparker committed rG3ff961cabd85: [ARM][MVE] Change VPST to use, not def, VPR (authored by samparker).
[ARM][MVE] Change VPST to use, not def, VPR
Thu, Oct 17, 1:47 AM
samparker closed D69037: [ARM][MVE] Change VPST to use, not def, VPR.
Thu, Oct 17, 1:46 AM · Restricted Project
samparker committed rG39af8a3a3b66: [DAGCombine][ARM] Enable extending masked loads (authored by samparker).
[DAGCombine][ARM] Enable extending masked loads
Thu, Oct 17, 12:58 AM
samparker closed D68337: [ARM][MVE] Enable extending masked loads.
Thu, Oct 17, 12:58 AM · Restricted Project

Wed, Oct 16

samparker added inline comments to D69040: [TTI][LV] preferPredicateOverEpilogue.
Wed, Oct 16, 7:32 AM · Restricted Project
samparker created D69037: [ARM][MVE] Change VPST to use, not def, VPR.
Wed, Oct 16, 7:11 AM · Restricted Project
samparker accepted D68999: [ARM] Extra qdadd patterns.

LGTM

Wed, Oct 16, 6:12 AM · Restricted Project
samparker added a comment to D68976: [ARM] Add qadd lowering from a sadd_sat.

LGTM.

Wed, Oct 16, 6:12 AM · Restricted Project
samparker updated the diff for D68337: [ARM][MVE] Enable extending masked loads.

Addressed comments.

Wed, Oct 16, 3:22 AM · Restricted Project
samparker committed rG1c3ca61294de: [ARM][ParallelDSP] Change smlad insertion order (authored by samparker).
[ARM][ParallelDSP] Change smlad insertion order
Wed, Oct 16, 2:44 AM
samparker closed D67392: [ARM][ParallelDSP] Change smlad insertion order.
Wed, Oct 16, 2:43 AM · Restricted Project
samparker added inline comments to D68337: [ARM][MVE] Enable extending masked loads.
Wed, Oct 16, 2:43 AM · Restricted Project
samparker added inline comments to D68976: [ARM] Add qadd lowering from a sadd_sat.
Wed, Oct 16, 2:35 AM · Restricted Project

Tue, Oct 15

samparker accepted D68579: [HardwareLoops] Optimisation remarks.

I agree that it would be good to know why a loop isn't a candidate, but this looks like a good start to me!

Tue, Oct 15, 8:28 AM · Restricted Project
samparker added inline comments to D68976: [ARM] Add qadd lowering from a sadd_sat.
Tue, Oct 15, 8:10 AM · Restricted Project
samparker accepted D68974: [ARM] Lower sadd_sat to qadd8 and qadd16.

LGTM.

Tue, Oct 15, 8:10 AM · Restricted Project
samparker added inline comments to D67392: [ARM][ParallelDSP] Change smlad insertion order.
Tue, Oct 15, 7:30 AM · Restricted Project
samparker added a comment to D68976: [ARM] Add qadd lowering from a sadd_sat.

How about adding support for the QD* versions as well?

Tue, Oct 15, 6:22 AM · Restricted Project
samparker committed rGce39278f2575: [ARM][MVE] validForTailPredication insts (authored by samparker).
[ARM][MVE] validForTailPredication insts
Tue, Oct 15, 6:15 AM
samparker closed D67904: [ARM][MVE] validForTailPredication insts.
Tue, Oct 15, 6:15 AM · Restricted Project
samparker updated the diff for D68337: [ARM][MVE] Enable extending masked loads.
  • Addressed comments in the dag combiner.
  • Changed x86 backend so that extending masked loads are not desirable.
  • Changed arm backend so that expanding extending masked loads are not desirable.
  • Added more tests.
Tue, Oct 15, 5:36 AM · Restricted Project
samparker added a comment to D68337: [ARM][MVE] Enable extending masked loads.

Thanks @craig.topper. I'll add the necessary changes into the X86 backend.

Tue, Oct 15, 3:00 AM · Restricted Project

Mon, Oct 14

samparker added a comment to D68337: [ARM][MVE] Enable extending masked loads.

@craig.topper This patch currently causes an isel failure for pr35443.ll when an v4i8 masked load is being zero extended into an v4i64. I know nothing about AVX, could you please advise whether this operation is supported or how to address the issue? Thanks.

Mon, Oct 14, 5:38 AM · Restricted Project
samparker updated the diff for D68337: [ARM][MVE] Enable extending masked loads.
  • Rebased so we're now using MaybeAlign.
  • Removed codegen support for unaligned masked loads.
  • Added tests for wider than 128-bit vectors.
  • Added loop vectorize tests for unaligned accesses.
Mon, Oct 14, 5:38 AM · Restricted Project
samparker added inline comments to D68337: [ARM][MVE] Enable extending masked loads.
Mon, Oct 14, 3:18 AM · Restricted Project
samparker committed rG527a35e15558: [NFC][TTI] Add Alignment for isLegalMasked[Load/Store] (authored by samparker).
[NFC][TTI] Add Alignment for isLegalMasked[Load/Store]
Mon, Oct 14, 2:59 AM
samparker closed D68400: [NFC][TTI] Add Alignment for isLegalMasked[Load/Store].
Mon, Oct 14, 2:59 AM · Restricted Project
samparker accepted D68283: [ARM] Selection for MVE VMOVN.

Ok.

Mon, Oct 14, 2:27 AM · Restricted Project
samparker added inline comments to D68400: [NFC][TTI] Add Alignment for isLegalMasked[Load/Store].
Mon, Oct 14, 12:47 AM · Restricted Project

Tue, Oct 8

samparker updated the diff for D68400: [NFC][TTI] Add Alignment for isLegalMasked[Load/Store].
  • Now using MaybeAlign
  • Now using an alignment helper function in the vectorizer.
Tue, Oct 8, 2:28 AM · Restricted Project
samparker added a comment to D68400: [NFC][TTI] Add Alignment for isLegalMasked[Load/Store].

Looks like it! I'll try it.

Tue, Oct 8, 2:09 AM · Restricted Project
samparker added a comment to D68400: [NFC][TTI] Add Alignment for isLegalMasked[Load/Store].

Yes, it turns out Align is simple to use, the constructor just takes the unsigned value... but it will not accept zero and so causes assertion failures.

Tue, Oct 8, 1:45 AM · Restricted Project

Mon, Oct 7

samparker added inline comments to D68337: [ARM][MVE] Enable extending masked loads.
Mon, Oct 7, 8:55 AM · Restricted Project
samparker added inline comments to D68337: [ARM][MVE] Enable extending masked loads.
Mon, Oct 7, 8:49 AM · Restricted Project
samparker added inline comments to D68337: [ARM][MVE] Enable extending masked loads.
Mon, Oct 7, 8:13 AM · Restricted Project
samparker added a comment to D68566: [ARM] VQADD instructions.

Great!

Mon, Oct 7, 7:38 AM · Restricted Project
samparker added inline comments to D68461: [ARM][MVE] Enable truncating masked stores.
Mon, Oct 7, 7:19 AM · Restricted Project
samparker added inline comments to D68337: [ARM][MVE] Enable extending masked loads.
Mon, Oct 7, 7:17 AM · Restricted Project
samparker added a comment to D68566: [ARM] VQADD instructions.

Just wondering, who generates the intrinsics? From the little that I remember from the last time I looked, I thought it was clang but it that is was x86 specific? Do we have some hooks somewhere saying that we support them?

Mon, Oct 7, 5:11 AM · Restricted Project
samparker updated the diff for D68337: [ARM][MVE] Enable extending masked loads.

I had missed the shift value on the input patterns.

Mon, Oct 7, 1:09 AM · Restricted Project
samparker updated the diff for D68461: [ARM][MVE] Enable truncating masked stores.

Rebased and added a '1' shift value for strh.

Mon, Oct 7, 1:06 AM · Restricted Project

Fri, Oct 4

samparker updated the diff for D68337: [ARM][MVE] Enable extending masked loads.

Now handling the a bitcast passthru value in LowerMLOAD. Corrected the half load addr values.

Fri, Oct 4, 7:40 AM · Restricted Project
samparker added inline comments to D68337: [ARM][MVE] Enable extending masked loads.
Fri, Oct 4, 6:36 AM · Restricted Project
samparker added a parent revision for D68461: [ARM][MVE] Enable truncating masked stores: D68400: [NFC][TTI] Add Alignment for isLegalMasked[Load/Store].
Fri, Oct 4, 6:10 AM · Restricted Project
samparker added a comment to D68461: [ARM][MVE] Enable truncating masked stores.

I've missed out test changes that also change in D68337.

Fri, Oct 4, 6:10 AM · Restricted Project
samparker added a child revision for D68400: [NFC][TTI] Add Alignment for isLegalMasked[Load/Store]: D68461: [ARM][MVE] Enable truncating masked stores.
Fri, Oct 4, 6:10 AM · Restricted Project
samparker created D68461: [ARM][MVE] Enable truncating masked stores.
Fri, Oct 4, 6:10 AM · Restricted Project
samparker added a comment to D68400: [NFC][TTI] Add Alignment for isLegalMasked[Load/Store].

I saw that, but wasn't sure how to use it! The alignment is just an unsigned value at all the call sites, so that's why I went for that.

Fri, Oct 4, 2:10 AM · Restricted Project
samparker added a parent revision for D68337: [ARM][MVE] Enable extending masked loads: D68400: [NFC][TTI] Add Alignment for isLegalMasked[Load/Store].
Fri, Oct 4, 1:51 AM · Restricted Project
samparker updated the diff for D68337: [ARM][MVE] Enable extending masked loads.
  • Moved the combine into generic dagcombine.
  • Now checking memory alignment to decide legality.
  • Not allowing v2 vectors.
  • Masked load patterns are now explicitly either aligned or unaligned.
  • Added more tests.
Fri, Oct 4, 1:51 AM · Restricted Project
samparker added a child revision for D68400: [NFC][TTI] Add Alignment for isLegalMasked[Load/Store]: D68337: [ARM][MVE] Enable extending masked loads.
Fri, Oct 4, 1:51 AM · Restricted Project

Thu, Oct 3

samparker accepted D68283: [ARM] Selection for MVE VMOVN.

Cool. LGTM

Thu, Oct 3, 8:47 AM · Restricted Project
samparker created D68400: [NFC][TTI] Add Alignment for isLegalMasked[Load/Store].
Thu, Oct 3, 8:42 AM · Restricted Project
samparker added inline comments to D68283: [ARM] Selection for MVE VMOVN.
Thu, Oct 3, 3:25 AM · Restricted Project
samparker added a comment to D68337: [ARM][MVE] Enable extending masked loads.

Thanks for those points, I'll add loads more tests.

Thu, Oct 3, 2:21 AM · Restricted Project

Wed, Oct 2

samparker added inline comments to D67950: [TableGen] Fix a bug that MCSchedClassDesc is interfered between different SchedModel.
Wed, Oct 2, 8:39 AM · Restricted Project
samparker updated the diff for D67904: [ARM][MVE] validForTailPredication insts.

Added support for VFMA and VMLA

Wed, Oct 2, 8:36 AM · Restricted Project
samparker added inline comments to D68283: [ARM] Selection for MVE VMOVN.
Wed, Oct 2, 7:39 AM · Restricted Project
samparker created D68337: [ARM][MVE] Enable extending masked loads.
Wed, Oct 2, 7:24 AM · Restricted Project

Tue, Oct 1

samparker committed rGef7990a88afd: [NFC][ARM][MVE] More tests (authored by samparker).
[NFC][ARM][MVE] More tests
Tue, Oct 1, 6:02 AM
samparker committed rG95aee9da4c23: [NFC][HardwareLoops] Update some iterators (authored by samparker).
[NFC][HardwareLoops] Update some iterators
Tue, Oct 1, 12:55 AM

Mon, Sep 30

samparker committed rGe3b4f0ec2566: [NFC][ARM][MVE] More tests (authored by samparker).
[NFC][ARM][MVE] More tests
Mon, Sep 30, 1:51 AM
samparker committed rGaac03ae06a8a: [ARM][MVE] Change VCTP operand (authored by samparker).
[ARM][MVE] Change VCTP operand
Mon, Sep 30, 1:05 AM
samparker committed rGb3438f1cc040: [ARM][CGP] Allow signext arguments (authored by samparker).
[ARM][CGP] Allow signext arguments
Mon, Sep 30, 12:52 AM

Fri, Sep 27

samparker committed rG110607b284a3: [NFC][ARM] Add some tail-predication tests (authored by samparker).
[NFC][ARM] Add some tail-predication tests
Fri, Sep 27, 3:34 AM
samparker updated the diff for D67921: [ARM][MVE] Change VCTP operand.

Moved comment.

Fri, Sep 27, 12:08 AM · Restricted Project
samparker added inline comments to D67921: [ARM][MVE] Change VCTP operand.
Fri, Sep 27, 12:02 AM · Restricted Project

Thu, Sep 26

samparker added a comment to D67752: [ARM] Loop unrolling preferences for LOB cores.

Cheers. I'm gonna put this patch on hold to do some more investigations into how hardware loops and loop unrolling interact... The current testing for this is in Transforms/HardwareLoops/ARM/structure.ll

Thu, Sep 26, 5:37 AM
samparker updated the diff for D67904: [ARM][MVE] validForTailPredication insts.

Inverted the predicate and created a whitelist instead.

Thu, Sep 26, 5:26 AM · Restricted Project
samparker added a reviewer for D67904: [ARM][MVE] validForTailPredication insts: danilaml.
Thu, Sep 26, 2:44 AM · Restricted Project
samparker added a comment to D67904: [ARM][MVE] validForTailPredication insts.

Cheers Dave, top-bottom and early clobber sound like complications. Having a whitelist sounds like a good idea, with the list of our unknowns growing, it sounds like the switch statement could be smaller too!

Thu, Sep 26, 1:04 AM · Restricted Project
samparker added a comment to D68019: [ARM][CGP] Allow signext arguments.

We had a bug involving SIToFP and then I got worried about the signext arg in the reproducer too, as I had just forgotten that we explicitly zext any arguments used. Adding some profitability checks are on my todo list though.

Thu, Sep 26, 12:46 AM · Restricted Project

Wed, Sep 25

samparker updated the diff for D67392: [ARM][ParallelDSP] Change smlad insertion order.

Thanks both. I've added a threshold to the number of loads that we can inspect, which causes us to bail before examining any loads. I've also added an early exit into the troublesome loop in RecordMemoryOps.

Wed, Sep 25, 7:44 AM · Restricted Project
samparker created D68019: [ARM][CGP] Allow signext arguments.
Wed, Sep 25, 6:35 AM · Restricted Project

Tue, Sep 24

samparker updated the diff for D67921: [ARM][MVE] Change VCTP operand.

Updated a couple of the tests.

Tue, Sep 24, 1:20 AM · Restricted Project

Mon, Sep 23

samparker created D67921: [ARM][MVE] Change VCTP operand.
Mon, Sep 23, 8:53 AM · Restricted Project
samparker accepted D67909: [ARM] Split large widening MVE loads.

LGTM.

Mon, Sep 23, 5:28 AM · Restricted Project
samparker accepted D67828: [ARM] Split large truncating MVE stores.

Thanks, LGTM

Mon, Sep 23, 5:12 AM · Restricted Project
samparker created D67904: [ARM][MVE] validForTailPredication insts.
Mon, Sep 23, 3:50 AM · Restricted Project
samparker committed rG9feb429a337f: [ARM][MVE] Remove old tail predicates (authored by samparker).
[ARM][MVE] Remove old tail predicates
Mon, Sep 23, 2:48 AM
samparker committed rG4ba6d0ded230: [ARM][LowOverheadLoops] Use subs during revert. (authored by samparker).
[ARM][LowOverheadLoops] Use subs during revert.
Mon, Sep 23, 1:59 AM
samparker closed D67801: [ARM][LowOverheadLoops] Use subs during revert..
Mon, Sep 23, 1:59 AM · Restricted Project
samparker committed rG566127e376aa: [ARM][LowOverheadLoops] Use tBcc when reverting (authored by samparker).
[ARM][LowOverheadLoops] Use tBcc when reverting
Mon, Sep 23, 1:36 AM

Fri, Sep 20

samparker updated the diff for D67709: [ARM][MVE] Cleanup tail-predicated loop.

Added a few more tests.

Fri, Sep 20, 7:10 AM · Restricted Project
samparker added inline comments to D67828: [ARM] Split large truncating MVE stores.
Fri, Sep 20, 6:29 AM · Restricted Project
samparker added a comment to D67801: [ARM][LowOverheadLoops] Use subs during revert..

Not across the loop because LoopEnd implicitly defines it.

Fri, Sep 20, 5:58 AM · Restricted Project
samparker updated the diff for D67709: [ARM][MVE] Cleanup tail-predicated loop.

Created Cleanup function.

Fri, Sep 20, 4:06 AM · Restricted Project
samparker added a comment to D67709: [ARM][MVE] Cleanup tail-predicated loop.

So the pass shouldn't attempt to convert a loop that contains any vector intrinsics, other than masked.load and masked.store. So, we will actually need to do extra work for this to operate with MVE intrinsics. Even once we've done that, the pass only tries to remove the old icmp predicates, which we pattern match. If the user defined predicates match those that the vectorizer outputs, then there's no reason why we won't perform this transform. I would say that I'd add a test, but we don't have intrinsic support yet...

Fri, Sep 20, 3:46 AM · Restricted Project
samparker updated the diff for D67709: [ARM][MVE] Cleanup tail-predicated loop.

More tests.

Fri, Sep 20, 3:19 AM · Restricted Project
samparker updated the diff for D67709: [ARM][MVE] Cleanup tail-predicated loop.

Added a couple more tests.

Fri, Sep 20, 2:51 AM · Restricted Project
samparker created D67801: [ARM][LowOverheadLoops] Use subs during revert..
Fri, Sep 20, 12:04 AM · Restricted Project

Thu, Sep 19

samparker created D67796: [ARM][LowOverheadLoops] Use tBcc when reverting.
Thu, Sep 19, 11:00 PM · Restricted Project
samparker updated the diff for D67709: [ARM][MVE] Cleanup tail-predicated loop.

Added 'hasSideEffects' to VCTP because machine cse did a good job of removing the duplicate vctp in the exit block. I think always executing the 'extra' instruction outweighs the risk of having to spill/reload the vpr or not being able to perform the proper tail predication.

Thu, Sep 19, 6:04 AM · Restricted Project
samparker updated the diff for D67709: [ARM][MVE] Cleanup tail-predicated loop.

Now cloning VCTP in the exit block if needed. The reason being that if we create a real TP loop, then VPR will not hold the predicate.

Thu, Sep 19, 5:00 AM · Restricted Project
samparker created D67752: [ARM] Loop unrolling preferences for LOB cores.
Thu, Sep 19, 1:56 AM

Wed, Sep 18

samparker committed rG56aa691c4149: [ARM] Fix for buildbots (authored by samparker).
[ARM] Fix for buildbots
Wed, Sep 18, 11:57 PM