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[ARM] Disallow PC, and optionally SP, in VMOVRH and VMOVHR.

Authored by simon_tatham on Apr 15 2019, 5:59 AM.



Arm v8.1-M supports the VMOV instructions that move a half-precision
value to and from a GPR, but not if the GPR is SP or PC.

To fix this, I've changed those instructions to use the rGPR register
class instead of GPR. rGPR always excludes PC, and it excludes SP
except in the presence of the HasV8Ops target feature (i.e. Arm v8-A).
So the effect is that VMOV.F16 to and from PC is now illegal
everywhere, but VMOV.F16 to and from SP is illegal only on non-v8-A
cores (which I believe is all as it should be).

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Event Timeline

simon_tatham created this revision.Apr 15 2019, 5:59 AM

I agree with this. Does it have a test anywhere?

It's tested for v8.1-M, by llvm/test/MC/ARM/thumbv8.1m.s which is added by D60706. I could add an extra test or two to this patch for other affected architectures, if you think it's necessary.

I think it would be worth a test in this patch, especially since D60706 only tests v8.1M, not v8.2A which also introduces this instruction.

OK, here's a revised version which adds a test for v8.2A.

ostannard added inline comments.Jun 4 2019, 3:56 AM
1 ↗(On Diff #202220)

The rGPR register class should already handle the difference in use of SP from v8 onwards. I think the nonsense "thumbv8.2a.main" triple here is preventing that from working.

Fixed combination of .main with v8.2a, and updated expected test
results accordingly. The commit message wants a rewrite as well, which
I'll upload in a moment.

simon_tatham retitled this revision from [ARM] Disallow SP and PC in VMOVRH and VMOVHR. to [ARM] Disallow PC, and optionally SP, in VMOVRH and VMOVHR..Jun 10 2019, 7:27 AM
simon_tatham edited the summary of this revision. (Show Details)
This revision is now accepted and ready to land.Jun 10 2019, 7:36 AM
This revision was automatically updated to reflect the committed changes.