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ostannard (Oliver Stannard (Linaro))
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User Since
Apr 11 2019, 6:15 AM (9 w, 2 d)

Recent Activity

Fri, Jun 14

ostannard accepted D62670: [ARM] Add MVE horizontal accumulation instructions..

LGTM

Fri, Jun 14, 7:19 AM · Restricted Project

Thu, Jun 13

ostannard accepted D60692: [ARM] Explicit lowering of half <-> double conversions..

LGTM except for a few typos in comments.

Thu, Jun 13, 5:52 AM · Restricted Project
ostannard added inline comments to D62670: [ARM] Add MVE horizontal accumulation instructions..
Thu, Jun 13, 5:39 AM · Restricted Project
ostannard added a comment to D63247: [ARM] MVE VPT Block Pass.

D62669 includes a few VPT predicable MVE instructions to test the assembly side of this, is that enough to add some MIR tests for this?

Thu, Jun 13, 5:34 AM · Restricted Project
ostannard accepted D62669: [ARM] Set up infrastructure for MVE vector instructions..

LGTM, just one minor nit.

Thu, Jun 13, 5:24 AM · Restricted Project
ostannard accepted D63219: [ARM] Refactor handling of IT mask operands..

LGTM, thanks!

Thu, Jun 13, 2:24 AM · Restricted Project

Mon, Jun 10

ostannard accepted D60704: [ARM] Disallow PC, and optionally SP, in VMOVRH and VMOVHR..

LGTM

Mon, Jun 10, 7:36 AM · Restricted Project

Fri, Jun 7

ostannard accepted D60710: [ARM] Add ACLE feature macros for MVE..

LGTM

Fri, Jun 7, 7:50 AM · Restricted Project, Restricted Project
ostannard added inline comments to D60710: [ARM] Add ACLE feature macros for MVE..
Fri, Jun 7, 5:24 AM · Restricted Project, Restricted Project
ostannard added inline comments to D60710: [ARM] Add ACLE feature macros for MVE..
Fri, Jun 7, 2:03 AM · Restricted Project, Restricted Project
ostannard accepted D62998: [ARM] Fix bugs introduced by the fp64/d32 rework..

LGTM with one change.

Fri, Jun 7, 1:57 AM · Restricted Project, Restricted Project

Thu, Jun 6

ostannard added inline comments to D62672: [ARM] Add MVE vector shift instructions..
Thu, Jun 6, 6:43 AM · Restricted Project

Wed, Jun 5

ostannard added inline comments to D62671: [ARM] Add MVE integer vector min/max instructions..
Wed, Jun 5, 4:02 AM · Restricted Project
ostannard accepted D60697: [ARM] Allow "-march=foo+fp" to vary with foo..

Fair enough, I don't think we currently try to diagnose any other invalid combinations of features. LGTM.

Wed, Jun 5, 3:53 AM · Restricted Project, Restricted Project

Tue, Jun 4

ostannard added inline comments to D62670: [ARM] Add MVE horizontal accumulation instructions..
Tue, Jun 4, 9:39 AM · Restricted Project
ostannard added inline comments to D62669: [ARM] Set up infrastructure for MVE vector instructions..
Tue, Jun 4, 9:13 AM · Restricted Project
ostannard added inline comments to D60704: [ARM] Disallow PC, and optionally SP, in VMOVRH and VMOVHR..
Tue, Jun 4, 3:57 AM · Restricted Project
ostannard added inline comments to D62668: [ARM] First MVE instructions: scalar shifts..
Tue, Jun 4, 3:51 AM · Restricted Project
ostannard accepted D60708: [ARM] Code-generation infrastructure for MVE..

There is still a lot of code here not tested, but I think it will all be easier to test once we have some more actual instruction selection, so LGTM.

Tue, Jun 4, 2:23 AM · Restricted Project

Mon, Jun 3

ostannard added inline comments to D60697: [ARM] Allow "-march=foo+fp" to vary with foo..
Mon, Jun 3, 3:03 AM · Restricted Project, Restricted Project

Fri, May 31

ostannard requested changes to D60697: [ARM] Allow "-march=foo+fp" to vary with foo..

This still needs tests adding.

Fri, May 31, 6:32 AM · Restricted Project, Restricted Project

Thu, May 30

ostannard added a comment to D62651: [ARM] Add FP16 vector insert/extract patterns.

Could these be done without having to move to the GPR register file and back? The v8.2A FP16 extension added the VINS and VMOVX instructions which move between the top and bottom halves of half of S registers, which look ideal for this.

Thu, May 30, 5:06 AM · Restricted Project
ostannard accepted D60694: [ARM] Introduce separate features for FP registers..

LGTM with one nit.

Thu, May 30, 2:51 AM · Restricted Project
ostannard added inline comments to D62596: [AARCH64][ELF][llvm-readobj] Add support for BTI and PAC dynamic tags.
Thu, May 30, 2:12 AM · Restricted Project
ostannard accepted D60698: [ARM] add target arch definitions for 8.1-M and MVE..

LGTM

Thu, May 30, 1:24 AM · Restricted Project

May 15 2019

ostannard added a comment to D59129: [SROA] Don't lower expensive allocas with minsize.

It's hard to put exact numbers on this, especially when we are trading off vague concepts like "the complexity of the LLVM codebase", but I'd like to see enough benchmark results that we can be confident that this is making an overall improvement, and that we're not being misled by a few outliers. That might come from running a greater variety of benchmarks until we collect enough data, or it might come from improvements to the patch itself.

May 15 2019, 8:38 AM
ostannard added a comment to D59129: [SROA] Don't lower expensive allocas with minsize.

My concern isn't really the size of the change, it's with the variance. With only four benchmarks which change, and only by a small amount each, then if you happened to run one more or one fewer benchmark you could come to a completely different conclusion.

May 15 2019, 8:01 AM
ostannard added a comment to D59129: [SROA] Don't lower expensive allocas with minsize.

I'm not sure those benchmark results are good enough to justify this: there are only 4 changes, and the ups and downs almost balance each other out. Have you investigated the regressions to see what this makes worse, and if there's a way we could avoid them?

May 15 2019, 7:31 AM

May 3 2019

ostannard added inline comments to D60691: [ARM] Replace fp-only-sp and d16 with fp64 and d32..
May 3 2019, 6:10 AM · Restricted Project, Restricted Project
ostannard added a comment to D61417: [NFC] Refactor TargetCallingConv so calling conventions can see which parameters are varargs.

Looks like a nice tidy-up, just a few style issues.

May 3 2019, 2:08 AM · Restricted Project

May 2 2019

ostannard requested changes to D61433: -Oz: Reuse constants in registers instead of canonicalizing operations that use a different constant.
May 2 2019, 9:41 AM
ostannard added a comment to D61052: [compiler-rt][builtins] Implement some fetch-and-x operations for Cortex-M.

The instruction exists on A-class targets. It's just that on most A-class targets, we run in userspace, and userspace isn't allowed to disable interrupts, for obvious reasons.

May 2 2019, 2:01 AM · Restricted Project, Restricted Project

Apr 29 2019

ostannard accepted D61131: [AArch64][SVE] Asm: add aliases for unpredicated bitwise logical instructions.

LGTM

Apr 29 2019, 3:50 AM · Restricted Project
ostannard accepted D60720: [ARM] Add v4f16 and v8f16 types to the CallingConv.

LGTM

Apr 29 2019, 2:35 AM · Restricted Project
ostannard accepted D60618: [ARM] Add bitcast/extract_subvec. of fp16 vectors.

LGTM, thanks.

Apr 29 2019, 2:07 AM · Restricted Project

Apr 25 2019

ostannard added a comment to D60618: [ARM] Add bitcast/extract_subvec. of fp16 vectors.

Thanks for fixing the order of the patterns, it's much easier to check for completeness now.

Apr 25 2019, 2:23 AM · Restricted Project
ostannard added inline comments to D60720: [ARM] Add v4f16 and v8f16 types to the CallingConv.
Apr 25 2019, 2:14 AM · Restricted Project

Apr 18 2019

ostannard added inline comments to D60720: [ARM] Add v4f16 and v8f16 types to the CallingConv.
Apr 18 2019, 5:03 AM · Restricted Project

Apr 17 2019

ostannard edited reviewers for D60691: [ARM] Replace fp-only-sp and d16 with fp64 and d32., added: ostannard; removed: olista01.

For the auto-upgrader, these limited FPUs only exist for microcontrollers, where I doubt any users are keeping bitcode files around for a long time, so I'd be fine with not doing this. I've had a skim through the auto-upgrader code, and I don't see any other target-specific attributes which are handled there, though there are some target-specific intrinsics.

Apr 17 2019, 9:24 AM · Restricted Project, Restricted Project
ostannard added a reviewer for D60828: [ARM] Fix armv8 features tree and add fp16fml: simon_tatham.
Apr 17 2019, 9:16 AM · Restricted Project

Apr 16 2019

ostannard added a comment to D60707: [ARM] Adjust calling conventions for MVE vectors..

Why do we need to treat this differently to NEON? As far as I know the calling convention is the same.

Apr 16 2019, 4:00 AM · Restricted Project
ostannard added a comment to D60708: [ARM] Code-generation infrastructure for MVE..

Can any of this be tested yet, or are we still missing some patches?

Apr 16 2019, 4:00 AM · Restricted Project
ostannard added a comment to D60704: [ARM] Disallow PC, and optionally SP, in VMOVRH and VMOVHR..

I think it would be worth a test in this patch, especially since D60706 only tests v8.1M, not v8.2A which also introduces this instruction.

Apr 16 2019, 3:35 AM · Restricted Project
ostannard added inline comments to D60702: [ARM] Add fixup types for BF and LOL..
Apr 16 2019, 3:32 AM · Restricted Project
ostannard added inline comments to D60701: [ARM] add new LLVM addressing modes for v8.1-M and MVE..
Apr 16 2019, 3:11 AM · Restricted Project
ostannard added a comment to D60618: [ARM] Add bitcast/extract_subvec. of fp16 vectors.

It looks like we are still missing a lot of the conversions between f16 vectors and other vector types, I think it would be better to add them all at once, so it's easier to check we haven't messed any.

Apr 16 2019, 3:07 AM · Restricted Project
ostannard added inline comments to D60698: [ARM] add target arch definitions for 8.1-M and MVE..
Apr 16 2019, 3:04 AM · Restricted Project
ostannard accepted D60696: [TableGen] New default operand "undef_tied_input"..

LGTM

Apr 16 2019, 2:56 AM · Restricted Project
ostannard added inline comments to D60694: [ARM] Introduce separate features for FP registers..
Apr 16 2019, 2:42 AM · Restricted Project
ostannard added a comment to D60692: [ARM] Explicit lowering of half <-> double conversions..

Can this be tested now, or does that depend on one of the other patches?

Apr 16 2019, 2:28 AM · Restricted Project

Apr 15 2019

ostannard requested changes to D60721: [ARM] Check codegen of v8.2a intrinsics.

Clang tests should just cover the C->IR translation, and not depend on the LLVM backends. This should instead be an IR->asm test in the LLVM repository.

Apr 15 2019, 10:11 AM · Restricted Project
ostannard added a comment to D60720: [ARM] Add v4f16 and v8f16 types to the CallingConv.

Tests?

Apr 15 2019, 10:11 AM · Restricted Project

Apr 11 2019

ostannard requested changes to D60349: [COFF, ARM64] Fix ABI implementation of struct returns.

The document you linked in the LLVM change (https://docs.microsoft.com/en-us/cpp/build/arm64-windows-abi-conventions?view=vs-2019#return-values) says that small POD types are returned directly in X0 or X0 and X1, but this looks like it will always return them indirectly. I think we also need to check the size of the type, and fall back the the plain C ABI for small types.

Apr 11 2019, 6:23 AM · Restricted Project