SjoerdMeijer (Sjoerd Meijer)
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User Since
Jan 26 2016, 2:17 AM (133 w, 5 d)

Recent Activity

Fri, Aug 17

SjoerdMeijer accepted D50885: [AArch64][SVE] Asm: Add SVE System registers.

Thanks, looks good to me.

Fri, Aug 17, 6:55 AM
SjoerdMeijer added inline comments to D50885: [AArch64][SVE] Asm: Add SVE System registers.
Fri, Aug 17, 2:32 AM
SjoerdMeijer committed rL339997: [ARM][NFC] ARMCodeGenPrepare: some refactoring and algorithm description.
[ARM][NFC] ARMCodeGenPrepare: some refactoring and algorithm description
Fri, Aug 17, 12:34 AM
SjoerdMeijer closed D50846: [ARM][NFC] ARMCodeGenPrepare: some refactoring and algorithm description..
Fri, Aug 17, 12:34 AM
SjoerdMeijer accepted D50228: [ARM/AArch64] Support FP16 +fp16fml instructions.

LGTM

Fri, Aug 17, 12:23 AM

Thu, Aug 16

SjoerdMeijer created D50846: [ARM][NFC] ARMCodeGenPrepare: some refactoring and algorithm description..
Thu, Aug 16, 8:20 AM
SjoerdMeijer accepted D50759: [ARM] Allow zext in ARMCodeGenPrepare.

Looks okay to me.

Thu, Aug 16, 3:54 AM
SjoerdMeijer accepted D50762: [ARM] Ignore GEPs in ARMCodeGenPrepare.

Looks like a straightforward fix to me.

Thu, Aug 16, 3:44 AM

Wed, Aug 15

SjoerdMeijer accepted D50769: [ARM] Typesize lower bound for ARMCodeGenPrepare.

Looks like a straightforward fix to me.

Wed, Aug 15, 6:11 AM
SjoerdMeijer accepted D50067: [ARM] Handle signed icmps in ARMCodeGenPrepare.

LGTM

Wed, Aug 15, 1:14 AM

Tue, Aug 14

SjoerdMeijer added inline comments to D50067: [ARM] Handle signed icmps in ARMCodeGenPrepare.
Tue, Aug 14, 9:02 AM
SjoerdMeijer accepted D50054: [ARM] Allow pointer values in ARMCodeGenPrepare.

Looks okay to me

Tue, Aug 14, 8:10 AM
SjoerdMeijer added a comment to D50054: [ARM] Allow pointer values in ARMCodeGenPrepare.

Nit picking the subject/description:

Tue, Aug 14, 7:38 AM
SjoerdMeijer committed rL339645: [ARM] ParallelDSP: add option to enable/disable the pass.
[ARM] ParallelDSP: add option to enable/disable the pass
Tue, Aug 14, 12:44 AM
SjoerdMeijer closed D50511: [ARM] ParallelDSP: add option to disable the pass.
Tue, Aug 14, 12:44 AM
SjoerdMeijer added a comment to D50511: [ARM] ParallelDSP: add option to disable the pass.

Thanks for reviewing.

Tue, Aug 14, 12:40 AM

Fri, Aug 10

SjoerdMeijer accepted D50518: [ARM] Disallow zexts in ARMCodeGenPrepare.

These changes look reasonable to me.

Fri, Aug 10, 6:26 AM
SjoerdMeijer added inline comments to D50518: [ARM] Disallow zexts in ARMCodeGenPrepare.
Fri, Aug 10, 3:48 AM
SjoerdMeijer accepted D50252: [ARM] Added FP16 VREV Vector Instrinsic CodeGen support.

Looks like a straight forward fix to me now.

Fri, Aug 10, 3:18 AM

Thu, Aug 9

SjoerdMeijer updated the diff for D50179: [AArch64][ARM] Context sensitive meaning of option "crypto".
Thu, Aug 9, 1:16 PM
SjoerdMeijer updated the diff for D50179: [AArch64][ARM] Context sensitive meaning of option "crypto".

fixed typo

Thu, Aug 9, 12:58 PM
SjoerdMeijer added inline comments to D50179: [AArch64][ARM] Context sensitive meaning of option "crypto".
Thu, Aug 9, 8:33 AM
SjoerdMeijer created D50511: [ARM] ParallelDSP: add option to disable the pass.
Thu, Aug 9, 7:26 AM
SjoerdMeijer committed rC339347: [AArch64][NFC] better matching of AArch64 target in aarch64-cpus.c tests.
[AArch64][NFC] better matching of AArch64 target in aarch64-cpus.c tests
Thu, Aug 9, 7:08 AM
SjoerdMeijer committed rL339347: [AArch64][NFC] better matching of AArch64 target in aarch64-cpus.c tests.
[AArch64][NFC] better matching of AArch64 target in aarch64-cpus.c tests
Thu, Aug 9, 7:08 AM
SjoerdMeijer closed D50175: [AArch64][NFC] better matching of AArch64 target in aarch64-cpus.c tests.
Thu, Aug 9, 7:08 AM
SjoerdMeijer accepted D50227: Add/fix some FP16 tests.

LGTM

Thu, Aug 9, 6:51 AM
SjoerdMeijer updated the diff for D50175: [AArch64][NFC] better matching of AArch64 target in aarch64-cpus.c tests.

Addressed comments.

Thu, Aug 9, 6:49 AM
SjoerdMeijer added inline comments to D50175: [AArch64][NFC] better matching of AArch64 target in aarch64-cpus.c tests.
Thu, Aug 9, 6:33 AM
SjoerdMeijer added a comment to D50063: [UnJ] Pull code out into a separate function NFC.

Ah, sorry, I now see HasConsistentIterationCounts has been suggested in that other ticket. Oh well, as I said, I was bike shedding names (but still think 'invariant' is better :-)) Anyway, please ignore if you disagree.

Thu, Aug 9, 6:26 AM
SjoerdMeijer added inline comments to D50063: [UnJ] Pull code out into a separate function NFC.
Thu, Aug 9, 6:24 AM
SjoerdMeijer committed rL339340: [ARM] FP16: codegen support for VTRN.
[ARM] FP16: codegen support for VTRN
Thu, Aug 9, 5:46 AM
SjoerdMeijer closed D50454: [ARM] FP16: codegen support for VTRN.
Thu, Aug 9, 5:45 AM

Wed, Aug 8

SjoerdMeijer created D50454: [ARM] FP16: codegen support for VTRN.
Wed, Aug 8, 8:59 AM
SjoerdMeijer committed rL339251: [ARM][NFC] Replaced tab-characters in test file vtrn.ll.
[ARM][NFC] Replaced tab-characters in test file vtrn.ll
Wed, Aug 8, 7:43 AM
SjoerdMeijer updated the diff for D50175: [AArch64][NFC] better matching of AArch64 target in aarch64-cpus.c tests.

Addressed comments.

Wed, Aug 8, 7:31 AM
SjoerdMeijer added inline comments to D50175: [AArch64][NFC] better matching of AArch64 target in aarch64-cpus.c tests.
Wed, Aug 8, 7:16 AM
SjoerdMeijer committed rL339241: [ARM] FP16: codegen support for VEXT.
[ARM] FP16: codegen support for VEXT
Wed, Aug 8, 6:27 AM
SjoerdMeijer closed D50427: [ARM] FP16: codegen support for VEXT.
Wed, Aug 8, 6:27 AM
SjoerdMeijer committed rL339238: [ARM] FP16: vector vmov and vdup support.
[ARM] FP16: vector vmov and vdup support
Wed, Aug 8, 6:12 AM
SjoerdMeijer closed D50329: [ARM] FP16: vector vmov and vdup support.
Wed, Aug 8, 6:11 AM
SjoerdMeijer committed rL339232: [ARM] FP16: vector VMUL variants.
[ARM] FP16: vector VMUL variants
Wed, Aug 8, 3:28 AM
SjoerdMeijer closed D50326: [ARM] FP16: vector VMUL variants.
Wed, Aug 8, 3:28 AM
SjoerdMeijer added a comment to D50326: [ARM] FP16: vector VMUL variants.

Thanks for the reviews!

Wed, Aug 8, 3:25 AM
SjoerdMeijer committed rL339227: [ARM] FP16: support vector INT_TO_FP and FP_TO_INT.
[ARM] FP16: support vector INT_TO_FP and FP_TO_INT
Wed, Aug 8, 2:46 AM
SjoerdMeijer closed D50393: [ARM] FP16: support vector INT_TO_FP and FP_TO_INT.
Wed, Aug 8, 2:46 AM
SjoerdMeijer updated the diff for D50393: [ARM] FP16: support vector INT_TO_FP and FP_TO_INT.

Also added HasFullFP16 check to LowerVectorFP_TO_INT.

Wed, Aug 8, 2:40 AM
SjoerdMeijer added inline comments to D50326: [ARM] FP16: vector VMUL variants.
Wed, Aug 8, 2:23 AM
SjoerdMeijer added inline comments to D50326: [ARM] FP16: vector VMUL variants.
Wed, Aug 8, 1:49 AM
SjoerdMeijer created D50427: [ARM] FP16: codegen support for VEXT.
Wed, Aug 8, 1:33 AM
SjoerdMeijer added inline comments to D50326: [ARM] FP16: vector VMUL variants.
Wed, Aug 8, 1:28 AM
SjoerdMeijer committed rL339221: [ARM] FP16: support the vector vmin and vmax variants.
[ARM] FP16: support the vector vmin and vmax variants
Wed, Aug 8, 12:21 AM
SjoerdMeijer closed D50238: [ARM] FP16: support the vector vmin and vmax variants.
Wed, Aug 8, 12:20 AM

Tue, Aug 7

SjoerdMeijer created D50393: [ARM] FP16: support vector INT_TO_FP and FP_TO_INT.
Tue, Aug 7, 9:16 AM
SjoerdMeijer committed rL339148: [ARM] FP16: codegen support for VACGT.
[ARM] FP16: codegen support for VACGT
Tue, Aug 7, 8:12 AM
SjoerdMeijer closed D50236: [ARM] FP16: support VACGT.
Tue, Aug 7, 8:12 AM
SjoerdMeijer added inline comments to D50236: [ARM] FP16: support VACGT.
Tue, Aug 7, 8:00 AM
SjoerdMeijer added inline comments to D50236: [ARM] FP16: support VACGT.
Tue, Aug 7, 7:27 AM
SjoerdMeijer added inline comments to D50238: [ARM] FP16: support the vector vmin and vmax variants.
Tue, Aug 7, 7:10 AM
SjoerdMeijer updated the diff for D50238: [ARM] FP16: support the vector vmin and vmax variants.

Added tests for visitSelect.

Tue, Aug 7, 7:08 AM
SjoerdMeijer committed rL339111: [ARM][NFC] Replaced tab characters in test file vfcmp.ll..
[ARM][NFC] Replaced tab characters in test file vfcmp.ll.
Tue, Aug 7, 1:05 AM

Mon, Aug 6

SjoerdMeijer accepted D49075: [NEON] Define fp16 vld and vst intrinsics conditionally.

Thanks, LGTM.

Mon, Aug 6, 6:40 AM · Restricted Project
SjoerdMeijer added inline comments to D50252: [ARM] Added FP16 VREV Vector Instrinsic CodeGen support.
Mon, Aug 6, 6:20 AM
SjoerdMeijer created D50329: [ARM] FP16: vector vmov and vdup support.
Mon, Aug 6, 6:05 AM
SjoerdMeijer abandoned D49839: [AArch64][ARM] Armv8.2-A: Add the Floating Point Multiplication Variants.

This work is continued in D50228.

Mon, Aug 6, 3:22 AM
SjoerdMeijer created D50326: [ARM] FP16: vector VMUL variants.
Mon, Aug 6, 3:17 AM
SjoerdMeijer accepted D50202: [AArch64] Fix assertion failure on widened f16 BUILD_VECTOR.

Thanks, looks reasonable to me.

Mon, Aug 6, 1:56 AM
SjoerdMeijer added a comment to D50252: [ARM] Added FP16 VREV Vector Instrinsic CodeGen support.

Looks like a straight forward fix, but how about the v4f16 variant?

Mon, Aug 6, 1:49 AM

Fri, Aug 3

SjoerdMeijer created D50238: [ARM] FP16: support the vector vmin and vmax variants.
Fri, Aug 3, 3:43 AM
SjoerdMeijer created D50236: [ARM] FP16: support VACGT.
Fri, Aug 3, 3:17 AM
SjoerdMeijer added inline comments to D50202: [AArch64] Fix assertion failure on widened f16 BUILD_VECTOR.
Fri, Aug 3, 2:37 AM
SjoerdMeijer committed rL338835: [ARM] FP16: support vector zip and unzip.
[ARM] FP16: support vector zip and unzip
Fri, Aug 3, 2:25 AM
SjoerdMeijer closed D50186: [ARM] FP16: support vector zip and unzip.
Fri, Aug 3, 2:25 AM
SjoerdMeijer added a reviewer for D49941: [ARM] Add ARMv8.2-A FP16 scalar intrinsic: bogden.
Fri, Aug 3, 2:15 AM
SjoerdMeijer closed D50191: [ARM] FP16: support VFMA.

Committed as rL338830

Fri, Aug 3, 2:14 AM
SjoerdMeijer committed rL338830: [ARM] FP16: support VFMA.
[ARM] FP16: support VFMA
Fri, Aug 3, 2:13 AM
SjoerdMeijer added inline comments to D50191: [ARM] FP16: support VFMA.
Fri, Aug 3, 1:47 AM
SjoerdMeijer added a comment to D50179: [AArch64][ARM] Context sensitive meaning of option "crypto".

Hi Eli, thanks for the feedback.

Fri, Aug 3, 1:36 AM

Thu, Aug 2

SjoerdMeijer added a reviewer for D50186: [ARM] FP16: support vector zip and unzip: miyuki.
Thu, Aug 2, 8:45 AM
SjoerdMeijer added a reviewer for D50191: [ARM] FP16: support VFMA: miyuki.
Thu, Aug 2, 8:44 AM
SjoerdMeijer created D50191: [ARM] FP16: support VFMA.
Thu, Aug 2, 8:44 AM
SjoerdMeijer created D50186: [ARM] FP16: support vector zip and unzip.
Thu, Aug 2, 7:47 AM
SjoerdMeijer committed rL338717: [ARM][NFC] Follow up of r338568.
[ARM][NFC] Follow up of r338568
Thu, Aug 2, 7:05 AM
SjoerdMeijer created D50179: [AArch64][ARM] Context sensitive meaning of option "crypto".
Thu, Aug 2, 4:39 AM
SjoerdMeijer created D50175: [AArch64][NFC] better matching of AArch64 target in aarch64-cpus.c tests.
Thu, Aug 2, 3:40 AM
SjoerdMeijer added a comment to D50115: [AArch64] Fix FCCMP with FP16 operands.

Thanks!

Thu, Aug 2, 3:02 AM
SjoerdMeijer added a comment to D50115: [AArch64] Fix FCCMP with FP16 operands.

This should be straightforward merge/cherry-pick, and nice to have on the release branch. So I would say yes.

Thu, Aug 2, 1:57 AM

Wed, Aug 1

SjoerdMeijer committed rL338568: [ARM] Armv8.2-A FP16 vector intrinsics tests.
[ARM] Armv8.2-A FP16 vector intrinsics tests
Wed, Aug 1, 7:44 AM
SjoerdMeijer closed D50142: [ARM] Armv8.2-A FP16 vector intrinsics tests.
Wed, Aug 1, 7:44 AM
SjoerdMeijer added inline comments to D50142: [ARM] Armv8.2-A FP16 vector intrinsics tests.
Wed, Aug 1, 7:13 AM
SjoerdMeijer created D50142: [ARM] Armv8.2-A FP16 vector intrinsics tests.
Wed, Aug 1, 6:57 AM
SjoerdMeijer committed rL338525: [AArch64][ARM] Add Armv8.4-A tests.
[AArch64][ARM] Add Armv8.4-A tests
Wed, Aug 1, 5:41 AM
SjoerdMeijer committed rC338525: [AArch64][ARM] Add Armv8.4-A tests.
[AArch64][ARM] Add Armv8.4-A tests
Wed, Aug 1, 5:41 AM
SjoerdMeijer closed D50068: [AArch64][ARM] Add Armv8.4-A tests.
Wed, Aug 1, 5:41 AM
SjoerdMeijer added inline comments to D50068: [AArch64][ARM] Add Armv8.4-A tests.
Wed, Aug 1, 1:34 AM
SjoerdMeijer accepted D50115: [AArch64] Fix FCCMP with FP16 operands.

LGTM. Thanks for fixing this.

Wed, Aug 1, 12:28 AM

Tue, Jul 31

SjoerdMeijer created D50068: [AArch64][ARM] Add Armv8.4-A tests.
Tue, Jul 31, 7:40 AM

Mon, Jul 30

SjoerdMeijer accepted D49593: [AArch64][SVE] Asm: Enable instructions to be prefixed..

Looks reasonable to me.

Mon, Jul 30, 6:43 AM
SjoerdMeijer accepted D49592: [AArch64][SVE] Asm: Add MOVPRFX instructions..

LGTM, thanks!

Mon, Jul 30, 6:39 AM

Fri, Jul 27

SjoerdMeijer added a comment to D49592: [AArch64][SVE] Asm: Add MOVPRFX instructions..

Okay, maybe "heavyweight" was not the right word to describe it, but I meant setting up all the machinery here: creating the lookup tables, doing the lookup. Whether an instruction can be combined, is a property of an instruction, so it looks a natural fit to encode this little bit of extra semantic information in the TSFlags of an instructions. It looks like TSFlags was invented to give instructions these kind of (niche) target properties, and it looks like this is what other backends are doing too. Yes, they are used for all instructions, but it's just 1 bit in a 64bit integer, and we are not using a lot of them yet, so don't risk exceeding the maximum of 64.

Fri, Jul 27, 8:02 AM