♟ simon_tatham

In D76910#1945744, @samparker wrote:

Are we talking about CONSTRAINED_UNPREDICTABLE here?

Do you understand why all those test outputs have changed as a side effect of this?

Do export symbols when LLVM_EXPORT_SYMBOLS_FOR_PLUGINS is on.

[ARM,MVE] Add missing tests for vqdmlash intrinsics.

[ReleaseNotes,ARM] MVE intrinsics are all implemented!

Added an entry to the Clang release notes as well.

LGTM, with only one tiny remaining nitpick.

[ARM,MVE] Add ACLE intrinsics for the vminv/vmaxv family.

[ARM,MVE] Add ACLE intrinsics for the vaddv/vaddlv family.

Update tests to fix CI failure (oops). Also added opt -sroa to make the incidental half/float argument marshalling a bit less verbose.

[ARM,MVE] Add intrinsics for the VQDMLAD family.

[ARM,MVE] Add intrinsics and isel for MVE integer VMLA.

[ARM,MVE] Add intrinsics for the VQDMLAH family.

Fix clang-format warnings.

[ARM,MVE] Add intrinsics and isel for MVE fused multiply-add.

[ARM,MVE] Fix user-namespace violation in arm_mve.h.

Update test results following a last-minute correctness fix. (I updated one of the two test files but not the other.)

... but I hadn't quite uploaded it yet. Now I have: D75998.

LGTM with a couple of tiny spelling nitpicks.

Renames the 'clang_arm_mve_alias' attribute into 'clang_arm_builtin_alias' (it will be used with CDE intrinsics as well as MVE intrinsics)

[ARM,MVE] Add the `vsbciq` intrinsics.

[ARM,MVE] Add the `vshlcq` intrinsics.

clang-formatted the new C test file.

clang-formatted the code added to the C test source.

[ARM,MVE] Add ACLE intrinsics for VCVT[ANPM] family.

[ARM,MVE] Add ACLE intrinsics for VCVT.F32.F16 family.

[ARM,MVE] Correct MC operands in VCVT.F32.F16. (NFC)

[ARM,MVE] Add ACLE intrinsics for VQMOV[U]N family.

[clang,ARM,MVE] Remove redundant #includes in test file.

[ARM,MVE] Add predicated intrinsics for many unary functions.

... and we weren't testing the accidental 64-bit builtins (or else we'd have spotted the problem!), so no tests need to be changed. LGTM.

In D74803#1882722, @arsenm wrote:

I get incorrect type inference failures in D74832 without this patch since it ends up trying to merge the type of a non-default operand in with a default

I might as well admit my ignorance up front: despite having been the last person to touch this code, I don't really understand what the distinction is between a CodeGenInstruction and a DAGInstruction here, apart from the fact that one of them has an operand list that includes the outputs as well as the inputs.

[ARM,MVE] Add the vmovnbq,vmovntq intrinsic family.

[ARM,MVE] Add the vmovlbq,vmovltq intrinsic family.

[ARM] Allow `ARMVectorRegCast` to match bitconverts too. (NFC)

[ARM,MVE] Add the vrev16q, vrev32q, vrev64q family.

[ARM,MVE] Add intrinsics vclzq and vclsq.

[ARM,MVE] Add intrinsics for FP rounding operations.

[ARM,MVE] Add intrinsics for int <-> float conversion.

[ARM,MVE] Add intrinsics for abs, neg and not operations.

Test on the clang side in both endiannesses.

simon_tatham (Simon Tatham)
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simon_tatham (Simon Tatham)Compiler Engineer (Arm)