CMake: Make most target symbols hidden by default

[tstellar]

Summary

For builds with LLVM_BUILD_LLVM_DYLIB=ON and BUILD_SHARED_LIBS=OFF
this change makes all symbols in the target specific libraries hidden
by default.

A new macro called LLVM_EXTERNAL_VISIBILITY has been added to mark symbols in these
libraries public, which is mainly needed for the definitions of the
LLVMInitialize* functions.

This patch reduces the number of public symbols in libLLVM.so by about
25%. This should improve load times for the dynamic library and also
make abi checker tools, like abidiff require less memory when analyzing
libLLVM.so

One side-effect of this change is that for builds with
LLVM_BUILD_LLVM_DYLIB=ON and LLVM_LINK_LLVM_DYLIB=ON some unittests that
access symbols that are no longer public will need to be statically linked.

Before and after public symbol counts (using gcc 8.2.1, ld.bfd 2.31.1):
nm before/libLLVM-9svn.so | grep ' [A-Zuvw] ' | wc -l
36221
nm after/libLLVM-9svn.so | grep ' [A-Zuvw] ' | wc -l
26278

[michaelplatings]

"LLVM_EXPORT" seems like an overly generic name. Maybe a variation on "LLVM_LIBRARY_VISIBILITY" would be more fitting?

Another contender for the "LLVM_EXPORT" name that I'd like to see some day is a macro that exports symbols from Windows DLLs using __declspec( dllexport ) and then we can get rid of this: D18826

A comment should be added in Compiler.h to document the macro.

[tstellar]

Rename macro from LLVM_EXPORT to LLVM_EXTERNAL_VISIBILITY and add documentation
for macro.

[rnk]

I kind of liked LLVM_EXPORT, since it seemed like it would logically grow to expand to dllexport, but this spelling works too. Let's do it, and start taking incremental steps towards actually annotating LLVM's dynamic interface. :)

[tstellar]

Ping.

[rnk]

Looks good to me, if Hans also stamps it, I think that's enough approval power for this change.

[hans]

Looks good to me.

Are there any buildbots that will catch if someone forgets to put an LLVM_EXTERNAL_VISIBILITY somewhere that's needed?

[tstellar]

In D54439#1456019, @hans wrote:

Looks good to me.

Are there any buildbots that will catch if someone forgets to put an LLVM_EXTERNAL_VISIBILITY somewhere that's needed?

I don't think so. At least on linux this would require building with -DLLVM_BUILD_LLVM_DYLIB=ON and -DLLVM_LINK_LLVM_DYLIB=ON and I don't see any bots doing this.

[hans]

In D54439#1457009, @tstellar wrote:

In D54439#1456019, @hans wrote:

Looks good to me.

Are there any buildbots that will catch if someone forgets to put an LLVM_EXTERNAL_VISIBILITY somewhere that's needed?

I don't think so. At least on linux this would require building with -DLLVM_BUILD_LLVM_DYLIB=ON and -DLLVM_LINK_LLVM_DYLIB=ON and I don't see any bots doing this.

I'm fine with the change itself, but that means it's pretty likely this is going to break sooner or later.

[tstellar]

I'm going to commit this today. I have an internal bot set up now, so I can catch when this breaks. I still plan to set up an external bot, I'm just still trying to find the hardware to do this.

[tstellar]

Add LLVM_EXTERNAL_VISIBILITY to initialize*Pass to try to silence ld
warning on OS X.

[rnk]

llvm/include/llvm/PassSupport.h

42 ↗

(On Diff #205247)

Do we need the same thing here? We instantiate the same template, which I would expect to raise the same warning, if this macro is used from two files that use hidden and default visibility.

62–63 ↗

(On Diff #205247)

Is this a speculative fix, or were you able to reproduce the problem and confirm this fixes it?

[tstellar]

Add LLVM_EXTERNAL_VISIBILITY to both INITIALIZE_PASS* macros.

[tstellar]

llvm/include/llvm/PassSupport.h

62–63 ↗

(On Diff #205247)

This is speculative. I don't have an OS X system to test on. I have tried to reproduce on linux with clang-7, but I don't see any object file differences in files mentioned in the warnings, like X86Targetmachine.cpp.o.

It seems like this warning is triggered when you have a cpp file that uses one of the INITIALIZE_PASS macros and also calls the initialize*Pass function in the same file. My best guess is this is related to inlining decisions in some way, but I still don't know the root cause.

[rnk]

llvm/include/llvm/PassSupport.h

62–63 ↗

(On Diff #205247)

@echristo, do you want to apply this locally and try to reproduce, since you reported the issue last time around?

@tstellar My worry is that maybe this warning is triggered more broadly by any templates instantiated and called by hidden and default visibility functions. I'd like to nail down when it happens, or disable it entirely, since I'm positive we don't care about being able to override C++ template functions.

llvm/lib/Target/CMakeLists.txt

21 ↗

(On Diff #205407)

If the warning does re-occur, I'd suggest working around it by disabling this logic here on Mac. Then we can fix it with smaller patches that aren't too large for phab to display by default.

[tstellar]

llvm/include/llvm/PassSupport.h

62–63 ↗

(On Diff #205247)

Ok for reference, similar errors were reported in this bug: https://llvm.org/PR31782.

[tstellar]

Rebased and removed the workaround of adding LLVM_EXTERNAL_VISIBLITY
to the void llvm::initializepassNamePass definitions, since this
did not resolve the linker errors on OS X.

[tstellar]

In D54439#1580834, @tstellar wrote:

Rebased and removed the workaround of adding LLVM_EXTERNAL_VISIBLITY
to the void llvm::initializepassNamePass definitions, since this
did not resolve the linker errors on OS X.

s/errors/warnings/

[tstellar]

Rebase on trunk.

The warnings are still present on OS X. Here is a build log:
https://github.com/tstellar/llvm-project/pull/11/checks?check_run_id=275366813

[ldionne]

In D54439#1722049, @tstellar wrote:

Rebase on trunk.

The warnings are still present on OS X. Here is a build log:
https://github.com/tstellar/llvm-project/pull/11/checks?check_run_id=275366813

@tstellar Can you add _LIBCPP_INLINE_VISIBILITY to __call_once_proxy and see whether that fixes the warning? I believe that is the correct fix, now that we don't use always_inline anymore to implement _LIBCPP_INLINE_VISIBILITY.

I've added _LIBCPP_INLINE_VISIBILITY to __call_once_proxy locally and everything works, but I don't have your specific patch to test locally.

[ldionne]

In D54439#1740734, @ldionne wrote:

In D54439#1722049, @tstellar wrote:

Rebase on trunk.

The warnings are still present on OS X. Here is a build log:
https://github.com/tstellar/llvm-project/pull/11/checks?check_run_id=275366813

@tstellar Can you add _LIBCPP_INLINE_VISIBILITY to __call_once_proxy and see whether that fixes the warning? I believe that is the correct fix, now that we don't use always_inline anymore to implement _LIBCPP_INLINE_VISIBILITY.

I've added _LIBCPP_INLINE_VISIBILITY to __call_once_proxy locally and everything works, but I don't have your specific patch to test locally.

Note that I've applied that change in 48b7068beca9 regardless because I think it's good, but I'm still curious to know whether it'll fix your problems.

[tstellar]

Rebase patch.

[tstellar]

In D54439#1740802, @ldionne wrote:

In D54439#1740734, @ldionne wrote:

In D54439#1722049, @tstellar wrote:

Rebase on trunk.

The warnings are still present on OS X. Here is a build log:
https://github.com/tstellar/llvm-project/pull/11/checks?check_run_id=275366813

@tstellar Can you add _LIBCPP_INLINE_VISIBILITY to __call_once_proxy and see whether that fixes the warning? I believe that is the correct fix, now that we don't use always_inline anymore to implement _LIBCPP_INLINE_VISIBILITY.

I've added _LIBCPP_INLINE_VISIBILITY to __call_once_proxy locally and everything works, but I don't have your specific patch to test locally.

Note that I've applied that change in 48b7068beca9 regardless because I think it's good, but I'm still curious to know whether it'll fix your problems.

I've confirmed that this change does fix the warning. How do we we want to proceed with this patch? The warnings will still be present on existing Mac OS installs. Should we disable this change on Mac OS for now or should we keep it and live with the warnings?

[rnk]

In D54439#1744319, @tstellar wrote:

I've confirmed that this change does fix the warning. How do we we want to proceed with this patch? The warnings will still be present on existing Mac OS installs. Should we disable this change on Mac OS for now or should we keep it and live with the warnings?

I'd be in favor of letting Mac use default visibility for now. One way to make this more palatable would be to have a CMake option that allows users to override the default and get hidden visibility if they really want it.

[tstellar]

In D54439#1744353, @rnk wrote:

In D54439#1744319, @tstellar wrote:

I've confirmed that this change does fix the warning. How do we we want to proceed with this patch? The warnings will still be present on existing Mac OS installs. Should we disable this change on Mac OS for now or should we keep it and live with the warnings?

I'd be in favor of letting Mac use default visibility for now. One way to make this more palatable would be to have a CMake option that allows users to override the default and get hidden visibility if they really want it.

I'm also in favor of keeping default visibility on Mac. We're trying to cut down on the number of CMake options, so I would prefer not to add an option for this.

[tstellar]

Ping.

[tstellar]

Rebase and switch to using default visibility on Mac OS.

[merge_guards_bot]

Unit tests: pass. 60871 tests passed, 0 failed and 726 were skipped.

clang-format: fail. Please format your changes with clang-format by running git-clang-format HEAD^ or apply this patch.

Build artifacts: console-log.txt, CMakeCache.txt, clang-format.patch, test-results.xml, diff.json

[tstellar]

Rebase.

[merge_guards_bot]

Unit tests: pass. 61303 tests passed, 0 failed and 736 were skipped.

clang-tidy: fail. Please fix clang-tidy findings.

clang-format: fail. Please format your changes with clang-format by running git-clang-format HEAD^ or applying this patch.

Build artifacts: diff.json, clang-tidy.txt, clang-format.patch, CMakeCache.txt, console-log.txt, test-results.xml

[rnk]

lgtm

Let's get the annotations in so we can start to benefit from them.

include/llvm/Support/Compiler.h

 /// LLVM_LIBRARY_VISIBILITY - If a class marked with this attribute is linked
 /// into a shared library, then the class should be private to the library and
 /// not accessible from outside it.  Can also be used to mark variables and
 /// functions, making them private to any shared library they are linked into.
 /// On PE/COFF targets, library visibility is the default, so this isn't needed.
 #if (__has_attribute(visibility) || LLVM_GNUC_PREREQ(4, 0, 0)) &&              \
     !defined(__MINGW32__) && !defined(__CYGWIN__) && !defined(_WIN32)
 #define LLVM_LIBRARY_VISIBILITY __attribute__ ((visibility("hidden")))
+#define LLVM_EXPORT __attribute__ ((visibility("default")))
 #else
 #define LLVM_LIBRARY_VISIBILITY
+#define LLVM_EXPORT
 #endif
 
 #if defined(__GNUC__)
 #define LLVM_PREFETCH(addr, rw, locality) __builtin_prefetch(addr, rw, locality)
 #else
 #define LLVM_PREFETCH(addr, rw, locality)
 #endif
 

lib/Target/AArch64/AArch64AsmPrinter.cpp

void AArch64AsmPrinter::EmitInstruction(const MachineInstr *MI) {
 
   // Finally, do the automated lowerings for everything else.
   MCInst TmpInst;
   MCInstLowering.Lower(MI, TmpInst);
   EmitToStreamer(*OutStreamer, TmpInst);
 }
 
 // Force static initialization.
-extern "C" void LLVMInitializeAArch64AsmPrinter() {
+extern "C" LLVM_EXPORT void LLVMInitializeAArch64AsmPrinter() {
   RegisterAsmPrinter<AArch64AsmPrinter> X(getTheAArch64leTarget());
   RegisterAsmPrinter<AArch64AsmPrinter> Y(getTheAArch64beTarget());
   RegisterAsmPrinter<AArch64AsmPrinter> Z(getTheARM64Target());
 }

lib/Target/AArch64/AArch64TargetMachine.cpp

 static cl::opt<bool> EnableFalkorHWPFFix("aarch64-enable-falkor-hwpf-fix",
                                          cl::init(true), cl::Hidden);
 
 static cl::opt<bool>
     EnableBranchTargets("aarch64-enable-branch-targets", cl::Hidden,
                         cl::desc("Enable the AAcrh64 branch target pass"),
                         cl::init(true));
 
-extern "C" void LLVMInitializeAArch64Target() {
+extern "C" LLVM_EXPORT void LLVMInitializeAArch64Target() {
   // Register the target.
   RegisterTargetMachine<AArch64leTargetMachine> X(getTheAArch64leTarget());
   RegisterTargetMachine<AArch64beTargetMachine> Y(getTheAArch64beTarget());
   RegisterTargetMachine<AArch64leTargetMachine> Z(getTheARM64Target());
   auto PR = PassRegistry::getPassRegistry();
   initializeGlobalISel(*PR);
   initializeAArch64A53Fix835769Pass(*PR);
   initializeAArch64A57FPLoadBalancingPass(*PR);

lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

AArch64AsmParser::classifySymbolRef(const MCExpr *Expr,
 
   // It's some symbol reference + a constant addend, but really
   // shouldn't use both Darwin and ELF syntax.
   return ELFRefKind == AArch64MCExpr::VK_INVALID ||
          DarwinRefKind == MCSymbolRefExpr::VK_None;
 }
 
 /// Force static initialization.
-extern "C" void LLVMInitializeAArch64AsmParser() {
+extern "C" LLVM_EXPORT void LLVMInitializeAArch64AsmParser() {
   RegisterMCAsmParser<AArch64AsmParser> X(getTheAArch64leTarget());
   RegisterMCAsmParser<AArch64AsmParser> Y(getTheAArch64beTarget());
   RegisterMCAsmParser<AArch64AsmParser> Z(getTheARM64Target());
 }
 
 #define GET_REGISTER_MATCHER
 #define GET_SUBTARGET_FEATURE_NAME
 #define GET_MATCHER_IMPLEMENTATION

lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp

 createAArch64ExternalSymbolizer(const Triple &TT, LLVMOpInfoCallback GetOpInfo,
                                 LLVMSymbolLookupCallback SymbolLookUp,
                                 void *DisInfo, MCContext *Ctx,
                                 std::unique_ptr<MCRelocationInfo> &&RelInfo) {
   return new AArch64ExternalSymbolizer(*Ctx, std::move(RelInfo), GetOpInfo,
                                        SymbolLookUp, DisInfo);
 }
 
-extern "C" void LLVMInitializeAArch64Disassembler() {
+extern "C" LLVM_EXPORT void LLVMInitializeAArch64Disassembler() {
   TargetRegistry::RegisterMCDisassembler(getTheAArch64leTarget(),
                                          createAArch64Disassembler);
   TargetRegistry::RegisterMCDisassembler(getTheAArch64beTarget(),
                                          createAArch64Disassembler);
   TargetRegistry::RegisterMCSymbolizer(getTheAArch64leTarget(),
                                        createAArch64ExternalSymbolizer);
   TargetRegistry::RegisterMCSymbolizer(getTheAArch64beTarget(),
                                        createAArch64ExternalSymbolizer);

lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp

 
 } // end anonymous namespace
 
 static MCInstrAnalysis *createAArch64InstrAnalysis(const MCInstrInfo *Info) {
   return new AArch64MCInstrAnalysis(Info);
 }
 
 // Force static initialization.
-extern "C" void LLVMInitializeAArch64TargetMC() {
+extern "C" LLVM_EXPORT void LLVMInitializeAArch64TargetMC() {
   for (Target *T : {&getTheAArch64leTarget(), &getTheAArch64beTarget(),
                     &getTheARM64Target()}) {
     // Register the MC asm info.
     RegisterMCAsmInfoFn X(*T, createAArch64MCAsmInfo);
 
     // Register the MC instruction info.
     TargetRegistry::RegisterMCInstrInfo(*T, createAArch64MCInstrInfo);
 

lib/Target/AArch64/TargetInfo/AArch64TargetInfo.cpp

Target &getTheAArch64beTarget() {
   return TheAArch64beTarget;
 }
 Target &getTheARM64Target() {
   static Target TheARM64Target;
   return TheARM64Target;
 }
 } // namespace llvm
 
-extern "C" void LLVMInitializeAArch64TargetInfo() {
+extern "C" LLVM_EXPORT void LLVMInitializeAArch64TargetInfo() {
   // Now register the "arm64" name for use with "-march". We don't want it to
   // take possession of the Triple::aarch64 tag though.
   TargetRegistry::RegisterTarget(getTheARM64Target(), "arm64",
                                  "ARM64 (little endian)", "AArch64",
                                  [](Triple::ArchType) { return false; }, true);
 
   RegisterTarget<Triple::aarch64, /*HasJIT=*/true> Z(
       getTheAArch64leTarget(), "aarch64", "AArch64 (little endian)", "AArch64");
   RegisterTarget<Triple::aarch64_be, /*HasJIT=*/true> W(
       getTheAArch64beTarget(), "aarch64_be", "AArch64 (big endian)", "AArch64");
 }

lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp

 }
 
 static AsmPrinter *
 createAMDGPUAsmPrinterPass(TargetMachine &tm,
                            std::unique_ptr<MCStreamer> &&Streamer) {
   return new AMDGPUAsmPrinter(tm, std::move(Streamer));
 }
 
-extern "C" void LLVMInitializeAMDGPUAsmPrinter() {
+extern "C" void LLVM_EXPORT LLVMInitializeAMDGPUAsmPrinter() {
   TargetRegistry::RegisterAsmPrinter(getTheAMDGPUTarget(),
                                      llvm::createR600AsmPrinterPass);
   TargetRegistry::RegisterAsmPrinter(getTheGCNTarget(),
                                      createAMDGPUAsmPrinterPass);
 }
 
 AMDGPUAsmPrinter::AMDGPUAsmPrinter(TargetMachine &TM,
                                    std::unique_ptr<MCStreamer> Streamer)

lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

 
 // Enable atomic optimization
 static cl::opt<bool> EnableAtomicOptimizations(
   "amdgpu-atomic-optimizations",
   cl::desc("Enable atomic optimizations"),
   cl::init(false),
   cl::Hidden);
 
-extern "C" void LLVMInitializeAMDGPUTarget() {
+extern "C" LLVM_EXPORT void LLVMInitializeAMDGPUTarget() {
   // Register the target
   RegisterTargetMachine<R600TargetMachine> X(getTheAMDGPUTarget());
   RegisterTargetMachine<GCNTargetMachine> Y(getTheGCNTarget());
 
   PassRegistry *PR = PassRegistry::getPassRegistry();
   initializeR600ClauseMergePassPass(*PR);
   initializeR600ControlFlowFinalizerPass(*PR);
   initializeR600PacketizerPass(*PR);

lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

if (Inst.getOpcode() == AMDGPU::V_MAC_F32_sdwa_vi ||
     auto it = Inst.begin();
     std::advance(
       it, AMDGPU::getNamedOperandIdx(Inst.getOpcode(), AMDGPU::OpName::src2));
     Inst.insert(it, Inst.getOperand(0)); // src2 = dst
   }
 }
 
 /// Force static initialization.
-extern "C" void LLVMInitializeAMDGPUAsmParser() {
+extern "C" LLVM_EXPORT void LLVMInitializeAMDGPUAsmParser() {
   RegisterMCAsmParser<AMDGPUAsmParser> A(getTheAMDGPUTarget());
   RegisterMCAsmParser<AMDGPUAsmParser> B(getTheGCNTarget());
 }
 
 #define GET_REGISTER_MATCHER
 #define GET_MATCHER_IMPLEMENTATION
 #define GET_MNEMONIC_SPELL_CHECKER
 #include "AMDGPUGenAsmMatcher.inc"

lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp

 }
 
 static MCDisassembler *createAMDGPUDisassembler(const Target &T,
                                                 const MCSubtargetInfo &STI,
                                                 MCContext &Ctx) {
   return new AMDGPUDisassembler(STI, Ctx, T.createMCInstrInfo());
 }
 
-extern "C" void LLVMInitializeAMDGPUDisassembler() {
+extern "C" LLVM_EXPORT void LLVMInitializeAMDGPUDisassembler() {
   TargetRegistry::RegisterMCDisassembler(getTheGCNTarget(),
                                          createAMDGPUDisassembler);
   TargetRegistry::RegisterMCSymbolizer(getTheGCNTarget(),
                                        createAMDGPUSymbolizer);
 }

lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp

static MCStreamer *createMCStreamer(const Triple &T, MCContext &Context,
                                     std::unique_ptr<MCAsmBackend> &&MAB,
                                     std::unique_ptr<MCObjectWriter> &&OW,
                                     std::unique_ptr<MCCodeEmitter> &&Emitter,
                                     bool RelaxAll) {
   return createAMDGPUELFStreamer(T, Context, std::move(MAB), std::move(OW),
                                  std::move(Emitter), RelaxAll);
 }
 
-extern "C" void LLVMInitializeAMDGPUTargetMC() {
+extern "C" LLVM_EXPORT void LLVMInitializeAMDGPUTargetMC() {
 
   TargetRegistry::RegisterMCInstrInfo(getTheGCNTarget(), createAMDGPUMCInstrInfo);
   TargetRegistry::RegisterMCInstrInfo(getTheAMDGPUTarget(), createR600MCInstrInfo);
   for (Target *T : {&getTheAMDGPUTarget(), &getTheGCNTarget()}) {
     RegisterMCAsmInfo<AMDGPUMCAsmInfo> X(*T);
 
     TargetRegistry::RegisterMCRegInfo(*T, createAMDGPUMCRegisterInfo);
     TargetRegistry::RegisterMCSubtargetInfo(*T, createAMDGPUMCSubtargetInfo);

lib/Target/AMDGPU/TargetInfo/AMDGPUTargetInfo.cpp

 }
 /// The target for GCN GPUs
 Target &llvm::getTheGCNTarget() {
   static Target TheGCNTarget;
   return TheGCNTarget;
 }
 
 /// Extern function to initialize the targets for the AMDGPU backend
-extern "C" void LLVMInitializeAMDGPUTargetInfo() {
+extern "C" LLVM_EXPORT void LLVMInitializeAMDGPUTargetInfo() {
   RegisterTarget<Triple::r600, false> R600(getTheAMDGPUTarget(), "r600",
                                            "AMD GPUs HD2XXX-HD6XXX", "AMDGPU");
   RegisterTarget<Triple::amdgcn, false> GCN(getTheGCNTarget(), "amdgcn",
                                             "AMD GCN GPUs", "AMDGPU");
 }

lib/Target/ARC/ARCAsmPrinter.cpp

void ARCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
   }
 
   MCInst TmpInst;
   MCInstLowering.Lower(MI, TmpInst);
   EmitToStreamer(*OutStreamer, TmpInst);
 }
 
 // Force static initialization.
-extern "C" void LLVMInitializeARCAsmPrinter() {
+extern "C" LLVM_EXPORT void LLVMInitializeARCAsmPrinter() {
   RegisterAsmPrinter<ARCAsmPrinter> X(getTheARCTarget());
 }

lib/Target/ARC/ARCTargetMachine.cpp

bool ARCPassConfig::addInstSelector() {
   return false;
 }
 
 void ARCPassConfig::addPreEmitPass() { addPass(createARCBranchFinalizePass()); }
 
 void ARCPassConfig::addPreRegAlloc() { addPass(createARCExpandPseudosPass()); }
 
 // Force static initialization.
-extern "C" void LLVMInitializeARCTarget() {
+extern "C" LLVM_EXPORT void LLVMInitializeARCTarget() {
   RegisterTargetMachine<ARCTargetMachine> X(getTheARCTarget());
 }
 
 TargetTransformInfo
 ARCTargetMachine::getTargetTransformInfo(const Function &F) {
   return TargetTransformInfo(ARCTTIImpl(this, F));
 }

lib/Target/ARC/Disassembler/ARCDisassembler.cpp

 }
 
 static MCDisassembler *createARCDisassembler(const Target &T,
                                              const MCSubtargetInfo &STI,
                                              MCContext &Ctx) {
   return new ARCDisassembler(STI, Ctx, T.createMCInstrInfo());
 }
 
-extern "C" void LLVMInitializeARCDisassembler() {
+extern "C" LLVM_EXPORT void LLVMInitializeARCDisassembler() {
   // Register the disassembler.
   TargetRegistry::RegisterMCDisassembler(getTheARCTarget(),
                                          createARCDisassembler);
 }

lib/Target/ARC/MCTargetDesc/ARCMCTargetDesc.cpp

 static MCTargetStreamer *createTargetAsmStreamer(MCStreamer &S,
                                                  formatted_raw_ostream &OS,
                                                  MCInstPrinter *InstPrint,
                                                  bool isVerboseAsm) {
   return new ARCTargetStreamer(S);
 }
 
 // Force static initialization.
-extern "C" void LLVMInitializeARCTargetMC() {
+extern "C" LLVM_EXPORT void LLVMInitializeARCTargetMC() {
   // Register the MC asm info.
   Target &TheARCTarget = getTheARCTarget();
   RegisterMCAsmInfoFn X(TheARCTarget, createARCMCAsmInfo);
 
   // Register the MC instruction info.
   TargetRegistry::RegisterMCInstrInfo(TheARCTarget, createARCMCInstrInfo);
 
   // Register the MC register info.

lib/Target/ARC/TargetInfo/ARCTargetInfo.cpp

 
 using namespace llvm;
 
 Target &llvm::getTheARCTarget() {
   static Target TheARCTarget;
   return TheARCTarget;
 }
 
-extern "C" void LLVMInitializeARCTargetInfo() {
+extern "C" LLVM_EXPORT void LLVMInitializeARCTargetInfo() {
   RegisterTarget<Triple::arc> X(getTheARCTarget(), "arc", "ARC", "ARC");
 }

lib/Target/ARM/ARMAsmPrinter.cpp

void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
   EmitToStreamer(*OutStreamer, TmpInst);
 }
 
 //===----------------------------------------------------------------------===//
 // Target Registry Stuff
 //===----------------------------------------------------------------------===//
 
 // Force static initialization.
-extern "C" void LLVMInitializeARMAsmPrinter() {
+extern "C" LLVM_EXPORT void LLVMInitializeARMAsmPrinter() {
   RegisterAsmPrinter<ARMAsmPrinter> X(getTheARMLETarget());
   RegisterAsmPrinter<ARMAsmPrinter> Y(getTheARMBETarget());
   RegisterAsmPrinter<ARMAsmPrinter> A(getTheThumbLETarget());
   RegisterAsmPrinter<ARMAsmPrinter> B(getTheThumbBETarget());
 }

lib/Target/ARM/ARMTargetMachine.cpp

 static cl::opt<cl::boolOrDefault>
 EnableGlobalMerge("arm-global-merge", cl::Hidden,
                   cl::desc("Enable the global merge pass"));
 
 namespace llvm {
   void initializeARMExecutionDomainFixPass(PassRegistry&);
 }
 
-extern "C" void LLVMInitializeARMTarget() {
+extern "C" LLVM_EXPORT void LLVMInitializeARMTarget() {
   // Register the target.
   RegisterTargetMachine<ARMLETargetMachine> X(getTheARMLETarget());
   RegisterTargetMachine<ARMLETargetMachine> A(getTheThumbLETarget());
   RegisterTargetMachine<ARMBETargetMachine> Y(getTheARMBETarget());
   RegisterTargetMachine<ARMBETargetMachine> B(getTheThumbBETarget());
 
   PassRegistry &Registry = *PassRegistry::getPassRegistry();
   initializeGlobalISel(Registry);

lib/Target/ARM/AsmParser/ARMAsmParser.cpp

if (MCParserUtils::parseAssignmentExpression(Name, /* allow_redef */ true,
                                                Parser, Sym, Value))
     return true;
 
   getTargetStreamer().emitThumbSet(Sym, Value);
   return false;
 }
 
 /// Force static initialization.
-extern "C" void LLVMInitializeARMAsmParser() {
+extern "C" LLVM_EXPORT void LLVMInitializeARMAsmParser() {
   RegisterMCAsmParser<ARMAsmParser> X(getTheARMLETarget());
   RegisterMCAsmParser<ARMAsmParser> Y(getTheARMBETarget());
   RegisterMCAsmParser<ARMAsmParser> A(getTheThumbLETarget());
   RegisterMCAsmParser<ARMAsmParser> B(getTheThumbBETarget());
 }
 
 #define GET_REGISTER_MATCHER
 #define GET_SUBTARGET_FEATURE_NAME

lib/Target/ARM/Disassembler/ARMDisassembler.cpp

if (Result != MCDisassembler::Fail) {
     Check(Result, AddThumbPredicate(MI));
     return Result;
   }
 
   Size = 0;
   return MCDisassembler::Fail;
 }
 
-extern "C" void LLVMInitializeARMDisassembler() {
+extern "C" LLVM_EXPORT void LLVMInitializeARMDisassembler() {
   TargetRegistry::RegisterMCDisassembler(getTheARMLETarget(),
                                          createARMDisassembler);
   TargetRegistry::RegisterMCDisassembler(getTheARMBETarget(),
                                          createARMDisassembler);
   TargetRegistry::RegisterMCDisassembler(getTheThumbLETarget(),
                                          createThumbDisassembler);
   TargetRegistry::RegisterMCDisassembler(getTheThumbBETarget(),
                                          createThumbDisassembler);

lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp

static MCInstrAnalysis *createARMMCInstrAnalysis(const MCInstrInfo *Info) {
   return new ARMMCInstrAnalysis(Info);
 }
 
 static MCInstrAnalysis *createThumbMCInstrAnalysis(const MCInstrInfo *Info) {
   return new ThumbMCInstrAnalysis(Info);
 }
 
 // Force static initialization.
-extern "C" void LLVMInitializeARMTargetMC() {
+extern "C" LLVM_EXPORT void LLVMInitializeARMTargetMC() {
   for (Target *T : {&getTheARMLETarget(), &getTheARMBETarget(),
                     &getTheThumbLETarget(), &getTheThumbBETarget()}) {
     // Register the MC asm info.
     RegisterMCAsmInfoFn X(*T, createARMMCAsmInfo);
 
     // Register the MC instruction info.
     TargetRegistry::RegisterMCInstrInfo(*T, createARMMCInstrInfo);
 

lib/Target/ARM/TargetInfo/ARMTargetInfo.cpp

Target &llvm::getTheThumbLETarget() {
   static Target TheThumbLETarget;
   return TheThumbLETarget;
 }
 Target &llvm::getTheThumbBETarget() {
   static Target TheThumbBETarget;
   return TheThumbBETarget;
 }
 
-extern "C" void LLVMInitializeARMTargetInfo() {
+extern "C" LLVM_EXPORT void LLVMInitializeARMTargetInfo() {
   RegisterTarget<Triple::arm, /*HasJIT=*/true> X(getTheARMLETarget(), "arm",
                                                  "ARM", "ARM");
   RegisterTarget<Triple::armeb, /*HasJIT=*/true> Y(getTheARMBETarget(), "armeb",
                                                    "ARM (big endian)", "ARM");
 
   RegisterTarget<Triple::thumb, /*HasJIT=*/true> A(getTheThumbLETarget(),
                                                    "thumb", "Thumb", "ARM");
   RegisterTarget<Triple::thumbeb, /*HasJIT=*/true> B(
       getTheThumbBETarget(), "thumbeb", "Thumb (big endian)", "ARM");
 }

lib/Target/AVR/AVRAsmPrinter.cpp

void AVRAsmPrinter::EmitInstruction(const MachineInstr *MI) {
 
   MCInst I;
   MCInstLowering.lowerInstruction(*MI, I);
   EmitToStreamer(*OutStreamer, I);
 }
 
 } // end of namespace llvm
 
-extern "C" void LLVMInitializeAVRAsmPrinter() {
+extern "C" LLVM_EXPORT void LLVMInitializeAVRAsmPrinter() {
   llvm::RegisterAsmPrinter<llvm::AVRAsmPrinter> X(llvm::getTheAVRTarget());
 }
 

lib/Target/AVR/AVRTargetMachine.cpp

public:
   void addPreRegAlloc() override;
 };
 } // namespace
 
 TargetPassConfig *AVRTargetMachine::createPassConfig(PassManagerBase &PM) {
   return new AVRPassConfig(*this, PM);
 }
 
-extern "C" void LLVMInitializeAVRTarget() {
+extern "C" LLVM_EXPORT void LLVMInitializeAVRTarget() {
   // Register the target.
   RegisterTargetMachine<AVRTargetMachine> X(getTheAVRTarget());
 
   auto &PR = *PassRegistry::getPassRegistry();
   initializeAVRExpandPseudoPass(PR);
   initializeAVRRelaxMemPass(PR);
 }
 

lib/Target/AVR/AsmParser/AVRAsmParser.cpp

auto parseOne = [&]() -> bool {
     if (Parser.parseExpression(Value))
       return true;
     Parser.getStreamer().EmitValue(Value, SizeInBytes, L);
     return false;
   };
   return (parseMany(parseOne));
 }
 
-extern "C" void LLVMInitializeAVRAsmParser() {
+extern "C" LLVM_EXPORT void LLVMInitializeAVRAsmParser() {
   RegisterMCAsmParser<AVRAsmParser> X(getTheAVRTarget());
 }
 
 #define GET_REGISTER_MATCHER
 #define GET_MATCHER_IMPLEMENTATION
 #include "AVRGenAsmMatcher.inc"
 
 // Uses enums defined in AVRGenAsmMatcher.inc

lib/Target/AVR/Disassembler/AVRDisassembler.cpp

 
 static MCDisassembler *createAVRDisassembler(const Target &T,
                                              const MCSubtargetInfo &STI,
                                              MCContext &Ctx) {
   return new AVRDisassembler(STI, Ctx);
 }
 
 
-extern "C" void LLVMInitializeAVRDisassembler() {
+extern "C" LLVM_EXPORT void LLVMInitializeAVRDisassembler() {
   // Register the disassembler.
   TargetRegistry::RegisterMCDisassembler(getTheAVRTarget(),
                                          createAVRDisassembler);
 }
 
 static DecodeStatus DecodeGPR8RegisterClass(MCInst &Inst, unsigned RegNo,
                                             uint64_t Address, const void *Decoder) {
   return MCDisassembler::Success;

lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.cpp

 
 static MCTargetStreamer *createMCAsmTargetStreamer(MCStreamer &S,
                                                    formatted_raw_ostream &OS,
                                                    MCInstPrinter *InstPrint,
                                                    bool isVerboseAsm) {
   return new AVRTargetAsmStreamer(S);
 }
 
-extern "C" void LLVMInitializeAVRTargetMC() {
+extern "C" LLVM_EXPORT void LLVMInitializeAVRTargetMC() {
   // Register the MC asm info.
   RegisterMCAsmInfo<AVRMCAsmInfo> X(getTheAVRTarget());
 
   // Register the MC instruction info.
   TargetRegistry::RegisterMCInstrInfo(getTheAVRTarget(), createAVRMCInstrInfo);
 
   // Register the MC register info.
   TargetRegistry::RegisterMCRegInfo(getTheAVRTarget(), createAVRMCRegisterInfo);

lib/Target/AVR/TargetInfo/AVRTargetInfo.cpp

 #include "llvm/Support/TargetRegistry.h"
 namespace llvm {
 Target &getTheAVRTarget() {
   static Target TheAVRTarget;
   return TheAVRTarget;
 }
 }
 
-extern "C" void LLVMInitializeAVRTargetInfo() {
+extern "C" LLVM_EXPORT void LLVMInitializeAVRTargetInfo() {
   llvm::RegisterTarget<llvm::Triple::avr> X(llvm::getTheAVRTarget(), "avr",
                                             "Atmel AVR Microcontroller", "AVR");
 }
 

lib/Target/BPF/AsmParser/BPFAsmParser.cpp

bool BPFAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
 
   // Consume the EndOfStatement.
   getParser().Lex();
   return false;
 }
 
 bool BPFAsmParser::ParseDirective(AsmToken DirectiveID) { return true; }
 
-extern "C" void LLVMInitializeBPFAsmParser() {
+extern "C" LLVM_EXPORT void LLVMInitializeBPFAsmParser() {
   RegisterMCAsmParser<BPFAsmParser> X(getTheBPFTarget());
   RegisterMCAsmParser<BPFAsmParser> Y(getTheBPFleTarget());
   RegisterMCAsmParser<BPFAsmParser> Z(getTheBPFbeTarget());
 }

lib/Target/BPF/BPFAsmPrinter.cpp

void BPFAsmPrinter::EmitInstruction(const MachineInstr *MI) {
   BPFMCInstLower MCInstLowering(OutContext, *this);
 
   MCInst TmpInst;
   MCInstLowering.Lower(MI, TmpInst);
   EmitToStreamer(*OutStreamer, TmpInst);
 }
 
 // Force static initialization.
-extern "C" void LLVMInitializeBPFAsmPrinter() {
+extern "C" LLVM_EXPORT void LLVMInitializeBPFAsmPrinter() {
   RegisterAsmPrinter<BPFAsmPrinter> X(getTheBPFleTarget());
   RegisterAsmPrinter<BPFAsmPrinter> Y(getTheBPFbeTarget());
   RegisterAsmPrinter<BPFAsmPrinter> Z(getTheBPFTarget());
 }

lib/Target/BPF/BPFTargetMachine.cpp

 #include "llvm/Support/TargetRegistry.h"
 #include "llvm/Target/TargetOptions.h"
 using namespace llvm;
 
 static cl::
 opt<bool> DisableMIPeephole("disable-bpf-peephole", cl::Hidden,
                             cl::desc("Disable machine peepholes for BPF"));
 
-extern "C" void LLVMInitializeBPFTarget() {
+extern "C" LLVM_EXPORT void LLVMInitializeBPFTarget() {
   // Register the target.
   RegisterTargetMachine<BPFTargetMachine> X(getTheBPFleTarget());
   RegisterTargetMachine<BPFTargetMachine> Y(getTheBPFbeTarget());
   RegisterTargetMachine<BPFTargetMachine> Z(getTheBPFTarget());
 
   PassRegistry &PR = *PassRegistry::getPassRegistry();
   initializeBPFMIPeepholePass(PR);
 }

lib/Target/BPF/Disassembler/BPFDisassembler.cpp

 
 static MCDisassembler *createBPFDisassembler(const Target &T,
                                              const MCSubtargetInfo &STI,
                                              MCContext &Ctx) {
   return new BPFDisassembler(STI, Ctx);
 }
 
 
-extern "C" void LLVMInitializeBPFDisassembler() {
+extern "C" LLVM_EXPORT void LLVMInitializeBPFDisassembler() {
   // Register the disassembler.
   TargetRegistry::RegisterMCDisassembler(getTheBPFTarget(),
                                          createBPFDisassembler);
   TargetRegistry::RegisterMCDisassembler(getTheBPFleTarget(),
                                          createBPFDisassembler);
   TargetRegistry::RegisterMCDisassembler(getTheBPFbeTarget(),
                                          createBPFDisassembler);
 }

lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.cpp

 };
 
 } // end anonymous namespace
 
 static MCInstrAnalysis *createBPFInstrAnalysis(const MCInstrInfo *Info) {
   return new BPFMCInstrAnalysis(Info);
 }
 
-extern "C" void LLVMInitializeBPFTargetMC() {
+extern "C" LLVM_EXPORT void LLVMInitializeBPFTargetMC() {
   for (Target *T :
        {&getTheBPFleTarget(), &getTheBPFbeTarget(), &getTheBPFTarget()}) {
     // Register the MC asm info.
     RegisterMCAsmInfo<BPFMCAsmInfo> X(*T);
 
     // Register the MC instruction info.
     TargetRegistry::RegisterMCInstrInfo(*T, createBPFMCInstrInfo);
 

lib/Target/BPF/TargetInfo/BPFTargetInfo.cpp

Target &getTheBPFbeTarget() {
   return TheBPFbeTarget;
 }
 Target &getTheBPFTarget() {
   static Target TheBPFTarget;
   return TheBPFTarget;
 }
 } // namespace llvm
 
-extern "C" void LLVMInitializeBPFTargetInfo() {
+extern "C" LLVM_EXPORT void LLVMInitializeBPFTargetInfo() {
   TargetRegistry::RegisterTarget(getTheBPFTarget(), "bpf", "BPF (host endian)",
                                  "BPF", [](Triple::ArchType) { return false; },
                                  true);
   RegisterTarget<Triple::bpfel, /*HasJIT=*/true> X(
       getTheBPFleTarget(), "bpfel", "BPF (little endian)", "BPF");
   RegisterTarget<Triple::bpfeb, /*HasJIT=*/true> Y(getTheBPFbeTarget(), "bpfeb",
                                                    "BPF (big endian)", "BPF");
 }

lib/Target/CMakeLists.txt

 list(APPEND LLVM_COMMON_DEPENDS intrinsics_gen)
 
 list(APPEND LLVM_TABLEGEN_FLAGS -I ${LLVM_MAIN_SRC_DIR}/lib/Target)
 
 add_llvm_library(LLVMTarget
   Target.cpp
   TargetIntrinsicInfo.cpp
   TargetLoweringObjectFile.cpp
   TargetMachine.cpp
   TargetMachineC.cpp
 
   ADDITIONAL_HEADER_DIRS
   ${LLVM_MAIN_INCLUDE_DIR}/llvm/Target
   )
 
+# When building shared objects for each target there are some internal APIs
+# that are used across shared objects which we can't hide.
+if (NOT BUILD_SHARED_LIBS)
+  # Set default visibility to hidden, so we don't export all the Target classes
+  # in libLLVM.so.
+  set(CMAKE_CXX_VISIBILITY_PRESET hidden)
+endif()
+
 foreach(t ${LLVM_TARGETS_TO_BUILD})
   message(STATUS "Targeting ${t}")
   add_subdirectory(${t})
 endforeach()
 
 # Currently we do not allow libraries from lib to reference targets directly.
 # This property is used to enforce that convention. It is important because the
 # logic in llvm_map_components_to_libnames is order dependent on the target
 # libraries being created.
 set_property(GLOBAL PROPERTY LLVM_TARGETS_CONFIGURED On)

lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp

 // validate register against architecture
 bool HexagonAsmParser::RegisterMatchesArch(unsigned MatchNum) const {
   if (HexagonMCRegisterClasses[Hexagon::V62RegsRegClassID].contains(MatchNum))
     if (!getSTI().getFeatureBits()[Hexagon::ArchV62])
       return false;
   return true;
 }
 
-// extern "C" void LLVMInitializeHexagonAsmLexer();
+// extern "C" LLVM_EXPORT void LLVMInitializeHexagonAsmLexer();
 
 /// Force static initialization.
-extern "C" void LLVMInitializeHexagonAsmParser() {
+extern "C" LLVM_EXPORT void LLVMInitializeHexagonAsmParser() {
   RegisterMCAsmParser<HexagonAsmParser> X(getTheHexagonTarget());
 }
 
 #define GET_MATCHER_IMPLEMENTATION
 #define GET_REGISTER_MATCHER
 #include "HexagonGenAsmMatcher.inc"
 
 static bool previousEqual(OperandVector &Operands, size_t Index,

lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp

 #include "HexagonGenDisassemblerTables.inc"
 
 static MCDisassembler *createHexagonDisassembler(const Target &T,
                                                  const MCSubtargetInfo &STI,
                                                  MCContext &Ctx) {
   return new HexagonDisassembler(STI, Ctx, T.createMCInstrInfo());
 }
 
-extern "C" void LLVMInitializeHexagonDisassembler() {
+extern "C" LLVM_EXPORT void LLVMInitializeHexagonDisassembler() {
   TargetRegistry::RegisterMCDisassembler(getTheHexagonTarget(),
                                          createHexagonDisassembler);
 }
 
 DecodeStatus HexagonDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
                                                  ArrayRef<uint8_t> Bytes,
                                                  uint64_t Address,
                                                  raw_ostream &os,

lib/Target/Hexagon/HexagonAsmPrinter.cpp

void HexagonAsmPrinter::EmitInstruction(const MachineInstr *MI) {
   bool Ok = HexagonMCInstrInfo::canonicalizePacket(MCII, *Subtarget, Ctx,
                                                    MCB, nullptr);
   assert(Ok); (void)Ok;
   if (HexagonMCInstrInfo::bundleSize(MCB) == 0)
     return;
   OutStreamer->EmitInstruction(MCB, getSubtargetInfo());
 }
 
-extern "C" void LLVMInitializeHexagonAsmPrinter() {
+extern "C" LLVM_EXPORT void LLVMInitializeHexagonAsmPrinter() {
   RegisterAsmPrinter<HexagonAsmPrinter> X(getTheHexagonTarget());
 }

lib/Target/Hexagon/HexagonTargetMachine.cpp

 }
 
 static CodeModel::Model getEffectiveCodeModel(Optional<CodeModel::Model> CM) {
   if (CM)
     return *CM;
   return CodeModel::Small;
 }
 
-extern "C" void LLVMInitializeHexagonTarget() {
+extern "C" LLVM_EXPORT void LLVMInitializeHexagonTarget() {
   // Register the target.
   RegisterTargetMachine<HexagonTargetMachine> X(getTheHexagonTarget());
 
   PassRegistry &PR = *PassRegistry::getPassRegistry();
   initializeHexagonBitSimplifyPass(PR);
   initializeHexagonConstExtendersPass(PR);
   initializeHexagonConstPropagationPass(PR);
   initializeHexagonEarlyIfConversionPass(PR);

lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp

 };
 }
 
 static MCInstrAnalysis *createHexagonMCInstrAnalysis(const MCInstrInfo *Info) {
   return new HexagonMCInstrAnalysis(Info);
 }
 
 // Force static initialization.
-extern "C" void LLVMInitializeHexagonTargetMC() {
+extern "C" LLVM_EXPORT void LLVMInitializeHexagonTargetMC() {
   // Register the MC asm info.
   RegisterMCAsmInfoFn X(getTheHexagonTarget(), createHexagonMCAsmInfo);
 
   // Register the MC instruction info.
   TargetRegistry::RegisterMCInstrInfo(getTheHexagonTarget(),
                                       createHexagonMCInstrInfo);
 
   // Register the MC register info.

lib/Target/Hexagon/TargetInfo/HexagonTargetInfo.cpp

 #include "llvm/Support/TargetRegistry.h"
 using namespace llvm;
 
 Target &llvm::getTheHexagonTarget() {
   static Target TheHexagonTarget;
   return TheHexagonTarget;
 }
 
-extern "C" void LLVMInitializeHexagonTargetInfo() {
+extern "C" LLVM_EXPORT void LLVMInitializeHexagonTargetInfo() {
   RegisterTarget<Triple::hexagon, /*HasJIT=*/true> X(
       getTheHexagonTarget(), "hexagon", "Hexagon", "Hexagon");
 }

lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp

bool LanaiAsmParser::ParseInstruction(ParseInstructionInfo & /*Info*/,
 
   return false;
 }
 
 #define GET_REGISTER_MATCHER
 #define GET_MATCHER_IMPLEMENTATION
 #include "LanaiGenAsmMatcher.inc"
 
-extern "C" void LLVMInitializeLanaiAsmParser() {
+extern "C" LLVM_EXPORT void LLVMInitializeLanaiAsmParser() {
   RegisterMCAsmParser<LanaiAsmParser> x(getTheLanaiTarget());
 }

lib/Target/Lanai/Disassembler/LanaiDisassembler.cpp

 }
 
 static MCDisassembler *createLanaiDisassembler(const Target & /*T*/,
                                                const MCSubtargetInfo &STI,
                                                MCContext &Ctx) {
   return new LanaiDisassembler(STI, Ctx);
 }
 
-extern "C" void LLVMInitializeLanaiDisassembler() {
+extern "C" LLVM_EXPORT void LLVMInitializeLanaiDisassembler() {
   // Register the disassembler
   TargetRegistry::RegisterMCDisassembler(getTheLanaiTarget(),
                                          createLanaiDisassembler);
 }
 
 LanaiDisassembler::LanaiDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx)
     : MCDisassembler(STI, Ctx) {}
 

lib/Target/Lanai/LanaiAsmPrinter.cpp

bool LanaiAsmPrinter::isBlockOnlyReachableByFallthrough(
   MachineBasicBlock::const_iterator I = Pred->end();
   while (I != Pred->begin() && !(--I)->isTerminator()) {
   }
 
   return !I->isBarrier();
 }
 
 // Force static initialization.
-extern "C" void LLVMInitializeLanaiAsmPrinter() {
+extern "C" LLVM_EXPORT void LLVMInitializeLanaiAsmPrinter() {
   RegisterAsmPrinter<LanaiAsmPrinter> X(getTheLanaiTarget());
 }

lib/Target/Lanai/LanaiTargetMachine.cpp

 #include "llvm/Target/TargetOptions.h"
 
 using namespace llvm;
 
 namespace llvm {
 void initializeLanaiMemAluCombinerPass(PassRegistry &);
 } // namespace llvm
 
-extern "C" void LLVMInitializeLanaiTarget() {
+extern "C" LLVM_EXPORT void LLVMInitializeLanaiTarget() {
   // Register the target.
   RegisterTargetMachine<LanaiTargetMachine> registered_target(
       getTheLanaiTarget());
 }
 
 static std::string computeDataLayout() {
   // Data layout (keep in sync with clang/lib/Basic/Targets.cpp)
   return "E"        // Big endian

lib/Target/Lanai/MCTargetDesc/LanaiMCTargetDesc.cpp

 };
 
 } // end anonymous namespace
 
 static MCInstrAnalysis *createLanaiInstrAnalysis(const MCInstrInfo *Info) {
   return new LanaiMCInstrAnalysis(Info);
 }
 
-extern "C" void LLVMInitializeLanaiTargetMC() {
+extern "C" LLVM_EXPORT void LLVMInitializeLanaiTargetMC() {
   // Register the MC asm info.
   RegisterMCAsmInfo<LanaiMCAsmInfo> X(getTheLanaiTarget());
 
   // Register the MC instruction info.
   TargetRegistry::RegisterMCInstrInfo(getTheLanaiTarget(),
                                       createLanaiMCInstrInfo);
 
   // Register the MC register info.

lib/Target/Lanai/TargetInfo/LanaiTargetInfo.cpp

 
 namespace llvm {
 Target &getTheLanaiTarget() {
   static Target TheLanaiTarget;
   return TheLanaiTarget;
 }
 } // namespace llvm
 
-extern "C" void LLVMInitializeLanaiTargetInfo() {
+extern "C" LLVM_EXPORT void LLVMInitializeLanaiTargetInfo() {
   RegisterTarget<Triple::lanai> X(getTheLanaiTarget(), "lanai", "Lanai",
                                   "Lanai");
 }

lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp

static MCInstPrinter *createMSP430MCInstPrinter(const Triple &T,
                                                 const MCAsmInfo &MAI,
                                                 const MCInstrInfo &MII,
                                                 const MCRegisterInfo &MRI) {
   if (SyntaxVariant == 0)
     return new MSP430InstPrinter(MAI, MII, MRI);
   return nullptr;
 }
 
-extern "C" void LLVMInitializeMSP430TargetMC() {
+extern "C" LLVM_EXPORT void LLVMInitializeMSP430TargetMC() {
   // Register the MC asm info.
   RegisterMCAsmInfo<MSP430MCAsmInfo> X(getTheMSP430Target());
 
   // Register the MC instruction info.
   TargetRegistry::RegisterMCInstrInfo(getTheMSP430Target(),
                                       createMSP430MCInstrInfo);
 
   // Register the MC register info.

lib/Target/MSP430/MSP430AsmPrinter.cpp

void MSP430AsmPrinter::EmitInstruction(const MachineInstr *MI) {
   MSP430MCInstLower MCInstLowering(OutContext, *this);
 
   MCInst TmpInst;
   MCInstLowering.Lower(MI, TmpInst);
   EmitToStreamer(*OutStreamer, TmpInst);
 }
 
 // Force static initialization.
-extern "C" void LLVMInitializeMSP430AsmPrinter() {
+extern "C" LLVM_EXPORT void LLVMInitializeMSP430AsmPrinter() {
   RegisterAsmPrinter<MSP430AsmPrinter> X(getTheMSP430Target());
 }

lib/Target/MSP430/MSP430TargetMachine.cpp

 #include "llvm/CodeGen/Passes.h"
 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
 #include "llvm/CodeGen/TargetPassConfig.h"
 #include "llvm/IR/LegacyPassManager.h"
 #include "llvm/MC/MCAsmInfo.h"
 #include "llvm/Support/TargetRegistry.h"
 using namespace llvm;
 
-extern "C" void LLVMInitializeMSP430Target() {
+extern "C" LLVM_EXPORT void LLVMInitializeMSP430Target() {
   // Register the target.
   RegisterTargetMachine<MSP430TargetMachine> X(getTheMSP430Target());
 }
 
 static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {
   if (!RM.hasValue())
     return Reloc::Static;
   return *RM;

lib/Target/MSP430/TargetInfo/MSP430TargetInfo.cpp

 #include "llvm/Support/TargetRegistry.h"
 using namespace llvm;
 
 Target &llvm::getTheMSP430Target() {
   static Target TheMSP430Target;
   return TheMSP430Target;
 }
 
-extern "C" void LLVMInitializeMSP430TargetInfo() {
+extern "C" LLVM_EXPORT void LLVMInitializeMSP430TargetInfo() {
   RegisterTarget<Triple::msp430> X(getTheMSP430Target(), "msp430",
                                    "MSP430 [experimental]", "MSP430");
 }

lib/Target/Mips/AsmParser/MipsAsmParser.cpp

bool MipsAsmParser::parseInternalDirectiveReallowModule() {
   }
 
   getTargetStreamer().reallowModuleDirective();
 
   getParser().Lex(); // Eat EndOfStatement token.
   return false;
 }
 
-extern "C" void LLVMInitializeMipsAsmParser() {
+extern "C" LLVM_EXPORT void LLVMInitializeMipsAsmParser() {
   RegisterMCAsmParser<MipsAsmParser> X(getTheMipsTarget());
   RegisterMCAsmParser<MipsAsmParser> Y(getTheMipselTarget());
   RegisterMCAsmParser<MipsAsmParser> A(getTheMips64Target());
   RegisterMCAsmParser<MipsAsmParser> B(getTheMips64elTarget());
 }
 
 #define GET_REGISTER_MATCHER
 #define GET_MATCHER_IMPLEMENTATION

lib/Target/Mips/Disassembler/MipsDisassembler.cpp

 
 static MCDisassembler *createMipselDisassembler(
                        const Target &T,
                        const MCSubtargetInfo &STI,
                        MCContext &Ctx) {
   return new MipsDisassembler(STI, Ctx, false);
 }
 
-extern "C" void LLVMInitializeMipsDisassembler() {
+extern "C" LLVM_EXPORT void LLVMInitializeMipsDisassembler() {
   // Register the disassembler.
   TargetRegistry::RegisterMCDisassembler(getTheMipsTarget(),
                                          createMipsDisassembler);
   TargetRegistry::RegisterMCDisassembler(getTheMipselTarget(),
                                          createMipselDisassembler);
   TargetRegistry::RegisterMCDisassembler(getTheMips64Target(),
                                          createMipsDisassembler);
   TargetRegistry::RegisterMCDisassembler(getTheMips64elTarget(),

lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp

public:
   }
 };
 }
 
 static MCInstrAnalysis *createMipsMCInstrAnalysis(const MCInstrInfo *Info) {
   return new MipsMCInstrAnalysis(Info);
 }
 
-extern "C" void LLVMInitializeMipsTargetMC() {
+extern "C" LLVM_EXPORT void LLVMInitializeMipsTargetMC() {
   for (Target *T : {&getTheMipsTarget(), &getTheMipselTarget(),
                     &getTheMips64Target(), &getTheMips64elTarget()}) {
     // Register the MC asm info.
     RegisterMCAsmInfoFn X(*T, createMipsMCAsmInfo);
 
     // Register the MC instruction info.
     TargetRegistry::RegisterMCInstrInfo(*T, createMipsMCInstrInfo);
 

lib/Target/Mips/MipsAsmPrinter.cpp

return (Opcode == Mips::LONG_BRANCH_LUi
           || Opcode == Mips::LONG_BRANCH_LUi2Op_64
           || Opcode == Mips::LONG_BRANCH_ADDiu
           || Opcode == Mips::LONG_BRANCH_ADDiu2Op
           || Opcode == Mips::LONG_BRANCH_DADDiu
           || Opcode == Mips::LONG_BRANCH_DADDiu2Op);
 }
 
 // Force static initialization.
-extern "C" void LLVMInitializeMipsAsmPrinter() {
+extern "C" LLVM_EXPORT void LLVMInitializeMipsAsmPrinter() {
   RegisterAsmPrinter<MipsAsmPrinter> X(getTheMipsTarget());
   RegisterAsmPrinter<MipsAsmPrinter> Y(getTheMipselTarget());
   RegisterAsmPrinter<MipsAsmPrinter> A(getTheMips64Target());
   RegisterAsmPrinter<MipsAsmPrinter> B(getTheMips64elTarget());
 }

lib/Target/Mips/MipsTargetMachine.cpp

 #include "llvm/Support/raw_ostream.h"
 #include "llvm/Target/TargetOptions.h"
 #include <string>
 
 using namespace llvm;
 
 #define DEBUG_TYPE "mips"
 
-extern "C" void LLVMInitializeMipsTarget() {
+extern "C" LLVM_EXPORT void LLVMInitializeMipsTarget() {
   // Register the target.
   RegisterTargetMachine<MipsebTargetMachine> X(getTheMipsTarget());
   RegisterTargetMachine<MipselTargetMachine> Y(getTheMipselTarget());
   RegisterTargetMachine<MipsebTargetMachine> A(getTheMips64Target());
   RegisterTargetMachine<MipselTargetMachine> B(getTheMips64elTarget());
 
   PassRegistry *PR = PassRegistry::getPassRegistry();
   initializeGlobalISel(*PR);

lib/Target/Mips/TargetInfo/MipsTargetInfo.cpp

Target &llvm::getTheMips64Target() {
   static Target TheMips64Target;
   return TheMips64Target;
 }
 Target &llvm::getTheMips64elTarget() {
   static Target TheMips64elTarget;
   return TheMips64elTarget;
 }
 
-extern "C" void LLVMInitializeMipsTargetInfo() {
+extern "C" LLVM_EXPORT void LLVMInitializeMipsTargetInfo() {
   RegisterTarget<Triple::mips,
                  /*HasJIT=*/true>
       X(getTheMipsTarget(), "mips", "MIPS (32-bit big endian)", "Mips");
 
   RegisterTarget<Triple::mipsel,
                  /*HasJIT=*/true>
       Y(getTheMipselTarget(), "mipsel", "MIPS (32-bit little endian)", "Mips");
 

lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.cpp

 
 static MCTargetStreamer *createTargetAsmStreamer(MCStreamer &S,
                                                  formatted_raw_ostream &,
                                                  MCInstPrinter *, bool) {
   return new NVPTXTargetStreamer(S);
 }
 
 // Force static initialization.
-extern "C" void LLVMInitializeNVPTXTargetMC() {
+extern "C" LLVM_EXPORT void LLVMInitializeNVPTXTargetMC() {
   for (Target *T : {&getTheNVPTXTarget32(), &getTheNVPTXTarget64()}) {
     // Register the MC asm info.
     RegisterMCAsmInfo<NVPTXMCAsmInfo> X(*T);
 
     // Register the MC instruction info.
     TargetRegistry::RegisterMCInstrInfo(*T, createNVPTXMCInstrInfo);
 
     // Register the MC register info.

lib/Target/NVPTX/NVPTXAsmPrinter.cpp

if (MI->getOperand(opNum + 1).isImm() &&
         MI->getOperand(opNum + 1).getImm() == 0)
       return; // don't print ',0' or '+0'
     O << "+";
     printOperand(MI, opNum + 1, O);
   }
 }
 
 // Force static initialization.
-extern "C" void LLVMInitializeNVPTXAsmPrinter() {
+extern "C" LLVM_EXPORT void LLVMInitializeNVPTXAsmPrinter() {
   RegisterAsmPrinter<NVPTXAsmPrinter> X(getTheNVPTXTarget32());
   RegisterAsmPrinter<NVPTXAsmPrinter> Y(getTheNVPTXTarget64());
 }

lib/Target/NVPTX/NVPTXTargetMachine.cpp

 void initializeNVPTXAllocaHoistingPass(PassRegistry &);
 void initializeNVPTXAssignValidGlobalNamesPass(PassRegistry&);
 void initializeNVPTXLowerAggrCopiesPass(PassRegistry &);
 void initializeNVPTXLowerArgsPass(PassRegistry &);
 void initializeNVPTXLowerAllocaPass(PassRegistry &);
 
 } // end namespace llvm
 
-extern "C" void LLVMInitializeNVPTXTarget() {
+extern "C" LLVM_EXPORT void LLVMInitializeNVPTXTarget() {
   // Register the target.
   RegisterTargetMachine<NVPTXTargetMachine32> X(getTheNVPTXTarget32());
   RegisterTargetMachine<NVPTXTargetMachine64> Y(getTheNVPTXTarget64());
 
   // FIXME: This pass is really intended to be invoked during IR optimization,
   // but it's very NVPTX-specific.
   PassRegistry &PR = *PassRegistry::getPassRegistry();
   initializeNVVMReflectPass(PR);

lib/Target/NVPTX/TargetInfo/NVPTXTargetInfo.cpp

Target &llvm::getTheNVPTXTarget32() {
   static Target TheNVPTXTarget32;
   return TheNVPTXTarget32;
 }
 Target &llvm::getTheNVPTXTarget64() {
   static Target TheNVPTXTarget64;
   return TheNVPTXTarget64;
 }
 
-extern "C" void LLVMInitializeNVPTXTargetInfo() {
+extern "C" LLVM_EXPORT void LLVMInitializeNVPTXTargetInfo() {
   RegisterTarget<Triple::nvptx> X(getTheNVPTXTarget32(), "nvptx",
                                   "NVIDIA PTX 32-bit", "NVPTX");
   RegisterTarget<Triple::nvptx64> Y(getTheNVPTXTarget64(), "nvptx64",
                                     "NVIDIA PTX 64-bit", "NVPTX");
 }

lib/Target/Nios2/MCTargetDesc/Nios2MCTargetDesc.cpp

 
 static MCTargetStreamer *createNios2AsmTargetStreamer(MCStreamer &S,
                                                       formatted_raw_ostream &OS,
                                                       MCInstPrinter *InstPrint,
                                                       bool isVerboseAsm) {
   return new Nios2TargetAsmStreamer(S, OS);
 }
 
-extern "C" void LLVMInitializeNios2TargetMC() {
+extern "C" LLVM_EXPORT void LLVMInitializeNios2TargetMC() {
   Target *T = &getTheNios2Target();
 
   // Register the MC asm info.
   RegisterMCAsmInfoFn X(*T, createNios2MCAsmInfo);
 
   // Register the MC instruction info.
   TargetRegistry::RegisterMCInstrInfo(*T, createNios2MCInstrInfo);
 

lib/Target/Nios2/Nios2AsmPrinter.cpp

default:
     llvm_unreachable("<unknown operand type>");
   }
 
   if (closeP)
     O << ")";
 }
 
 // Force static initialization.
-extern "C" void LLVMInitializeNios2AsmPrinter() {
+extern "C" LLVM_EXPORT void LLVMInitializeNios2AsmPrinter() {
   RegisterAsmPrinter<Nios2AsmPrinter> X(getTheNios2Target());
 }

lib/Target/Nios2/Nios2TargetMachine.cpp

 
 #include "llvm/CodeGen/TargetPassConfig.h"
 #include "llvm/Support/TargetRegistry.h"
 
 using namespace llvm;
 
 #define DEBUG_TYPE "nios2"
 
-extern "C" void LLVMInitializeNios2Target() {
+extern "C" LLVM_EXPORT void LLVMInitializeNios2Target() {
   // Register the target.
   RegisterTargetMachine<Nios2TargetMachine> X(getTheNios2Target());
 }
 
 static std::string computeDataLayout() {
   return "e-p:32:32:32-i8:8:32-i16:16:32-n32";
 }
 

lib/Target/Nios2/TargetInfo/Nios2TargetInfo.cpp

 
 using namespace llvm;
 
 Target &llvm::getTheNios2Target() {
   static Target TheNios2Target;
   return TheNios2Target;
 }
 
-extern "C" void LLVMInitializeNios2TargetInfo() {
+extern "C" LLVM_EXPORT void LLVMInitializeNios2TargetInfo() {
   RegisterTarget<Triple::nios2,
                  /*HasJIT=*/true>
       X(getTheNios2Target(), "nios2", "Nios2", "Nios2");
 }

lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp

bool PPCAsmParser::ParseDirectiveLocalEntry(SMLoc L) {
   TStreamer.emitLocalEntry(Sym, Expr);
 
   return false;
 }
 
 
 
 /// Force static initialization.
-extern "C" void LLVMInitializePowerPCAsmParser() {
+extern "C" LLVM_EXPORT void LLVMInitializePowerPCAsmParser() {
   RegisterMCAsmParser<PPCAsmParser> A(getThePPC32Target());
   RegisterMCAsmParser<PPCAsmParser> B(getThePPC64Target());
   RegisterMCAsmParser<PPCAsmParser> C(getThePPC64LETarget());
 }
 
 #define GET_REGISTER_MATCHER
 #define GET_MATCHER_IMPLEMENTATION
 #define GET_MNEMONIC_SPELL_CHECKER

lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp

 }
 
 static MCDisassembler *createPPCLEDisassembler(const Target &T,
                                                const MCSubtargetInfo &STI,
                                                MCContext &Ctx) {
   return new PPCDisassembler(STI, Ctx, /*IsLittleEndian=*/true);
 }
 
-extern "C" void LLVMInitializePowerPCDisassembler() {
+extern "C" LLVM_EXPORT void LLVMInitializePowerPCDisassembler() {
   // Register the disassembler for each target.
   TargetRegistry::RegisterMCDisassembler(getThePPC32Target(),
                                          createPPCDisassembler);
   TargetRegistry::RegisterMCDisassembler(getThePPC64Target(),
                                          createPPCDisassembler);
   TargetRegistry::RegisterMCDisassembler(getThePPC64LETarget(),
                                          createPPCLEDisassembler);
 }

lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp

 static MCInstPrinter *createPPCMCInstPrinter(const Triple &T,
                                              unsigned SyntaxVariant,
                                              const MCAsmInfo &MAI,
                                              const MCInstrInfo &MII,
                                              const MCRegisterInfo &MRI) {
   return new PPCInstPrinter(MAI, MII, MRI, T);
 }
 
-extern "C" void LLVMInitializePowerPCTargetMC() {
+extern "C" LLVM_EXPORT void LLVMInitializePowerPCTargetMC() {
   for (Target *T :
        {&getThePPC32Target(), &getThePPC64Target(), &getThePPC64LETarget()}) {
     // Register the MC asm info.
     RegisterMCAsmInfoFn C(*T, createPPCMCAsmInfo);
 
     // Register the MC instruction info.
     TargetRegistry::RegisterMCInstrInfo(*T, createPPCMCInstrInfo);
 

lib/Target/PowerPC/PPCAsmPrinter.cpp

 createPPCAsmPrinterPass(TargetMachine &tm,
                         std::unique_ptr<MCStreamer> &&Streamer) {
   if (tm.getTargetTriple().isMacOSX())
     return new PPCDarwinAsmPrinter(tm, std::move(Streamer));
   return new PPCLinuxAsmPrinter(tm, std::move(Streamer));
 }
 
 // Force static initialization.
-extern "C" void LLVMInitializePowerPCAsmPrinter() {
+extern "C" LLVM_EXPORT void LLVMInitializePowerPCAsmPrinter() {
   TargetRegistry::RegisterAsmPrinter(getThePPC32Target(),
                                      createPPCAsmPrinterPass);
   TargetRegistry::RegisterAsmPrinter(getThePPC64Target(),
                                      createPPCAsmPrinterPass);
   TargetRegistry::RegisterAsmPrinter(getThePPC64LETarget(),
                                      createPPCAsmPrinterPass);
 }

lib/Target/PowerPC/PPCTargetMachine.cpp

 EnableMachineCombinerPass("ppc-machine-combiner",
                           cl::desc("Enable the machine combiner pass"),
                           cl::init(true), cl::Hidden);
 
 static cl::opt<bool>
   ReduceCRLogical("ppc-reduce-cr-logicals",
                   cl::desc("Expand eligible cr-logical binary ops to branches"),
                   cl::init(false), cl::Hidden);
-extern "C" void LLVMInitializePowerPCTarget() {
+extern "C" LLVM_EXPORT void LLVMInitializePowerPCTarget() {
   // Register the targets
   RegisterTargetMachine<PPCTargetMachine> A(getThePPC32Target());
   RegisterTargetMachine<PPCTargetMachine> B(getThePPC64Target());
   RegisterTargetMachine<PPCTargetMachine> C(getThePPC64LETarget());
 
   PassRegistry &PR = *PassRegistry::getPassRegistry();
   initializePPCBoolRetToIntPass(PR);
   initializePPCExpandISELPass(PR);

lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.cpp

Target &llvm::getThePPC64Target() {
   static Target ThePPC64Target;
   return ThePPC64Target;
 }
 Target &llvm::getThePPC64LETarget() {
   static Target ThePPC64LETarget;
   return ThePPC64LETarget;
 }
 
-extern "C" void LLVMInitializePowerPCTargetInfo() {
+extern "C" LLVM_EXPORT void LLVMInitializePowerPCTargetInfo() {
   RegisterTarget<Triple::ppc, /*HasJIT=*/true> X(getThePPC32Target(), "ppc32",
                                                  "PowerPC 32", "PPC");
 
   RegisterTarget<Triple::ppc64, /*HasJIT=*/true> Y(getThePPC64Target(), "ppc64",
                                                    "PowerPC 64", "PPC");
 
   RegisterTarget<Triple::ppc64le, /*HasJIT=*/true> Z(
       getThePPC64LETarget(), "ppc64le", "PowerPC 64 LE", "PPC");
 }

lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp

if (Inst.getOpcode() == RISCV::PseudoLI) {
     emitLoadLocalAddress(Inst, IDLoc, Out);
     return false;
   }
 
   emitToStreamer(Out, Inst);
   return false;
 }
 
-extern "C" void LLVMInitializeRISCVAsmParser() {
+extern "C" LLVM_EXPORT void LLVMInitializeRISCVAsmParser() {
   RegisterMCAsmParser<RISCVAsmParser> X(getTheRISCV32Target());
   RegisterMCAsmParser<RISCVAsmParser> Y(getTheRISCV64Target());
 }

lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp

 } // end anonymous namespace
 
 static MCDisassembler *createRISCVDisassembler(const Target &T,
                                                const MCSubtargetInfo &STI,
                                                MCContext &Ctx) {
   return new RISCVDisassembler(STI, Ctx);
 }
 
-extern "C" void LLVMInitializeRISCVDisassembler() {
+extern "C" LLVM_EXPORT void LLVMInitializeRISCVDisassembler() {
   // Register the disassembler for each target.
   TargetRegistry::RegisterMCDisassembler(getTheRISCV32Target(),
                                          createRISCVDisassembler);
   TargetRegistry::RegisterMCDisassembler(getTheRISCV64Target(),
                                          createRISCVDisassembler);
 }
 
 static const unsigned GPRDecoderTable[] = {

lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp

 
 static MCTargetStreamer *createRISCVAsmTargetStreamer(MCStreamer &S,
                                                       formatted_raw_ostream &OS,
                                                       MCInstPrinter *InstPrint,
                                                       bool isVerboseAsm) {
   return new RISCVTargetAsmStreamer(S, OS);
 }
 
-extern "C" void LLVMInitializeRISCVTargetMC() {
+extern "C" LLVM_EXPORT void LLVMInitializeRISCVTargetMC() {
   for (Target *T : {&getTheRISCV32Target(), &getTheRISCV64Target()}) {
     TargetRegistry::RegisterMCAsmInfo(*T, createRISCVMCAsmInfo);
     TargetRegistry::RegisterMCInstrInfo(*T, createRISCVMCInstrInfo);
     TargetRegistry::RegisterMCRegInfo(*T, createRISCVMCRegisterInfo);
     TargetRegistry::RegisterMCAsmBackend(*T, createRISCVAsmBackend);
     TargetRegistry::RegisterMCCodeEmitter(*T, createRISCVMCCodeEmitter);
     TargetRegistry::RegisterMCInstPrinter(*T, createRISCVMCInstPrinter);
     TargetRegistry::RegisterMCSubtargetInfo(*T, createRISCVMCSubtargetInfo);
     TargetRegistry::RegisterObjectTargetStreamer(
         *T, createRISCVObjectTargetStreamer);
 
     // Register the asm target streamer.
     TargetRegistry::RegisterAsmTargetStreamer(*T, createRISCVAsmTargetStreamer);
   }
 }

lib/Target/RISCV/RISCVAsmPrinter.cpp

if (!ExtraCode) {
     OS << "0(" << RISCVInstPrinter::getRegisterName(MO.getReg()) << ")";
     return false;
   }
 
   return AsmPrinter::PrintAsmMemoryOperand(MI, OpNo, AsmVariant, ExtraCode, OS);
 }
 
 // Force static initialization.
-extern "C" void LLVMInitializeRISCVAsmPrinter() {
+extern "C" LLVM_EXPORT void LLVMInitializeRISCVAsmPrinter() {
   RegisterAsmPrinter<RISCVAsmPrinter> X(getTheRISCV32Target());
   RegisterAsmPrinter<RISCVAsmPrinter> Y(getTheRISCV64Target());
 }

lib/Target/RISCV/RISCVTargetMachine.cpp

 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
 #include "llvm/CodeGen/TargetPassConfig.h"
 #include "llvm/IR/LegacyPassManager.h"
 #include "llvm/Support/FormattedStream.h"
 #include "llvm/Support/TargetRegistry.h"
 #include "llvm/Target/TargetOptions.h"
 using namespace llvm;
 
-extern "C" void LLVMInitializeRISCVTarget() {
+extern "C" LLVM_EXPORT void LLVMInitializeRISCVTarget() {
   RegisterTargetMachine<RISCVTargetMachine> X(getTheRISCV32Target());
   RegisterTargetMachine<RISCVTargetMachine> Y(getTheRISCV64Target());
   auto PR = PassRegistry::getPassRegistry();
   initializeRISCVExpandPseudoPass(*PR);
 }
 
 static std::string computeDataLayout(const Triple &TT) {
   if (TT.isArch64Bit()) {

lib/Target/RISCV/TargetInfo/RISCVTargetInfo.cpp

 }
 
 Target &getTheRISCV64Target() {
   static Target TheRISCV64Target;
   return TheRISCV64Target;
 }
 }
 
-extern "C" void LLVMInitializeRISCVTargetInfo() {
+extern "C" LLVM_EXPORT void LLVMInitializeRISCVTargetInfo() {
   RegisterTarget<Triple::riscv32> X(getTheRISCV32Target(), "riscv32",
                                     "32-bit RISC-V", "RISCV");
   RegisterTarget<Triple::riscv64> Y(getTheRISCV64Target(), "riscv64",
                                     "64-bit RISC-V", "RISCV");
 }

lib/Target/Sparc/AsmParser/SparcAsmParser.cpp

bool SparcAsmParser::matchSparcAsmModifiers(const MCExpr *&EVal,
   const MCExpr *subExpr;
   if (Parser.parseParenExpression(subExpr, EndLoc))
     return false;
 
   EVal = adjustPICRelocation(VK, subExpr);
   return true;
 }
 
-extern "C" void LLVMInitializeSparcAsmParser() {
+extern "C" LLVM_EXPORT void LLVMInitializeSparcAsmParser() {
   RegisterMCAsmParser<SparcAsmParser> A(getTheSparcTarget());
   RegisterMCAsmParser<SparcAsmParser> B(getTheSparcV9Target());
   RegisterMCAsmParser<SparcAsmParser> C(getTheSparcelTarget());
 }
 
 #define GET_REGISTER_MATCHER
 #define GET_MATCHER_IMPLEMENTATION
 #include "SparcGenAsmMatcher.inc"

lib/Target/Sparc/Disassembler/SparcDisassembler.cpp

 
 static MCDisassembler *createSparcDisassembler(const Target &T,
                                                const MCSubtargetInfo &STI,
                                                MCContext &Ctx) {
   return new SparcDisassembler(STI, Ctx);
 }
 
 
-extern "C" void LLVMInitializeSparcDisassembler() {
+extern "C" LLVM_EXPORT void LLVMInitializeSparcDisassembler() {
   // Register the disassembler.
   TargetRegistry::RegisterMCDisassembler(getTheSparcTarget(),
                                          createSparcDisassembler);
   TargetRegistry::RegisterMCDisassembler(getTheSparcV9Target(),
                                          createSparcDisassembler);
   TargetRegistry::RegisterMCDisassembler(getTheSparcelTarget(),
                                          createSparcDisassembler);
 }

lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp

 static MCInstPrinter *createSparcMCInstPrinter(const Triple &T,
                                                unsigned SyntaxVariant,
                                                const MCAsmInfo &MAI,
                                                const MCInstrInfo &MII,
                                                const MCRegisterInfo &MRI) {
   return new SparcInstPrinter(MAI, MII, MRI);
 }
 
-extern "C" void LLVMInitializeSparcTargetMC() {
+extern "C" LLVM_EXPORT void LLVMInitializeSparcTargetMC() {
   // Register the MC asm info.
   RegisterMCAsmInfoFn X(getTheSparcTarget(), createSparcMCAsmInfo);
   RegisterMCAsmInfoFn Y(getTheSparcV9Target(), createSparcV9MCAsmInfo);
   RegisterMCAsmInfoFn Z(getTheSparcelTarget(), createSparcMCAsmInfo);
 
   for (Target *T :
        {&getTheSparcTarget(), &getTheSparcV9Target(), &getTheSparcelTarget()}) {
     // Register the MC instruction info.

lib/Target/Sparc/SparcAsmPrinter.cpp

bool SparcAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
   O << '[';
   printMemOperand(MI, OpNo, O);
   O << ']';
 
   return false;
 }
 
 // Force static initialization.
-extern "C" void LLVMInitializeSparcAsmPrinter() {
+extern "C" LLVM_EXPORT void LLVMInitializeSparcAsmPrinter() {
   RegisterAsmPrinter<SparcAsmPrinter> X(getTheSparcTarget());
   RegisterAsmPrinter<SparcAsmPrinter> Y(getTheSparcV9Target());
   RegisterAsmPrinter<SparcAsmPrinter> Z(getTheSparcelTarget());
 }

lib/Target/Sparc/SparcTargetMachine.cpp

 #include "Sparc.h"
 #include "SparcTargetObjectFile.h"
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/CodeGen/TargetPassConfig.h"
 #include "llvm/IR/LegacyPassManager.h"
 #include "llvm/Support/TargetRegistry.h"
 using namespace llvm;
 
-extern "C" void LLVMInitializeSparcTarget() {
+extern "C" LLVM_EXPORT void LLVMInitializeSparcTarget() {
   // Register the target.
   RegisterTargetMachine<SparcV8TargetMachine> X(getTheSparcTarget());
   RegisterTargetMachine<SparcV9TargetMachine> Y(getTheSparcV9Target());
   RegisterTargetMachine<SparcelTargetMachine> Z(getTheSparcelTarget());
 }
 
 static std::string computeDataLayout(const Triple &T, bool is64Bit) {
   // Sparc is typically big endian, but some are little.

lib/Target/Sparc/TargetInfo/SparcTargetInfo.cpp

Target &llvm::getTheSparcV9Target() {
   static Target TheSparcV9Target;
   return TheSparcV9Target;
 }
 Target &llvm::getTheSparcelTarget() {
   static Target TheSparcelTarget;
   return TheSparcelTarget;
 }
 
-extern "C" void LLVMInitializeSparcTargetInfo() {
+extern "C" LLVM_EXPORT void LLVMInitializeSparcTargetInfo() {
   RegisterTarget<Triple::sparc, /*HasJIT=*/true> X(getTheSparcTarget(), "sparc",
                                                    "Sparc", "Sparc");
   RegisterTarget<Triple::sparcv9, /*HasJIT=*/true> Y(
       getTheSparcV9Target(), "sparcv9", "Sparc V9", "Sparc");
   RegisterTarget<Triple::sparcel, /*HasJIT=*/true> Z(
       getTheSparcelTarget(), "sparcel", "Sparc LE", "Sparc");
 }

lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp

Operands.push_back(SystemZOperand::createImmTLS(Expr, Sym,
                                                     StartLoc, EndLoc));
   else
     Operands.push_back(SystemZOperand::createImm(Expr, StartLoc, EndLoc));
 
   return MatchOperand_Success;
 }
 
 // Force static initialization.
-extern "C" void LLVMInitializeSystemZAsmParser() {
+extern "C" LLVM_EXPORT void LLVMInitializeSystemZAsmParser() {
   RegisterMCAsmParser<SystemZAsmParser> X(getTheSystemZTarget());
 }

lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp

 } // end anonymous namespace
 
 static MCDisassembler *createSystemZDisassembler(const Target &T,
                                                  const MCSubtargetInfo &STI,
                                                  MCContext &Ctx) {
   return new SystemZDisassembler(STI, Ctx);
 }
 
-extern "C" void LLVMInitializeSystemZDisassembler() {
+extern "C" LLVM_EXPORT void LLVMInitializeSystemZDisassembler() {
   // Register the disassembler.
   TargetRegistry::RegisterMCDisassembler(getTheSystemZTarget(),
                                          createSystemZDisassembler);
 }
 
 /// tryAddingSymbolicOperand - trys to add a symbolic operand in place of the
 /// immediate Value in the MCInst.
 ///

lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp

 static MCInstPrinter *createSystemZMCInstPrinter(const Triple &T,
                                                  unsigned SyntaxVariant,
                                                  const MCAsmInfo &MAI,
                                                  const MCInstrInfo &MII,
                                                  const MCRegisterInfo &MRI) {
   return new SystemZInstPrinter(MAI, MII, MRI);
 }
 
-extern "C" void LLVMInitializeSystemZTargetMC() {
+extern "C" LLVM_EXPORT void LLVMInitializeSystemZTargetMC() {
   // Register the MCAsmInfo.
   TargetRegistry::RegisterMCAsmInfo(getTheSystemZTarget(),
                                     createSystemZMCAsmInfo);
 
   // Register the MCCodeEmitter.
   TargetRegistry::RegisterMCCodeEmitter(getTheSystemZTarget(),
                                         createSystemZMCCodeEmitter);
 

lib/Target/SystemZ/SystemZAsmPrinter.cpp

bool SystemZAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
   return false;
 }
 
 void SystemZAsmPrinter::EmitEndOfAsmFile(Module &M) {
   SM.serializeToStackMapSection();
 }
 
 // Force static initialization.
-extern "C" void LLVMInitializeSystemZAsmPrinter() {
+extern "C" LLVM_EXPORT void LLVMInitializeSystemZAsmPrinter() {
   RegisterAsmPrinter<SystemZAsmPrinter> X(getTheSystemZTarget());
 }

lib/Target/SystemZ/SystemZTargetMachine.cpp

 #include "llvm/Support/CodeGen.h"
 #include "llvm/Support/TargetRegistry.h"
 #include "llvm/Target/TargetLoweringObjectFile.h"
 #include "llvm/Transforms/Scalar.h"
 #include <string>
 
 using namespace llvm;
 
-extern "C" void LLVMInitializeSystemZTarget() {
+extern "C" LLVM_EXPORT void LLVMInitializeSystemZTarget() {
   // Register the target.
   RegisterTargetMachine<SystemZTargetMachine> X(getTheSystemZTarget());
 }
 
 // Determine whether we use the vector ABI.
 static bool UsesVectorABI(StringRef CPU, StringRef FS) {
   // We use the vector ABI whenever the vector facility is avaiable.
   // This is the case by default if CPU is z13 or later, and can be

lib/Target/SystemZ/TargetInfo/SystemZTargetInfo.cpp

 
 using namespace llvm;
 
 Target &llvm::getTheSystemZTarget() {
   static Target TheSystemZTarget;
   return TheSystemZTarget;
 }
 
-extern "C" void LLVMInitializeSystemZTargetInfo() {
+extern "C" LLVM_EXPORT void LLVMInitializeSystemZTargetInfo() {
   RegisterTarget<Triple::systemz, /*HasJIT=*/true> X(
       getTheSystemZTarget(), "systemz", "SystemZ", "SystemZ");
 }

lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp

bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned & /*Opcode*/,
     }
     }
     llvm_unreachable("Implement any new match types added!");
   }
 };
 } // end anonymous namespace
 
 // Force static initialization.
-extern "C" void LLVMInitializeWebAssemblyAsmParser() {
+extern "C" LLVM_EXPORT void LLVMInitializeWebAssemblyAsmParser() {
   RegisterMCAsmParser<WebAssemblyAsmParser> X(getTheWebAssemblyTarget32());
   RegisterMCAsmParser<WebAssemblyAsmParser> Y(getTheWebAssemblyTarget64());
 }
 
 #define GET_REGISTER_MATCHER
 #define GET_MATCHER_IMPLEMENTATION
 #include "WebAssemblyGenAsmMatcher.inc"

lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp

 
 static MCDisassembler *createWebAssemblyDisassembler(const Target &T,
                                                      const MCSubtargetInfo &STI,
                                                      MCContext &Ctx) {
   std::unique_ptr<const MCInstrInfo> MCII(T.createMCInstrInfo());
   return new WebAssemblyDisassembler(STI, Ctx, std::move(MCII));
 }
 
-extern "C" void LLVMInitializeWebAssemblyDisassembler() {
+extern "C" LLVM_EXPORT void LLVMInitializeWebAssemblyDisassembler() {
   // Register the disassembler for each target.
   TargetRegistry::RegisterMCDisassembler(getTheWebAssemblyTarget32(),
                                          createWebAssemblyDisassembler);
   TargetRegistry::RegisterMCDisassembler(getTheWebAssemblyTarget64(),
                                          createWebAssemblyDisassembler);
 }
 
 static uint8_t nextByte(ArrayRef<uint8_t> Bytes, uint64_t &Size) {

lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp

 static MCTargetStreamer *createAsmTargetStreamer(MCStreamer &S,
                                                  formatted_raw_ostream &OS,
                                                  MCInstPrinter * /*InstPrint*/,
                                                  bool /*isVerboseAsm*/) {
   return new WebAssemblyTargetAsmStreamer(S, OS);
 }
 
 // Force static initialization.
-extern "C" void LLVMInitializeWebAssemblyTargetMC() {
+extern "C" LLVM_EXPORT void LLVMInitializeWebAssemblyTargetMC() {
   for (Target *T :
        {&getTheWebAssemblyTarget32(), &getTheWebAssemblyTarget64()}) {
     // Register the MC asm info.
     RegisterMCAsmInfoFn X(*T, createMCAsmInfo);
 
     // Register the MC instruction info.
     TargetRegistry::RegisterMCInstrInfo(*T, createMCInstrInfo);
 

lib/Target/WebAssembly/TargetInfo/WebAssemblyTargetInfo.cpp

Target &llvm::getTheWebAssemblyTarget32() {
   static Target TheWebAssemblyTarget32;
   return TheWebAssemblyTarget32;
 }
 Target &llvm::getTheWebAssemblyTarget64() {
   static Target TheWebAssemblyTarget64;
   return TheWebAssemblyTarget64;
 }
 
-extern "C" void LLVMInitializeWebAssemblyTargetInfo() {
+extern "C" LLVM_EXPORT void LLVMInitializeWebAssemblyTargetInfo() {
   RegisterTarget<Triple::wasm32> X(getTheWebAssemblyTarget32(), "wasm32",
                                    "WebAssembly 32-bit", "WebAssembly");
   RegisterTarget<Triple::wasm64> Y(getTheWebAssemblyTarget64(), "wasm64",
                                    "WebAssembly 64-bit", "WebAssembly");
 }

lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp

bool WebAssemblyAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
   // using "r" as it eliminates the need to push and pop the values in a
   // particular order, however it also makes it impossible to have an "m"
   // constraint. So we don't support it.
 
   return AsmPrinter::PrintAsmMemoryOperand(MI, OpNo, AsmVariant, ExtraCode, OS);
 }
 
 // Force static initialization.
-extern "C" void LLVMInitializeWebAssemblyAsmPrinter() {
+extern "C" LLVM_EXPORT void LLVMInitializeWebAssemblyAsmPrinter() {
   RegisterAsmPrinter<WebAssemblyAsmPrinter> X(getTheWebAssemblyTarget32());
   RegisterAsmPrinter<WebAssemblyAsmPrinter> Y(getTheWebAssemblyTarget64());
 }

lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp

static cl::opt<bool> EnableEmException(
     cl::init(false));
 
 // Emscripten's asm.js-style setjmp/longjmp handling
 static cl::opt<bool> EnableEmSjLj(
     "enable-emscripten-sjlj",
     cl::desc("WebAssembly Emscripten-style setjmp/longjmp handling"),
     cl::init(false));
 
-extern "C" void LLVMInitializeWebAssemblyTarget() {
+extern "C" LLVM_EXPORT void LLVMInitializeWebAssemblyTarget() {
   // Register the target.
   RegisterTargetMachine<WebAssemblyTargetMachine> X(
       getTheWebAssemblyTarget32());
   RegisterTargetMachine<WebAssemblyTargetMachine> Y(
       getTheWebAssemblyTarget64());
 
   // Register backend passes
   auto &PR = *PassRegistry::getPassRegistry();

lib/Target/X86/AsmParser/X86AsmParser.cpp

 bool X86AsmParser::parseDirectiveFPOEndProc(SMLoc L) {
   MCAsmParser &Parser = getParser();
   if (Parser.parseEOL("unexpected tokens"))
     return addErrorSuffix(" in '.cv_fpo_endproc' directive");
   return getTargetStreamer().emitFPOEndProc(L);
 }
 
 // Force static initialization.
-extern "C" void LLVMInitializeX86AsmParser() {
+extern "C" LLVM_EXPORT void LLVMInitializeX86AsmParser() {
   RegisterMCAsmParser<X86AsmParser> X(getTheX86_32Target());
   RegisterMCAsmParser<X86AsmParser> Y(getTheX86_64Target());
 }
 
 #define GET_REGISTER_MATCHER
 #define GET_MATCHER_IMPLEMENTATION
 #define GET_SUBTARGET_FEATURE_NAME
 #include "X86GenAsmMatcher.inc"

lib/Target/X86/Disassembler/X86Disassembler.cpp

 
 static MCDisassembler *createX86Disassembler(const Target &T,
                                              const MCSubtargetInfo &STI,
                                              MCContext &Ctx) {
   std::unique_ptr<const MCInstrInfo> MII(T.createMCInstrInfo());
   return new X86GenericDisassembler(STI, Ctx, std::move(MII));
 }
 
-extern "C" void LLVMInitializeX86Disassembler() {
+extern "C" LLVM_EXPORT void LLVMInitializeX86Disassembler() {
   // Register the disassembler.
   TargetRegistry::RegisterMCDisassembler(getTheX86_32Target(),
                                          createX86Disassembler);
   TargetRegistry::RegisterMCDisassembler(getTheX86_64Target(),
                                          createX86Disassembler);
 }

lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp

 
 } // end of namespace llvm
 
 static MCInstrAnalysis *createX86MCInstrAnalysis(const MCInstrInfo *Info) {
   return new X86_MC::X86MCInstrAnalysis(Info);
 }
 
 // Force static initialization.
-extern "C" void LLVMInitializeX86TargetMC() {
+extern "C" LLVM_EXPORT void LLVMInitializeX86TargetMC() {
   for (Target *T : {&getTheX86_32Target(), &getTheX86_64Target()}) {
     // Register the MC asm info.
     RegisterMCAsmInfoFn X(*T, createX86MCAsmInfo);
 
     // Register the MC instruction info.
     TargetRegistry::RegisterMCInstrInfo(*T, createX86MCInstrInfo);
 
     // Register the MC register info.

lib/Target/X86/TargetInfo/X86TargetInfo.cpp

Target &llvm::getTheX86_32Target() {
   static Target TheX86_32Target;
   return TheX86_32Target;
 }
 Target &llvm::getTheX86_64Target() {
   static Target TheX86_64Target;
   return TheX86_64Target;
 }
 
-extern "C" void LLVMInitializeX86TargetInfo() {
+extern "C" LLVM_EXPORT void LLVMInitializeX86TargetInfo() {
   RegisterTarget<Triple::x86, /*HasJIT=*/true> X(
       getTheX86_32Target(), "x86", "32-bit X86: Pentium-Pro and above", "X86");
 
   RegisterTarget<Triple::x86_64, /*HasJIT=*/true> Y(
       getTheX86_64Target(), "x86-64", "64-bit X86: EM64T and AMD64", "X86");
 }

lib/Target/X86/X86AsmPrinter.cpp

void X86AsmPrinter::EmitEndOfAsmFile(Module &M) {
   }
 }
 
 //===----------------------------------------------------------------------===//
 // Target Registry Stuff
 //===----------------------------------------------------------------------===//
 
 // Force static initialization.
-extern "C" void LLVMInitializeX86AsmPrinter() {
+extern "C" LLVM_EXPORT void LLVMInitializeX86AsmPrinter() {
   RegisterAsmPrinter<X86AsmPrinter> X(getTheX86_32Target());
   RegisterAsmPrinter<X86AsmPrinter> Y(getTheX86_64Target());
 }

lib/Target/X86/X86TargetMachine.cpp

static cl::opt<bool> EnableMachineCombinerPass("x86-machine-combiner",
                                cl::desc("Enable the machine combiner pass"),
                                cl::init(true), cl::Hidden);
 
 static cl::opt<bool> EnableCondBrFoldingPass("x86-condbr-folding",
                                cl::desc("Enable the conditional branch "
                                         "folding pass"),
                                cl::init(true), cl::Hidden);
 
-extern "C" void LLVMInitializeX86Target() {
+extern "C" LLVM_EXPORT void LLVMInitializeX86Target() {
   // Register the target.
   RegisterTargetMachine<X86TargetMachine> X(getTheX86_32Target());
   RegisterTargetMachine<X86TargetMachine> Y(getTheX86_64Target());
 
   PassRegistry &PR = *PassRegistry::getPassRegistry();
   initializeGlobalISel(PR);
   initializeWinEHStatePassPass(PR);
   initializeFixupBWInstPassPass(PR);

lib/Target/XCore/Disassembler/XCoreDisassembler.cpp

 }
 
 static MCDisassembler *createXCoreDisassembler(const Target &T,
                                                const MCSubtargetInfo &STI,
                                                MCContext &Ctx) {
   return new XCoreDisassembler(STI, Ctx);
 }
 
-extern "C" void LLVMInitializeXCoreDisassembler() {
+extern "C" LLVM_EXPORT void LLVMInitializeXCoreDisassembler() {
   // Register the disassembler.
   TargetRegistry::RegisterMCDisassembler(getTheXCoreTarget(),
                                          createXCoreDisassembler);
 }

lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp

 static MCTargetStreamer *createTargetAsmStreamer(MCStreamer &S,
                                                  formatted_raw_ostream &OS,
                                                  MCInstPrinter *InstPrint,
                                                  bool isVerboseAsm) {
   return new XCoreTargetAsmStreamer(S, OS);
 }
 
 // Force static initialization.
-extern "C" void LLVMInitializeXCoreTargetMC() {
+extern "C" LLVM_EXPORT void LLVMInitializeXCoreTargetMC() {
   // Register the MC asm info.
   RegisterMCAsmInfoFn X(getTheXCoreTarget(), createXCoreMCAsmInfo);
 
   // Register the MC instruction info.
   TargetRegistry::RegisterMCInstrInfo(getTheXCoreTarget(),
                                       createXCoreMCInstrInfo);
 
   // Register the MC register info.

lib/Target/XCore/TargetInfo/XCoreTargetInfo.cpp

 #include "llvm/Support/TargetRegistry.h"
 using namespace llvm;
 
 Target &llvm::getTheXCoreTarget() {
   static Target TheXCoreTarget;
   return TheXCoreTarget;
 }
 
-extern "C" void LLVMInitializeXCoreTargetInfo() {
+extern "C" LLVM_EXPORT void LLVMInitializeXCoreTargetInfo() {
   RegisterTarget<Triple::xcore> X(getTheXCoreTarget(), "xcore", "XCore",
                                   "XCore");
 }

lib/Target/XCore/XCoreAsmPrinter.cpp

void XCoreAsmPrinter::EmitInstruction(const MachineInstr *MI) {
 
   MCInst TmpInst;
   MCInstLowering.Lower(MI, TmpInst);
 
   EmitToStreamer(*OutStreamer, TmpInst);
 }
 
 // Force static initialization.
-extern "C" void LLVMInitializeXCoreAsmPrinter() {
+extern "C" LLVM_EXPORT void LLVMInitializeXCoreAsmPrinter() {
   RegisterAsmPrinter<XCoreAsmPrinter> X(getTheXCoreTarget());
 }

lib/Target/XCore/XCoreTargetMachine.cpp

bool XCorePassConfig::addInstSelector() {
   return false;
 }
 
 void XCorePassConfig::addPreEmitPass() {
   addPass(createXCoreFrameToArgsOffsetEliminationPass(), false);
 }
 
 // Force static initialization.
-extern "C" void LLVMInitializeXCoreTarget() {
+extern "C" LLVM_EXPORT void LLVMInitializeXCoreTarget() {
   RegisterTargetMachine<XCoreTargetMachine> X(getTheXCoreTarget());
 }
 
 TargetTransformInfo
 XCoreTargetMachine::getTargetTransformInfo(const Function &F) {
   return TargetTransformInfo(XCoreTTIImpl(this, F));
 }

unittests/CMakeLists.txt

 add_custom_target(UnitTests)
 set_target_properties(UnitTests PROPERTIES FOLDER "Tests")
 
 function(add_llvm_unittest test_dirname)
   add_unittest(UnitTests ${test_dirname} ${ARGN})
 endfunction()
 function(add_llvm_unittest_with_input_files test_dirname)
   add_unittest_with_input_files(UnitTests ${test_dirname} ${ARGN})
 endfunction()
 
+# The target unittests may test APIs that aren't exported in libLLVM.so, so
+# we need to always link against the static libraries.
+function(add_llvm_target_unittest test_dir_name)
+  add_llvm_unittest(${test_dir_name} DISABLE_LLVM_LINK_LLVM_DYLIB ${ARGN})
+endfunction()
+
 add_subdirectory(ADT)
 add_subdirectory(Analysis)
 add_subdirectory(AsmParser)
 add_subdirectory(BinaryFormat)
 add_subdirectory(Bitcode)
 add_subdirectory(CodeGen)
 add_subdirectory(DebugInfo)
 add_subdirectory(Demangle)

unittests/Target/AArch64/CMakeLists.txt

set(LLVM_LINK_COMPONENTS
   GlobalISel
   MC
   MIRParser
   SelectionDAG
   Support
   Target
   )
 
-add_llvm_unittest(AArch64Tests
+add_llvm_target_unittest(AArch64Tests
   InstSizes.cpp
   )

unittests/Target/WebAssembly/CMakeLists.txt

 include_directories(
   ${CMAKE_SOURCE_DIR}/lib/Target/WebAssembly
   ${CMAKE_BINARY_DIR}/lib/Target/WebAssembly
   )
 
 set(LLVM_LINK_COMPONENTS
   CodeGen
   Core
   MC
   MIRParser
   WebAssemblyCodeGen
   WebAssemblyDesc
   WebAssemblyInfo
   )
 
-add_llvm_unittest(WebAssemblyTests
+add_llvm_target_unittest(WebAssemblyTests
   WebAssemblyExceptionInfoTest.cpp
   )

unittests/tools/llvm-exegesis/AArch64/CMakeLists.txt

 include_directories(
   ${LLVM_MAIN_SRC_DIR}/lib/Target/AArch64
   ${LLVM_BINARY_DIR}/lib/Target/AArch64
   ${LLVM_MAIN_SRC_DIR}/tools/llvm-exegesis/lib
   )
 
 set(LLVM_LINK_COMPONENTS
   MC
   MCParser
   Object
   Support
   Symbolize
   AArch64
   )
 
-add_llvm_unittest(LLVMExegesisAArch64Tests
+add_llvm_target_unittest(LLVMExegesisAArch64Tests
   TargetTest.cpp
   )
 target_link_libraries(LLVMExegesisAArch64Tests PRIVATE
   LLVMExegesis
   LLVMExegesisAArch64)

unittests/tools/llvm-exegesis/ARM/CMakeLists.txt

 include_directories(
   ${LLVM_MAIN_SRC_DIR}/lib/Target/ARM
   ${LLVM_BINARY_DIR}/lib/Target/ARM
   ${LLVM_MAIN_SRC_DIR}/tools/llvm-exegesis/lib
   )
 
 set(LLVM_LINK_COMPONENTS
   MC
   MCParser
   Object
   Support
   Symbolize
   ARM
   )
 
-add_llvm_unittest(LLVMExegesisARMTests
+add_llvm_target_unittest(LLVMExegesisARMTests
   AssemblerTest.cpp
   )
 target_link_libraries(LLVMExegesisARMTests PRIVATE LLVMExegesis)

unittests/tools/llvm-exegesis/PowerPC/CMakeLists.txt

 include_directories(
   ${LLVM_MAIN_SRC_DIR}/lib/Target/PowerPC
   ${LLVM_BINARY_DIR}/lib/Target/PowerPC
   ${LLVM_MAIN_SRC_DIR}/tools/llvm-exegesis/lib
   )
 
 set(LLVM_LINK_COMPONENTS
   MC
   MCParser
   Object
   Support
   Symbolize
   PowerPC
   )
 
-add_llvm_unittest(LLVMExegesisPowerPCTests
+add_llvm_target_unittest(LLVMExegesisPowerPCTests
   AnalysisTest.cpp
   TargetTest.cpp
   )
 target_link_libraries(LLVMExegesisPowerPCTests PRIVATE
   LLVMExegesis
   LLVMExegesisPowerPC)

unittests/tools/llvm-exegesis/X86/CMakeLists.txt

 include_directories(
   ${LLVM_MAIN_SRC_DIR}/lib/Target/X86
   ${LLVM_BINARY_DIR}/lib/Target/X86
   ${LLVM_MAIN_SRC_DIR}/tools/llvm-exegesis/lib
   )
 
 set(LLVM_LINK_COMPONENTS
   MC
   MCParser
   Object
   Support
   Symbolize
   X86
   )
 
-add_llvm_unittest(LLVMExegesisX86Tests
+add_llvm_target_unittest(LLVMExegesisX86Tests
   AssemblerTest.cpp
   AnalysisTest.cpp
   BenchmarkResultTest.cpp
   SnippetGeneratorTest.cpp
   RegisterAliasingTest.cpp
   TargetTest.cpp
   )
 target_link_libraries(LLVMExegesisX86Tests PRIVATE
   LLVMExegesis
   LLVMExegesisX86)

utils/unittest/CMakeLists.txt

add_llvm_library(gtest
   LINK_COMPONENTS
   Support # Depends on llvm::raw_ostream
 
   # This is a library meant only for the build tree.
   BUILDTREE_ONLY
 )
 
 add_subdirectory(UnitTestMain)
+
+# When LLVM_LINK_LLVM_DYLIB is enabled, libLLVM.so is added to the interface
+# link libraries for gtest and gtest_main.  This means that any target, like
+# unittests for example, that links against gtest will be forced to link
+# against libLLVM.so.  In some cases we may want to statically unittests if they
+# need access to symbols that are marked private in libLLVM.so.  The only
+# way we can make this work is to remove libLLVM.so from the list of interface
+# link libraries for gtest and then make gtest users responsible for explicitly
+# adding libLLVM.so to their targets link libraries if they need it.
+
+function (gtest_remove_dylib_from_link_interface target)
+  get_target_property(interface_libs ${target} INTERFACE_LINK_LIBRARIES)
+  if (interface_libs)
+    list(REMOVE_ITEM interface_libs LLVM)
+    set_target_properties(${target} PROPERTIES INTERFACE_LINK_LIBRARIES "${interface_libs}")
+  endif()
+endfunction()
+
+gtest_remove_dylib_from_link_interface(gtest)
+gtest_remove_dylib_from_link_interface(gtest_main)