[RISCV] Add --print-supported-extensions support

[4vtomat]

Summary

This revision supports --print-supported-extensions,
it prints out all of the extensions and corresponding version supported.

[craig.topper]

clang/lib/Driver/Driver.cpp

110

Can we declare this in RISCVISAInfo.h and include that here?

llvm/lib/Support/RISCVISAInfo.cpp

142

This function is not in the llvm namespace or a namespace nested under it.

[craig.topper]

llvm/lib/Support/RISCVISAInfo.cpp

152

Question for the community. Should we maintain SupportedExtensions in the order we want printed instead of sorting?

[kito-cheng]

clang/lib/Driver/Driver.cpp

4229–4233

Plz did the similar action like what OPT_print_supported_cpus did instead of just exti 0

And check the triple to make sure only invoke that for riscv

llvm/lib/Support/RISCVISAInfo.cpp

151

I would prefer that print by canonical order *IF* we want to print in some order.

And then you can just use RISCVISAInfo::OrderedExtensionMap here.

[asb]

llvm/lib/Support/RISCVISAInfo.cpp

152

+1 on Kito's suggestion to print by the canonical order.

[4vtomat]

Resolved Craig and Kito's comments.

[craig.topper]

llvm/lib/Support/RISCVISAInfo.cpp

143

void llvm::RISCVMarchHelp and remove the namespace llvm {

[MaskRay]

clang/test/Driver/print-supported-marchs.c

17

Use -NEXT: whenever applicable so that new extensions can be caught by the test.

clang/tools/driver/cc1_main.cpp

197

The check should be added to lib/Driver

201

riscvMarchHelp

Use camelCase for new function names.

llvm/lib/Support/RISCVISAInfo.cpp

162

Move '\n' into the "Use -march to specify the target's extension.\n..." string.

[craig.topper]

clang/tools/driver/cc1_main.cpp

197

RISCV -> RISC-V in user facing messages.

[4vtomat]

Resolved MaskRay and Craig's comments.

[craig.topper]

clang/tools/driver/cc1_main.cpp

189

Why do we need to lookup the TargetRegistry?

[craig.topper]

clang/include/clang/Driver/Options.td

4346

Maybe this should be -print-supported-extensions to match RISC-V terminology?

4349

There's no default target behavior. It's always RISC-V.

clang/lib/Driver/Driver.cpp

4232

"-march=help is only supported for RISC-V"

[4vtomat]

Resolved Craig's comments.

[craig.topper]

LGTM

[MaskRay]

Aliasing -march=help to --print-supported-extensions looks weird. I think this patch should remove -march=help.

clang/test/Driver/print-supported-marchs.c

2

The filename should be fixed.

[MaskRay]

Created a GCC feature request: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109349

The subject and summary should be fixed and -march=help references should be removed.

clang/lib/Driver/Driver.cpp

4232

The convention is to use Diag(...).

4236

Why is the code needed? Can --print-supported-extensions reuse the approach of OPT_print_supported_cpus?

[kito-cheng]

I would support have -march=help, but I know it's really not make scene to alias -march=help to --print-supported-extensions for other targets, what about redirect that in Driver.cpp for RISC-V only?

[craig.topper]

clang/lib/Driver/Driver.cpp

4236

@MaskRay are you just asking to use the same block of code for both cases?

[MaskRay]

clang/lib/Driver/Driver.cpp

4236

Yes, this should reuse some code with the OPT_print_supported_cpus handler.

[4vtomat]

Resolved MaskRay's comments.
Should we use @kito-cheng's approach to deal with -march=help? what do you think, @MaskRay ?

[MaskRay]

I hope that we add just one option, instead of aliases. Aliases are usually added for compatibility when something is deprecated or changed, not for new options.

My "Request Changes" status still holds. The patch hasn't fixed something obvious: the description mentions print-supported-marchs (well, it should really name the exact name, --print-supported-marchs, don't omit dashes) while the implementation uses ...extensions.

[4vtomat]

Rename clang/test/Driver/print-supported-marchs.c to clang/test/Driver/print-supported-extensions.c

[kito-cheng]

clang/tools/driver/cc1_main.cpp

187–188

Plz make sure only RISC-V print that, x86 or other target print RISC-V's ext is really weird.

[4vtomat]

clang/lib/Driver/Driver.cpp

110

Yes, we can.

clang/tools/driver/cc1_main.cpp

187–188

The check is in clang/lib/Driver/Driver.cpp:4225~

189

I forgot to remove lol~

[kito-cheng]

LGTM, consider about the GNU compatibility, I would that has -march=help form for that.

[craig.topper]

In D146054#4314766, @kito-cheng wrote:

LGTM, consider about the GNU compatibility, I would that has -march=help form for that.

Are you saying gcc supports march=help? Is that recent?

[MaskRay]

-march= -mcpu= -mtune= are from GCC and they traditionally have many opinions on the features.
If GCC is going to have -march=help, I think adding -march=help to Clang to match is fine.
But I'd really like to avoid aliases for non-compatibility reasons. They just cause confusion and make users undecided about which one is canonical.

[4vtomat]

Remove -march=help alias.

[kito-cheng]

GCC ins't implement yet, but planed, so add it later I think?

@4vtomat already drop -march=help, @MaskRay did you mind take a look again?

[MaskRay]

In D146054#4337866, @kito-cheng wrote:

GCC ins't implement yet, but planed, so add it later I think?

@4vtomat already drop -march=help, @MaskRay did you mind take a look again?

Done. But this update still doesn't look quite polished. If -march=help is dropped, at the very least the subject needs to updated.

clang/tools/driver/cc1_main.cpp

187

Use camelCase for new function names. StringRef TargetStr?

llvm/include/llvm/Support/RISCVISAInfo.h

26

This naming does not match the --print-supported-extensions option name.

llvm/lib/Support/RISCVISAInfo.cpp

143

For most --print-* options, the output goes to stdout instead of stderr.

[4vtomat]

Resolved MaskRay's comments.

[MaskRay]

Please also mark resolved comments as done, otherwise reviewers can presume that some comments are unresolved and don't necessarily give another round of reviews.

clang/test/Driver/print-supported-extensions.c

6 ↗

(On Diff #522411)

Use --implicit-check-not=warning: instead of // CHECK-NOT: warning: argument unused during compilation.

We additionally check that there is no warning and the warning doesn't come after the output from --print-supported-extensions.

6 ↗

(On Diff #522411)

For a file with just one prefix, conventionally we just use the default CHECK and omit --check-prefix.

Have you ever checked that the test detects issues? CHECK below are ignored with --check-prefix=CHECK-RISCV.

[MaskRay]

clang/test/Driver/print-supported-extensions.c

1 ↗

(On Diff #522411)

Some newer tests use /// to distinguish non-CHECK-non-RUN comments from others. This helps automation tools to catch wrong prefixes (e.g. with a typo) in comments and helps auto-generating checks in the future while retaining manual comments.

3 ↗

(On Diff #522411)

If you remove all and RISCV from LLVM_TARGETS_TO_BUILD, you can test whether this feature works without lib/Target/RISCV support. I suspect it works, so you may need another build for verification.

10 ↗

(On Diff #522411)

The formatting matters here. To test formatting see --strict-whitespace --match-full-lines (example: See llvm/test/tools/llvm-readobj/ELF/gnu-sections.txt): https://llvm.org/docs/CommandGuide/FileCheck.html

[4vtomat]

Sorry for late update.
Resolved MaskRay's comments, thanks for detailed review!

[4vtomat]

clang/test/Driver/print-supported-extensions.c

6 ↗

(On Diff #522411)

Oh, I missed it, CHECK-NEXT are all ignored...
thanks!!

[4vtomat]

clang/test/Driver/print-supported-extensions.c

3 ↗

(On Diff #522411)

No it cause an error if I use the command with the target without riscv such as:

bin/clang --target=aarch64 --print-supported-extensions
or
bin/clang --target=x86 --print-supported-extensions

[4vtomat]

Hi @MaskRay if you are available, please help me to check the revision, thanks!!

[MaskRay]

Sorry for the delay.

clang/include/clang/Frontend/FrontendOptions.h

284

288

stray change?

clang/test/Driver/print-supported-extensions.c

6 ↗

(On Diff #536947)

10 ↗

(On Diff #536947)

For --strict-whitespace --match-full-lines testing, we usually right align CHECK and CHECK-NEXT.

clang/tools/driver/cc1_main.cpp

187

printSupportedExtensions. Why does this function return a dummy return value?

You can do return printSupportedExtensions(), 0 below to save some lines.

llvm/lib/Support/RISCVISAInfo.cpp

143

I think outs() is more conventional. Most gcc --print-* options go to stdout. clang --print-supported-cpus deviates and we should not copy its issue.

[4vtomat]

Resolved MaskRay's comments, thanks for reviewing!!

[4vtomat]

Rebase

[MaskRay]

clang/lib/Driver/Driver.cpp

4248

no blank line here

clang/test/Driver/print-supported-extensions.c

93 ↗

(On Diff #545412)

//CHECK-EMPTY:

120 ↗

(On Diff #545412)

//CHECK-EMPTY:

clang/tools/driver/cc1_main.cpp

187

The call site should just call riscvExtensionsHelp so that this internal linkage function can be avoided.

190

one blank line

190

one blank line

llvm/lib/Support/RISCVISAInfo.cpp

148

clang-format will remove the space after {

[4vtomat]

Resolved MaskRay's comments.

clang/include/clang/Frontend/FrontendOptions.h

288

Oh, maybe it was added accidentally during rebase lol~

clang/test/Driver/print-supported-extensions.c

10 ↗

(On Diff #536947)

Oh, I got it, thanks!

clang/tools/driver/cc1_main.cpp

187

This is a good idea, return in its caller is much clear for it's intension!

187

Yeah, good idea!

llvm/lib/Support/RISCVISAInfo.cpp

143

Sure, I agree to keep it conventional, since I was following --print-supported-cpus so I made it this way, thank you for pointing out this!

[4vtomat]

Updated test case.

[4vtomat]

Ping

[MaskRay]

I think the best place to test RISCVISAInfo.cpp is llvm/unittests/Support/RISCVISAInfoTest.cpp.

clang/test/Driver/print-supported-extensions.c can test just a few lines (there will be some overlap with the testing in llvm/unittests/Support/RISCVISAInfoTest.cpp), so that changes to RISC-V extensions will generally not require updates to clang/test/Driver/print-supported-extensions.c

clang/test/Driver/print-supported-extensions.c

6 ↗

(On Diff #545500)

Now that D156363 is stable, we can replace FileCheck --implicit-check-not=warning: with %clang -Werror.

llvm/lib/Support/RISCVISAInfo.cpp

148

Not done.

[4vtomat]

In D146054#4586067, @MaskRay wrote:

I think the best place to test RISCVISAInfo.cpp is llvm/unittests/Support/RISCVISAInfoTest.cpp.

clang/test/Driver/print-supported-extensions.c can test just a few lines (there will be some overlap with the testing in llvm/unittests/Support/RISCVISAInfoTest.cpp), so that changes to RISC-V extensions will generally not require updates to clang/test/Driver/print-supported-extensions.c

The goal of this patch is to list the supported extensions and their versions by providing an option, so I guess clang/test/Driver/print-supported-extensions.c aims differently with llvm/unittests/Support/RISCVISAInfoTest.cpp which is testing the functionalities in RISCVISAInfoTest.cpp.
clang/test/Driver/print-supported-extensions.c only tracks the extensions added and the their version changes and riscvExtensionsHelp in llvm/lib/Support/RISCVISAInfo.cpp doesn't have any input or output as well as any side effect, it only reads SupportedExtensions and SupportedExperimentalExtensions and dump the information.
So I think clang/test/Driver/print-supported-extensions.c is enough for this patch?

[4vtomat]

1. Apply clang-format for this patch
2. Replace FileCheck --implicit-check-not=warning: with %clang -Werror

[MaskRay]

In D146054#4587210, @4vtomat wrote:

In D146054#4586067, @MaskRay wrote:

I think the best place to test RISCVISAInfo.cpp is llvm/unittests/Support/RISCVISAInfoTest.cpp.

clang/test/Driver/print-supported-extensions.c can test just a few lines (there will be some overlap with the testing in llvm/unittests/Support/RISCVISAInfoTest.cpp), so that changes to RISC-V extensions will generally not require updates to clang/test/Driver/print-supported-extensions.c

The goal of this patch is to list the supported extensions and their versions by providing an option, so I guess clang/test/Driver/print-supported-extensions.c aims differently with llvm/unittests/Support/RISCVISAInfoTest.cpp which is testing the functionalities in RISCVISAInfoTest.cpp.
clang/test/Driver/print-supported-extensions.c only tracks the extensions added and the their version changes and riscvExtensionsHelp in llvm/lib/Support/RISCVISAInfo.cpp doesn't have any input or output as well as any side effect, it only reads SupportedExtensions and SupportedExperimentalExtensions and dump the information.
So I think clang/test/Driver/print-supported-extensions.c is enough for this patch?

My comment is about: the test is placed at the wrong layer. See https://maskray.me/blog/2021-08-08-toolchain-testing#the-test-checks-at-the-wrong-layer

I don't want that RISC-V development in LLVM causes repeated changes to clang/test/Driver.

[4vtomat]

In D146054#4596571, @MaskRay wrote:

In D146054#4587210, @4vtomat wrote:

In D146054#4586067, @MaskRay wrote:

I think the best place to test RISCVISAInfo.cpp is llvm/unittests/Support/RISCVISAInfoTest.cpp.

clang/test/Driver/print-supported-extensions.c can test just a few lines (there will be some overlap with the testing in llvm/unittests/Support/RISCVISAInfoTest.cpp), so that changes to RISC-V extensions will generally not require updates to clang/test/Driver/print-supported-extensions.c

The goal of this patch is to list the supported extensions and their versions by providing an option, so I guess clang/test/Driver/print-supported-extensions.c aims differently with llvm/unittests/Support/RISCVISAInfoTest.cpp which is testing the functionalities in RISCVISAInfoTest.cpp.
clang/test/Driver/print-supported-extensions.c only tracks the extensions added and the their version changes and riscvExtensionsHelp in llvm/lib/Support/RISCVISAInfo.cpp doesn't have any input or output as well as any side effect, it only reads SupportedExtensions and SupportedExperimentalExtensions and dump the information.
So I think clang/test/Driver/print-supported-extensions.c is enough for this patch?

My comment is about: the test is placed at the wrong layer. See https://maskray.me/blog/2021-08-08-toolchain-testing#the-test-checks-at-the-wrong-layer

I don't want that RISC-V development in LLVM causes repeated changes to clang/test/Driver.

Got it, thanks!

[4vtomat]

Resolved MaskRay's comments.

[MaskRay]

clang/include/clang/Driver/Options.td

4347

CC1Option/CoreOption has been removed. Please rebase. Visibility<[ClangOption, CC1Option, CLOption]>,

Remove Group<CompileOnly_Group>. We don't need a workaround to claim the option in the case of clang -xxx a.o

clang/include/clang/Driver/Options.td

 def darwin_target_variant : Separate<["-"], "darwin-target-variant">,
   Flags<[NoXarchOption, CoreOption]>,
   HelpText<"Generate code for an additional runtime variant of the deployment target">;
 def print_supported_cpus : Flag<["-", "--"], "print-supported-cpus">,
   Group<CompileOnly_Group>, Flags<[CC1Option, CoreOption]>,
   HelpText<"Print supported cpu models for the given target (if target is not specified,"
            " it will print the supported cpus for the default target)">,
   MarshallingInfoFlag<FrontendOpts<"PrintSupportedCPUs">>;
+def print_supported_marchs : Flag<["-", "--"], "print-supported-marchs">,
+  Group<CompileOnly_Group>, Flags<[CC1Option, CoreOption]>,
+  HelpText<"Print supported marchs for the given target (if target is not specified,"
+           " it will print the supported marchs for the default target)">,
+  MarshallingInfoFlag<FrontendOpts<"PrintSupportedMarchs">>;
 def : Flag<["-"], "mcpu=help">, Alias<print_supported_cpus>;
 def : Flag<["-"], "mtune=help">, Alias<print_supported_cpus>;
+def : Flag<["-"], "march=help">, Alias<print_supported_marchs>;
 def time : Flag<["-"], "time">,
   HelpText<"Time individual commands">;
 def traditional_cpp : Flag<["-", "--"], "traditional-cpp">, Flags<[CC1Option]>,
   HelpText<"Enable some traditional CPP emulation">,
   MarshallingInfoFlag<LangOpts<"TraditionalCPP">>;
 def traditional : Flag<["-", "--"], "traditional">;
 def trigraphs : Flag<["-", "--"], "trigraphs">, Alias<ftrigraphs>,
   HelpText<"Process trigraph sequences">;

clang/include/clang/Frontend/FrontendOptions.h

 //===- FrontendOptions.h ----------------------------------------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
public:
   unsigned ShowHelp : 1;
 
   /// Show frontend performance metrics and statistics.
   unsigned ShowStats : 1;
 
   /// print the supported cpus for the current target
   unsigned PrintSupportedCPUs : 1;
 
+  /// print the supported marchs for the current target
+  unsigned PrintSupportedMarchs : 1;
+
   /// Output time trace profile.
   unsigned TimeTrace : 1;
 
   /// Show the -version text.
   unsigned ShowVersion : 1;
 
   /// Apply fixes even if there are unfixable errors.
   unsigned FixWhatYouCan : 1;
 
   /// Apply fixes only for warnings.

clang/lib/Driver/Driver.cpp

 //===--- Driver.cpp - Clang GCC Compatible Driver -------------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 

 #if LLVM_ON_UNIX
 #include <unistd.h> // getpid
 #endif
 
 using namespace clang::driver;
 using namespace clang;
 using namespace llvm::opt;
 
 static std::optional<llvm::Triple> getOffloadTargetTriple(const Driver &D,
                                                           const ArgList &Args) {
   auto OffloadTargets = Args.getAllArgValues(options::OPT_offload_EQ);
   // Offload compilation flow does not support multiple targets for now. We
   // need the HIPActionBuilder (and possibly the CudaActionBuilder{,Base}too)
   // to support multiple tool chains first.
   switch (OffloadTargets.size()) {
   default:
     D.Diag(diag::err_drv_only_one_offload_target_supported);
bool Driver::HandleImmediateArgs(const Compilation &C) {
   if (C.getArgs().hasArg(options::OPT__version)) {
     // Follow gcc behavior and use stdout for --version and stderr for -v.
     PrintVersion(C, llvm::outs());
     return false;
   }
 
   if (C.getArgs().hasArg(options::OPT_v) ||
       C.getArgs().hasArg(options::OPT__HASH_HASH_HASH) ||
-      C.getArgs().hasArg(options::OPT_print_supported_cpus)) {
+      C.getArgs().hasArg(options::OPT_print_supported_cpus) ||
+      C.getArgs().hasArg(options::OPT_print_supported_marchs)) {
     PrintVersion(C, llvm::errs());
     SuppressMissingInputWarning = true;
   }
 
   if (C.getArgs().hasArg(options::OPT_v)) {
     if (!SystemConfigDir.empty())
       llvm::errs() << "System configuration file directory: "
                    << SystemConfigDir << "\n";
if (Arg *A = Args.getLastArg(options::OPT_print_supported_cpus)) {
     Actions.clear();
     Action *InputAc = C.MakeAction<InputAction>(*A, types::TY_C);
     Actions.push_back(
         C.MakeAction<PrecompileJobAction>(InputAc, types::TY_Nothing));
     for (auto &I : Inputs)
       I.second->claim();
   }
 
+  // If --print-supported-marchs or -march=help is specified, call the helper
+  // function RISCVMarchHelp in RISCVISAInfo.cpp that prints out supported
+  // marchs and quits.
+  if (Arg *A = Args.getLastArg(options::OPT_print_supported_marchs)) {
+    // Use the -march=help flag as the dummy input to cc1.
+    Actions.clear();
+    Action *InputAc = C.MakeAction<InputAction>(*A, types::TY_C);
+    Actions.push_back(
+        C.MakeAction<PrecompileJobAction>(InputAc, types::TY_Nothing));
+    for (auto &I : Inputs)
+      I.second->claim();
+  }
+
   // Call validator for dxil when -Vd not in Args.
   if (C.getDefaultToolChain().getTriple().isDXIL()) {
     // Only add action when needValidation.
     const auto &TC =
         static_cast<const toolchains::HLSLToolChain &>(C.getDefaultToolChain());
     if (TC.requiresValidation(Args)) {
       Action *LastAction = Actions.back();
       Actions.push_back(C.MakeAction<BinaryAnalyzeJobAction>(
           LastAction, types::TY_DX_CONTAINER));
     }
   }
 
   // Claim ignored clang-cl options.
   Args.ClaimAllArgs(options::OPT_cl_ignored_Group);
 }
 
 /// Returns the canonical name for the offloading architecture when using a HIP

clang/test/Driver/print-supported-marchs.c

+// Test that --print-supported-marchs lists supported Marchs.
+
+// REQUIRES: riscv-registered-target
+
+// RUN: %clang --target=riscv64 --print-supported-marchs 2>&1 | \
+// RUN:   FileCheck %s --check-prefix=CHECK-RISCV
+
+// Test -march=help alias.
+// RUN: %clang --target=riscv64 -march=help 2>&1 | \
+// RUN:   FileCheck %s --check-prefix=CHECK-RISCV
+
+// CHECK-NOT: warning: argument unused during compilation
+// CHECK-RISCV: Target: riscv64
+// CHECK-RISCV: All available -march extensions for RISC-V
+// CHECK-RISCV:   Name                Version
+// CHECK-RISCV:   i                   2.0
+// CHECK-RISCV:   e                   1.9
+// CHECK-RISCV:   m                   2.0
+// CHECK-RISCV:   a                   2.0
+// CHECK-RISCV:   f                   2.0
+// CHECK-RISCV:   d                   2.0
+// CHECK-RISCV:   c                   2.0
+// CHECK-RISCV:   v                   1.0
+// CHECK-RISCV:   h                   1.0
+// CHECK-RISCV:   svinval             1.0
+// CHECK-RISCV:   svnapot             1.0
+// CHECK-RISCV:   svpbmt              1.0
+// CHECK-RISCV:   zicbom              1.0
+// CHECK-RISCV:   zicbop              1.0
+// CHECK-RISCV:   zicboz              1.0
+// CHECK-RISCV:   zicsr               2.0
+// CHECK-RISCV:   zifencei            2.0
+// CHECK-RISCV:   zihintpause         2.0
+// CHECK-RISCV:   zmmul               1.0
+// CHECK-RISCV:   zawrs               1.0
+// CHECK-RISCV:   zfh                 1.0
+// CHECK-RISCV:   zfhmin              1.0
+// CHECK-RISCV:   zfinx               1.0
+// CHECK-RISCV:   zdinx               1.0
+// CHECK-RISCV:   zba                 1.0
+// CHECK-RISCV:   zbb                 1.0
+// CHECK-RISCV:   zbc                 1.0
+// CHECK-RISCV:   zbkb                1.0
+// CHECK-RISCV:   zbkc                1.0
+// CHECK-RISCV:   zbkx                1.0
+// CHECK-RISCV:   zbs                 1.0
+// CHECK-RISCV:   zk                  1.0
+// CHECK-RISCV:   zkn                 1.0
+// CHECK-RISCV:   zknd                1.0
+// CHECK-RISCV:   zkne                1.0
+// CHECK-RISCV:   zknh                1.0
+// CHECK-RISCV:   zkr                 1.0
+// CHECK-RISCV:   zks                 1.0
+// CHECK-RISCV:   zksed               1.0
+// CHECK-RISCV:   zksh                1.0
+// CHECK-RISCV:   zkt                 1.0
+// CHECK-RISCV:   zve32f              1.0
+// CHECK-RISCV:   zve32x              1.0
+// CHECK-RISCV:   zve64d              1.0
+// CHECK-RISCV:   zve64f              1.0
+// CHECK-RISCV:   zve64x              1.0
+// CHECK-RISCV:   zvl1024b            1.0
+// CHECK-RISCV:   zvl128b             1.0
+// CHECK-RISCV:   zvl16384b           1.0
+// CHECK-RISCV:   zvl2048b            1.0
+// CHECK-RISCV:   zvl256b             1.0
+// CHECK-RISCV:   zvl32768b           1.0
+// CHECK-RISCV:   zvl32b              1.0
+// CHECK-RISCV:   zvl4096b            1.0
+// CHECK-RISCV:   zvl512b             1.0
+// CHECK-RISCV:   zvl64b              1.0
+// CHECK-RISCV:   zvl65536b           1.0
+// CHECK-RISCV:   zvl8192b            1.0
+// CHECK-RISCV:   zhinx               1.0
+// CHECK-RISCV:   zhinxmin            1.0
+// CHECK-RISCV:   xtheadba            1.0
+// CHECK-RISCV:   xtheadbb            1.0
+// CHECK-RISCV:   xtheadbs            1.0
+// CHECK-RISCV:   xtheadcmo           1.0
+// CHECK-RISCV:   xtheadcondmov       1.0
+// CHECK-RISCV:   xtheadfmemidx       1.0
+// CHECK-RISCV:   xtheadmac           1.0
+// CHECK-RISCV:   xtheadmemidx        1.0
+// CHECK-RISCV:   xtheadmempair       1.0
+// CHECK-RISCV:   xtheadsync          1.0
+// CHECK-RISCV:   xtheadvdot          1.0
+// CHECK-RISCV:   xventanacondops     1.0
+// CHECK-RISCV: Experimental extensions
+// CHECK-RISCV:   zihintntl           0.2
+// CHECK-RISCV:   zfa                 0.1
+// CHECK-RISCV:   zca                 1.0
+// CHECK-RISCV:   zcb                 1.0
+// CHECK-RISCV:   zcd                 1.0
+// CHECK-RISCV:   zcf                 1.0
+// CHECK-RISCV:   ztso                0.1
+// CHECK-RISCV:   zvfh                0.1
+// CHECK-RISCV: Use -march to specify the target's extension.
+// CHECK-RISCV: For example, clang -march=rv32i_v1p0

clang/tools/driver/cc1_main.cpp

 //===-- cc1_main.cpp - Clang CC1 Compiler Frontend ------------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //

 #include "llvm/Option/ArgList.h"
 #include "llvm/Option/OptTable.h"
 #include "llvm/Support/BuryPointer.h"
 #include "llvm/Support/Compiler.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/ManagedStatic.h"
 #include "llvm/Support/Path.h"
 #include "llvm/Support/Process.h"
+#include "llvm/Support/RISCVISAInfo.h"
 #include "llvm/Support/Signals.h"
 #include "llvm/Support/TargetSelect.h"
 #include "llvm/Support/TimeProfiler.h"
 #include "llvm/Support/Timer.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/Target/TargetMachine.h"
 #include <cstdio>
 
static int PrintSupportedCPUs(std::string TargetStr) {
   // the target machine will handle the mcpu printing
   llvm::TargetOptions Options;
   std::unique_ptr<llvm::TargetMachine> TheTargetMachine(
       TheTarget->createTargetMachine(TargetStr, "", "+cpuhelp", Options,
                                      std::nullopt));
   return 0;
 }
 
+/// Print supported marchs of the given target.
+static int PrintSupportedMarchs(std::string TargetStr) {
+  std::string Error;
+  const llvm::Target *TheTarget =
+      llvm::TargetRegistry::lookupTarget(TargetStr, Error);
+  if (!TheTarget) {
+    llvm::errs() << Error;
+    return 1;
+  }
+
+  if (TargetStr.find("riscv") == std::string::npos) {
+    llvm::errs() << "The -march=help only supports for RISCV target.\n";
+    return 1;
+  }
+
+  llvm::RISCVMarchHelp();
+
+  return 0;
+}
+
+
 int cc1_main(ArrayRef<const char *> Argv, const char *Argv0, void *MainAddr) {
   ensureSufficientStack();
 
   std::unique_ptr<CompilerInstance> Clang(new CompilerInstance());
   IntrusiveRefCntPtr<DiagnosticIDs> DiagID(new DiagnosticIDs());
 
   // Register the support for object-file-wrapped Clang modules.
   auto PCHOps = Clang->getPCHContainerOperations();
if (Clang->getFrontendOpts().TimeTrace ||
     Clang->getFrontendOpts().TimeTrace = 1;
     llvm::timeTraceProfilerInitialize(
         Clang->getFrontendOpts().TimeTraceGranularity, Argv0);
   }
   // --print-supported-cpus takes priority over the actual compilation.
   if (Clang->getFrontendOpts().PrintSupportedCPUs)
     return PrintSupportedCPUs(Clang->getTargetOpts().Triple);
 
+  // --print-supported-marchs takes priority over the actual compilation.
+  if (Clang->getFrontendOpts().PrintSupportedMarchs)
+    return PrintSupportedMarchs(Clang->getTargetOpts().Triple);
+
   // Infer the builtin include path if unspecified.
   if (Clang->getHeaderSearchOpts().UseBuiltinIncludes &&
       Clang->getHeaderSearchOpts().ResourceDir.empty())
     Clang->getHeaderSearchOpts().ResourceDir =
       CompilerInvocation::GetResourcesPath(Argv0, MainAddr);
 
   // Create the actual diagnostics engine.
   Clang->createDiagnostics();

llvm/include/llvm/Support/RISCVISAInfo.h

 //===-- RISCVISAInfo.h - RISCV ISA Information ------------------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 

 
 namespace llvm {
 struct RISCVExtensionInfo {
   std::string ExtName;
   unsigned MajorVersion;
   unsigned MinorVersion;
 };
 
+void RISCVMarchHelp();
+
 class RISCVISAInfo {
 public:
   RISCVISAInfo(const RISCVISAInfo &) = delete;
   RISCVISAInfo &operator=(const RISCVISAInfo &) = delete;
 
   static bool compareExtension(const std::string &LHS, const std::string &RHS);
 
   /// Helper class for OrderedExtensionMap.

llvm/lib/Support/RISCVISAInfo.cpp

 //===-- RISCVISAInfo.cpp - RISCV Arch String Parser -------------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
static const RISCVSupportedExtension SupportedExperimentalExtensions[] = {
     {"zcb", RISCVExtensionVersion{1, 0}},
     {"zcd", RISCVExtensionVersion{1, 0}},
     {"zcf", RISCVExtensionVersion{1, 0}},
     {"zfa", RISCVExtensionVersion{0, 1}},
     {"zvfh", RISCVExtensionVersion{0, 1}},
     {"ztso", RISCVExtensionVersion{0, 1}},
 };
 
+namespace llvm {
+void RISCVMarchHelp() {
+  errs() << "All available -march extensions for RISC-V\n\n";
+  errs() << '\t' << left_justify("Name", 20) << "Version\n";
+
+  RISCVISAInfo::OrderedExtensionMap ExtMap;
+  for (const auto &E : SupportedExtensions)
+    ExtMap[E.Name] = { E.Name, E.Version.Major, E.Version.Minor };
+  for (const auto &E : ExtMap)
+    errs() << format("\t%-20s%d.%d\n", E.first.c_str(), E.second.MajorVersion,
+                     E.second.MinorVersion);
+
+  errs() << "\nExperimental extensions\n";
+  ExtMap.clear();
+  for (const auto &E : SupportedExperimentalExtensions)
+    ExtMap[E.Name] = { E.Name, E.Version.Major, E.Version.Minor };
+  for (const auto &E : ExtMap)
+    errs() << format("\t%-20s%d.%d\n", E.first.c_str(), E.second.MajorVersion,
+                     E.second.MinorVersion);
+
+  errs() << '\n';
+
+  errs() << "Use -march to specify the target's extension.\n"
+            "For example, clang -march=rv32i_v1p0\n";
+}
+}
+
 static bool stripExperimentalPrefix(StringRef &Ext) {
   return Ext.consume_front("experimental-");
 }
 
 // This function finds the first character that doesn't belong to a version
 // (e.g. zba1p0 is extension 'zba' of version '1p0'). So the function will
 // consume [0-9]*p[0-9]* starting from the backward. An extension name will not
 // end with a digit or the letter 'p', so this function will parse correctly.