[RISCV] Refactor the RISCV ISA extension info and target features to support multiple extension version

[zixuan-wu]

Summary

As RISC-V spec supports multiple extension version, refactor the SubtargetFeatures and RISCVISAInfo to support it.

RISCVISAInfo can parse arch string like -march with extension version, but related SubtargetFeatures don't contain version info in llvm side. For example, when enable 'm' extension with passing -mattr=+m, only a boolean flag to indicate that 'm' extension is enable. After this patch, '+m' would be default -mattr to represent default extension version. You can add new extension version by adding new SubtargetFeature like +m2p1.

It also handles arch string with version number of attribute section in obj file, including assemble and dis-assemble process.

[luismarques]

enable 'm' extension with passing mattr=+m After this patch, it would be -mattr=+m2p0.

It's not obvious to me that support for extension versions should mean or has to mean that we always explicitly specify the version. Why can't we keep supporting the option mattr=+m, which would be mapped to mattr=+m,+m2p0, or whatever the current default m version happens to be?

[zixuan-wu]

In D115921#3201346, @luismarques wrote:

enable 'm' extension with passing mattr=+m After this patch, it would be -mattr=+m2p0.

It's not obvious to me that support for extension versions should mean or has to mean that we always explicitly specify the version. Why can't we keep supporting the option mattr=+m, which would be mapped to mattr=+m,+m2p0, or whatever the current default m version happens to be?

OK. I think default version mattr is acceptable, and it also supports extension version functionality that we can use mattr=+m2p0. Then, testcases change would be clean and simple.

[zixuan-wu]

Address comments.

[jrtc27]

Do not bring back V draft 0.7. It is gone, it will never be supported again by LLVM under that name. The standard extension namespace is reserved for ratified extensions and development snapshots only, not old drafts vendors decided to ship. For those, non-standard extension names are needed.

[luismarques]

I think this would benefit from increased test coverage, namely to show that the mattr command-line options are properly handled. Some possible ideas:

• Tests with the correct extension versions (maybe add a test file that exercises the version for all extensions).
• Tests that show an error message with unsupported versions.
• A test that shows that something like mattr=+m,+m2p1 is allowed (or not).

Nit: fix the lint / no new line warnings.

[zixuan-wu]

In D115921#3206156, @jrtc27 wrote:

Do not bring back V draft 0.7. It is gone, it will never be supported again by LLVM under that name. The standard extension namespace is reserved for ratified extensions and development snapshots only, not old drafts vendors decided to ship. For those, non-standard extension names are needed.

I understood only ratified extension is accepted. Even for ratified extension, the version is going to evolve in the future. Anyway, no matter whether standard or non-standard extension, version support is needed. So this patch is for those. v0p7 is just used to go through the codepath to support multiple version and test as now there is no extension that is not the default version. I will change the test way.

[craig.topper]

llvm/include/llvm/Support/RISCVISAInfo.h

33

Use !(*this == Version)

llvm/lib/Support/RISCVISAInfo.cpp

154–156

This name was already bad and getting worse. It doesn't return a bool so shouldn't start with is. It should be called something like getExperimentalExtensionVersions.

341

Use !isExperimentalExtension(ExtName).empty()

404

!empty

481

Please fix this clang-format issue

llvm/lib/Target/RISCV/RISCVSubtarget.cpp

56 ↗

(On Diff #395803)

Add a reset method?

91 ↗

(On Diff #395803)

Why do we need to initialize things now but didn't before?

llvm/lib/Target/RISCV/RISCVSubtarget.h

38–58

Can we have a default constructor for RISCVExtensionVersion?

105–123

Add a helper method to RISCVExtensionVersion to check for a null version?

[zixuan-wu]

llvm/include/llvm/Support/RISCVISAInfo.h

33

Good taste.

llvm/lib/Target/RISCV/RISCVSubtarget.cpp

91 ↗

(On Diff #395803)

After the constructor is workable to initialize, no need for initializeEnvironment. So remove it.

[zixuan-wu]

Address all comments.

[zixuan-wu]

ping...

[jrtc27]

I'm unconvinced about landing something like this until there's an actual use case in the tree. How do we know this will actually work the way we want it to if there's nothing proving it? It's still unclear to me how exactly this is going to be represented in the target features, but also with RISC-V extensions not being changed once ratified any more (changes mean new extensions entirely, not new versions) I don't know whether this is actually needed or we can just deal with the couple of existing cases more simply.

llvm/lib/Support/RISCVISAInfo.cpp

48

Don't do this

[zixuan-wu]

In D115921#3224284, @jrtc27 wrote:

but also with RISC-V extensions not being changed once ratified any more (changes mean new extensions entirely, not new versions)

I don't think so. Or why is there version in RISC-V spec?
And not only for standard extension, but also it's needed in custom extension.

BTW, it's been supported to parse version of -march in clang side.

[zixuan-wu]

llvm/lib/Support/RISCVISAInfo.cpp

48

This nit will be removed before commit

[jrtc27]

In D115921#3224324, @zixuan-wu wrote:

In D115921#3224284, @jrtc27 wrote:

but also with RISC-V extensions not being changed once ratified any more (changes mean new extensions entirely, not new versions)

I don't think so. Or why is there version in RISC-V spec?

That was added years ago before there was any plan/policy for ratifying new extensions beyond the initial GC set. https://docs.google.com/presentation/d/1nQ5uFb39KA6gvUi5SReWfIQSiRN7hp6z7ZPfctE4mKk/edit#slide=id.p1 is the current lifecycle; note that only errata can be fixed after ratification, everything else requires a new extension (see the blue arrow and brown box below it). As far as I can tell, for new extensions it serves no purpose other than to distinguish draft specs from ratified ones.

And not only for standard extension, but also it's needed in custom extension.

Vendor extensions are going to be enough of a support pain in Clang. I sincerely hope they don't make life worse by defining multiple versions, rather than doing it properly and defining new extensions every time they add things. It's not just for the toolchain's benefit; it also improves forwards compatibility for kernels/loaders, as they won't know about new versions, but may know about existing versions, so if they support "Xvendorbase" then software that wants to take advantage of "Xvendorbase" and "Xvendornew" can still use "Xvendorbase", but if the kernel/loader only supports "Xvendor1p0" and software wants to use "Xvendor2p0" then it can't do anything, it'd need to be more careful and also have an "Xvendor1p0" implementation. Extending rather than redefining comes with real benefits.

BTW, it's been supported to parse version of -march in clang side.

It parses and checks the version, but it only allows the version of the extension Clang currently implements. Parsing the version is a hard requirement since it can be part of a valid arch string. Supporting multiple versions is not.

[jrtc27]

llvm/lib/Support/RISCVISAInfo.cpp

61

This one too?..

[zixuan-wu]

In D115921#3224329, @jrtc27 wrote:

In D115921#3224324, @zixuan-wu wrote:

In D115921#3224284, @jrtc27 wrote:

but also with RISC-V extensions not being changed once ratified any more (changes mean new extensions entirely, not new versions)

I don't think so. Or why is there version in RISC-V spec?

That was added years ago before there was any plan/policy for ratifying new extensions beyond the initial GC set. https://docs.google.com/presentation/d/1nQ5uFb39KA6gvUi5SReWfIQSiRN7hp6z7ZPfctE4mKk/edit#slide=id.p1 is the current lifecycle; note that only errata can be fixed after ratification, everything else requires a new extension (see the blue arrow and brown box below it). As far as I can tell, for new extensions it serves no purpose other than to distinguish draft specs from ratified ones.

And not only for standard extension, but also it's needed in custom extension.

Vendor extensions are going to be enough of a support pain in Clang. I sincerely hope they don't make life worse by defining multiple versions, rather than doing it properly and defining new extensions every time they add things. It's not just for the toolchain's benefit; it also improves forwards compatibility for kernels/loaders, as they won't know about new versions, but may know about existing versions, so if they support "Xvendorbase" then software that wants to take advantage of "Xvendorbase" and "Xvendornew" can still use "Xvendorbase", but if the kernel/loader only supports "Xvendor1p0" and software wants to use "Xvendor2p0" then it can't do anything, it'd need to be more careful and also have an "Xvendor1p0" implementation. Extending rather than redefining comes with real benefits.

BTW, it's been supported to parse version of -march in clang side.

It parses and checks the version, but it only allows the version of the extension Clang currently implements. Parsing the version is a hard requirement since it can be part of a valid arch string. Supporting multiple versions is not.

If I don't understand wrong, all you want to say is that the extension version is just for indication, and not for functionality? So the RV spec does not require compiler to support multi-version.

Anybody else has more comments about support multi-version extension? Or it has been decided already by RISC-V foundation?

[khchen]

In D115921#3206434, @luismarques wrote:

I think this would benefit from increased test coverage, namely to show that the mattr command-line options are properly handled. Some possible ideas:

• Tests with the correct extension versions (maybe add a test file that exercises the version for all extensions).
• Tests that show an error message with unsupported versions.
• A test that shows that something like mattr=+m,+m2p1 is allowed (or not).

Nit: fix the lint / no new line warnings.

I agree with @luismarques, we need increased test coverage.

BTW, I think this patch need to work with D113237 to show the ability on supporting multiple extension version.

Anybody else has more comments about support multi-version extension? Or it has been decided already by RISC-V foundation?

IMPO, supporting multi version for ratified extensions in compiler does make sense to me.
GCC already did it, but I'm not sure is there any related discussion before when gcc decided to support multi version extension (or misa-spec).

clang/test/Driver/riscv-arch-version.c

7

I'm thinking do we also need to have -target-feature +m2p0 here since we are going to support multiple extension version?

llvm/lib/Target/RISCV/RISCV.td

14

nit: It will be good to have a comment to talk about what's default version come from?
I guess the default is -misa-spec=2.2, right?

llvm/test/CodeGen/RISCV/attributes-version.ll

3

For example, we need to have test for llc -mattr=+m,+m2p0, and invalid test for mattr=+m,+m1p9

clang/lib/Basic/Targets/RISCV.cpp

if (ABIName == "ilp32e")
     Builder.defineMacro("__riscv_abi_rve");
 
   Builder.defineMacro("__riscv_arch_test");
 
   for (auto &Extension : ISAInfo->getExtensions()) {
     auto ExtName = Extension.first;
     auto ExtInfo = Extension.second;
     unsigned Version =
-        (ExtInfo.MajorVersion * 1000000) + (ExtInfo.MinorVersion * 1000);
+        (ExtInfo.Version.Major * 1000000) + (ExtInfo.Version.Minor * 1000);
 
     Builder.defineMacro(Twine("__riscv_", ExtName), Twine(Version));
   }
 
   if (ISAInfo->hasExtension("m")) {
     Builder.defineMacro("__riscv_mul");
     Builder.defineMacro("__riscv_div");
     Builder.defineMacro("__riscv_muldiv");
auto Result = llvm::StringSwitch<Optional<bool>>(Feature)
                     .Case("riscv", true)
                     .Case("riscv32", !Is64Bit)
                     .Case("riscv64", Is64Bit)
                     .Case("64bit", Is64Bit)
                     .Default(None);
   if (Result.hasValue())
     return Result.getValue();
 
-  if (ISAInfo->isSupportedExtensionFeature(Feature))
-    return ISAInfo->hasExtension(Feature);
-
-  return false;
+  return ISAInfo->hasExtensionWithVersion(Feature);
 }
 
 /// Perform initialization based on the user configured set of features.
 bool RISCVTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
                                            DiagnosticsEngine &Diags) {
   unsigned XLen = getTriple().isArch64Bit() ? 64 : 32;
   auto ParseResult = llvm::RISCVISAInfo::parseFeatures(XLen, Features);
   if (!ParseResult) {

clang/lib/Driver/ToolChains/Arch/RISCV.cpp

if (!ISAInfo) {
     handleAllErrors(ISAInfo.takeError(), [&](llvm::StringError &ErrMsg) {
       D.Diag(diag::err_drv_invalid_riscv_arch_name)
           << Arch << ErrMsg.getMessage();
     });
 
     return false;
   }
 
-  (*ISAInfo)->toFeatures(
-      Features, [&Args](const Twine &Str) { return Args.MakeArgString(Str); });
+  std::vector<std::string> ToFeatures;
+  (*ISAInfo)->toFeatures(ToFeatures);
+
+  for (const auto &Feature : ToFeatures)
+    Features.push_back(Args.MakeArgString("+" + Feature));
+
   return true;
 }
 
 // Get features except standard extension feature
 static void getRISCFeaturesFromMcpu(const Driver &D, const llvm::Triple &Triple,
                                     const llvm::opt::ArgList &Args,
                                     const llvm::opt::Arg *A, StringRef Mcpu,
                                     std::vector<StringRef> &Features) {

clang/test/Driver/riscv-arch-version.c

+// RUN: %clang -target riscv32-unknown-elf -march=rv32e1p9  -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-E1P9 %s
+// RV32-E1P9: "-target-feature" "+e"
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32im2p0  -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-M2P0 %s
+// RV32-M2P0: "-target-feature" "+m"
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32ia2p0  -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-A2P0 %s
+// RV32-A2P0: "-target-feature" "+a"
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32if2p0  -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-F2P0 %s
+// RV32-F2P0: "-target-feature" "+f"
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32ifd2p0  -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-D2P0 %s
+// RV32-D2P0: "-target-feature" "+f" "-target-feature" "+d"
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32ic2p0  -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-C2P0 %s
+// RV32-C2P0: "-target-feature" "+c"
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32iv0p10 -menable-experimental-extensions -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-EXPERIMENTAL-V0P10 %s
+// RV32-EXPERIMENTAL-V0P10: "-target-feature" "+experimental-v"
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32izba1p0 -menable-experimental-extensions -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBA1P0 %s
+// RV32-EXPERIMENTAL-ZBA1P0: "-target-feature" "+experimental-zba"
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32izbb1p0 -menable-experimental-extensions -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBB1P0 %s
+// RV32-EXPERIMENTAL-ZBB1P0: "-target-feature" "+experimental-zbb"
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32izbc1p0 -menable-experimental-extensions -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBC1P0 %s
+// RV32-EXPERIMENTAL-ZBC1P0: "-target-feature" "+experimental-zbc"
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32izbe0p93 -menable-experimental-extensions -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBE0P93 %s
+// RV32-EXPERIMENTAL-ZBE0P93: "-target-feature" "+experimental-zbe"
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32izbf0p93 -menable-experimental-extensions -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBF0P93 %s
+// RV32-EXPERIMENTAL-ZBF0P93: "-target-feature" "+experimental-zbf"
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32izbm0p93 -menable-experimental-extensions -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBM0P93 %s
+// RV32-EXPERIMENTAL-ZBM0P93: "-target-feature" "+experimental-zbm"
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32izbp0p93 -menable-experimental-extensions -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBP0P93 %s
+// RV32-EXPERIMENTAL-ZBP0P93: "-target-feature" "+experimental-zbp"
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32izbr0p93 -menable-experimental-extensions -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBR0P93 %s
+// RV32-EXPERIMENTAL-ZBR0P93: "-target-feature" "+experimental-zbr"
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32izbs1p0 -menable-experimental-extensions -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBS1P0 %s
+// RV32-EXPERIMENTAL-ZBS1P0: "-target-feature" "+experimental-zbs"
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32izbt0p93 -menable-experimental-extensions -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBT0P93 %s
+// RV32-EXPERIMENTAL-ZBT0P93: "-target-feature" "+experimental-zbt"
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32izvlsseg0p10 -menable-experimental-extensions -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-EXPERIMENTAL-ZVLSSEG0P10 %s
+// RV32-EXPERIMENTAL-ZVLSSEG0P10: "-target-feature" "+experimental-zvlsseg"
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32izfhmin0p1 -menable-experimental-extensions -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-EXPERIMENTAL-ZFHMIN0P1 %s
+// RV32-EXPERIMENTAL-ZFHMIN0P1: "-target-feature" "+experimental-zfhmin"
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32izfh0p1 -menable-experimental-extensions -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-EXPERIMENTAL-ZFH0P1 %s
+// RV32-EXPERIMENTAL-ZFH0P1: "-target-feature" "+experimental-zfh"
+
+// Error Check Blow.
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32e2p0  -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-E2P0 %s
+// RV32-E2P0: error: invalid arch name 'rv32e2p0'
+// RV32-E2P0: unsupported version number 2.0 for extension 'e'
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32im2p1  -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-M2P1 %s
+// RV32-M2P1: error: invalid arch name 'rv32im2p1'
+// RV32-M2P1: unsupported version number 2.1 for extension 'm'
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32ia2p1  -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-A2P1 %s
+// RV32-A2P1: error: invalid arch name 'rv32ia2p1'
+// RV32-A2P1: unsupported version number 2.1 for extension 'a'
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32if2p1  -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-F2P1 %s
+// RV32-F2P1: error: invalid arch name 'rv32if2p1'
+// RV32-F2P1: unsupported version number 2.1 for extension 'f'
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32id2p1  -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-D2P1 %s
+// RV32-D2P1: error: invalid arch name 'rv32id2p1'
+// RV32-D2P1: unsupported version number 2.1 for extension 'd'
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32ic2p1  -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-C2P1 %s
+// RV32-C2P1: error: invalid arch name 'rv32ic2p1'
+// RV32-C2P1: unsupported version number 2.1 for extension 'c'
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32iv0p7 -menable-experimental-extensions -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-EXPERIMENTAL-V0P7 %s
+// RV32-EXPERIMENTAL-V0P7: error: invalid arch name 'rv32iv0p7'
+// RV32-EXPERIMENTAL-V0P7: unsupported version number 0.7 for experimental extension 'v'
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32izba0p7 -menable-experimental-extensions -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBA0P7 %s
+// RV32-EXPERIMENTAL-ZBA0P7: error: invalid arch name 'rv32izba0p7'
+// RV32-EXPERIMENTAL-ZBA0P7: unsupported version number 0.7 for experimental extension 'zba'
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32izbb0p7 -menable-experimental-extensions -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBB0P7 %s
+// RV32-EXPERIMENTAL-ZBB0P7: error: invalid arch name 'rv32izbb0p7'
+// RV32-EXPERIMENTAL-ZBB0P7: unsupported version number 0.7 for experimental extension 'zbb'
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32izbc0p7 -menable-experimental-extensions -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBC0P7 %s
+// RV32-EXPERIMENTAL-ZBC0P7: error: invalid arch name 'rv32izbc0p7'
+// RV32-EXPERIMENTAL-ZBC0P7: unsupported version number 0.7 for experimental extension 'zbc'
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32izbe0p7 -menable-experimental-extensions -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBE0P7 %s
+// RV32-EXPERIMENTAL-ZBE0P7: error: invalid arch name 'rv32izbe0p7'
+// RV32-EXPERIMENTAL-ZBE0P7: unsupported version number 0.7 for experimental extension 'zbe'
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32izbf0p7 -menable-experimental-extensions -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBF0P7 %s
+// RV32-EXPERIMENTAL-ZBF0P7: error: invalid arch name 'rv32izbf0p7'
+// RV32-EXPERIMENTAL-ZBF0P7: unsupported version number 0.7 for experimental extension 'zbf'
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32izbm0p7 -menable-experimental-extensions -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBM0P7 %s
+// RV32-EXPERIMENTAL-ZBM0P7: error: invalid arch name 'rv32izbm0p7'
+// RV32-EXPERIMENTAL-ZBM0P7: unsupported version number 0.7 for experimental extension 'zbm'
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32izbp0p7 -menable-experimental-extensions -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBP0P7 %s
+// RV32-EXPERIMENTAL-ZBP0P7: error: invalid arch name 'rv32izbp0p7'
+// RV32-EXPERIMENTAL-ZBP0P7: unsupported version number 0.7 for experimental extension 'zbp'
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32izbr0p7 -menable-experimental-extensions -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBR0P7 %s
+// RV32-EXPERIMENTAL-ZBR0P7: error: invalid arch name 'rv32izbr0p7'
+// RV32-EXPERIMENTAL-ZBR0P7: unsupported version number 0.7 for experimental extension 'zbr'
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32izbs0p7 -menable-experimental-extensions -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBS0P7 %s
+// RV32-EXPERIMENTAL-ZBS0P7: error: invalid arch name 'rv32izbs0p7'
+// RV32-EXPERIMENTAL-ZBS0P7: unsupported version number 0.7 for experimental extension 'zbs'
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32izbt0p7 -menable-experimental-extensions -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBT0P7 %s
+// RV32-EXPERIMENTAL-ZBT0P7: error: invalid arch name 'rv32izbt0p7'
+// RV32-EXPERIMENTAL-ZBT0P7: unsupported version number 0.7 for experimental extension 'zbt'
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32izvlsseg0p1 -menable-experimental-extensions -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-EXPERIMENTAL-ZVLSSEG0P1 %s
+// RV32-EXPERIMENTAL-ZVLSSEG0P1: error: invalid arch name 'rv32izvlsseg0p1'
+// RV32-EXPERIMENTAL-ZVLSSEG0P1: unsupported version number 0.1 for experimental extension 'zvlsseg'
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32izfhmin0p7 -menable-experimental-extensions -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-EXPERIMENTAL-ZFHMIN0P7 %s
+// RV32-EXPERIMENTAL-ZFHMIN0P7: error: invalid arch name 'rv32izfhmin0p7'
+// RV32-EXPERIMENTAL-ZFHMIN0P7: unsupported version number 0.7 for experimental extension 'zfhmin'
+
+// RUN: %clang -target riscv32-unknown-elf -march=rv32izfh0p7 -menable-experimental-extensions -### %s -c 2>&1 | \
+// RUN:   FileCheck -check-prefix=RV32-EXPERIMENTAL-ZFH0P7 %s
+// RV32-EXPERIMENTAL-ZFH0P7: error: invalid arch name 'rv32izfh0p7'
+// RV32-EXPERIMENTAL-ZFH0P7: unsupported version number 0.7 for experimental extension 'zfh'

llvm/include/llvm/Support/RISCVISAInfo.h

 #include "llvm/ADT/StringRef.h"
 #include "llvm/Support/Error.h"
 
 #include <map>
 #include <string>
 #include <vector>
 
 namespace llvm {
+
+/// Represents the major and version number components of a RISC-V extension
+struct RISCVExtensionVersion {
+  unsigned Major;
+  unsigned Minor;
+
+  RISCVExtensionVersion() : Major(0), Minor(0) {}
+  RISCVExtensionVersion(unsigned Maj, unsigned Min) : Major(Maj), Minor(Min) {}
+
+  bool operator==(const RISCVExtensionVersion &Version) const {
+    return Major == Version.Major && Minor == Version.Minor;
+  }
+
+  bool operator!=(const RISCVExtensionVersion &Version) const {
+    return !(*this == Version);
+  }
+
+  bool operator<(const RISCVExtensionVersion &Version) const {
+    return (Major < Version.Major) ||
+           (Major == Version.Major && Minor < Version.Minor);
+  }
+
+  operator bool() const { return Major != 0 || Minor != 0; }
+};
+
 struct RISCVExtensionInfo {
   std::string ExtName;
-  unsigned MajorVersion;
-  unsigned MinorVersion;
+  RISCVExtensionVersion Version;
 };
 
 class RISCVISAInfo {
 public:
   RISCVISAInfo(const RISCVISAInfo &) = delete;
   RISCVISAInfo &operator=(const RISCVISAInfo &) = delete;
 
   static bool compareExtension(const std::string &LHS, const std::string &RHS);
 
   /// Helper class for OrderedExtensionMap.
   struct ExtensionComparator {
     bool operator()(const std::string &LHS, const std::string &RHS) const {
       return compareExtension(LHS, RHS);
     }
   };
 
   /// OrderedExtensionMap is std::map, it's specialized to keep entries
   /// in canonical order of extension.
   typedef std::map<std::string, RISCVExtensionInfo, ExtensionComparator>
       OrderedExtensionMap;
 
   /// Parse RISCV ISA info from arch string.
   static llvm::Expected<std::unique_ptr<RISCVISAInfo>>
   parseArchString(StringRef Arch, bool EnableExperimentalExtension,
-                  bool ExperimentalExtensionVersionCheck = true);
+                  bool ExperimentalExtensionVersionCheck = true,
+                  bool IgnoreUnknownExtension = false);
 
   /// Parse RISCV ISA info from feature vector.
   static llvm::Expected<std::unique_ptr<RISCVISAInfo>>
   parseFeatures(unsigned XLen, const std::vector<std::string> &Features);
 
   /// Convert RISCV ISA info to a feature vector.
-  void toFeatures(std::vector<StringRef> &Features,
-                  std::function<StringRef(const Twine &)> StrAlloc) const;
+  void toFeatures(std::vector<std::string> &Features) const;
 
   const OrderedExtensionMap &getExtensions() const { return Exts; };
 
   unsigned getXLen() const { return XLen; };
   unsigned getFLen() const { return FLen; };
 
   bool hasExtension(StringRef Ext) const;
+  bool hasExtensionWithVersion(StringRef Ext) const;
   std::string toString() const;
 
-  static bool isSupportedExtensionFeature(StringRef Ext);
+  static Optional<RISCVExtensionInfo>
+  isSupportedExtensionFeature(StringRef Ext);
   static bool isSupportedExtension(StringRef Ext);
   static bool isSupportedExtension(StringRef Ext, unsigned MajorVersion,
                                    unsigned MinorVersion);
 
 private:
   RISCVISAInfo(unsigned XLen) : XLen(XLen), FLen(0) {}
 
   unsigned XLen;

llvm/lib/Object/ELFObjectFile.cpp

 #include "llvm/Object/Error.h"
 #include "llvm/Support/ARMAttributeParser.h"
 #include "llvm/Support/ARMBuildAttributes.h"
 #include "llvm/Support/Endian.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/MathExtras.h"
 #include "llvm/Support/RISCVAttributeParser.h"
 #include "llvm/Support/RISCVAttributes.h"
+#include "llvm/Support/RISCVISAInfo.h"
 #include <algorithm>
 #include <cstddef>
 #include <cstdint>
 #include <memory>
 #include <string>
 #include <system_error>
 #include <utility>
 
if (Error E = getBuildAttributes(Attributes)) {
     return Features; // Keep "c" feature if there is one in PlatformFlags.
   }
 
   Optional<StringRef> Attr = Attributes.getAttributeString(RISCVAttrs::ARCH);
   if (Attr.hasValue()) {
     // The Arch pattern is [rv32|rv64][i|e]version(_[m|a|f|d|c]version)*
     // Version string pattern is (major)p(minor). Major and minor are optional.
     // For example, a version number could be 2p0, 2, or p92.
-    StringRef Arch = Attr.getValue();
-    if (Arch.consume_front("rv32"))
+    auto ParseResult =
+        llvm::RISCVISAInfo::parseArchString(Attr.getValue(), true, true, true);
+    if (!ParseResult)
+      return Features;
+
+    auto &ISAInfo = *ParseResult;
+
+    if (ISAInfo->getXLen() == 32)
       Features.AddFeature("64bit", false);
-    else if (Arch.consume_front("rv64"))
+    else if (ISAInfo->getXLen() == 64)
       Features.AddFeature("64bit");
 
-    while (!Arch.empty()) {
-      switch (Arch[0]) {
-      default:
-        break; // Ignore unexpected features.
-      case 'i':
-        Features.AddFeature("e", false);
-        break;
-      case 'd':
-        Features.AddFeature("f"); // D-ext will imply F-ext.
-        LLVM_FALLTHROUGH;
-      case 'e':
-      case 'm':
-      case 'a':
-      case 'f':
-      case 'c':
-        Features.AddFeature(Arch.take_front());
-        break;
-      }
+    if (PlatformFlags & ELF::EF_RISCV_RVC) {
+      Features.AddFeature("c", false);
 
-      // FIXME: Handle version numbers.
-      Arch = Arch.drop_until([](char c) { return c == '_' || c == '\0'; });
-      Arch = Arch.drop_while([](char c) { return c == '_'; });
-    }
+    std::vector<std::string> ToFeatures;
+    ISAInfo->toFeatures(ToFeatures);
+
+    for (const auto &Feature : ToFeatures)
+      Features.AddFeature(Feature);
   }
 
   return Features;
 }
 
 SubtargetFeatures ELFObjectFileBase::getFeatures() const {
   switch (getEMachine()) {
   case ELF::EM_MIPS:

llvm/lib/Support/RISCVISAInfo.cpp

 
 #include <array>
 #include <string>
 #include <vector>
 
 using namespace llvm;
 
 namespace {
-/// Represents the major and version number components of a RISC-V extension
-struct RISCVExtensionVersion {
-  unsigned Major;
-  unsigned Minor;
-};
 
 struct RISCVSupportedExtension {
   const char *Name;
   /// Supported version.
   RISCVExtensionVersion Version;
 };
 
 } // end anonymous namespace
 
 static constexpr StringLiteral AllStdExts = "mafdqlcbjtpvn";
 
 static const RISCVSupportedExtension SupportedExtensions[] = {
     {"i", RISCVExtensionVersion{2, 0}},
     {"e", RISCVExtensionVersion{1, 9}},
     {"m", RISCVExtensionVersion{2, 0}},
     {"a", RISCVExtensionVersion{2, 0}},
     {"f", RISCVExtensionVersion{2, 0}},
     {"d", RISCVExtensionVersion{2, 0}},
     {"c", RISCVExtensionVersion{2, 0}},
 };
 
 static const RISCVSupportedExtension SupportedExperimentalExtensions[] = {
     {"v", RISCVExtensionVersion{0, 10}},
+    //{"v", RISCVExtensionVersion{0, 7}},
     {"zba", RISCVExtensionVersion{1, 0}},
     {"zbb", RISCVExtensionVersion{1, 0}},
     {"zbc", RISCVExtensionVersion{1, 0}},
     {"zbe", RISCVExtensionVersion{0, 93}},
     {"zbf", RISCVExtensionVersion{0, 93}},
     {"zbm", RISCVExtensionVersion{0, 93}},
     {"zbp", RISCVExtensionVersion{0, 93}},
     {"zbr", RISCVExtensionVersion{0, 93}},
     {"zbs", RISCVExtensionVersion{1, 0}},
     {"zbt", RISCVExtensionVersion{0, 93}},
 
     {"zvlsseg", RISCVExtensionVersion{0, 10}},
+    //{"zvlsseg", RISCVExtensionVersion{0, 7}},
 
     {"zfhmin", RISCVExtensionVersion{0, 1}},
     {"zfh", RISCVExtensionVersion{0, 1}},
 };
 
+static Error getExtensionVersion(StringRef Ext, StringRef In, unsigned &Major,
+                                 unsigned &Minor, unsigned &ConsumeLength,
+                                 bool EnableExperimentalExtension,
+                                 bool ExperimentalExtensionVersionCheck);
+
 static bool stripExperimentalPrefix(StringRef &Ext) {
   return Ext.consume_front("experimental-");
 }
 
 // This function finds the first character that doesn't belong to a version
 // (e.g. zbe0p93 is extension 'zbe' of version '0p93'). So the function will
 // consume [0-9]*p[0-9]* starting from the backward. An extension name will not
 // end with a digit or the letter 'p', so this function will parse correctly.
static Optional<RISCVExtensionVersion> findDefaultVersion(StringRef ExtName) {
   }
   return None;
 }
 
 void RISCVISAInfo::addExtension(StringRef ExtName, unsigned MajorVersion,
                                 unsigned MinorVersion) {
   RISCVExtensionInfo Ext;
   Ext.ExtName = ExtName.str();
-  Ext.MajorVersion = MajorVersion;
-  Ext.MinorVersion = MinorVersion;
+  Ext.Version.Major = MajorVersion;
+  Ext.Version.Minor = MinorVersion;
   Exts[ExtName.str()] = Ext;
 }
 
 static StringRef getExtensionTypeDesc(StringRef Ext) {
   if (Ext.startswith("sx"))
     return "non-standard supervisor-level extension";
   if (Ext.startswith("s"))
     return "standard supervisor-level extension";
if (Ext.startswith("s"))
     return "s";
   if (Ext.startswith("x"))
     return "x";
   if (Ext.startswith("z"))
     return "z";
   return StringRef();
 }
 
-static Optional<RISCVExtensionVersion> isExperimentalExtension(StringRef Ext) {
-  auto ExtIterator =
-      llvm::find_if(SupportedExperimentalExtensions, FindByName(Ext));
-  if (ExtIterator == std::end(SupportedExperimentalExtensions))
+static std::vector<RISCVExtensionVersion>
+getExperimentalExtensionVersions(StringRef Ext) {
+  std::vector<RISCVExtensionVersion> Result;
+
+  for (auto &Extension : SupportedExperimentalExtensions) {
+    if (Extension.Name == Ext)
+      Result.push_back(Extension.Version);
+  }
+
+  return Result;
+}
+
+Optional<RISCVExtensionInfo>
+RISCVISAInfo::isSupportedExtensionFeature(StringRef Ext) {
+  stripExperimentalPrefix(Ext);
+
+  auto Pos = findFirstNonVersionCharacter(Ext) + 1;
+  StringRef Name(Ext.substr(0, Pos));
+  StringRef Vers(Ext.substr(Pos));
+
+  unsigned Major, Minor, ConsumeLength;
+  if (Vers.empty()) {
+    auto Version = findDefaultVersion(Name);
+    if (!Version)
       return None;
 
-  return ExtIterator->Version;
+    Major = Version->Major;
+    Minor = Version->Minor;
+
+  } else if (auto E = getExtensionVersion(Name, Vers, Major, Minor,
+                                          ConsumeLength, true, false)) {
+    // Not all features is related to ISA extension, like `relax` or
+    // `save-restore`, skip those feature.
+    consumeError(std::move(E));
+    return None;
   }
 
-bool RISCVISAInfo::isSupportedExtensionFeature(StringRef Ext) {
-  bool IsExperimental = stripExperimentalPrefix(Ext);
+  if (!isSupportedExtension(Name, Major, Minor))
+    return None;
 
-  if (IsExperimental)
-    return llvm::any_of(SupportedExperimentalExtensions, FindByName(Ext));
-  else
-    return llvm::any_of(SupportedExtensions, FindByName(Ext));
+  return RISCVExtensionInfo{Name.str(), {Major, Minor}};
 }
 
 bool RISCVISAInfo::isSupportedExtension(StringRef Ext) {
   return llvm::any_of(SupportedExtensions, FindByName(Ext)) ||
          llvm::any_of(SupportedExperimentalExtensions, FindByName(Ext));
 }
 
 bool RISCVISAInfo::isSupportedExtension(StringRef Ext, unsigned MajorVersion,
bool RISCVISAInfo::hasExtension(StringRef Ext) const {
   stripExperimentalPrefix(Ext);
 
   if (!isSupportedExtension(Ext))
     return false;
 
   return Exts.count(Ext.str()) != 0;
 }
 
+bool RISCVISAInfo::hasExtensionWithVersion(StringRef Ext) const {
+  auto Info = isSupportedExtensionFeature(Ext);
+  if (!Info)
+    return false;
+
+  auto ExtInfoIt = Exts.find(Info->ExtName);
+
+  if (ExtInfoIt == Exts.end())
+    return false;
+
+  return ExtInfoIt->second.Version.Major == Info->Version.Major &&
+         ExtInfoIt->second.Version.Minor == Info->Version.Minor;
+}
+
 // Get the rank for single-letter extension, lower value meaning higher
 // priority.
 static int singleLetterExtensionRank(char Ext) {
   switch (Ext) {
   case 'i':
     return -2;
   case 'e':
     return -1;
bool RISCVISAInfo::compareExtension(const std::string &LHS,
   int RHSRank = multiLetterExtensionRank(RHS);
   if (LHSRank != RHSRank)
     return LHSRank < RHSRank;
 
   // If the rank is same, it must be sorted by lexicographic order.
   return LHS < RHS;
 }
 
-void RISCVISAInfo::toFeatures(
-    std::vector<StringRef> &Features,
-    std::function<StringRef(const Twine &)> StrAlloc) const {
+static std::string addVersionSuffix(StringRef Suffix, StringRef ExtName,
+                                    unsigned Major, unsigned Minor) {
+  if (auto DefaultVersion = findDefaultVersion(ExtName))
+    if (DefaultVersion->Major == Major && DefaultVersion->Minor == Minor)
+      return (Twine(Suffix) + ExtName).str();
+
+  return (Suffix + ExtName + Twine(Major) + "p" + Twine(Minor)).str();
+}
+
+void RISCVISAInfo::toFeatures(std::vector<std::string> &Features) const {
+
   for (auto &Ext : Exts) {
     StringRef ExtName = Ext.first;
+    auto Extension = Ext.second;
+    unsigned Major = Ext.second.Version.Major;
+    unsigned Minor = Ext.second.Version.Minor;
 
     if (ExtName == "i")
       continue;
 
     if (ExtName == "zvlsseg") {
-      Features.push_back("+experimental-v");
-      Features.push_back("+experimental-zvlsseg");
-    } else if (isExperimentalExtension(ExtName)) {
-      Features.push_back(StrAlloc("+experimental-" + ExtName));
+      Features.push_back(addVersionSuffix("experimental-", "v", Major, Minor));
+      Features.push_back(
+          addVersionSuffix("experimental-", "zvlsseg", Major, Minor));
+    } else if (!getExperimentalExtensionVersions(ExtName).empty()) {
+      Features.push_back(
+          addVersionSuffix("experimental-", ExtName, Major, Minor));
     } else {
-      Features.push_back(StrAlloc("+" + ExtName));
+      Features.push_back(addVersionSuffix("", ExtName, Major, Minor));
     }
   }
 }
 
 // Extensions may have a version number, and may be separated by
 // an underscore '_' e.g.: rv32i2_m2.
 // Version number is divided into major and minor version numbers,
 // separated by a 'p'. If the minor version is 0 then 'p0' can be
static Error getExtensionVersion(StringRef Ext, StringRef In, unsigned &Major,
   // an underscore).
   if (Ext.size() > 1 && In.size()) {
     std::string Error =
         "multi-character extensions must be separated by underscores";
     return createStringError(errc::invalid_argument, Error);
   }
 
   // If experimental extension, require use of current version number number
-  if (auto ExperimentalExtension = isExperimentalExtension(Ext)) {
+  auto ExperimentalExtension = getExperimentalExtensionVersions(Ext);
+  if (!ExperimentalExtension.empty()) {
     if (!EnableExperimentalExtension) {
       std::string Error = "requires '-menable-experimental-extensions' for "
                           "experimental extension '" +
                           Ext.str() + "'";
       return createStringError(errc::invalid_argument, Error);
     }
 
     if (ExperimentalExtensionVersionCheck &&
         (MajorStr.empty() && MinorStr.empty())) {
       std::string Error =
           "experimental extension requires explicit version number `" +
           Ext.str() + "`";
       return createStringError(errc::invalid_argument, Error);
     }
 
-    auto SupportedVers = *ExperimentalExtension;
-    if (ExperimentalExtensionVersionCheck &&
-        (Major != SupportedVers.Major || Minor != SupportedVers.Minor)) {
-      std::string Error = "unsupported version number " + MajorStr.str();
-      if (!MinorStr.empty())
-        Error += "." + MinorStr.str();
-      Error += " for experimental extension '" + Ext.str() +
-               "'(this compiler supports " + utostr(SupportedVers.Major) + "." +
-               utostr(SupportedVers.Minor) + ")";
-      return createStringError(errc::invalid_argument, Error);
+    for (auto Version : ExperimentalExtension) {
+      if (Major == Version.Major && Minor == Version.Minor)
+        return Error::success();
+    }
+
+    if (!ExperimentalExtensionVersionCheck)
+      return Error::success();
+
+             "'(this compiler supports ";
+
+    ListSeparator LS;
+    for (auto Version : ExperimentalExtension) {
+      Error += LS;
+      Error += (utostr(Version.Major) + "." + utostr(Version.Minor));
     }
-    return Error::success();
+    Error += ")";
+    return createStringError(errc::invalid_argument, Error);
   }
 
   // Exception rule for `g`, we don't have clear version scheme for that on
   // ISA spec.
   if (Ext == "g")
     return Error::success();
 
   if (MajorStr.empty() && MinorStr.empty()) {

 llvm::Expected<std::unique_ptr<RISCVISAInfo>>
 RISCVISAInfo::parseFeatures(unsigned XLen,
                             const std::vector<std::string> &Features) {
   assert(XLen == 32 || XLen == 64);
   std::unique_ptr<RISCVISAInfo> ISAInfo(new RISCVISAInfo(XLen));
 
   for (auto &Feature : Features) {
     StringRef ExtName = Feature;
-    bool Experimental = false;
     assert(ExtName.size() > 1 && (ExtName[0] == '+' || ExtName[0] == '-'));
     bool Add = ExtName[0] == '+';
     ExtName = ExtName.drop_front(1); // Drop '+' or '-'
-    Experimental = stripExperimentalPrefix(ExtName);
-    auto ExtensionInfos = Experimental
-                              ? makeArrayRef(SupportedExperimentalExtensions)
-                              : makeArrayRef(SupportedExtensions);
-    auto ExtensionInfoIterator =
-        llvm::find_if(ExtensionInfos, FindByName(ExtName));
 
-    // Not all features is related to ISA extension, like `relax` or
-    // `save-restore`, skip those feature.
-    if (ExtensionInfoIterator == ExtensionInfos.end())
+    auto Info = isSupportedExtensionFeature(ExtName);
+    if (!Info)
       continue;
 
     if (Add)
-      ISAInfo->addExtension(ExtName, ExtensionInfoIterator->Version.Major,
-                            ExtensionInfoIterator->Version.Minor);
+      ISAInfo->addExtension(Info->ExtName, Info->Version.Major,
+                            Info->Version.Minor);
     else
-      ISAInfo->Exts.erase(ExtName.str());
+      ISAInfo->Exts.erase(Info->ExtName);
   }
 
   ISAInfo->updateImplication();
   ISAInfo->updateFLen();
 
   if (Error Result = ISAInfo->checkDependency())
     return std::move(Result);
 
   return std::move(ISAInfo);
 }
 
 llvm::Expected<std::unique_ptr<RISCVISAInfo>>
 RISCVISAInfo::parseArchString(StringRef Arch, bool EnableExperimentalExtension,
-                              bool ExperimentalExtensionVersionCheck) {
+                              bool ExperimentalExtensionVersionCheck,
+                              bool IgnoreUnknownExtension) {
   // RISC-V ISA strings must be lowercase.
   if (llvm::any_of(Arch, isupper)) {
     return createStringError(errc::invalid_argument,
                              "string must be lowercase");
   }
 
   bool HasRV64 = Arch.startswith("rv64");
   // ISA string must begin with rv32 or rv64.
if (StdExtsItr == StdExtsEnd) {
       // Either c contains a valid extension but it was not given in
       // canonical order or it is an invalid extension.
       if (StdExts.contains(C)) {
         return createStringError(
             errc::invalid_argument,
             "standard user-level extension not given in canonical order '%c'",
             C);
       }
-
+      if (!IgnoreUnknownExtension)
         return createStringError(errc::invalid_argument,
-                               "invalid standard user-level extension '%c'", C);
+                                 "invalid standard user-level extension '%c'",
+                                 C);
     }
 
     // Move to next char to prevent repeated letter.
     ++StdExtsItr;
 
     std::string Next;
     unsigned Major, Minor, ConsumeLength;
     if (std::next(I) != E)
       Next = std::string(std::next(I), E);
     if (auto E = getExtensionVersion(std::string(1, C), Next, Major, Minor,
                                      ConsumeLength, EnableExperimentalExtension,
-                                     ExperimentalExtensionVersionCheck))
+                                     ExperimentalExtensionVersionCheck)) {
+      if (IgnoreUnknownExtension)
+        consumeError(std::move(E));
+      else
         return std::move(E);
-
+    } else {
       // The order is OK, then push it into features.
       // TODO: Use version number when setting target features
       // Currently LLVM supports only "mafdcbv".
       StringRef SupportedStandardExtension = "mafdcbv";
-    if (SupportedStandardExtension.find(C) == StringRef::npos)
-      return createStringError(errc::invalid_argument,
-                               "unsupported standard user-level extension '%c'",
-                               C);
+      if (SupportedStandardExtension.find(C) != StringRef::npos)
         ISAInfo->addExtension(std::string(1, C), Major, Minor);
+      else if (!IgnoreUnknownExtension)
+        return createStringError(
+            errc::invalid_argument,
+            "unsupported standard user-level extension '%c'", C);
+    }
 
     // Consume full extension name and version, including any optional '_'
     // between this extension and the next
     ++I;
     I += ConsumeLength;
     if (*I == '_')
       ++I;
   }
if (!HasE && !HasI) {
     auto Version = findDefaultVersion("i");
     addExtension("i", Version->Major, Version->Minor);
   }
 
   assert(llvm::is_sorted(ImpliedExts) && "Table not sorted by Name");
   for (auto &Ext : Exts) {
     auto I = llvm::lower_bound(ImpliedExts, Ext.first);
     if (I != std::end(ImpliedExts) && I->Name == Ext.first) {
-      for (auto &ImpliedExt : I->Exts) {
-        auto Version = findDefaultVersion(ImpliedExt);
-        addExtension(ImpliedExt, Version->Major, Version->Minor);
-      }
+      for (auto &ImpliedExt : I->Exts)
+        addExtension(ImpliedExt, Ext.second.Version.Major,
+                     Ext.second.Version.Minor);
     }
   }
 }
 
 void RISCVISAInfo::updateFLen() {
   FLen = 0;
   // TODO: Handle q extension.
   if (Exts.count("d"))
     FLen = 64;
   else if (Exts.count("f"))
     FLen = 32;
 }
 
 std::string RISCVISAInfo::toString() const {
   std::string Buffer;
   raw_string_ostream Arch(Buffer);
 
   Arch << "rv" << XLen;
 
   ListSeparator LS("_");
   for (auto &Ext : Exts) {
     StringRef ExtName = Ext.first;
     auto ExtInfo = Ext.second;
     Arch << LS << ExtName;
-    Arch << ExtInfo.MajorVersion << "p" << ExtInfo.MinorVersion;
+    Arch << ExtInfo.Version.Major << "p" << ExtInfo.Version.Minor;
   }
 
   return Arch.str();
 }

llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp

if (!ParseResult) {
         OutputErrMsg << "invalid arch name '" << Arch << "', "
                      << ErrMsg.getMessage();
       });
 
       return Error(ValueExprLoc, OutputErrMsg.str());
     }
     auto &ISAInfo = *ParseResult;
 
-    for (auto Feature : RISCVFeatureKV)
-      if (ISAInfo->hasExtension(Feature.Key))
+    for (auto Feature : RISCVFeatureKV) {
+      if (ISAInfo->hasExtensionWithVersion(Feature.Key))
         setFeatureBits(Feature.Value, Feature.Key);
+    }
 
     if (ISAInfo->getXLen() == 32)
       clearFeatureBits(RISCV::Feature64Bit, "64bit");
     else if (ISAInfo->getXLen() == 64)
       setFeatureBits(RISCV::Feature64Bit, "64bit");
     else
       return Error(ValueExprLoc, "bad arch string " + Arch);
 

llvm/lib/Target/RISCV/RISCV.td

 //===-- RISCV.td - Describe the RISCV Target Machine -------*- tablegen -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 include "llvm/Target/Target.td"
 
 //===----------------------------------------------------------------------===//
 // RISC-V subtarget features and instruction predicates.
 //===----------------------------------------------------------------------===//
 
 def FeatureStdExtM
-    : SubtargetFeature<"m", "HasStdExtM", "true",
+    : SubtargetFeature<"m", "StdExtM", "RISCVExtensionVersion{2, 0}",
                        "'M' (Integer Multiplication and Division)">;
 def HasStdExtM : Predicate<"Subtarget->hasStdExtM()">,
                            AssemblerPredicate<(all_of FeatureStdExtM),
                            "'M' (Integer Multiplication and Division)">;
 
 def FeatureStdExtA
-    : SubtargetFeature<"a", "HasStdExtA", "true",
+    : SubtargetFeature<"a", "StdExtA", "RISCVExtensionVersion{2, 0}",
                        "'A' (Atomic Instructions)">;
 def HasStdExtA : Predicate<"Subtarget->hasStdExtA()">,
                            AssemblerPredicate<(all_of FeatureStdExtA),
                            "'A' (Atomic Instructions)">;
 
 def FeatureStdExtF
-    : SubtargetFeature<"f", "HasStdExtF", "true",
+    : SubtargetFeature<"f", "StdExtF", "RISCVExtensionVersion{2, 0}",
                        "'F' (Single-Precision Floating-Point)">;
 def HasStdExtF : Predicate<"Subtarget->hasStdExtF()">,
                            AssemblerPredicate<(all_of FeatureStdExtF),
                            "'F' (Single-Precision Floating-Point)">;
 
 def FeatureStdExtD
-    : SubtargetFeature<"d", "HasStdExtD", "true",
+    : SubtargetFeature<"d", "StdExtD", "RISCVExtensionVersion{2, 0}",
                        "'D' (Double-Precision Floating-Point)",
                        [FeatureStdExtF]>;
 def HasStdExtD : Predicate<"Subtarget->hasStdExtD()">,
                            AssemblerPredicate<(all_of FeatureStdExtD),
                            "'D' (Double-Precision Floating-Point)">;
 
 def FeatureStdExtZfhmin
-    : SubtargetFeature<"experimental-zfhmin", "HasStdExtZfhmin", "true",
+    : SubtargetFeature<"experimental-zfhmin", "StdExtZfhmin",
+                       "RISCVExtensionVersion{0, 1}",
                        "'Zfhmin' (Half-Precision Floating-Point Minimal)",
                        [FeatureStdExtF]>;
 def HasStdExtZfhmin : Predicate<"Subtarget->hasStdExtZfhmin()">,
                              AssemblerPredicate<(all_of FeatureStdExtZfhmin),
                              "'Zfhmin' (Half-Precision Floating-Point Minimal)">;
 
 def FeatureStdExtZfh
-    : SubtargetFeature<"experimental-zfh", "HasStdExtZfh", "true",
+    : SubtargetFeature<"experimental-zfh", "StdExtZfh",
+                       "RISCVExtensionVersion{0, 1}",
                        "'Zfh' (Half-Precision Floating-Point)",
                        [FeatureStdExtZfhmin, FeatureStdExtF]>;
 def HasStdExtZfh : Predicate<"Subtarget->hasStdExtZfh()">,
                              AssemblerPredicate<(all_of FeatureStdExtZfh),
                              "'Zfh' (Half-Precision Floating-Point)">;
 
 def FeatureStdExtC
-    : SubtargetFeature<"c", "HasStdExtC", "true",
+    : SubtargetFeature<"c", "StdExtC", "RISCVExtensionVersion{2, 0}",
                        "'C' (Compressed Instructions)">;
 def HasStdExtC : Predicate<"Subtarget->hasStdExtC()">,
                            AssemblerPredicate<(all_of FeatureStdExtC),
                            "'C' (Compressed Instructions)">;
 
 def FeatureStdExtZba
-    : SubtargetFeature<"experimental-zba", "HasStdExtZba", "true",
+    : SubtargetFeature<"experimental-zba", "StdExtZba",
+                       "RISCVExtensionVersion{1, 0}",
                        "'Zba' (Address calculation 'B' Instructions)">;
 def HasStdExtZba : Predicate<"Subtarget->hasStdExtZba()">,
                              AssemblerPredicate<(all_of FeatureStdExtZba),
                              "'Zba' (Address calculation 'B' Instructions)">;
 def NotHasStdExtZba : Predicate<"!Subtarget->hasStdExtZba()">;
 
 def FeatureStdExtZbb
-    : SubtargetFeature<"experimental-zbb", "HasStdExtZbb", "true",
+    : SubtargetFeature<"experimental-zbb", "StdExtZbb",
+                       "RISCVExtensionVersion{1, 0}",
                        "'Zbb' (Base 'B' Instructions)">;
 def HasStdExtZbb : Predicate<"Subtarget->hasStdExtZbb()">,
                              AssemblerPredicate<(all_of FeatureStdExtZbb),
                              "'Zbb' (Base 'B' Instructions)">;
 
 def FeatureStdExtZbc
-    : SubtargetFeature<"experimental-zbc", "HasStdExtZbc", "true",
+    : SubtargetFeature<"experimental-zbc", "StdExtZbc",
+                       "RISCVExtensionVersion{1, 0}",
                        "'Zbc' (Carry-Less 'B' Instructions)">;
 def HasStdExtZbc : Predicate<"Subtarget->hasStdExtZbc()">,
                              AssemblerPredicate<(all_of FeatureStdExtZbc),
                              "'Zbc' (Carry-Less 'B' Instructions)">;
 
 def FeatureStdExtZbe
-    : SubtargetFeature<"experimental-zbe", "HasStdExtZbe", "true",
+    : SubtargetFeature<"experimental-zbe", "StdExtZbe",
+                        "RISCVExtensionVersion{0, 93}",
                        "'Zbe' (Extract-Deposit 'B' Instructions)">;
 def HasStdExtZbe : Predicate<"Subtarget->hasStdExtZbe()">,
                              AssemblerPredicate<(all_of FeatureStdExtZbe),
                              "'Zbe' (Extract-Deposit 'B' Instructions)">;
 
 def FeatureStdExtZbf
-    : SubtargetFeature<"experimental-zbf", "HasStdExtZbf", "true",
+    : SubtargetFeature<"experimental-zbf", "StdExtZbf",
+                       "RISCVExtensionVersion{0, 93}",
                        "'Zbf' (Bit-Field 'B' Instructions)">;
 def HasStdExtZbf : Predicate<"Subtarget->hasStdExtZbf()">,
                              AssemblerPredicate<(all_of FeatureStdExtZbf),
                              "'Zbf' (Bit-Field 'B' Instructions)">;
 
 def FeatureStdExtZbm
-    : SubtargetFeature<"experimental-zbm", "HasStdExtZbm", "true",
+    : SubtargetFeature<"experimental-zbm", "StdExtZbm",
+                       "RISCVExtensionVersion{0, 93}",
                        "'Zbm' (Matrix 'B' Instructions)">;
 def HasStdExtZbm : Predicate<"Subtarget->hasStdExtZbm()">,
                              AssemblerPredicate<(all_of FeatureStdExtZbm),
                              "'Zbm' (Matrix 'B' Instructions)">;
 
 def FeatureStdExtZbp
-    : SubtargetFeature<"experimental-zbp", "HasStdExtZbp", "true",
+    : SubtargetFeature<"experimental-zbp", "StdExtZbp",
+                       "RISCVExtensionVersion{0, 93}",
                        "'Zbp' (Permutation 'B' Instructions)">;
 def HasStdExtZbp : Predicate<"Subtarget->hasStdExtZbp()">,
                              AssemblerPredicate<(all_of FeatureStdExtZbp),
                              "'Zbp' (Permutation 'B' Instructions)">;
 
 def FeatureStdExtZbr
-    : SubtargetFeature<"experimental-zbr", "HasStdExtZbr", "true",
+    : SubtargetFeature<"experimental-zbr", "StdExtZbr",
+                       "RISCVExtensionVersion{0, 93}",
                        "'Zbr' (Polynomial Reduction 'B' Instructions)">;
 def HasStdExtZbr : Predicate<"Subtarget->hasStdExtZbr()">,
                              AssemblerPredicate<(all_of FeatureStdExtZbr),
                              "'Zbr' (Polynomial Reduction 'B' Instructions)">;
 
 def FeatureStdExtZbs
-    : SubtargetFeature<"experimental-zbs", "HasStdExtZbs", "true",
+    : SubtargetFeature<"experimental-zbs", "StdExtZbs",
+                       "RISCVExtensionVersion{1, 0}",
                        "'Zbs' (Single-Bit 'B' Instructions)">;
 def HasStdExtZbs : Predicate<"Subtarget->hasStdExtZbs()">,
                              AssemblerPredicate<(all_of FeatureStdExtZbs),
                              "'Zbs' (Single-Bit 'B' Instructions)">;
 
 def FeatureStdExtZbt
-    : SubtargetFeature<"experimental-zbt", "HasStdExtZbt", "true",
+    : SubtargetFeature<"experimental-zbt", "StdExtZbt",
+                       "RISCVExtensionVersion{0, 93}",
                        "'Zbt' (Ternary 'B' Instructions)">;
 def HasStdExtZbt : Predicate<"Subtarget->hasStdExtZbt()">,
                              AssemblerPredicate<(all_of FeatureStdExtZbt),
                              "'Zbt' (Ternary 'B' Instructions)">;
 
 // Some instructions belong to both the basic and the permutation
 // subextensions. They should be enabled if either has been specified.
 def HasStdExtZbbOrZbp
     : Predicate<"Subtarget->hasStdExtZbb() || Subtarget->hasStdExtZbp()">,
                 AssemblerPredicate<(any_of FeatureStdExtZbb, FeatureStdExtZbp),
                                    "'Zbb' (Base 'B' Instructions) or "
                                    "'Zbp' (Permutation 'B' Instructions)">;
 
 def FeatureNoRVCHints
     : SubtargetFeature<"no-rvc-hints", "EnableRVCHintInstrs", "false",
                        "Disable RVC Hint Instructions.">;
 def HasRVCHints : Predicate<"Subtarget->enableRVCHintInstrs()">,
                   AssemblerPredicate<(all_of(not FeatureNoRVCHints)),
                                       "RVC Hint Instructions">;
 
 def FeatureStdExtV
-    : SubtargetFeature<"experimental-v", "HasStdExtV", "true",
+    : SubtargetFeature<"experimental-v", "StdExtV",
+                       "RISCVExtensionVersion{0, 10}",
                        "'V' (Vector Instructions)">;
-def HasStdExtV : Predicate<"Subtarget->hasStdExtV()">,
-                           AssemblerPredicate<(all_of FeatureStdExtV),
-                           "'V' (Vector Instructions)">;
+def HasStdExtV
+    : Predicate<"Subtarget->hasStdExtV()">,
 
 def HasVInstructions    : Predicate<"Subtarget->hasVInstructions()">;
 def HasVInstructionsAnyF : Predicate<"Subtarget->hasVInstructionsAnyF()">;
 
 def FeatureStdExtZvlsseg
-    : SubtargetFeature<"experimental-zvlsseg", "HasStdExtZvlsseg", "true",
+    : SubtargetFeature<"experimental-zvlsseg", "StdExtZvlsseg",
+                       "RISCVExtensionVersion{0, 10}",
                        "'Zvlsseg' (Vector segment load/store instructions)",
                        [FeatureStdExtV]>;
-def HasStdExtZvlsseg : Predicate<"Subtarget->hasStdExtZvlsseg()">,
-                                 AssemblerPredicate<(all_of FeatureStdExtZvlsseg),
-                                 "'Zvlsseg' (Vector segment load/store instructions)">;
+def HasStdExtZvlsseg
+    : Predicate<"Subtarget->hasStdExtZvlsseg()">,
 
 def Feature64Bit
     : SubtargetFeature<"64bit", "HasRV64", "true", "Implements RV64">;
 def IsRV64 : Predicate<"Subtarget->is64Bit()">,
                        AssemblerPredicate<(all_of Feature64Bit),
                        "RV64I Base Instruction Set">;
 def IsRV32 : Predicate<"!Subtarget->is64Bit()">,
                        AssemblerPredicate<(all_of (not Feature64Bit)),
                        "RV32I Base Instruction Set">;
 
 defvar RV32 = DefaultMode;
 def RV64           : HwMode<"+64bit">;
 
 def FeatureRV32E
-    : SubtargetFeature<"e", "IsRV32E", "true",
+    : SubtargetFeature<"e", "StdExtE", "RISCVExtensionVersion{1, 9}",
                        "Implements RV32E (provides 16 rather than 32 GPRs)">;
 def IsRV32E : Predicate<"Subtarget->isRV32E()">,
                         AssemblerPredicate<(all_of FeatureRV32E)>;
 
 def FeatureRelax
     : SubtargetFeature<"relax", "EnableLinkerRelax", "true",
                        "Enable Linker relaxation.">;
 

llvm/lib/Target/RISCV/RISCVSubtarget.h

 #include "RISCVInstrInfo.h"
 #include "llvm/CodeGen/GlobalISel/CallLowering.h"
 #include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
 #include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
 #include "llvm/CodeGen/GlobalISel/RegisterBankInfo.h"
 #include "llvm/CodeGen/SelectionDAGTargetInfo.h"
 #include "llvm/CodeGen/TargetSubtargetInfo.h"
 #include "llvm/IR/DataLayout.h"
+#include "llvm/Support/RISCVISAInfo.h"
 #include "llvm/Target/TargetMachine.h"
 
 #define GET_SUBTARGETINFO_HEADER
 #include "RISCVGenSubtargetInfo.inc"
 
 namespace llvm {
 class StringRef;
 
 class RISCVSubtarget : public RISCVGenSubtargetInfo {
   virtual void anchor();
-  bool HasStdExtM = false;
-  bool HasStdExtA = false;
-  bool HasStdExtF = false;
-  bool HasStdExtD = false;
-  bool HasStdExtC = false;
-  bool HasStdExtZba = false;
-  bool HasStdExtZbb = false;
-  bool HasStdExtZbc = false;
-  bool HasStdExtZbe = false;
-  bool HasStdExtZbf = false;
-  bool HasStdExtZbm = false;
-  bool HasStdExtZbp = false;
-  bool HasStdExtZbr = false;
-  bool HasStdExtZbs = false;
-  bool HasStdExtZbt = false;
-  bool HasStdExtV = false;
-  bool HasStdExtZvlsseg = false;
-  bool HasStdExtZfhmin = false;
-  bool HasStdExtZfh = false;
+  RISCVExtensionVersion StdExtM;
+  RISCVExtensionVersion StdExtA;
+  RISCVExtensionVersion StdExtF;
+  RISCVExtensionVersion StdExtD;
+  RISCVExtensionVersion StdExtC;
+  RISCVExtensionVersion StdExtZba;
+  RISCVExtensionVersion StdExtZbb;
+  RISCVExtensionVersion StdExtZbc;
+  RISCVExtensionVersion StdExtZbe;
+  RISCVExtensionVersion StdExtZbf;
+  RISCVExtensionVersion StdExtZbm;
+  RISCVExtensionVersion StdExtZbp;
+  RISCVExtensionVersion StdExtZbr;
+  RISCVExtensionVersion StdExtZbs;
+  RISCVExtensionVersion StdExtZbt;
+  RISCVExtensionVersion StdExtV;
+  RISCVExtensionVersion StdExtZvlsseg;
+  RISCVExtensionVersion StdExtZvamo;
+  RISCVExtensionVersion StdExtZfhmin;
+  RISCVExtensionVersion StdExtZfh;
+  RISCVExtensionVersion StdExtE;
   bool HasRV64 = false;
-  bool IsRV32E = false;
   bool EnableLinkerRelax = false;
   bool EnableRVCHintInstrs = true;
   bool EnableSaveRestore = false;
   unsigned XLen = 32;
   MVT XLenVT = MVT::i32;
   uint8_t MaxInterleaveFactor = 2;
   RISCVABI::ABI TargetABI = RISCVABI::ABI_Unknown;
   BitVector UserReservedRegister;
public:
   }
   const RISCVTargetLowering *getTargetLowering() const override {
     return &TLInfo;
   }
   const SelectionDAGTargetInfo *getSelectionDAGInfo() const override {
     return &TSInfo;
   }
   bool enableMachineScheduler() const override { return true; }
-  bool hasStdExtM() const { return HasStdExtM; }
-  bool hasStdExtA() const { return HasStdExtA; }
-  bool hasStdExtF() const { return HasStdExtF; }
-  bool hasStdExtD() const { return HasStdExtD; }
-  bool hasStdExtC() const { return HasStdExtC; }
-  bool hasStdExtZba() const { return HasStdExtZba; }
-  bool hasStdExtZbb() const { return HasStdExtZbb; }
-  bool hasStdExtZbc() const { return HasStdExtZbc; }
-  bool hasStdExtZbe() const { return HasStdExtZbe; }
-  bool hasStdExtZbf() const { return HasStdExtZbf; }
-  bool hasStdExtZbm() const { return HasStdExtZbm; }
-  bool hasStdExtZbp() const { return HasStdExtZbp; }
-  bool hasStdExtZbr() const { return HasStdExtZbr; }
-  bool hasStdExtZbs() const { return HasStdExtZbs; }
-  bool hasStdExtZbt() const { return HasStdExtZbt; }
-  bool hasStdExtV() const { return HasStdExtV; }
-  bool hasStdExtZvlsseg() const { return HasStdExtZvlsseg; }
-  bool hasStdExtZfhmin() const { return HasStdExtZfhmin; }
-  bool hasStdExtZfh() const { return HasStdExtZfh; }
+  bool hasStdExtM() const { return StdExtM; }
+  bool hasStdExtA() const { return StdExtA; }
+  bool hasStdExtF() const { return StdExtF; }
+  bool hasStdExtD() const { return StdExtD; }
+  bool hasStdExtC() const { return StdExtC; }
+  bool hasStdExtZba() const { return StdExtZba; }
+  bool hasStdExtZbb() const { return StdExtZbb; }
+  bool hasStdExtZbc() const { return StdExtZbc; }
+  bool hasStdExtZbe() const { return StdExtZbe; }
+  bool hasStdExtZbf() const { return StdExtZbf; }
+  bool hasStdExtZbm() const { return StdExtZbm; }
+  bool hasStdExtZbp() const { return StdExtZbp; }
+  bool hasStdExtZbr() const { return StdExtZbr; }
+  bool hasStdExtZbs() const { return StdExtZbs; }
+  bool hasStdExtZbt() const { return StdExtZbt; }
+  bool hasStdExtV() const { return StdExtV; }
+  bool hasStdExtZvlsseg() const { return StdExtZvlsseg; }
+  bool hasStdExtZfhmin() const { return StdExtZfhmin; }
+  bool hasStdExtZfh() const { return StdExtZfh; }
   bool is64Bit() const { return HasRV64; }
-  bool isRV32E() const { return IsRV32E; }
+  bool isRV32E() const { return StdExtE; }
   bool enableLinkerRelax() const { return EnableLinkerRelax; }
   bool enableRVCHintInstrs() const { return EnableRVCHintInstrs; }
   bool enableSaveRestore() const { return EnableSaveRestore; }
   MVT getXLenVT() const { return XLenVT; }
   unsigned getXLen() const { return XLen; }
   RISCVABI::ABI getTargetABI() const { return TargetABI; }
   bool isRegisterReservedByUser(Register i) const {
     assert(i < RISCV::NUM_TARGET_REGS && "Register out of range");
     return UserReservedRegister[i];
   }
 
   // Vector codegen related methods.
-  bool hasVInstructions() const { return HasStdExtV; }
-  bool hasVInstructionsI64() const { return HasStdExtV; }
-  bool hasVInstructionsF16() const { return HasStdExtV && hasStdExtZfh(); }
-  bool hasVInstructionsF32() const { return HasStdExtV && hasStdExtF(); }
-  bool hasVInstructionsF64() const { return HasStdExtV && hasStdExtD(); }
+  bool hasVInstructions() const { return StdExtV; }
+  bool hasVInstructionsI64() const { return StdExtV; }
+  bool hasVInstructionsF16() const { return StdExtV && hasStdExtZfh(); }
+  bool hasVInstructionsF32() const { return StdExtV && hasStdExtF(); }
+  bool hasVInstructionsF64() const { return StdExtV && hasStdExtD(); }
   // F16 and F64 both require F32.
   bool hasVInstructionsAnyF() const { return hasVInstructionsF32(); }
   unsigned getMaxInterleaveFactor() const {
     return hasVInstructions() ? MaxInterleaveFactor : 1;
   }
 
 protected:
   // GlobalISel related APIs.

llvm/test/CodeGen/RISCV/attributes-version.ll

+; Generate ELF attributes from llc.
+
+; RUN: llc -mtriple=riscv32 -mattr=+m %s -o - | FileCheck --check-prefix=RV32M %s
+; RUN: llc -mtriple=riscv32 -mattr=+a %s -o - | FileCheck --check-prefix=RV32A %s
+; RUN: llc -mtriple=riscv32 -mattr=+f %s -o - | FileCheck --check-prefix=RV32F %s
+; RUN: llc -mtriple=riscv32 -mattr=+d %s -o - | FileCheck --check-prefix=RV32D %s
+; RUN: llc -mtriple=riscv32 -mattr=+c %s -o - | FileCheck --check-prefix=RV32C %s
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-zfhmin %s -o - | FileCheck --check-prefix=RV32ZFHMIN %s
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-zfh %s -o - | FileCheck --check-prefix=RV32ZFH %s
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-zba %s -o - | FileCheck --check-prefix=RV32ZBA %s
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbb %s -o - | FileCheck --check-prefix=RV32ZBB %s
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbc %s -o - | FileCheck --check-prefix=RV32ZBC %s
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbe %s -o - | FileCheck --check-prefix=RV32ZBE %s
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbf %s -o - | FileCheck --check-prefix=RV32ZBF %s
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbm %s -o - | FileCheck --check-prefix=RV32ZBM %s
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbp %s -o - | FileCheck --check-prefix=RV32ZBP %s
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbr %s -o - | FileCheck --check-prefix=RV32ZBR %s
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbs %s -o - | FileCheck --check-prefix=RV32ZBS %s
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbt %s -o - | FileCheck --check-prefix=RV32ZBT %s
+
+
+; RV32M: .attribute 5, "rv32i2p0_m2p0"
+; RV32A: .attribute 5, "rv32i2p0_a2p0"
+; RV32F: .attribute 5, "rv32i2p0_f2p0"
+; RV32D: .attribute 5, "rv32i2p0_f2p0_d2p0"
+; RV32C: .attribute 5, "rv32i2p0_c2p0"
+; RV32V: .attribute 5, "rv32i2p0_v0p10_zvlsseg0p10"
+; RV32ZFHMIN: .attribute 5, "rv32i2p0_f2p0_zfhmin0p1"
+; RV32ZFH: .attribute 5, "rv32i2p0_f2p0_zfh0p1_zfhmin0p1"
+; RV32ZBA: .attribute 5, "rv32i2p0_zba1p0"
+; RV32ZBB: .attribute 5, "rv32i2p0_zbb1p0"
+; RV32ZBC: .attribute 5, "rv32i2p0_zbc1p0"
+; RV32ZBE: .attribute 5, "rv32i2p0_zbe0p93"
+; RV32ZBF: .attribute 5, "rv32i2p0_zbf0p93"
+; RV32ZBM: .attribute 5, "rv32i2p0_zbm0p93"
+; RV32ZBP: .attribute 5, "rv32i2p0_zbp0p93"
+; RV32ZBR: .attribute 5, "rv32i2p0_zbr0p93"
+; RV32ZBS: .attribute 5, "rv32i2p0_zbs1p0"
+; RV32ZBT: .attribute 5, "rv32i2p0_zbt0p93"
+
+
+; RUN: llc -mtriple=riscv32 -mattr=+m0p7 < %s 2>&1 | FileCheck --check-prefix=RV32M0P7 %s
+; RUN: llc -mtriple=riscv32 -mattr=+a0p7 < %s 2>&1 | FileCheck --check-prefix=RV32A0P7 %s
+; RUN: llc -mtriple=riscv32 -mattr=+f0p7 < %s 2>&1 | FileCheck --check-prefix=RV32F0P7 %s
+; RUN: llc -mtriple=riscv32 -mattr=+d0p7 < %s 2>&1 | FileCheck --check-prefix=RV32D0P7 %s
+; RUN: llc -mtriple=riscv32 -mattr=+c0p7 < %s 2>&1 | FileCheck --check-prefix=RV32C0P7 %s
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-zfhmin0p7 < %s 2>&1 | FileCheck --check-prefix=RV32ZFHMIN0P7 %s
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-zfh0p7 < %s 2>&1 | FileCheck --check-prefix=RV32ZFH0P7 %s
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-zba0p7 < %s 2>&1 | FileCheck --check-prefix=RV32ZBA0P7 %s
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbb0p7 < %s 2>&1 | FileCheck --check-prefix=RV32ZBB0P7 %s
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbc0p7 < %s 2>&1 | FileCheck --check-prefix=RV32ZBC0P7 %s
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbe0p7 < %s 2>&1 | FileCheck --check-prefix=RV32ZBE0P7 %s
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbf0p7 < %s 2>&1 | FileCheck --check-prefix=RV32ZBF0P7 %s
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbm0p7 < %s 2>&1 | FileCheck --check-prefix=RV32ZBM0P7 %s
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbp0p7 < %s 2>&1 | FileCheck --check-prefix=RV32ZBP0P7 %s
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbr0p7 < %s 2>&1 | FileCheck --check-prefix=RV32ZBR0P7 %s
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbs0p7 < %s 2>&1 | FileCheck --check-prefix=RV32ZBS0P7 %s
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbt0p7 < %s 2>&1 | FileCheck --check-prefix=RV32ZBT0P7 %s
+
+; RV32M0P7: '+m0p7' is not a recognized feature for this target
+; RV32A0P7: '+a0p7' is not a recognized feature for this target
+; RV32F0P7: '+f0p7' is not a recognized feature for this target
+; RV32D0P7: '+d0p7' is not a recognized feature for this target
+; RV32C0P7: '+c0p7' is not a recognized feature for this target
+; RV32ZFHMIN0P7: '+experimental-zfhmin0p7' is not a recognized feature for this target
+; RV32ZFH0P7: '+experimental-zfh0p7' is not a recognized feature for this target
+; RV32ZBA0P7: '+experimental-zba0p7' is not a recognized feature for this target
+; RV32ZBB0P7: '+experimental-zbb0p7' is not a recognized feature for this target
+; RV32ZBC0P7: '+experimental-zbc0p7' is not a recognized feature for this target
+; RV32ZBE0P7: '+experimental-zbe0p7' is not a recognized feature for this target
+; RV32ZBF0P7: '+experimental-zbf0p7' is not a recognized feature for this target
+; RV32ZBM0P7: '+experimental-zbm0p7' is not a recognized feature for this target
+; RV32ZBP0P7: '+experimental-zbp0p7' is not a recognized feature for this target
+; RV32ZBR0P7: '+experimental-zbr0p7' is not a recognized feature for this target
+; RV32ZBS0P7: '+experimental-zbs0p7' is not a recognized feature for this target
+; RV32ZBT0P7: '+experimental-zbt0p7' is not a recognized feature for this target
+
+define i32 @addi(i32 %a) {
+  %1 = add i32 %a, 1
+  ret i32 %1
+}

llvm/test/tools/llvm-objdump/ELF/RISCV/unknown-arch-attr.test

 ## Handle unrecognized arch attributes.
 ## Encode an unrecognized arch feature into an object file and try to decode it.
 ## The expected behavior is to ignore the unrecognized arch feature and
 ## continue to process the following arch features.
 ##
-## The object file has the "rv32i2p0_x1p0_m2p0" arch feature. "x1p0" is an
+## The object file has the "rv32i2p0_y1p0_m2p0" arch feature. "y1p0" is an
 ## unrecognized architecture extension. llvm-objdump will ignore it and decode
 ## "mul" instruction correctly according to "m2p0" in the arch feature.
 ##
 ## This test cannot be assembly because the test needs an unrecognized arch
 ## feature and `llvm-mc` will filter out the unrecognized arch feature.
 
 # RUN: yaml2obj %s -D BITS=32 -o %t.32.o
 # RUN: llvm-objdump -d %t.32.o \
Sections:
   - Name:    .text
     Type:    SHT_PROGBITS
     Flags:   [ SHF_ALLOC, SHF_EXECINSTR ]
 ## The content is the encoding of "mul a0, a1, a2".
 ## The encoding could be decoded only when the "m" extension is enabled.
     Content: 3385C502
   - Name:    .riscv.attributes
     Type:    SHT_RISCV_ATTRIBUTES
-## The content is the encoding of the arch feature "rv32i2p0_x1p0_m2p0"
-    Content: 412300000072697363760001190000000572763332693270305F783170305F6D32703000
+## The content is the encoding of the arch feature "rv32i2p0_y1p0_m2p0"
+    Content: 412300000072697363760001190000000572763332693270305F793170305F6D32703000