[RISCV] SMUL_LOHI/UMUL_LOHI should expand for RVV.

[craig.topper]

Summary

These and MULHS/MULHU both default to Legal. Targets need to set
the ones they don't support to Expand.

I think MULHS/MULHU likely has priority in most places so this
change probably isn't directly testable. I found it while looking
at disabling MULHS/MULHU for nxvXi64 as required for Zve64x.

[frasercrmck]

Do we want to do the same for fixed-length vectors?

[craig.topper]

In D113325#3115003, @frasercrmck wrote:

Do we want to do the same for fixed-length vectors?

Fixed length vectors has a loop that sets every opcode to Expand.

[frasercrmck]

In D113325#3115732, @craig.topper wrote:

In D113325#3115003, @frasercrmck wrote:

Do we want to do the same for fixed-length vectors?

Fixed length vectors has a loop that sets every opcode to Expand.

So we do, my bad. LGTM.

llvm/lib/Target/RISCV/RISCVISelLowering.cpp

if (Subtarget.hasVInstructions()) {
     for (MVT VT : IntVecVTs) {
       if (VT.getVectorElementType() == MVT::i64 &&
           !Subtarget.hasVInstructionsI64())
         continue;
 
       setOperationAction(ISD::SPLAT_VECTOR, VT, Legal);
       setOperationAction(ISD::SPLAT_VECTOR_PARTS, VT, Custom);
 
+      // Vectors implement MULHS/MULHU.
+      setOperationAction(ISD::SMUL_LOHI, VT, Expand);
+      setOperationAction(ISD::UMUL_LOHI, VT, Expand);
+
       setOperationAction(ISD::SMIN, VT, Legal);
       setOperationAction(ISD::SMAX, VT, Legal);
       setOperationAction(ISD::UMIN, VT, Legal);
       setOperationAction(ISD::UMAX, VT, Legal);
 
       setOperationAction(ISD::ROTL, VT, Expand);
       setOperationAction(ISD::ROTR, VT, Expand);