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[RISCV] Fold store of vmv.x.s to a vse with VL=1.

Authored by craig.topper on Sep 8 2021, 10:07 PM.



This can avoid a loss of decoupling with the scalar unit on cores
with decoupled scalar and vector units.

We should support FP too, but those use extract_element and not a
custom ISD node so it is a little different. I also left a FIXME
in the test for i64 extract and store on RV32.

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craig.topper created this revision.Sep 8 2021, 10:07 PM
craig.topper requested review of this revision.Sep 8 2021, 10:07 PM
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frasercrmck added inline comments.Sep 21 2021, 2:17 AM

I was wondering what'd happen if you replaced it with a ISD::VP_STORE. Just thinking that a standard node would potentially provide more optimization opportunities compared to a RISCVISD node.

craig.topper added inline comments.Sep 21 2021, 3:33 PM

If I'm reading the code right, we don't recognize VP_STORE with an all ones mask as special and I think we'll end up lowering it to the vse_mask intrinsic.

craig.topper updated this revision to Diff 374070.EditedSep 21 2021, 4:44 PM

Use VP_STORE. I couldn't copy the MachineMemOperand and had to have getStoreVP rebuild it. This is due to getStoreVP not taking the MemVT as an argument. This caused an assert if the MemOperand size, which was correctly one element, didn't match the VP_STORE VT. So now we have a MemOperand with an unknown size I guess.

frasercrmck accepted this revision.Sep 27 2021, 3:43 AM

LGTM but I think you have a couple of test failures there?

This revision is now accepted and ready to land.Sep 27 2021, 3:43 AM

LGTM but I think you have a couple of test failures there?

Those may have ran while the with all ones mask patch was still outstanding. Everything passes with ninja check-llvm right now.

This revision was landed with ongoing or failed builds.Sep 27 2021, 9:55 AM
This revision was automatically updated to reflect the committed changes.