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[RISCV] Add support for BUILD_VECTOR, VECTOR_SHUFFLE and INSERT_VECTOR_ELT for RVP
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Authored by Jim on Jun 4 2021, 5:26 AM.

Details

Summary

BUILD_VECTOR is lowed to as a immediate integer if all elements are constant.
Otherwise treat it as inserting each element to a undefined vector.

VECTOR_SHUFFLE according to its indexes would be lowered to byte swap, halfword swap, halfword packing
and word packing. Or as vselect, which is matched to bpick.

INSERT_VECTOR_ELT is simply lowed to the customized node INSERTB[H][W], and
matched it to insert bytes, halfword packing and word packing instructions.

Diff Detail

Event Timeline

Jim created this revision.Jun 4 2021, 5:26 AM
Jim requested review of this revision.Jun 4 2021, 5:26 AM
Herald added a project: Restricted Project. · View Herald TranscriptJun 4 2021, 5:26 AM
Jim edited the summary of this revision. (Show Details)Jun 4 2021, 5:50 AM
Jim edited the summary of this revision. (Show Details)Jun 4 2021, 5:53 AM
craig.topper added inline comments.
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
1733

Can this be done with getTrailingOnesMask from MathExtras.h

3541

No need for else since the if returned

llvm/lib/Target/RISCV/RISCVInstrInfoP.td
26

Do we really need 3 different RISCVISD opcodes or can we use one and determine the instruction from the element type in the isel pattern?

Jim updated this revision to Diff 350093.Jun 6 2021, 3:43 AM

Address comments.

Jim updated this revision to Diff 350095.Jun 6 2021, 4:00 AM

Remove unused variable.