Delete le32/le64 targets

[MaskRay]

Summary

They are unused now.

Note: NaCl is still used and is currently expected to be needed until 2022-06
(https://blog.chromium.org/2020/08/changes-to-chrome-app-support-timeline.html).

[dschuff]

Thanks. I had heard in the past that there were some other folks who had used le32/le64 as a "generic" target (in fact that's why it's named so generically, rather than being called "pnacl" or similar) but I haven't heard of anything recently, and as you can see nobody has upstreamed any support for other OS or target specializations or asked to collaborate on it. Practically speaking even a target that wants fairly generic bitcode would probably want its own triple, so unless this removal captures someone's attention who wants to keep maintaining it, this should be fine to remove.

[abadams]

In D100981#2706899, @dschuff wrote:

Thanks. I had heard in the past that there were some other folks who had used le32/le64 as a "generic" target (in fact that's why it's named so generically, rather than being called "pnacl" or similar) but I haven't heard of anything recently, and as you can see nobody has upstreamed any support for other OS or target specializations or asked to collaborate on it. Practically speaking even a target that wants fairly generic bitcode would probably want its own triple, so unless this removal captures someone's attention who wants to keep maintaining it, this should be fine to remove.

I think that was us, the Halide language. Any suggested alternative for us to use now? This does indeed break all our llvm usage.

EDIT: We are testing to see if using arm triples with an unknown OS works: https://github.com/halide/Halide/pull/5934

The code this is applied to is very careful to not do anything that depends on the triple, which is why we were using the generic one. Given that, it's possible that any old triple will work for us.

[srj]

Any chance that this could be (temporarily) reverted? This will break literally all Halide compilation; we're working on a fix on our side, but it would be nice to have a few days to be sure we have it right, and I suspect there's no urgency to removing this right now.

[MaskRay]

In D100981#2709044, @srj wrote:

Any chance that this could be (temporarily) reverted? This will break literally all Halide compilation; we're working on a fix on our side, but it would be nice to have a few days to be sure we have it right, and I suspect there's no urgency to removing this right now.

Will https://github.com/halide/Halide/pull/5934 take longer? If it does, I can temporarily revert this.

[srj]

In D100981#2709205, @MaskRay wrote:

In D100981#2709044, @srj wrote:

Any chance that this could be (temporarily) reverted? This will break literally all Halide compilation; we're working on a fix on our side, but it would be nice to have a few days to be sure we have it right, and I suspect there's no urgency to removing this right now.

Will https://github.com/halide/Halide/pull/5934 take longer? If it does, I can temporarily revert this.

Yeah, the first simple attempt in https://github.com/halide/Halide/pull/5934 doesn't work (many things are broken). Temporarily reverting this would be a huge huge favor to us.

[dschuff]

Would it make sense for you to to upstream an LLVM target such as le32-halide? (Or perhaps even arm32-halide or some other?) Then you'd actually have more control over your own codegen, datalayout, etc.

[thakis]

maskray: your undelete didn't add back BuiltinsLe64.def so builds are broken atm

[MaskRay]

In D100981#2709450, @thakis wrote:

maskray: your undelete didn't add back BuiltinsLe64.def so builds are broken atm

Fixed by vitalybuka

clang/include/clang/Basic/BuiltinsLe64.def

-//==- BuiltinsLe64.def - Le64 Builtin function database ----------*- C++ -*-==//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-//
-// This file defines the Le64-specific builtin function database.  Users of this
-// file must define the BUILTIN macro to make use of this information.
-//
-//===----------------------------------------------------------------------===//
-
-// The format of this database matches clang/Basic/Builtins.def.
-
-BUILTIN(__clear_cache, "vv*v*", "i")
-
-#undef BUILTIN

clang/include/clang/Basic/TargetBuiltins.h

namespace XCore {
     enum {
         LastTIBuiltin = clang::Builtin::FirstTSBuiltin-1,
 #define BUILTIN(ID, TYPE, ATTRS) BI##ID,
 #include "clang/Basic/BuiltinsXCore.def"
         LastTSBuiltin
     };
   }
 
-  /// Le64 builtins
-  namespace Le64 {
-  enum {
-    LastTIBuiltin = clang::Builtin::FirstTSBuiltin - 1,
-  #define BUILTIN(ID, TYPE, ATTRS) BI##ID,
-  #include "clang/Basic/BuiltinsLe64.def"
-    LastTSBuiltin
-  };
-  }
-
   /// SystemZ builtins
   namespace SystemZ {
     enum {
         LastTIBuiltin = clang::Builtin::FirstTSBuiltin-1,
 #define BUILTIN(ID, TYPE, ATTRS) BI##ID,
 #include "clang/Basic/BuiltinsSystemZ.def"
         LastTSBuiltin
     };
#include "clang/Basic/BuiltinsWebAssembly.def"
     };
   }
 
   static constexpr uint64_t LargestBuiltinID = std::max<uint64_t>(
       {ARM::LastTSBuiltin, AArch64::LastTSBuiltin, BPF::LastTSBuiltin,
        PPC::LastTSBuiltin, NVPTX::LastTSBuiltin, AMDGPU::LastTSBuiltin,
        X86::LastTSBuiltin, VE::LastTSBuiltin, RISCV::LastTSBuiltin,
        Hexagon::LastTSBuiltin, Mips::LastTSBuiltin, XCore::LastTSBuiltin,
-       Le64::LastTSBuiltin, SystemZ::LastTSBuiltin,
-       WebAssembly::LastTSBuiltin});
+       SystemZ::LastTSBuiltin, WebAssembly::LastTSBuiltin});
 
 } // end namespace clang.
 
 #endif

clang/include/clang/module.modulemap

module Clang_Basic {
   textual header "Basic/BuiltinsAArch64.def"
   textual header "Basic/BuiltinsAMDGPU.def"
   textual header "Basic/BuiltinsARM.def"
   textual header "Basic/BuiltinsBPF.def"
   textual header "Basic/Builtins.def"
   textual header "Basic/BuiltinsHexagon.def"
   textual header "Basic/BuiltinsHexagonDep.def"
   textual header "Basic/BuiltinsHexagonMapCustomDep.def"
-  textual header "Basic/BuiltinsLe64.def"
   textual header "Basic/BuiltinsMips.def"
   textual header "Basic/BuiltinsNEON.def"
   textual header "Basic/BuiltinsNVPTX.def"
   textual header "Basic/BuiltinsPPC.def"
   textual header "Basic/BuiltinsRISCV.def"
   textual header "Basic/BuiltinsSVE.def"
   textual header "Basic/BuiltinsSystemZ.def"
   textual header "Basic/BuiltinsWebAssembly.def"

clang/lib/Basic/CMakeLists.txt

add_clang_library(clangBasic
   Targets/AArch64.cpp
   Targets/AMDGPU.cpp
   Targets/ARC.cpp
   Targets/ARM.cpp
   Targets/AVR.cpp
   Targets/BPF.cpp
   Targets/Hexagon.cpp
   Targets/Lanai.cpp
-  Targets/Le64.cpp
   Targets/M68k.cpp
   Targets/MSP430.cpp
   Targets/Mips.cpp
   Targets/NVPTX.cpp
   Targets/OSTargets.cpp
   Targets/PNaCl.cpp
   Targets/PPC.cpp
   Targets/RISCV.cpp

clang/lib/Basic/Targets.cpp

 #include "Targets/AArch64.h"
 #include "Targets/AMDGPU.h"
 #include "Targets/ARC.h"
 #include "Targets/ARM.h"
 #include "Targets/AVR.h"
 #include "Targets/BPF.h"
 #include "Targets/Hexagon.h"
 #include "Targets/Lanai.h"
-#include "Targets/Le64.h"
 #include "Targets/M68k.h"
 #include "Targets/MSP430.h"
 #include "Targets/Mips.h"
 #include "Targets/NVPTX.h"
 #include "Targets/OSTargets.h"
 #include "Targets/PNaCl.h"
 #include "Targets/PPC.h"
 #include "Targets/RISCV.h"
case llvm::Triple::m68k:
     case llvm::Triple::Linux:
       return new LinuxTargetInfo<M68kTargetInfo>(Triple, Opts);
     case llvm::Triple::NetBSD:
       return new NetBSDTargetInfo<M68kTargetInfo>(Triple, Opts);
     default:
       return new M68kTargetInfo(Triple, Opts);
     }
 
-  case llvm::Triple::le32:
-    switch (os) {
-    case llvm::Triple::NaCl:
-      return new NaClTargetInfo<PNaClTargetInfo>(Triple, Opts);
-    default:
-      return nullptr;
-    }
-
-  case llvm::Triple::le64:
-    return new Le64TargetInfo(Triple, Opts);
-
   case llvm::Triple::ppc:
     if (Triple.isOSDarwin())
       return new DarwinPPC32TargetInfo(Triple, Opts);
     switch (os) {
     case llvm::Triple::Linux:
       return new LinuxTargetInfo<PPC32TargetInfo>(Triple, Opts);
     case llvm::Triple::FreeBSD:
       return new FreeBSDTargetInfo<PPC32TargetInfo>(Triple, Opts);

clang/lib/Basic/Targets/Le64.h

-//===--- Le64.h - Declare Le64 target feature support -----------*- C++ -*-===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-//
-// This file declares Le64 TargetInfo objects.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_LE64_H
-#define LLVM_CLANG_LIB_BASIC_TARGETS_LE64_H
-
-#include "clang/Basic/TargetInfo.h"
-#include "clang/Basic/TargetOptions.h"
-#include "llvm/ADT/Triple.h"
-#include "llvm/Support/Compiler.h"
-
-namespace clang {
-namespace targets {
-
-class LLVM_LIBRARY_VISIBILITY Le64TargetInfo : public TargetInfo {
-  static const Builtin::Info BuiltinInfo[];
-
-public:
-  Le64TargetInfo(const llvm::Triple &Triple, const TargetOptions &)
-      : TargetInfo(Triple) {
-    NoAsmVariants = true;
-    LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
-    MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
-    resetDataLayout("e-m:e-v128:32-v16:16-v32:32-v96:32-n8:16:32:64-S128");
-  }
-
-  void getTargetDefines(const LangOptions &Opts,
-                        MacroBuilder &Builder) const override;
-
-  ArrayRef<Builtin::Info> getTargetBuiltins() const override;
-
-  BuiltinVaListKind getBuiltinVaListKind() const override {
-    return TargetInfo::PNaClABIBuiltinVaList;
-  }
-
-  const char *getClobbers() const override { return ""; }
-
-  ArrayRef<const char *> getGCCRegNames() const override { return None; }
-
-  ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
-    return None;
-  }
-
-  bool validateAsmConstraint(const char *&Name,
-                             TargetInfo::ConstraintInfo &Info) const override {
-    return false;
-  }
-
-  bool hasProtectedVisibility() const override { return false; }
-};
-
-} // namespace targets
-} // namespace clang
-#endif // LLVM_CLANG_LIB_BASIC_TARGETS_LE64_H

clang/lib/Basic/Targets/Le64.cpp

-//===--- Le64.cpp - Implement Le64 target feature support -----------------===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-//
-// This file implements Le64 TargetInfo objects.
-//
-//===----------------------------------------------------------------------===//
-
-#include "Le64.h"
-#include "Targets.h"
-#include "clang/Basic/Builtins.h"
-#include "clang/Basic/MacroBuilder.h"
-#include "clang/Basic/TargetBuiltins.h"
-
-using namespace clang;
-using namespace clang::targets;
-
-const Builtin::Info Le64TargetInfo::BuiltinInfo[] = {
-#define BUILTIN(ID, TYPE, ATTRS)                                               \
-  {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr},
-#include "clang/Basic/BuiltinsLe64.def"
-};
-
-ArrayRef<Builtin::Info> Le64TargetInfo::getTargetBuiltins() const {
-  return llvm::makeArrayRef(BuiltinInfo, clang::Le64::LastTSBuiltin -
-                                             Builtin::FirstTSBuiltin);
-}
-
-void Le64TargetInfo::getTargetDefines(const LangOptions &Opts,
-                                      MacroBuilder &Builder) const {
-  DefineStd(Builder, "unix", Opts);
-  defineCPUMacros(Builder, "le64", /*Tuning=*/false);
-  Builder.defineMacro("__ELF__");
-}

clang/lib/Basic/Targets/OSTargets.h

NaClTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
     if (Triple.getArch() == llvm::Triple::arm) {
       // Handled in ARM's setABI().
     } else if (Triple.getArch() == llvm::Triple::x86) {
       this->resetDataLayout("e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-"
                             "i64:64-n8:16:32-S128");
     } else if (Triple.getArch() == llvm::Triple::x86_64) {
       this->resetDataLayout("e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-"
                             "i64:64-n8:16:32:64-S128");
-    } else if (Triple.getArch() == llvm::Triple::mipsel) {
-      // Handled on mips' setDataLayout.
     } else {
-      assert(Triple.getArch() == llvm::Triple::le32);
-      this->resetDataLayout("e-p:32:32-i64:64");
+      assert(Triple.getArch() == llvm::Triple::mipsel);
+      // Handled on mips' setDataLayout.
     }
   }
 };
 
 // Fuchsia Target
 template <typename Target>
 class LLVM_LIBRARY_VISIBILITY FuchsiaTargetInfo : public OSTargetInfo<Target> {
 protected:

clang/lib/CodeGen/ItaniumCXXABI.cpp

CodeGen::CGCXXABI *CodeGen::CreateItaniumCXXABI(CodeGenModule &CGM) {
 
   case TargetCXXABI::WebAssembly:
     return new WebAssemblyCXXABI(CGM);
 
   case TargetCXXABI::XL:
     return new XLCXXABI(CGM);
 
   case TargetCXXABI::GenericItanium:
-    if (CGM.getContext().getTargetInfo().getTriple().getArch()
-        == llvm::Triple::le32) {
-      // For PNaCl, use ARM-style method pointers so that PNaCl code
-      // does not assume anything about the alignment of function
-      // pointers.
-      return new ItaniumCXXABI(CGM, /*UseARMMethodPtrABI=*/true);
-    }
     return new ItaniumCXXABI(CGM);
 
   case TargetCXXABI::Microsoft:
     llvm_unreachable("Microsoft ABI is not Itanium-based");
   }
   llvm_unreachable("bad ABI kind");
 }
 

clang/lib/CodeGen/TargetInfo.cpp

auto SetCGInfo = [&](TargetCodeGenInfo *P) -> const TargetCodeGenInfo & {
     return *P;
   };
 
   const llvm::Triple &Triple = getTarget().getTriple();
   switch (Triple.getArch()) {
   default:
     return SetCGInfo(new DefaultTargetCodeGenInfo(Types));
 
-  case llvm::Triple::le32:
-    return SetCGInfo(new PNaClTargetCodeGenInfo(Types));
   case llvm::Triple::m68k:
     return SetCGInfo(new M68kTargetCodeGenInfo(Types));
   case llvm::Triple::mips:
   case llvm::Triple::mipsel:
     if (Triple.getOS() == llvm::Triple::NaCl)
       return SetCGInfo(new PNaClTargetCodeGenInfo(Types));
     return SetCGInfo(new MIPSTargetCodeGenInfo(Types, true));
 

clang/lib/Driver/ToolChains/Clang.cpp

for (const auto &Arg : Args) {
     // If -fno-builtin is specified, then there's no need to pass the option to
     // the frontend.
     if (!UseBuiltins)
       continue;
 
     StringRef FuncName = Arg->getValue();
     CmdArgs.push_back(Args.MakeArgString("-fno-builtin-" + FuncName));
   }
-
-  // le32-specific flags:
-  //  -fno-math-builtin: clang should not convert math builtins to intrinsics
-  //                     by default.
-  if (TC.getArch() == llvm::Triple::le32)
-    CmdArgs.push_back("-fno-math-builtin");
 }
 
 bool Driver::getDefaultModuleCachePath(SmallVectorImpl<char> &Result) {
   if (llvm::sys::path::cache_directory(Result)) {
     llvm::sys::path::append(Result, "clang");
     llvm::sys::path::append(Result, "ModuleCache");
     return true;
   }

clang/test/CodeGen/ext-int-cc.c

 // RUN: %clang_cc1 -triple x86_64-gnu-linux -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=LIN64
 // RUN: %clang_cc1 -triple x86_64-windows-pc -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=WIN64
 // RUN: %clang_cc1 -triple i386-gnu-linux -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=LIN32
 // RUN: %clang_cc1 -triple i386-windows-pc -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=WIN32
-// RUN: %clang_cc1 -triple le32-nacl -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=NACL
 // RUN: %clang_cc1 -triple nvptx64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=NVPTX64
 // RUN: %clang_cc1 -triple nvptx -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=NVPTX
 // RUN: %clang_cc1 -triple sparcv9 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=SPARCV9
 // RUN: %clang_cc1 -triple sparc -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=SPARC
 // RUN: %clang_cc1 -triple mips64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=MIPS64
 // RUN: %clang_cc1 -triple mips -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=MIPS
 // RUN: %clang_cc1 -triple spir64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=SPIR64
 // RUN: %clang_cc1 -triple spir -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=SPIR

clang/test/CodeGen/le32-arguments.c

-// RUN: %clang_cc1 -triple le32-unknown-nacl %s -emit-llvm -o - | FileCheck %s
-
-// Basic argument/attribute tests for le32/PNaCl
-
-// CHECK-LABEL: define{{.*}} void @f0(i32 %i, i32 %j, double %k)
-void f0(int i, long j, double k) {}
-
-typedef struct {
-  int aa;
-  int bb;
-} s1;
-// Structs should be passed byval and not split up
-// CHECK-LABEL: define{{.*}} void @f1(%struct.s1* byval(%struct.s1) align 4 %i)
-void f1(s1 i) {}
-
-typedef struct {
-  int cc;
-} s2;
-// Structs should be returned sret and not simplified by the frontend
-// CHECK-LABEL: define{{.*}} void @f2(%struct.s2* noalias sret(%struct.s2) align 4 %agg.result)
-s2 f2() {
-  s2 foo;
-  return foo;
-}
-
-// CHECK-LABEL: define{{.*}} void @f3(i64 %i)
-void f3(long long i) {}
-
-// i8/i16 should be signext, i32 and higher should not
-// CHECK-LABEL: define{{.*}} void @f4(i8 signext %a, i16 signext %b)
-void f4(char a, short b) {}
-
-// CHECK-LABEL: define{{.*}} void @f5(i8 zeroext %a, i16 zeroext %b)
-void f5(unsigned char a, unsigned short b) {}
-
-
-enum my_enum {
-  ENUM1,
-  ENUM2,
-  ENUM3,
-};
-// Enums should be treated as the underlying i32
-// CHECK-LABEL: define{{.*}} void @f6(i32 %a)
-void f6(enum my_enum a) {}
-
-union simple_union {
-  int a;
-  char b;
-};
-// Unions should be passed as byval structs
-// CHECK-LABEL: define{{.*}} void @f7(%union.simple_union* byval(%union.simple_union) align 4 %s)
-void f7(union simple_union s) {}
-
-typedef struct {
-  int b4 : 4;
-  int b3 : 3;
-  int b8 : 8;
-} bitfield1;
-// Bitfields should be passed as byval structs
-// CHECK-LABEL: define{{.*}} void @f8(%struct.bitfield1* byval(%struct.bitfield1) align 4 %bf1)
-void f8(bitfield1 bf1) {}

clang/test/CodeGen/le32-libcall-pow.c

-// RUN: %clang_cc1 -fno-math-builtin -fmath-errno -emit-llvm -o - %s -triple le32-unknown-nacl | FileCheck %s
-// RUN: %clang_cc1 -fno-math-builtin -emit-llvm -o - %s -triple le32-unknown-nacl | FileCheck %s
-
-// le32 (PNaCl) never generates intrinsics for pow calls, with or without
-// errno, when the -fno-math-builtin flag is passed to -cc1. A separate test
-// makes sure this flag is indeed passed for le32.
-
-float powf(float, float);
-double pow(double, double);
-long double powl(long double, long double);
-
-// CHECK-LABEL: define{{.*}} void @test_pow
-void test_pow(float a0, double a1, long double a2) {
-  // CHECK: call float @powf
-  float l0 = powf(a0, a0);
-
-  // CHECK: call double @pow
-  double l1 = pow(a1, a1);
-
-  // CHECK: call double @powl
-  long double l2 = powl(a2, a2);
-}
-
-// CHECK: declare float @powf(float, float)
-// CHECK: declare double @pow(double, double)
-// CHECK: declare double @powl(double, double)
-

clang/test/CodeGen/le32-regparm.c

-// RUN: %clang_cc1 -triple le32-unknown-nacl %s -fsyntax-only -verify
-// RUN: %clang_cc1 -triple aarch64 %s -fsyntax-only -verify
-
-void __attribute__((regparm(2))) fc_f1(int i, int j, int k) {} // expected-error{{'regparm' is not valid on this platform}}
-

clang/test/CodeGen/le32-vaarg.c

-// RUN: %clang_cc1 -triple le32-unknown-nacl -emit-llvm -o - %s | FileCheck %s
-#include <stdarg.h>
-
-int get_int(va_list *args) {
-  return va_arg(*args, int);
-}
-// CHECK: define{{.*}} i32 @get_int
-// CHECK: [[RESULT:%[a-z_0-9]+]] = va_arg {{.*}}, i32{{$}}
-// CHECK: store i32 [[RESULT]], i32* [[LOC:%[a-z_0-9]+]]
-// CHECK: [[RESULT2:%[a-z_0-9]+]] = load i32, i32* [[LOC]]
-// CHECK: ret i32 [[RESULT2]]
-
-struct Foo {
-  int x;
-};
-
-struct Foo dest;
-
-void get_struct(va_list *args) {
-  dest = va_arg(*args, struct Foo);
-}
-// CHECK: define{{.*}} void @get_struct
-// CHECK: [[RESULT:%[a-z_0-9]+]] = va_arg {{.*}}, %struct.Foo{{$}}
-// CHECK: store %struct.Foo [[RESULT]], %struct.Foo* [[LOC:%[a-z_0-9]+]]
-// CHECK: [[LOC2:%[a-z_0-9]+]] = bitcast {{.*}} [[LOC]] to i8*
-// CHECK: call void @llvm.memcpy{{.*}}@dest{{.*}}, i8* align {{[0-9]+}} [[LOC2]]
-
-void skip_struct(va_list *args) {
-  va_arg(*args, struct Foo);
-}
-// CHECK: define{{.*}} void @skip_struct
-// CHECK: va_arg {{.*}}, %struct.Foo{{$}}

clang/test/CodeGen/pr18235.c

-// RUN: not %clang_cc1 -triple le32-unknown-nacl %s -S -o - 2>&1 | FileCheck %s
-
-// CHECK: error: unable to create target: 'No available targets are compatible with triple "le32-unknown-nacl"'

clang/test/CodeGen/target-data.c

 // RUN: %clang_cc1 -triple arm-nacl -o - -emit-llvm %s | \
 // RUN: FileCheck %s -check-prefix=ARM-NACL
 // ARM-NACL: target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S128"
 
 // RUN: %clang_cc1 -triple mipsel-nacl -o - -emit-llvm %s | \
 // RUN: FileCheck %s -check-prefix=MIPS-NACL
 // MIPS-NACL: target datalayout = "e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64"
 
-// RUN: %clang_cc1 -triple le32-nacl -o - -emit-llvm %s | \
-// RUN: FileCheck %s -check-prefix=LE32-NACL
-// LE32-NACL: target datalayout = "e-p:32:32-i64:64"
-
 // RUN: %clang_cc1 -triple wasm32-unknown-unknown -o - -emit-llvm %s | \
 // RUN: FileCheck %s -check-prefix=WEBASSEMBLY32
 // WEBASSEMBLY32: target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 
 // RUN: %clang_cc1 -triple wasm64-unknown-unknown -o - -emit-llvm %s | \
 // RUN: FileCheck %s -check-prefix=WEBASSEMBLY64
 // WEBASSEMBLY64: target datalayout = "e-m:e-p:64:64-i64:64-n32:64-S128"
 

clang/test/CodeGenCXX/member-function-pointers.cpp

 // RUN: %clang_cc1 %s -emit-llvm -o - -triple=x86_64-unknown-unknown | FileCheck -check-prefix CODE-LP64 %s
 // RUN: %clang_cc1 %s -emit-llvm -o - -triple=i386-unknown-unknown | FileCheck -check-prefix CODE-LP32 %s
 // RUN: %clang_cc1 %s -emit-llvm -o - -triple=x86_64-unknown-unknown | FileCheck -check-prefix GLOBAL-LP64 %s
 // RUN: %clang_cc1 %s -emit-llvm -o - -triple=i386-unknown-unknown | FileCheck -check-prefix GLOBAL-LP32 %s
 // RUN: %clang_cc1 %s -emit-llvm -o - -triple=armv7-unknown-unknown | FileCheck -check-prefix GLOBAL-ARM %s
 
-// PNaCl uses the same representation of method pointers as ARM.
-// RUN: %clang_cc1 %s -emit-llvm -o - -triple=le32-unknown-nacl | FileCheck -check-prefix GLOBAL-ARM %s
 // MIPS uses the same representation of method pointers as ARM.
 // RUN: %clang_cc1 %s -emit-llvm -o - -triple=mips-unknown-linux-gnu | FileCheck -check-prefix GLOBAL-ARM %s
 // WebAssembly uses the same representation of method pointers as ARM.
 // RUN: %clang_cc1 %s -emit-llvm -o - -triple=wasm32-unknown-unknown | FileCheck -check-prefix GLOBAL-ARM %s
 
 struct A { int a; void f(); virtual void vf1(); virtual void vf2(); };
 struct B { int b; virtual void g(); };
 struct C : B, A { };

clang/test/CodeGenCXX/static-init-pnacl.cpp

-// RUN: %clang_cc1 -emit-llvm -triple=le32-unknown-nacl -o - %s | FileCheck %s
-
-int f();
-
-// Test that PNaCl uses the Itanium/x86 ABI in which the static
-// variable's guard variable is tested via "load i8 and compare with
-// zero" rather than the ARM ABI which uses "load i32 and test the
-// bottom bit".
-void g() {
-  static int a = f();
-}
-// CHECK: [[LOAD:%.*]] = load atomic i8, i8* bitcast (i64* @_ZGVZ1gvE1a to i8*) acquire, align 8
-// CHECK-NEXT: [[GUARD:%.*]] = icmp eq i8 [[LOAD]], 0
-// CHECK-NEXT: br i1 [[GUARD]]

clang/test/Driver/le32-toolchain.c

-// RUN: %clang -### -target le32-unknown-nacl %s 2>&1 | FileCheck -check-prefix=CHECK-DEFAULT %s
-
-// CHECK-DEFAULT: "-cc1" {{.*}} "-fno-math-builtin"
-

clang/test/Driver/le32-unknown-nacl.cpp

-// RUN: %clang -target le32-unknown-nacl -### %s -emit-llvm-only -c 2>&1 | FileCheck %s -check-prefix=ECHO
-// RUN: %clang -target le32-unknown-nacl %s -emit-llvm -S -c -o - | FileCheck %s
-// RUN: %clang -target le32-unknown-nacl -fexperimental-new-pass-manager %s -emit-llvm -S -c -o - | FileCheck %s
-// RUN: %clang -target le32-unknown-nacl %s -emit-llvm -S -c -pthread -o - | FileCheck %s -check-prefix=THREADS
-
-// ECHO: {{.*}} "-cc1" {{.*}}le32-unknown-nacl.c
-
-typedef __builtin_va_list va_list;
-typedef __SIZE_TYPE__ size_t;
-typedef __PTRDIFF_TYPE__ ptrdiff_t;
-
-extern "C" {
-
-// CHECK: @align_c = dso_local global i32 1
-int align_c = __alignof(char);
-
-// CHECK: @align_s = dso_local global i32 2
-int align_s = __alignof(short);
-
-// CHECK: @align_i = dso_local global i32 4
-int align_i = __alignof(int);
-
-// CHECK: @align_l = dso_local global i32 4
-int align_l = __alignof(long);
-
-// CHECK: @align_ll = dso_local global i32 8
-int align_ll = __alignof(long long);
-
-// CHECK: @align_p = dso_local global i32 4
-int align_p = __alignof(void*);
-
-// CHECK: @align_f = dso_local global i32 4
-int align_f = __alignof(float);
-
-// CHECK: @align_d = dso_local global i32 8
-int align_d = __alignof(double);
-
-// CHECK: @align_ld = dso_local global i32 8
-int align_ld = __alignof(long double);
-
-// CHECK: @align_vl = dso_local global i32 4
-int align_vl = __alignof(va_list);
-
-// CHECK: __LITTLE_ENDIAN__defined
-#ifdef __LITTLE_ENDIAN__
-void __LITTLE_ENDIAN__defined() {}
-#endif
-
-// CHECK: __native_client__defined
-#ifdef __native_client__
-void __native_client__defined() {}
-#endif
-
-// CHECK: __le32__defined
-#ifdef __le32__
-void __le32__defined() {}
-#endif
-
-// CHECK: __pnacl__defined
-#ifdef __pnacl__
-void __pnacl__defined() {}
-#endif
-
-// CHECK: unixdefined
-#ifdef unix
-void unixdefined() {}
-#endif
-
-// CHECK: __ELF__defined
-#ifdef __ELF__
-void __ELF__defined() {}
-#endif
-
-// CHECK: _GNU_SOURCEdefined
-#ifdef _GNU_SOURCE
-void _GNU_SOURCEdefined() {}
-#endif
-
-// THREADS: _REENTRANTdefined
-// CHECK: _REENTRANTundefined
-#ifdef _REENTRANT
-void _REENTRANTdefined() {}
-#else
-void _REENTRANTundefined() {}
-#endif
-
-// Check types
-
-// CHECK: signext i8 @check_char()
-char check_char() { return 0; }
-
-// CHECK: signext i16 @check_short()
-short check_short() { return 0; }
-
-// CHECK: i32 @check_int()
-int check_int() { return 0; }
-
-// CHECK: i32 @check_long()
-long check_long() { return 0; }
-
-// CHECK: i64 @check_longlong()
-long long check_longlong() { return 0; }
-
-// CHECK: zeroext i8 @check_uchar()
-unsigned char check_uchar() { return 0; }
-
-// CHECK: zeroext i16 @check_ushort()
-unsigned short check_ushort() { return 0; }
-
-// CHECK: i32 @check_uint()
-unsigned int check_uint() { return 0; }
-
-// CHECK: i32 @check_ulong()
-unsigned long check_ulong() { return 0; }
-
-// CHECK: i64 @check_ulonglong()
-unsigned long long check_ulonglong() { return 0; }
-
-// CHECK: i32 @check_size_t()
-size_t check_size_t() { return 0; }
-
-// CHECK: float @check_float()
-float check_float() { return 0; }
-
-// CHECK: double @check_double()
-double check_double() { return 0; }
-
-// CHECK: double @check_longdouble()
-long double check_longdouble() { return 0; }
-
-}
-
-template<int> void Switch();
-template<> void Switch<4>();
-template<> void Switch<8>();
-template<> void Switch<16>();
-
-void check_pointer_size() {
-  // CHECK: SwitchILi4
-  Switch<sizeof(void*)>();
-
-  // CHECK: SwitchILi8
-  Switch<sizeof(long long)>();
-
-  // CHECK: SwitchILi16
-  Switch<sizeof(va_list)>();
-}

clang/test/Driver/le64-unknown-unknown.cpp

-// RUN: %clang -target le64-unknown-unknown -### %s -emit-llvm-only -c 2>&1 | FileCheck %s -check-prefix=ECHO
-// RUN: %clang -target le64-unknown-unknown %s -emit-llvm -S -c -o - | FileCheck %s
-
-// ECHO: {{.*}} "-cc1" {{.*}}le64-unknown-unknown.c
-
-typedef __builtin_va_list va_list;
-typedef __SIZE_TYPE__ size_t;
-typedef __PTRDIFF_TYPE__ ptrdiff_t;
-
-extern "C" {
-
-// CHECK: @align_c = dso_local global i32 1
-int align_c = __alignof(char);
-
-// CHECK: @align_s = dso_local global i32 2
-int align_s = __alignof(short);
-
-// CHECK: @align_i = dso_local global i32 4
-int align_i = __alignof(int);
-
-// CHECK: @align_l = dso_local global i32 8
-int align_l = __alignof(long);
-
-// CHECK: @align_ll = dso_local global i32 8
-int align_ll = __alignof(long long);
-
-// CHECK: @align_p = dso_local global i32 8
-int align_p = __alignof(void*);
-
-// CHECK: @align_f = dso_local global i32 4
-int align_f = __alignof(float);
-
-// CHECK: @align_d = dso_local global i32 8
-int align_d = __alignof(double);
-
-// CHECK: @align_ld = dso_local global i32 8
-int align_ld = __alignof(long double);
-
-// CHECK: @align_vl = dso_local global i32 4
-int align_vl = __alignof(va_list);
-
-// CHECK: __LITTLE_ENDIAN__defined
-#ifdef __LITTLE_ENDIAN__
-void __LITTLE_ENDIAN__defined() {}
-#endif
-
-// CHECK: __le64defined
-#ifdef __le64
-void __le64defined() {}
-#endif
-
-// CHECK: __le64__defined
-#ifdef __le64__
-void __le64__defined() {}
-#endif
-
-// CHECK: unixdefined
-#ifdef unix
-void unixdefined() {}
-#endif
-
-// CHECK: __unixdefined
-#ifdef __unix
-void __unixdefined() {}
-#endif
-
-// CHECK: __unix__defined
-#ifdef __unix__
-void __unix__defined() {}
-#endif
-
-// CHECK: __ELF__defined
-#ifdef __ELF__
-void __ELF__defined() {}
-#endif
-
-// Check types
-
-// CHECK: signext i8 @check_char()
-char check_char() { return 0; }
-
-// CHECK: signext i16 @check_short()
-short check_short() { return 0; }
-
-// CHECK: i32 @check_int()
-int check_int() { return 0; }
-
-// CHECK: i64 @check_long()
-long check_long() { return 0; }
-
-// CHECK: i64 @check_longlong()
-long long check_longlong() { return 0; }
-
-// CHECK: zeroext i8 @check_uchar()
-unsigned char check_uchar() { return 0; }
-
-// CHECK: zeroext i16 @check_ushort()
-unsigned short check_ushort() { return 0; }
-
-// CHECK: i32 @check_uint()
-unsigned int check_uint() { return 0; }
-
-// CHECK: i64 @check_ulong()
-unsigned long check_ulong() { return 0; }
-
-// CHECK: i64 @check_ulonglong()
-unsigned long long check_ulonglong() { return 0; }
-
-// CHECK: i64 @check_size_t()
-size_t check_size_t() { return 0; }
-
-// CHECK: i64 @check_ptrdiff_t()
-ptrdiff_t check_ptrdiff_t() { return 0; }
-
-// CHECK: float @check_float()
-float check_float() { return 0; }
-
-// CHECK: double @check_double()
-double check_double() { return 0; }
-
-// CHECK: double @check_longdouble()
-long double check_longdouble() { return 0; }
-
-}
-
-template<int> void Switch();
-template<> void Switch<4>();
-template<> void Switch<8>();
-template<> void Switch<16>();
-
-void check_pointer_size() {
-  // CHECK: SwitchILi8
-  Switch<sizeof(void*)>();
-
-  // CHECK: SwitchILi16
-  Switch<sizeof(va_list)>();
-}

clang/test/Headers/stdarg.cpp

 // RUN: %clang_cc1 -emit-llvm -std=c99 -x c %s -triple aarch64-linux -o - | FileCheck %s --check-prefix=AARCH64-C
 // RUN: %clang_cc1 -emit-llvm -std=c++17 -x c++ %s -triple aarch64-linux -o - | FileCheck %s --check-prefix=AARCH64-CXX
 // RUN: %clang_cc1 -emit-llvm -std=c99 -x c %s -triple x86_64-linux -o - | FileCheck %s --check-prefix=X86_64-C
 // RUN: %clang_cc1 -emit-llvm -std=c++17 -x c++ %s -triple x86_64-linux -o - | FileCheck %s --check-prefix=X86_64-CXX
 // RUN: %clang_cc1 -emit-llvm -std=c99 -x c %s -triple ppc64-linux -o - | FileCheck %s --check-prefix=PPC64-C
 // RUN: %clang_cc1 -emit-llvm -std=c++17 -x c++ %s -triple ppc64-linux -o - | FileCheck %s --check-prefix=PPC64-CXX
 // RUN: %clang_cc1 -emit-llvm -std=c99 -x c %s -triple armv7-apple-darwin9 -target-abi aapcs -o - | FileCheck %s --check-prefix=AAPCS-C
 // RUN: %clang_cc1 -emit-llvm -std=c++17 -x c++ %s -triple armv7-apple-darwin9 -target-abi aapcs -o - | FileCheck %s --check-prefix=AAPCS-CXX
 // RUN: %clang_cc1 -emit-llvm -std=c99 -x c %s -triple s390x-linux -o - | FileCheck %s --check-prefix=SYSTEMZ-C
 // RUN: %clang_cc1 -emit-llvm -std=c++17 -x c++ %s -triple s390x-linux -o - | FileCheck %s --check-prefix=SYSTEMZ-CXX
-// RUN: %clang_cc1 -emit-llvm -std=c99 -x c %s -triple le32-nacl -o - | FileCheck %s --check-prefix=PNACL-C
-// RUN: %clang_cc1 -emit-llvm -std=c++17 -x c++ %s -triple le32-nacl -o - | FileCheck %s --check-prefix=PNACL-CXX
 // RUN: %clang_cc1 -emit-llvm -std=c99 -x c %s -triple i686-linux -o - | FileCheck %s --check-prefix=CHARPTR-C
 // RUN: %clang_cc1 -emit-llvm -std=c++17 -x c++ %s -triple i686-linux -o - | FileCheck %s --check-prefix=CHARPTR-CXX
 // RUN: %clang_cc1 -emit-llvm -std=c99 -x c %s -triple xcore -o - | FileCheck %s --check-prefix=VOIDPTR-C
 // RUN: %clang_cc1 -emit-llvm -std=c++17 -x c++ %s -triple xcore -o - | FileCheck %s --check-prefix=VOIDPTR-CXX
 
 #include <stdarg.h>
 
 // AARCH64-C: define {{.*}} @f(i32 %n, %struct.__va_list* %list)
 // AARCH64-CXX: define {{.*}} @_Z1fiSt9__va_list(i32 %n, %"struct.std::__va_list"* %list)
 // X86_64-C: define {{.*}} @f(i32 %n, %struct.__va_list_tag* %list)
 // X86_64-CXX: define {{.*}} @_Z1fiP13__va_list_tag(i32 %n, %struct.__va_list_tag* %list)
 // PPC64-C: define {{.*}} @f(i32 signext %n, i8* %list)
 // PPC64-CXX: define {{.*}} @_Z1fiPc(i32 signext %n, i8* %list)
 // AAPCS-C: define {{.*}} @f(i32 %n, [1 x i32] %list.coerce)
 // AAPCS-CXX: define {{.*}} @_Z1fiSt9__va_list(i32 %n, [1 x i32] %list.coerce)
 // SYSTEMZ-C: define {{.*}} @f(i32 signext %n, %struct.__va_list_tag* %list)
 // SYSTEMZ-CXX: define {{.*}} @_Z1fiP13__va_list_tag(i32 signext %n, %struct.__va_list_tag* %list)
-// PNACL-C: define {{.*}} @f(i32 %n, i32* %list)
-// PNACL-CXX: define {{.*}} @_Z1fiPi(i32 %n, i32* %list)
 // CHARPTR-C: define {{.*}} @f(i32 %n, i8* %list)
 // CHARPTR-CXX: define {{.*}} @_Z1fiPc(i32 %n, i8* %list)
 // VOIDPTR-C: define {{.*}} @f(i32 %n, i8* %list)
 // VOIDPTR-CXX: define {{.*}} @_Z1fiPv(i32 %n, i8* %list)
 void f(int n, va_list list) {}

llvm/include/llvm/ADT/Triple.h

enum ArchType {
     tcele,          // TCE little endian (http://tce.cs.tut.fi/): tcele
     thumb,          // Thumb (little endian): thumb, thumbv.*
     thumbeb,        // Thumb (big endian): thumbeb
     x86,            // X86: i[3-9]86
     x86_64,         // X86-64: amd64, x86_64
     xcore,          // XCore: xcore
     nvptx,          // NVPTX: 32-bit
     nvptx64,        // NVPTX: 64-bit
-    le32,           // le32: generic little-endian 32-bit CPU (PNaCl)
-    le64,           // le64: generic little-endian 64-bit CPU (PNaCl)
     amdil,          // AMDIL
     amdil64,        // AMDIL with 64-bit pointers
     hsail,          // AMD HSAIL
     hsail64,        // AMD HSAIL with 64-bit pointers
     spir,           // SPIR: standard portable IR for OpenCL 32-bit version
     spir64,         // SPIR: standard portable IR for OpenCL 64-bit version
     kalimba,        // Kalimba: generic kalimba
     shave,          // SHAVE: Movidius vector VLIW processors

llvm/lib/Support/Triple.cpp

StringRef Triple::getArchTypeName(ArchType Kind) {
   case bpfeb:          return "bpfeb";
   case bpfel:          return "bpfel";
   case csky:           return "csky";
   case hexagon:        return "hexagon";
   case hsail64:        return "hsail64";
   case hsail:          return "hsail";
   case kalimba:        return "kalimba";
   case lanai:          return "lanai";
-  case le32:           return "le32";
-  case le64:           return "le64";
   case m68k:           return "m68k";
   case mips64:         return "mips64";
   case mips64el:       return "mips64el";
   case mips:           return "mips";
   case mipsel:         return "mipsel";
   case msp430:         return "msp430";
   case nvptx64:        return "nvptx64";
   case nvptx:          return "nvptx";
StringRef Triple::getArchTypePrefix(ArchType Kind) {
   case x86_64:      return "x86";
 
   case xcore:       return "xcore";
 
   // NVPTX intrinsics are namespaced under nvvm.
   case nvptx:       return "nvvm";
   case nvptx64:     return "nvvm";
 
-  case le32:        return "le32";
-  case le64:        return "le64";
-
   case amdil:
   case amdil64:     return "amdil";
 
   case hsail:
   case hsail64:     return "hsail";
 
   case spir:
   case spir64:      return "spir";
return StringSwitch<Triple::ArchType>(Name)
     .Case("tcele", tcele)
     .Case("thumb", thumb)
     .Case("thumbeb", thumbeb)
     .Case("x86", x86)
     .Case("x86-64", x86_64)
     .Case("xcore", xcore)
     .Case("nvptx", nvptx)
     .Case("nvptx64", nvptx64)
-    .Case("le32", le32)
-    .Case("le64", le64)
     .Case("amdil", amdil)
     .Case("amdil64", amdil64)
     .Case("hsail", hsail)
     .Case("hsail64", hsail64)
     .Case("spir", spir)
     .Case("spir64", spir64)
     .Case("kalimba", kalimba)
     .Case("lanai", lanai)
auto AT = StringSwitch<Triple::ArchType>(ArchName)
     .Case("sparc", Triple::sparc)
     .Case("sparcel", Triple::sparcel)
     .Cases("sparcv9", "sparc64", Triple::sparcv9)
     .Case("tce", Triple::tce)
     .Case("tcele", Triple::tcele)
     .Case("xcore", Triple::xcore)
     .Case("nvptx", Triple::nvptx)
     .Case("nvptx64", Triple::nvptx64)
-    .Case("le32", Triple::le32)
-    .Case("le64", Triple::le64)
     .Case("amdil", Triple::amdil)
     .Case("amdil64", Triple::amdil64)
     .Case("hsail", Triple::hsail)
     .Case("hsail64", Triple::hsail64)
     .Case("spir", Triple::spir)
     .Case("spir64", Triple::spir64)
     .StartsWith("kalimba", Triple::kalimba)
     .Case("lanai", Triple::lanai)
static Triple::ObjectFormatType getDefaultFormat(const Triple &T) {
   case Triple::bpfeb:
   case Triple::bpfel:
   case Triple::csky:
   case Triple::hexagon:
   case Triple::hsail64:
   case Triple::hsail:
   case Triple::kalimba:
   case Triple::lanai:
-  case Triple::le32:
-  case Triple::le64:
   case Triple::m68k:
   case Triple::mips64:
   case Triple::mips64el:
   case Triple::mips:
   case Triple::mipsel:
   case Triple::msp430:
   case Triple::nvptx64:
   case Triple::nvptx:
static unsigned getArchPointerBitWidth(llvm::Triple::ArchType Arch) {
   case llvm::Triple::arc:
   case llvm::Triple::arm:
   case llvm::Triple::armeb:
   case llvm::Triple::csky:
   case llvm::Triple::hexagon:
   case llvm::Triple::hsail:
   case llvm::Triple::kalimba:
   case llvm::Triple::lanai:
-  case llvm::Triple::le32:
   case llvm::Triple::m68k:
   case llvm::Triple::mips:
   case llvm::Triple::mipsel:
   case llvm::Triple::nvptx:
   case llvm::Triple::ppc:
   case llvm::Triple::ppcle:
   case llvm::Triple::r600:
   case llvm::Triple::renderscript32:
static unsigned getArchPointerBitWidth(llvm::Triple::ArchType Arch) {
 
   case llvm::Triple::aarch64:
   case llvm::Triple::aarch64_be:
   case llvm::Triple::amdgcn:
   case llvm::Triple::amdil64:
   case llvm::Triple::bpfeb:
   case llvm::Triple::bpfel:
   case llvm::Triple::hsail64:
-  case llvm::Triple::le64:
   case llvm::Triple::mips64:
   case llvm::Triple::mips64el:
   case llvm::Triple::nvptx64:
   case llvm::Triple::ppc64:
   case llvm::Triple::ppc64le:
   case llvm::Triple::renderscript64:
   case llvm::Triple::riscv64:
   case llvm::Triple::sparcv9:
Triple Triple::get32BitArchVariant() const {
   case Triple::arc:
   case Triple::arm:
   case Triple::armeb:
   case Triple::csky:
   case Triple::hexagon:
   case Triple::hsail:
   case Triple::kalimba:
   case Triple::lanai:
-  case Triple::le32:
   case Triple::m68k:
   case Triple::mips:
   case Triple::mipsel:
   case Triple::nvptx:
   case Triple::ppc:
   case Triple::ppcle:
   case Triple::r600:
   case Triple::renderscript32:
Triple Triple::get32BitArchVariant() const {
   case Triple::xcore:
     // Already 32-bit.
     break;
 
   case Triple::aarch64:        T.setArch(Triple::arm);     break;
   case Triple::aarch64_be:     T.setArch(Triple::armeb);   break;
   case Triple::amdil64:        T.setArch(Triple::amdil);   break;
   case Triple::hsail64:        T.setArch(Triple::hsail);   break;
-  case Triple::le64:           T.setArch(Triple::le32);    break;
   case Triple::mips64:         T.setArch(Triple::mips);    break;
   case Triple::mips64el:       T.setArch(Triple::mipsel);  break;
   case Triple::nvptx64:        T.setArch(Triple::nvptx);   break;
   case Triple::ppc64:          T.setArch(Triple::ppc);     break;
   case Triple::ppc64le:        T.setArch(Triple::ppcle);   break;
   case Triple::renderscript64: T.setArch(Triple::renderscript32); break;
   case Triple::riscv64:        T.setArch(Triple::riscv32); break;
   case Triple::sparcv9:        T.setArch(Triple::sparc);   break;
Triple Triple::get64BitArchVariant() const {
 
   case Triple::aarch64:
   case Triple::aarch64_be:
   case Triple::amdgcn:
   case Triple::amdil64:
   case Triple::bpfeb:
   case Triple::bpfel:
   case Triple::hsail64:
-  case Triple::le64:
   case Triple::mips64:
   case Triple::mips64el:
   case Triple::nvptx64:
   case Triple::ppc64:
   case Triple::ppc64le:
   case Triple::renderscript64:
   case Triple::riscv64:
   case Triple::sparcv9:
   case Triple::spir64:
   case Triple::systemz:
   case Triple::ve:
   case Triple::wasm64:
   case Triple::x86_64:
     // Already 64-bit.
     break;
 
   case Triple::aarch64_32:      T.setArch(Triple::aarch64);    break;
   case Triple::amdil:           T.setArch(Triple::amdil64);    break;
   case Triple::arm:             T.setArch(Triple::aarch64);    break;
   case Triple::armeb:           T.setArch(Triple::aarch64_be); break;
   case Triple::hsail:           T.setArch(Triple::hsail64);    break;
-  case Triple::le32:            T.setArch(Triple::le64);       break;
   case Triple::mips:            T.setArch(Triple::mips64);     break;
   case Triple::mipsel:          T.setArch(Triple::mips64el);   break;
   case Triple::nvptx:           T.setArch(Triple::nvptx64);    break;
   case Triple::ppc:             T.setArch(Triple::ppc64);      break;
   case Triple::ppcle:           T.setArch(Triple::ppc64le);    break;
   case Triple::renderscript32:  T.setArch(Triple::renderscript64);     break;
   case Triple::riscv32:         T.setArch(Triple::riscv64);    break;
   case Triple::sparc:           T.setArch(Triple::sparcv9);    break;
Triple Triple::getBigEndianArchVariant() const {
   case Triple::amdgcn:
   case Triple::amdil64:
   case Triple::amdil:
   case Triple::avr:
   case Triple::hexagon:
   case Triple::hsail64:
   case Triple::hsail:
   case Triple::kalimba:
-  case Triple::le32:
-  case Triple::le64:
   case Triple::msp430:
   case Triple::nvptx64:
   case Triple::nvptx:
   case Triple::r600:
   case Triple::renderscript32:
   case Triple::renderscript64:
   case Triple::riscv32:
   case Triple::riscv64:
bool Triple::isLittleEndian() const {
   case Triple::arm:
   case Triple::avr:
   case Triple::bpfel:
   case Triple::csky:
   case Triple::hexagon:
   case Triple::hsail64:
   case Triple::hsail:
   case Triple::kalimba:
-  case Triple::le32:
-  case Triple::le64:
   case Triple::mips64el:
   case Triple::mipsel:
   case Triple::msp430:
   case Triple::nvptx64:
   case Triple::nvptx:
   case Triple::ppcle:
   case Triple::ppc64le:
   case Triple::r600:

llvm/test/CodeGen/Generic/no-target.ll

-; RUN: not llc -mtriple le32-unknown-nacl %s -o - 2>&1 | FileCheck %s
-
-; CHECK: error: unable to get target for 'le32-unknown-nacl'

llvm/unittests/ADT/TripleTest.cpp

TEST(TripleTest, BitWidthArchVariants) {
   T.setArch(Triple::renderscript32);
   EXPECT_EQ(Triple::renderscript32, T.get32BitArchVariant().getArch());
   EXPECT_EQ(Triple::renderscript64, T.get64BitArchVariant().getArch());
 
   T.setArch(Triple::renderscript64);
   EXPECT_EQ(Triple::renderscript32, T.get32BitArchVariant().getArch());
   EXPECT_EQ(Triple::renderscript64, T.get64BitArchVariant().getArch());
 
-  T.setArch(Triple::le32);
-  EXPECT_EQ(Triple::le32, T.get32BitArchVariant().getArch());
-  EXPECT_EQ(Triple::le64, T.get64BitArchVariant().getArch());
-
-  T.setArch(Triple::le64);
-  EXPECT_EQ(Triple::le32, T.get32BitArchVariant().getArch());
-  EXPECT_EQ(Triple::le64, T.get64BitArchVariant().getArch());
-
   T.setArch(Triple::armeb);
   EXPECT_EQ(Triple::armeb, T.get32BitArchVariant().getArch());
   EXPECT_EQ(Triple::aarch64_be, T.get64BitArchVariant().getArch());
 
   T.setArch(Triple::arm);
   EXPECT_EQ(Triple::arm, T.get32BitArchVariant().getArch());
   EXPECT_EQ(Triple::aarch64, T.get64BitArchVariant().getArch());
 
TEST(TripleTest, EndianArchVariants) {
   T.setArch(Triple::tcele);
   EXPECT_EQ(Triple::tce, T.getBigEndianArchVariant().getArch());
   EXPECT_EQ(Triple::tcele, T.getLittleEndianArchVariant().getArch());
 
   T.setArch(Triple::tce);
   EXPECT_EQ(Triple::tce, T.getBigEndianArchVariant().getArch());
   EXPECT_EQ(Triple::tcele, T.getLittleEndianArchVariant().getArch());
 
-  T.setArch(Triple::le32);
-  EXPECT_EQ(Triple::UnknownArch, T.getBigEndianArchVariant().getArch());
-  EXPECT_EQ(Triple::le32, T.getLittleEndianArchVariant().getArch());
-
-  T.setArch(Triple::le64);
-  EXPECT_EQ(Triple::UnknownArch, T.getBigEndianArchVariant().getArch());
-  EXPECT_EQ(Triple::le64, T.getLittleEndianArchVariant().getArch());
-
   T.setArch(Triple::csky);
   EXPECT_EQ(Triple::UnknownArch, T.getBigEndianArchVariant().getArch());
   EXPECT_EQ(Triple::csky, T.getLittleEndianArchVariant().getArch());
 }
 
 TEST(TripleTest, getOSVersion) {
   Triple T;
   unsigned Major, Minor, Micro;

llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn

sources = [
     "Targets/AArch64.cpp",
     "Targets/AMDGPU.cpp",
     "Targets/ARC.cpp",
     "Targets/ARM.cpp",
     "Targets/AVR.cpp",
     "Targets/BPF.cpp",
     "Targets/Hexagon.cpp",
     "Targets/Lanai.cpp",
-    "Targets/Le64.cpp",
     "Targets/M68k.cpp",
     "Targets/MSP430.cpp",
     "Targets/Mips.cpp",
     "Targets/NVPTX.cpp",
     "Targets/OSTargets.cpp",
     "Targets/PNaCl.cpp",
     "Targets/PPC.cpp",
     "Targets/RISCV.cpp",