[ELF] Refactor DynamicReloc to fix incorrect relocation addends

[arichardson]

Summary

This patch changes the DynamicReloc class to store an enum instead
of the overloaded useSymVA member to make it easier to understand
and fix incorrect addends being written in some corner cases. The
change is motivated by a follow-up review that checks the value of
implicit Elf_Rel addends written to the output file.

This patch fixes an incorrect output when using -z rela for i386 files
with R_386_GOT32 relocations (not that this really matters since it's an
unsupported configuration).
Storing the relocation expression kind also addresses an incorrect addend
FIXME in ppc64-abs64-dyn.s introduced in D63383.

DynamicReloc now also has a special case for the MIPS TLS relocations
(DynamicReloc::AgainstSymbolWithTargetVA) since the
R_MIPS_TLS_TPREL{32/64} the symbol VA to the GOT for preemptible
symbols. I'm not sure if the symbol value actually should be written
for R_MIPS_TLS_TPREL32, but this patch does not attempt to change
that behaviour.

[MaskRay]

The getImplicitAddend enhancement (-z rel) can be moved to a separate patch, but the dynamic only relocation types (JUMP_SLOT, RELATIVE, IRELATIVE, etc) should be removed since they can't be input.

useSymVA is subtle and I need time to grok it. I wonder whether the new member can improve https://bugs.llvm.org/show_bug.cgi?id=47009 TLSDESC for -z rel?

[MaskRay]

lld/test/ELF/got32-i386-pie-rw.s

3

For non-disassembly ELF dumping, prefer llvm-readelf/llvm-readobj. llvm-objdump output tends to have BFD specific stuff. In binutils, readelf does not link against BFD and is immune to the BFD internals.

[arichardson]

In D100490#2690103, @MaskRay wrote:

The getImplicitAddend enhancement (-z rel) can be moved to a separate patch, but the dynamic only relocation types (JUMP_SLOT, RELATIVE, IRELATIVE, etc) should be removed since they can't be input.

useSymVA is subtle and I need time to grok it. I wonder whether the new member can improve https://bugs.llvm.org/show_bug.cgi?id=47009 TLSDESC for -z rel?

Yes, it appears this new error triggers for the test case from that bug:

arch64-tlsdesc-rel.s.tmp-rel.so:(.got+0x10): wrote incorrect addend for dynamic relocation: value is 0x0 but expected 0x4 for R_AARCH64_TLSDESC against y at 0x203C8

Will update to handle that case.

[arichardson]

lld/test/ELF/got32-i386-pie-rw.s

3

Sure, I can change this to only dump the relocations, the disassembly is not important for the .o file.

[arichardson]

In D100490#2690103, @MaskRay wrote:

The getImplicitAddend enhancement (-z rel) can be moved to a separate patch, but the dynamic only relocation types (JUMP_SLOT, RELATIVE, IRELATIVE, etc) should be removed since they can't be input.

useSymVA is subtle and I need time to grok it. I wonder whether the new member can improve https://bugs.llvm.org/show_bug.cgi?id=47009 TLSDESC for -z rel?

I've added support for R_AARCH64_TLSDESC in D100544.

[peter.smith]

Thanks for sending the patch; I'm planning to take a look tomorrow (Friday).

[peter.smith]

The Arm relocations look correct to me. I've got a few suggestions, but no objections.

lld/ELF/OutputSections.cpp

548

Would it be possible to assert that we are not linking with -r and make sure we don't call checkDynRelAddends() for ld -r?

566

Although harder to read than an instance of the error message, it took a second reading to work out which value was the addend. Perhaps "wrote incorrect addend value 0x... but expected 0x..."

567

If I've understood this correctly if we get here then it is an internal LLD error rather than a user error? If I'm right it would be useful to prefix with something along the lines "Internal error, please contact your supplier etc." Otherwise if I'm just using LLD I might wonder if it is something that I've done wrong.

lld/ELF/SyntheticSections.h

467

I found it difficult from the comments what the interaction between the combinations of useSymVA and mustRetainSymbol are. Especially reading the two comments at the same time.

Is there scope for combining the two booleans into 1 enumeration, essentially capturing the valid combinations with a name? I think once set they aren't changed.

[arichardson]

In D100490#2690103, @MaskRay wrote:

The getImplicitAddend enhancement (-z rel) can be moved to a separate patch, but the dynamic only relocation types (JUMP_SLOT, RELATIVE, IRELATIVE, etc) should be removed since they can't be input.

useSymVA is subtle and I need time to grok it. I wonder whether the new member can improve https://bugs.llvm.org/show_bug.cgi?id=47009 TLSDESC for -z rel?

Regarding the JUMP_SLOT, RELATIVE, IRELATIVE relocations: I could add a separate target->getImplicitDynRelAddend() that handles the dynamic-only relocation, so that we still get an error message if we see one of the dynamic-only relocations in an input file?

It might also be nice to check the value of the JUMP_SLOT relocations (probably in a follow-up patch) instead of skipping them. This should be easy once the DynamicReloc useSymVA member been changed to an enum.

Longer-term I think it would be nice if the implicit addend code could be moved to LLVM instead so that llvm-readelf/llvm-readobj can also make use of it.

lld/ELF/OutputSections.cpp

548

Yes, that sounds like a better approach, will update.

567

Yes, this should only ever be triggered if there is either a missing case in target->getImplicitAddend() (i.e. using -z rel on an architecture where getImplicitAddend() is not implemented) or if we failed to write the implicit addend correctly.

lld/ELF/SyntheticSections.h

467

It also took me a long time to understand what is going on here. Will submit a new version that uses an enum instead.

[arichardson]

Use an enum instead of the highly overloaded useSymVA. Hopefully the logic is easier to follow now.

@MaskRay Would you like me to move handling of linker-generated relocations out of Target::getImplicitAddend() and into a new function instead of handling all in one function?

[arichardson]

lld/ELF/OutputSections.cpp

548

Actually, this also happens for --emit-relocs, so I think it's probably better to skip them. I've updated the comment.

567

The new warning is

ld.lld: error: /Users/alex/cheri/upstream-llvm-project/cmake-build-debug/tools/lld/test/ELF/Output/got32-i386-pie-rw.s.tmp:(.got+0x0): internal linker error: wrote incorrect addend value 0x0 instead of 0x1180 for dynamic R_386_RELATIVE relocation against foo at offset 0x31F0
PLEASE submit a bug report to https://bugs.llvm.org/ and include the crash backtrace.

[arichardson]

lld/ELF/SyntheticSections.cpp

1111

Will split this unrelated change out into a separate commit, just noticed that the link no longer works.

[thakis]

lld/MachO/CMakeLists.txt

58 ↗

(On Diff #339165)

If you're adding this here (why?), should you remove it from lld/tools/lld/CMakeLists.txt ?

[arichardson]

lld/MachO/CMakeLists.txt

58 ↗

(On Diff #339165)

Sorry that should not be part of this review. Looks like I accidentally squashed another commit into this one.
LLD was failing to build for me -DBUILD_SHARED_LIBS=ON and that seemed like the appropriate fix. Will see if this is still needed with the latest HEAD commit.

[arichardson]

Drop unrelated changes

[peter.smith]

I'm aiming to take a look tomorrow. Sorry for the delay.

[peter.smith]

I've had a quick read through and I like where this is going. There's a lot to check through and I've run out of time today. I've left a couple of small suggestions. Will need to come back and look in more detail, probably next week to see if I've got anything else to add.

lld/ELF/SyntheticSections.h

428–435

Could we add a similar comment to the MIPS multi-GOT implementation?
// This constructor records a relative relocation with no symbol

517

Is there scope to rename this so that it is easier to see at the call site? Like addRelativeReloc(). For example addSymbolReloc() or addAgainstSymbolReloc();

[arichardson]

In D100490#2711740, @peter.smith wrote:

I've had a quick read through and I like where this is going. There's a lot to check through and I've run out of time today. I've left a couple of small suggestions. Will need to come back and look in more detail, probably next week to see if I've got anything else to add.

Thanks for reviewing! I noticed there is one larger issue that needs to be addressed: If we use -z rel / --apply-dynamic-relocs, this may report false-positive errors for architectures with missing getImplicitAddend() cases (e.g. AArch64).
I wonder if there needs to be a per-architecture default for checking the addends so that we can gradually enable this by default (starting with ARM, MIPS, and i386). I can then split out the X86_64 getImplicitAddend() changes to a separate review.
Maybe there should be an internal testing option --[no-]check-dynamic-reloc-addends until getImplicitAddend() is implemented for all architectures?

lld/ELF/SyntheticSections.h

517

Sounds good, will do in next version of this patch.

[arichardson]

Maybe OutputSection::checkDynRelAddends() should be moved to a separate patch and this one just does the DynamicReloc refactoring that fixes ppc64-abs64-dyn.s and got32-i386-pie-rw.s with -z rela.
@MaskRay would that make reviewing the patch easier?

[MaskRay]

In D100490#2711781, @arichardson wrote:

Maybe OutputSection::checkDynRelAddends() should be moved to a separate patch and this one just does the DynamicReloc refactoring that fixes ppc64-abs64-dyn.s and got32-i386-pie-rw.s with -z rela.
@MaskRay would that make reviewing the patch easier?

I am still unclear that we want to do OutputSection::checkDynRelAddends() unconditionally. It is probably a good addition for LLVM_ENABLE_ASSERTIONS=on builds.

The improvement bits should definitely be separate from the check bits.

[arichardson]

In D100490#2720471, @MaskRay wrote:

In D100490#2711781, @arichardson wrote:

Maybe OutputSection::checkDynRelAddends() should be moved to a separate patch and this one just does the DynamicReloc refactoring that fixes ppc64-abs64-dyn.s and got32-i386-pie-rw.s with -z rela.
@MaskRay would that make reviewing the patch easier?

I am still unclear that we want to do OutputSection::checkDynRelAddends() unconditionally. It is probably a good addition for LLVM_ENABLE_ASSERTIONS=on builds.

The improvement bits should definitely be separate from the check bits.

Will try to split this into separate revisions tomorrow.

[arichardson]

Split the addend checking into a separate review, this now only include fixes for incorrect addends plus the DynamicReloc refactoring.

[arichardson]

lld/ELF/InputSection.cpp

1021 ↗

(On Diff #341173)

This is needed now to avoid UB caused by`*rel.sym` if rel.sym is NULL.

[arichardson]

• Add addSymbolReloc() as suggested

[peter.smith]

Thanks for the update, and sorry for the delay in reviewing - bit of a busy week. I'm happy with this approach, but I think it is worth getting the go ahead from MaskRay.

lld/ELF/SyntheticSections.h

453

The default parameters look to be used in very few places. I'm wondering if it would make sense to make 0 and R_ABS explicit at the call site as they are not obvious.

[MaskRay]

lld/ELF/InputSection.cpp

1021 ↗

(On Diff #341173)

If I delete this block, all tests pass.

lld/ELF/SyntheticSections.cpp

1598

This is unneeded

lld/ELF/SyntheticSections.h

432

is a relative relocation

Not accurate.
tlsModuleIndexRel uses RelativeNoSymbol, however, the DTPMOD relocation type has nothing to do with R_*_RELATIVE.

/// This dynamic relocation

A bit verbose to repeat this for every value. Just omit the phrase?

Perhaps rename to AddendOnly, with a comment like /// Use 0 as the symbol value ...

437

be a relative relocation

Not accurate. TLS-IE emitted dynamic R_X86_64_TPOFF64 uses this kind as well.

Perhaps AddendOnlyWithTargetVA?

/// Use 0 as the symbol value ... The addend is computed with getRelocTargetVA().

No need to emphasize Elf_Rel/Elf_Rela/

437

This constructor is only called once, in MIPS multi-GOT code. The constructor should be deleted.

446

Possible to use kind only and don't check sym?

[MaskRay]

This is a good change. Hope you can find time to finish it:)

[arichardson]

Apologies for the delay, I was away on holiday and then working on non-LLVM tasks for the past two months. I've uploaded a new version that should hopefully address the remaining comments.

lld/ELF/InputSection.cpp

1021 ↗

(On Diff #341173)

I got UBSan failures before but it might just be because of further local changes after this patch. Will drop if it isn't needed after all.
I believe the sym == nullptr case can only happen for the MIPS GOT and that shouldn't call relocateAlloc right now as it writes addends explicitly (I had a follow-up change to use relocateAlloc instead, so it's probably only needed for that patch).

lld/ELF/SyntheticSections.cpp

1598

I feel like I needed this to make GCC happy. I can remove it and see if CI complains.

lld/ELF/SyntheticSections.h

437

The other constructors can't be used here since they are missing the OutputSection* parameter.
I could add it to the constructor above if you prefer, but since it's only needed for MIPS I think having a separate one is slightly cleaner.

[arichardson]

• Apply suggestions from @MaskRay

[MaskRay]

Looks great!

lld/ELF/Arch/ARM.cpp

default:
     error(getErrorLocation(loc) + "unrecognized relocation " +
           toString(rel.type));
   }
 }
 
 int64_t ARM::getImplicitAddend(const uint8_t *buf, RelType type) const {
   switch (type) {
   default:
+    errorOrWarn(toString(type) + " not handled in getImplicitAddend");
     return 0;
   case R_ARM_ABS32:
   case R_ARM_BASE_PREL:
+  case R_ARM_GLOB_DAT:
   case R_ARM_GOTOFF32:
   case R_ARM_GOT_BREL:
   case R_ARM_GOT_PREL:
+  case R_ARM_IRELATIVE:
   case R_ARM_REL32:
+  case R_ARM_RELATIVE:
+  case R_ARM_SBREL32:
   case R_ARM_TARGET1:
   case R_ARM_TARGET2:
+  case R_ARM_TLS_DTPMOD32:
+  case R_ARM_TLS_DTPOFF32:
   case R_ARM_TLS_GD32:
-  case R_ARM_TLS_LDM32:
-  case R_ARM_TLS_LDO32:
   case R_ARM_TLS_IE32:
+  case R_ARM_TLS_LDM32:
   case R_ARM_TLS_LE32:
+  case R_ARM_TLS_LDO32:
+  case R_ARM_TLS_TPOFF32:
     return SignExtend64<32>(read32le(buf));
   case R_ARM_PREL31:
     return SignExtend64<31>(read32le(buf));
   case R_ARM_CALL:
   case R_ARM_JUMP24:
   case R_ARM_PC24:
   case R_ARM_PLT32:
     return SignExtend64<26>(read32le(buf) << 2);
case R_ARM_THM_PC8:
     // this trick permits the PC bias of -4 to be encoded using imm8 = 0xff
     return ((((read16le(buf) & 0xff) << 2) + 4) & 0x3ff) - 4;
   case R_ARM_THM_PC12: {
     // LDR (literal) encoding T2, add = (U == '1') imm12
     bool u = read16le(buf) & 0x0080;
     uint64_t imm12 = read16le(buf + 2) & 0x0fff;
     return u ? imm12 : -imm12;
   }
+  case R_ARM_NONE:
+  case R_ARM_JUMP_SLOT:
+    return 0; // The stored value at this location is not the addend.
   }
 }
 
 TargetInfo *elf::getARMTargetInfo() {
   static ARM target;
   return &target;
 }

lld/ELF/Arch/Mips.cpp

bool MIPS<ELFT>::needsThunk(RelExpr expr, RelType type, const InputFile *file,
   return d && isMipsPIC<ELFT>(d);
 }
 
 template <class ELFT>
 int64_t MIPS<ELFT>::getImplicitAddend(const uint8_t *buf, RelType type) const {
   const endianness e = ELFT::TargetEndianness;
   switch (type) {
   case R_MIPS_32:
+  case R_MIPS_REL32:
   case R_MIPS_GPREL32:
   case R_MIPS_TLS_DTPREL32:
+  case R_MIPS_TLS_DTPMOD32:
   case R_MIPS_TLS_TPREL32:
     return SignExtend64<32>(read32(buf));
   case R_MIPS_26:
     // FIXME (simon): If the relocation target symbol is not a PLT entry
     // we should use another expression for calculation:
     // ((A << 2) | (P & 0xf0000000)) >> 2
     return SignExtend64<28>(read32(buf) << 2);
+  case R_MIPS_CALL_HI16:
   case R_MIPS_GOT16:
+  case R_MIPS_GOT_HI16:
   case R_MIPS_HI16:
   case R_MIPS_PCHI16:
     return SignExtend64<16>(read32(buf)) << 16;
+  case R_MIPS_CALL16:
+  case R_MIPS_CALL_LO16:
+  case R_MIPS_GOT_LO16:
   case R_MIPS_GPREL16:
   case R_MIPS_LO16:
   case R_MIPS_PCLO16:
   case R_MIPS_TLS_DTPREL_HI16:
   case R_MIPS_TLS_DTPREL_LO16:
+  case R_MIPS_TLS_GD:
+  case R_MIPS_TLS_GOTTPREL:
+  case R_MIPS_TLS_LDM:
   case R_MIPS_TLS_TPREL_HI16:
   case R_MIPS_TLS_TPREL_LO16:
     return SignExtend64<16>(read32(buf));
   case R_MICROMIPS_GOT16:
   case R_MICROMIPS_HI16:
     return SignExtend64<16>(readShuffle<e>(buf)) << 16;
+  case R_MICROMIPS_CALL16:
   case R_MICROMIPS_GPREL16:
   case R_MICROMIPS_LO16:
   case R_MICROMIPS_TLS_DTPREL_HI16:
   case R_MICROMIPS_TLS_DTPREL_LO16:
+  case R_MICROMIPS_TLS_GD:
+  case R_MICROMIPS_TLS_GOTTPREL:
+  case R_MICROMIPS_TLS_LDM:
   case R_MICROMIPS_TLS_TPREL_HI16:
   case R_MICROMIPS_TLS_TPREL_LO16:
     return SignExtend64<16>(readShuffle<e>(buf));
   case R_MICROMIPS_GPREL7_S2:
     return SignExtend64<9>(readShuffle<e>(buf) << 2);
   case R_MIPS_PC16:
     return SignExtend64<18>(read32(buf) << 2);
   case R_MIPS_PC19_S2:
int64_t MIPS<ELFT>::getImplicitAddend(const uint8_t *buf, RelType type) const {
   case R_MICROMIPS_PC19_S2:
     return SignExtend64<21>(readShuffle<e>(buf) << 2);
   case R_MICROMIPS_PC21_S1:
     return SignExtend64<22>(readShuffle<e>(buf) << 1);
   case R_MICROMIPS_PC23_S2:
     return SignExtend64<25>(readShuffle<e>(buf) << 2);
   case R_MICROMIPS_PC26_S1:
     return SignExtend64<27>(readShuffle<e>(buf) << 1);
+  case R_MIPS_64:
+  case R_MIPS_TLS_DTPMOD64:
+  case R_MIPS_TLS_DTPREL64:
+  case R_MIPS_TLS_TPREL64:
+  case (R_MIPS_64 << 8) | R_MIPS_REL32:
+    return read64(buf);
+  case R_MIPS_COPY:
+    return config->is64 ? read64(buf) : read32(buf);
+  case R_MIPS_NONE:
+  case R_MIPS_JUMP_SLOT:
+  case R_MIPS_JALR:
+    return 0; // The stored value at this location is not the addend.
   default:
+    errorOrWarn(toString(type) + " not handled in getImplicitAddend");
     return 0;
   }
 }
 
 static std::pair<uint32_t, uint64_t>
 calculateMipsRelChain(uint8_t *loc, RelType type, uint64_t val) {
   // MIPS N64 ABI packs multiple relocations into the single relocation
   // record. In general, all up to three relocations can have arbitrary

lld/ELF/Arch/X86.cpp

int64_t X86::getImplicitAddend(const uint8_t *buf, RelType type) const {
   switch (type) {
   case R_386_8:
   case R_386_PC8:
     return SignExtend64<8>(*buf);
   case R_386_16:
   case R_386_PC16:
     return SignExtend64<16>(read16le(buf));
   case R_386_32:
+  case R_386_GLOB_DAT:
   case R_386_GOT32:
   case R_386_GOT32X:
   case R_386_GOTOFF:
   case R_386_GOTPC:
+  case R_386_IRELATIVE:
   case R_386_PC32:
   case R_386_PLT32:
+  case R_386_RELATIVE:
+  case R_386_TLS_DTPMOD32:
+  case R_386_TLS_DTPOFF32:
   case R_386_TLS_LDO_32:
+  case R_386_TLS_LDM:
+  case R_386_TLS_IE:
+  case R_386_TLS_IE_32:
   case R_386_TLS_LE:
+  case R_386_TLS_LE_32:
+  case R_386_TLS_GD:
+  case R_386_TLS_GD_32:
+  case R_386_TLS_GOTIE:
+  case R_386_TLS_TPOFF:
+  case R_386_TLS_TPOFF32:
     return SignExtend64<32>(read32le(buf));
+  case R_386_NONE:
+  case R_386_JUMP_SLOT:
+    return 0; // The stored value at this location is not the addend.
   default:
+    errorOrWarn(toString(type) + " not handled in getImplicitAddend");
     return 0;
   }
 }
 
 void X86::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
   switch (rel.type) {
   case R_386_8:
     // R_386_{PC,}{8,16} are not part of the i386 psABI, but they are

lld/ELF/Arch/X86_64.cpp

public:
   RelType getDynRel(RelType type) const override;
   void writeGotPltHeader(uint8_t *buf) const override;
   void writeGotPlt(uint8_t *buf, const Symbol &s) const override;
   void writePltHeader(uint8_t *buf) const override;
   void writePlt(uint8_t *buf, const Symbol &sym,
                 uint64_t pltEntryAddr) const override;
   void relocate(uint8_t *loc, const Relocation &rel,
                 uint64_t val) const override;
+  int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override;
   void applyJumpInstrMod(uint8_t *loc, JumpModType type,
                          unsigned size) const override;
 
   RelExpr adjustGotPcExpr(RelType type, int64_t addend,
                           const uint8_t *loc) const override;
   void relaxGot(uint8_t *loc, const Relocation &rel,
                 uint64_t val) const override;
   void relaxTlsGdToIe(uint8_t *loc, const Relocation &rel,
case J_JAE_32:
     } else
       *loc = 0x73;
     break;
   case J_UNKNOWN:
     llvm_unreachable("Unknown Jump Relocation");
   }
 }
 
+int64_t X86_64::getImplicitAddend(const uint8_t *buf, RelType type) const {
+  switch (type) {
+  case R_X86_64_8:
+  case R_X86_64_PC8:
+    return SignExtend64<8>(*buf);
+  case R_X86_64_16:
+  case R_X86_64_PC16:
+    return SignExtend64<16>(read16le(buf));
+  case R_X86_64_32:
+  case R_X86_64_32S:
+  case R_X86_64_TPOFF32:
+  case R_X86_64_GOT32:
+  case R_X86_64_GOTPC32:
+  case R_X86_64_GOTPC32_TLSDESC:
+  case R_X86_64_GOTPCREL:
+  case R_X86_64_GOTPCRELX:
+  case R_X86_64_REX_GOTPCRELX:
+  case R_X86_64_PC32:
+  case R_X86_64_GOTTPOFF:
+  case R_X86_64_PLT32:
+  case R_X86_64_TLSGD:
+  case R_X86_64_TLSLD:
+  case R_X86_64_DTPOFF32:
+  case R_X86_64_SIZE32:
+    return SignExtend64<32>(read32le(buf));
+  case R_X86_64_64:
+  case R_X86_64_DTPOFF64:
+  case R_X86_64_PC64:
+  case R_X86_64_SIZE64:
+  case R_X86_64_GLOB_DAT:
+  case R_X86_64_GOT64:
+  case R_X86_64_GOTOFF64:
+  case R_X86_64_GOTPC64:
+  case R_X86_64_IRELATIVE:
+  case R_X86_64_RELATIVE:
+    return read64le(buf);
+  case R_X86_64_JUMP_SLOT:
+  case R_X86_64_NONE:
+    return 0; // The stored value at this location is not the addend.
+  default:
+    errorOrWarn(toString(type) + " not handled in getImplicitAddend");
+    return 0;
+  }
+}
+
 void X86_64::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
   switch (rel.type) {
   case R_X86_64_8:
     checkIntUInt(loc, val, 8, rel);
     *loc = val;
     break;
   case R_X86_64_PC8:
     checkInt(loc, val, 8, rel);

lld/ELF/OutputSections.h

public:
 
   // Tracks whether the section has ever had an input section added to it, even
   // if the section was later removed (e.g. because it is a synthetic section
   // that wasn't needed). This is needed for orphan placement.
   bool hasInputSections = false;
 
   void finalize();
   template <class ELFT> void writeTo(uint8_t *buf);
+  // Check that the addends for dynamic relocations were written correctly.
+  void checkDynRelAddends(const uint8_t *bufStart);
   template <class ELFT> void maybeCompress();
 
   void sort(llvm::function_ref<int(InputSectionBase *s)> order);
   void sortInitFini();
   void sortCtorsDtors();
 
 private:
   // Used for implementation of --compress-debug-sections option.

lld/ELF/OutputSections.cpp

 std::array<uint8_t, 4> OutputSection::getFiller() {
   if (filler)
     return *filler;
   if (flags & SHF_EXECINSTR)
     return target->trapInstr;
   return {0, 0, 0, 0};
 }
 
+void OutputSection::checkDynRelAddends(const uint8_t *bufStart) {
+  assert(config->writeAddends);
+  assert(type == SHT_REL || type == SHT_RELA);
+  std::vector<InputSection *> sections = getInputSections(this);
+  parallelForEachN(0, sections.size(), [&](size_t i) {
+    const auto *sec = dyn_cast<RelocationBaseSection>(sections[i]);
+    // When linking with -r we might also call this function for input
+    // .rel[a].data sections. In this case we don't check the addend since we
+    // should just be passing through the object file
+    if (!sec)
+      return;
+    for (const DynamicReloc &rel : sec->relocs) {
+      int64_t addend = rel.computeAddend();
+      const OutputSection *relOsec = rel.inputSec->getOutputSection();
+      assert(relOsec != nullptr && "No output section for relocation");
+      const uint8_t *relocTarget =
+          bufStart + relOsec->offset + rel.inputSec->getOffset(rel.offsetInSec);
+      // For SHT_NOBITS the written addend is always zero.
+      int64_t writtenAddend =
+          relOsec->type == SHT_NOBITS
+              ? 0
+              : target->getImplicitAddend(relocTarget, rel.type);
+      if (addend != writtenAddend)
+        errorOrWarn(
+            getErrorLocation(relocTarget) +
+            "wrote incorrect addend for dynamic relocation: value is 0x" +
+            utohexstr(writtenAddend) + " but expected 0x" + utohexstr(addend) +
+            " for " + toString(rel.type) + " against " +
+            (rel.sym ? toString(*rel.sym) : "load address") + " at 0x" +
+            utohexstr(rel.getOffset()));
+    }
+  });
+}
+
 template void OutputSection::writeHeaderTo<ELF32LE>(ELF32LE::Shdr *Shdr);
 template void OutputSection::writeHeaderTo<ELF32BE>(ELF32BE::Shdr *Shdr);
 template void OutputSection::writeHeaderTo<ELF64LE>(ELF64LE::Shdr *Shdr);
 template void OutputSection::writeHeaderTo<ELF64BE>(ELF64BE::Shdr *Shdr);
 
 template void OutputSection::writeTo<ELF32LE>(uint8_t *Buf);
 template void OutputSection::writeTo<ELF32BE>(uint8_t *Buf);
 template void OutputSection::writeTo<ELF64LE>(uint8_t *Buf);
 template void OutputSection::writeTo<ELF64BE>(uint8_t *Buf);
 
 template void OutputSection::maybeCompress<ELF32LE>();
 template void OutputSection::maybeCompress<ELF32BE>();
 template void OutputSection::maybeCompress<ELF64LE>();
 template void OutputSection::maybeCompress<ELF64BE>();

lld/ELF/Relocations.cpp

handleTlsRelocation(RelType type, Symbol &sym, InputSectionBase &c,
   if (config->emachine == EM_MIPS)
     return handleMipsTlsRelocation(type, sym, c, offset, addend, expr);
 
   if (oneof<R_AARCH64_TLSDESC_PAGE, R_TLSDESC, R_TLSDESC_CALL, R_TLSDESC_PC>(
           expr) &&
       config->shared) {
     if (in.got->addDynTlsEntry(sym)) {
       uint64_t off = in.got->getGlobalDynOffset(sym);
-      mainPart->relaDyn->addReloc(
-          {target->tlsDescRel, in.got, off, !sym.isPreemptible, &sym, 0});
+      mainPart->relaDyn->addReloc({target->tlsDescRel, in.got, off,
+                                   !sym.isPreemptible, &sym, 0, R_ABS});
     }
     if (expr != R_TLSDESC_CALL)
       c.relocations.push_back({expr, type, offset, addend, &sym});
     return 1;
   }
 
   // ARM, Hexagon and RISC-V do not support GD/LD to IE/LE relaxation.  For
   // PPC64, if the file has missing R_PPC64_TLSGD/R_PPC64_TLSLD, disable
part.relaDyn->addReloc(target->relativeRel, isec, offsetInSec, sym, addend,
                          expr, type);
 }
 
 template <class PltSection, class GotPltSection>
 static void addPltEntry(PltSection *plt, GotPltSection *gotPlt,
                         RelocationBaseSection *rel, RelType type, Symbol &sym) {
   plt->addEntry(sym);
   gotPlt->addEntry(sym);
-  rel->addReloc(
-      {type, gotPlt, sym.getGotPltOffset(), !sym.isPreemptible, &sym, 0});
+  rel->addReloc({type, gotPlt, sym.getGotPltOffset(), !sym.isPreemptible, &sym,
+                 0, R_ABS});
 }
 
 static void addGotEntry(Symbol &sym) {
   in.got->addEntry(sym);
 
   RelExpr expr = sym.isTls() ? R_TPREL : R_ABS;
   uint64_t off = sym.getGotOffset();
 

lld/ELF/SyntheticSections.h

private:
   uint64_t size = 0;
 
   llvm::DenseMap<StringRef, unsigned> stringMap;
   std::vector<StringRef> strings;
 };
 
 class DynamicReloc {
 public:
   DynamicReloc(RelType type, const InputSectionBase *inputSec,
-               uint64_t offsetInSec, bool useSymVA, Symbol *sym, int64_t addend)
+               uint64_t offsetInSec, bool useSymVA, Symbol *sym, int64_t addend,
+               RelExpr expr, bool mustRetainSymbol = false)
       : type(type), sym(sym), inputSec(inputSec), offsetInSec(offsetInSec),
-        useSymVA(useSymVA), addend(addend), outputSec(nullptr) {}
+        useSymVA(useSymVA), mustRetainSymbol(mustRetainSymbol), expr(expr),
+        addend(addend), outputSec(nullptr) {}
   // This constructor records dynamic relocation settings used by MIPS
   // multi-GOT implementation. It's to relocate addresses of 64kb pages
   // lie inside the output section.
   DynamicReloc(RelType type, const InputSectionBase *inputSec,
                uint64_t offsetInSec, const OutputSection *outputSec,
                int64_t addend)
       : type(type), sym(nullptr), inputSec(inputSec), offsetInSec(offsetInSec),
-        useSymVA(false), addend(addend), outputSec(outputSec) {}
+        useSymVA(false), expr(R_MIPS_GOT_LOCAL_PAGE), addend(addend),
+        outputSec(outputSec) {}
 
   uint64_t getOffset() const;
   uint32_t getSymIndex(SymbolTableBaseSection *symTab) const;
+  bool needsDynSymIndex() const {
+    return sym && (mustRetainSymbol || !useSymVA);
+  }
 
   // Computes the addend of the dynamic relocation. Note that this is not the
   // same as the addend member variable as it also includes the symbol address
   // if useSymVA is true.
   int64_t computeAddend() const;
 
   RelType type;
 
   Symbol *sym;
   const InputSectionBase *inputSec = nullptr;
   uint64_t offsetInSec;
+
+private:
   // If this member is true, the dynamic relocation will not be against the
   // symbol but will instead be a relative relocation that simply adds the
   // load address. This means we need to write the symbol virtual address
   // plus the original addend as the final relocation addend.
   bool useSymVA;
+  // If true, the relocation will be against sym rather than the load address
+  // (even if useSymVA is set). This should be set to true for relocations that
+  // write the symbol VA as the addend (e.g. R_MIPS_TLS_TPREL64)
+  bool mustRetainSymbol = false;
+  // The kind of expression used to calculate the added (required e.g. for
+  // relative GOT relocations).
+  RelExpr expr;
+
+public:
   int64_t addend;
   const OutputSection *outputSec;
 };
 
 template <class ELFT> class DynamicSection final : public SyntheticSection {
   LLVM_ELF_IMPORT_TYPES_ELFT(ELFT)
 
   // finalizeContents() fills this vector with the section contents.
void addReloc(RelType dynType, InputSectionBase *isec, uint64_t offsetInSec,
                 Symbol *sym);
   // Add a dynamic relocation that might need an addend. This takes care of
   // writing the addend to the output section if needed.
   void addReloc(RelType dynType, InputSectionBase *inputSec,
                 uint64_t offsetInSec, Symbol *sym, int64_t addend, RelExpr expr,
                 RelType type);
   void addReloc(const DynamicReloc &reloc);
   bool isNeeded() const override { return !relocs.empty(); }
   size_t getSize() const override { return relocs.size() * this->entsize; }
   size_t getRelativeRelocCount() const { return numRelativeRelocs; }
   void finalizeContents() override;
+  static bool classof(const SectionBase *d) {
+    return SyntheticSection::classof(d) &&
+           (d->type == llvm::ELF::SHT_RELA || d->type == llvm::ELF::SHT_REL ||
+            d->type == llvm::ELF::SHT_RELR);
+  }
   int32_t dynamicTag, sizeDynamicTag;
   std::vector<DynamicReloc> relocs;
 
 protected:
   size_t numRelativeRelocs = 0;
 };
 
 template <class ELFT>

lld/ELF/SyntheticSections.cpp

void MipsGotSection::build() {
 
   // Create dynamic relocations.
   for (FileGot &got : gots) {
     // Create dynamic relocations for TLS entries.
     for (std::pair<Symbol *, size_t> &p : got.tls) {
       Symbol *s = p.first;
       uint64_t offset = p.second * config->wordsize;
       if (s->isPreemptible)
-        mainPart->relaDyn->addReloc(target->tlsGotRel, this, offset, s);
+        mainPart->relaDyn->addReloc({target->tlsGotRel, this, offset,
+                                     /*useSymVA=*/true, s, 0, R_ABS,
+                                     /*mustRetainSymbol=*/true});
     }
     for (std::pair<Symbol *, size_t> &p : got.dynTlsSymbols) {
       Symbol *s = p.first;
       uint64_t offset = p.second * config->wordsize;
       if (s == nullptr) {
         if (!config->isPic)
           continue;
         mainPart->relaDyn->addReloc(target->tlsModuleIndexRel, this, offset, s);
if (!config->isPic)
       continue;
     // Dynamic relocations for "local" entries in case of PIC.
     for (const std::pair<const OutputSection *, FileGot::PageBlock> &l :
          got.pagesMap) {
       size_t pageCount = l.second.count;
       for (size_t pi = 0; pi < pageCount; ++pi) {
         uint64_t offset = (l.second.firstIndex + pi) * config->wordsize;
         mainPart->relaDyn->addReloc({target->relativeRel, this, offset, l.first,
                                      int64_t(pi * 0x10000)});
       }
     }
     for (const std::pair<GotEntry, size_t> &p : got.local16) {
       uint64_t offset = p.second * config->wordsize;
       mainPart->relaDyn->addReloc({target->relativeRel, this, offset, true,
-                               p.first.first, p.first.second});
+                                   p.first.first, p.first.second, R_ABS});
     }
   }
 }
 
 bool MipsGotSection::isNeeded() const {
   // We add the .got section to the result for dynamic MIPS target because
   // its address and properties are mentioned in the .dynamic section.
   return !config->relocatable;
for (const std::pair<const OutputSection *, FileGot::PageBlock> &l :
       uint64_t firstPageAddr = getMipsPageAddr(l.first->addr);
       for (size_t pi = 0; pi < pageCount; ++pi)
         write(l.second.firstIndex + pi, nullptr, firstPageAddr + pi * 0x10000);
     }
     // Local, global, TLS, reloc-only  entries.
     // If TLS entry has a corresponding dynamic relocations, leave it
     // initialized by zero. Write down adjusted TLS symbol's values otherwise.
     // To calculate the adjustments use offsets for thread-local storage.
-    // https://www.linux-mips.org/wiki/NPTL
+    // http://web.archive.org/web/20190324223224/https://www.linux-mips.org/wiki/NPTL
     for (const std::pair<GotEntry, size_t> &p : g.local16)
       write(p.second, p.first.first, p.first.second);
     // Write VA to the primary GOT only. For secondary GOTs that
     // will be done by REL32 dynamic relocations.
     if (&g == &gots.front())
       for (const std::pair<Symbol *, size_t> &p : g.global)
         write(p.second, p.first, 0);
     for (const std::pair<Symbol *, size_t> &p : g.relocs)

 }
 
 uint64_t DynamicReloc::getOffset() const {
   return inputSec->getVA(offsetInSec);
 }
 
 int64_t DynamicReloc::computeAddend() const {
   if (useSymVA)
-    return sym->getVA(addend);
+    return InputSection::getRelocTargetVA(inputSec->file, type, addend,
+                                          getOffset(), *sym, expr);
   if (!outputSec)
     return addend;
   // See the comment in the DynamicReloc ctor.
   return getMipsPageAddr(outputSec->addr) + addend;
 }
 
 uint32_t DynamicReloc::getSymIndex(SymbolTableBaseSection *symTab) const {
-  if (sym && !useSymVA)
+  if (needsDynSymIndex())
     return symTab->getSymbolIndex(sym);
   return 0;
 }
 
 RelocationBaseSection::RelocationBaseSection(StringRef name, uint32_t type,
                                              int32_t dynamicTag,
                                              int32_t sizeDynamicTag)
     : SyntheticSection(SHF_ALLOC, type, config->wordsize, name),
       dynamicTag(dynamicTag), sizeDynamicTag(sizeDynamicTag) {}
 
 void RelocationBaseSection::addReloc(RelType dynType, InputSectionBase *isec,
                                      uint64_t offsetInSec, Symbol *sym) {
-  addReloc({dynType, isec, offsetInSec, false, sym, 0});
+  addReloc({dynType, isec, offsetInSec, false, sym, 0, R_ADDEND});
 }
 
 void RelocationBaseSection::addReloc(RelType dynType,
                                      InputSectionBase *inputSec,
                                      uint64_t offsetInSec, Symbol *sym,
                                      int64_t addend, RelExpr expr,
                                      RelType type) {
   // Write the addends to the relocated address if required. We skip
   // it if the written value would be zero.
   if (config->writeAddends && (expr != R_ADDEND || addend != 0))
     inputSec->relocations.push_back({expr, type, offsetInSec, addend, sym});
-  addReloc({dynType, inputSec, offsetInSec, expr != R_ADDEND, sym, addend});
+  addReloc(
+      {dynType, inputSec, offsetInSec, expr != R_ADDEND, sym, addend, expr});
 }
 
 void RelocationBaseSection::addReloc(const DynamicReloc &reloc) {
   if (reloc.type == target->relativeRel)
     ++numRelativeRelocs;
   relocs.push_back(reloc);
 }
 

lld/ELF/Target.cpp

ErrorPlace elf::getErrorPlace(const uint8_t *loc) {
   default:
     llvm_unreachable("unknown ELF type");
   }
 }
 
 TargetInfo::~TargetInfo() {}
 
 int64_t TargetInfo::getImplicitAddend(const uint8_t *buf, RelType type) const {
+  errorOrWarn(toString(type) + " not handled in getImplicitAddend");
+  // llvm_unreachable("unknown relocation");
   return 0;
 }
 
 bool TargetInfo::usesOnlyLowPageBits(RelType type) const { return false; }
 
 bool TargetInfo::needsThunk(RelExpr expr, RelType type, const InputFile *file,
                             uint64_t branchAddr, const Symbol &s,
                             int64_t a) const {

lld/ELF/Thunks.cpp

public:
   PPC64PILongBranchThunk(Symbol &dest, int64_t addend)
       : PPC64LongBranchThunk(dest, addend) {
     assert(!dest.isPreemptible);
     if (Optional<uint32_t> index =
             in.ppc64LongBranchTarget->addEntry(&dest, addend)) {
       mainPart->relaDyn->addReloc(
           {target->relativeRel, in.ppc64LongBranchTarget, *index * UINT64_C(8),
            true, &dest,
-           addend + getPPC64GlobalEntryToLocalEntryOffset(dest.stOther)});
+           addend + getPPC64GlobalEntryToLocalEntryOffset(dest.stOther),
+           R_ABS});
     }
   }
 };
 
 class PPC64PDLongBranchThunk final : public PPC64LongBranchThunk {
 public:
   PPC64PDLongBranchThunk(Symbol &dest, int64_t addend)
       : PPC64LongBranchThunk(dest, addend) {

lld/ELF/Writer.cpp

if (config->unresolvedSymbolsInShlib != UnresolvedPolicy::Ignore) {
 
     // We also need to scan the dynamic relocation tables of the other
     // partitions and add any referenced symbols to the partition's dynsym.
     for (Partition &part : MutableArrayRef<Partition>(partitions).slice(1)) {
       DenseSet<Symbol *> syms;
       for (const SymbolTableEntry &e : part.dynSymTab->getSymbols())
         syms.insert(e.sym);
       for (DynamicReloc &reloc : part.relaDyn->relocs)
-        if (reloc.sym && !reloc.useSymVA && syms.insert(reloc.sym).second)
+        if (reloc.sym && reloc.needsDynSymIndex() &&
+            syms.insert(reloc.sym).second)
           part.dynSymTab->addSymbol(reloc.sym);
     }
   }
 
   // Do not proceed if there was an undefined symbol.
   if (errorCount())
     return;
 
template <class ELFT> void Writer<ELFT>::writeSections() {
   // section while doing it.
   for (OutputSection *sec : outputSections)
     if (sec->type == SHT_REL || sec->type == SHT_RELA)
       sec->writeTo<ELFT>(Out::bufferStart + sec->offset);
 
   for (OutputSection *sec : outputSections)
     if (sec->type != SHT_REL && sec->type != SHT_RELA)
       sec->writeTo<ELFT>(Out::bufferStart + sec->offset);
+
+  // Finally, check that all relocation addends were written correctly.
+  if (config->writeAddends) {
+    for (OutputSection *sec : outputSections)
+      if (sec->type == SHT_REL || sec->type == SHT_RELA)
+        sec->checkDynRelAddends(Out::bufferStart);
+  }
 }
 
 // Computes a hash value of Data using a given hash function.
 // In order to utilize multiple cores, we first split data into 1MB
 // chunks, compute a hash for each chunk, and then compute a hash value
 // of the hash values.
 static void
 computeHash(llvm::MutableArrayRef<uint8_t> hashBuf,

lld/test/ELF/got32-i386-pie-rw.s

 # REQUIRES: x86
 # RUN: llvm-mc -filetype=obj -triple=i686-pc-linux %s -o %t.o
+# RUN: llvm-objdump -r -d %t.o | FileCheck %s --check-prefix=OBJ
 # RUN: ld.lld %t.o -o %t -pie
-# RUN: llvm-readelf -r -S %t | FileCheck %s
+# RUN: llvm-objdump -s --section=.foobar --section=.got -r -d -t \
+# RUN:   --dynamic-reloc %t | FileCheck %s --check-prefixes=CHECK,REL
+# RUN: ld.lld %t.o -o %t-rela -pie -z rela
+# RUN: llvm-objdump -s --section=.foobar --section=.got -r -d -t \
+# RUN:   --dynamic-reloc %t-rela | FileCheck %s --check-prefixes=CHECK,RELA
 
 # Unlike bfd and gold we accept this.
 
-# CHECK: .foobar           PROGBITS        00002180
-# CHECK: .got              PROGBITS        [[GOT:[0-9a-z]*]]
-# CHECK-DAG: 00002182  00000008 R_386_RELATIVE
-# CHECK-DAG: [[GOT]]   00000008 R_386_RELATIVE
+# OBJ: 00000000 <_start>:
+# OBJ-NEXT: 0: 8b 1d 00 00 00 00  movl 0, %ebx
+# OBJ-NEXT: 00000002: R_386_GOT32 foo
+
+# CHECK-LABEL: SYMBOL TABLE:
+# REL:  00001180 l       .text  00000000 foo
+# REL:  00002180 g       .foobar  00000000 _start
+# RELA: 00001188 l       .text  00000000 foo
+# RELA: 00002188 g       .foobar  00000000 _start
+
+# CHECK-LABEL: DYNAMIC RELOCATION RECORDS
+# REL-NEXT:  00002182 R_386_RELATIVE *ABS*{{$}}
+# REL-NEXT:  000031f0 R_386_RELATIVE *ABS*{{$}}
+# RELA-NEXT: 0000218a R_386_RELATIVE *ABS*+0x31f8{{$}}
+# RELA-NEXT: 000031f8 R_386_RELATIVE *ABS*+0x1188{{$}}
+# CHECK-NEXT: Contents of section .foobar:
+# REL-NEXT:   2180 8b1df031 0000
+##                     ^--- VA of GOT entry (0x31f0)
+# RELA-NEXT:  2188 8b1d0000 0000
+##                     ^--- VA of GOT entry in Elf_Rela addend
+# CHECK-NEXT: Contents of section .got:
+# REL-NEXT:   31f0 80110000
+##                 ^--- VA of foo (0x1180)
+# RELA-NEXT:  31f8 00000000
+##                 ^--- VA of foo in Elf_Rela addend
+
+# CHECK-LABEL: Disassembly of section .foobar:
+# CHECK:     <_start>:
+# REL-NEXT:  2180: 8b 1d f0 31 00 00 movl 12784, %ebx
+##                       ^--- VA of GOT entry (0x31f0)
+# RELA-NEXT: 2188: 8b 1d 00 00 00 00 movl 0, %ebx
+##                       ^--- VA of GOT entry in in Elf_Rela addend
+
 foo:
 
 .section .foobar, "awx"
 .global _start
 _start:
  movl foo@GOT, %ebx

lld/test/ELF/i386-zrel-zrela.s

 # REQUIRES: x86
 ## The i386 psABI uses Elf64_Rela relocation entries. We produce
 ## Elf32_Rel dynamic relocations by default, but can use Elf32_Rela with -z rela.
 
 # RUN: llvm-mc -filetype=obj -triple=i386 %s -o %t.o
-# RUN: ld.lld -shared %t.o -o %t.so
-# RUN: llvm-readobj -d -r -x .data %t.so | FileCheck --check-prefix=REL %s
+# RUN: ld.lld -shared %t.o -o %t.so --noinhibit-exec
+# RUN: llvm-readobj -d -r -x .data -x .got.plt %t.so | FileCheck --check-prefix=REL %s
 # RUN: ld.lld -shared -z rel %t.o -o %t1.so
-# RUN: llvm-readobj -d -r -x .data %t1.so | FileCheck --check-prefix=REL %s
+# RUN: llvm-readobj -d -r -x .data -x .got.plt %t1.so | FileCheck --check-prefix=REL %s
 
 # REL:      REL      {{.*}}
 # REL-NEXT: RELSZ    32 (bytes)
 # REL-NEXT: RELENT   8 (bytes)
 # REL-NEXT: RELCOUNT 1
 # REL-NEXT: JMPREL   {{.*}}
 # REL-NEXT: PLTRELSZ 8 (bytes)
 # REL-NEXT: PLTGOT   {{.*}}
 # REL-NEXT: PLTREL   REL{{$}}
 # REL:      .rel.dyn {
 # REL-NEXT:   R_386_RELATIVE -
 # REL-NEXT:   R_386_GLOB_DAT func
 # REL-NEXT:   R_386_TLS_TPOFF tls
 # REL-NEXT:   R_386_32 _start
 # REL-NEXT: }
 # REL-NEXT: .rel.plt {
 # REL-NEXT:   R_386_JUMP_SLOT func
 # REL-NEXT: }
 
-# REL:      Hex dump of section '.data':
-# REL-NEXT: 0x000042d0 d0420000 2a000000
+# REL-LABEL: Hex dump of section '.data':
+# REL-NEXT:  0x000042d0 d0420000 2a000000
+##                       ^--- R_386_RELATIVE addend (0x42d0)
+##                                ^--- R_386_32 addend (0x2a)
+# REL-LABEL: Hex dump of section '.got.plt':
+# REL-NEXT:  0x000042d8 48320000 00000000 00000000 36120000
+##  R_386_JUMP_SLOT target (0x1236) ---------------^
 
 # RUN: ld.lld -shared -z rel -z rela %t.o -o %t2.so
-# RUN: llvm-readobj -d -r %t2.so | FileCheck --check-prefix=RELA %s
+# RUN: llvm-readobj -d -r -x .data -x .got.plt %t2.so | FileCheck --check-prefix=RELA %s
 
 # RELA:      RELA      {{.*}}
 # RELA-NEXT: RELASZ    48 (bytes)
 # RELA-NEXT: RELAENT   12 (bytes)
 # RELA-NEXT: RELACOUNT 1
 # RELA-NEXT: JMPREL    {{.*}}
 # RELA-NEXT: PLTRELSZ  12 (bytes)
 # RELA-NEXT: PLTGOT    {{.*}}
 # RELA-NEXT: PLTREL    RELA
 # RELA:      .rela.dyn {
 # RELA-NEXT:   R_386_RELATIVE - 0x42F0
 # RELA-NEXT:   R_386_GLOB_DAT func 0x0
 # RELA-NEXT:   R_386_TLS_TPOFF tls 0x0
 # RELA-NEXT:   R_386_32 _start 0x2A
 # RELA-NEXT: }
 # RELA-NEXT: .rela.plt {
 # RELA-NEXT:   R_386_JUMP_SLOT func 0x0
 # RELA-NEXT: }
 
+# RELA-LABEL: Hex dump of section '.data':
+# RELA-NEXT:  0x000042f0 00000000 2a000000
+##                                ^--- R_386_32 addend (0x2a)
+## TODO: we should probably clear the R_386_32 addend that was copied from the .o?
+## no addend written for R_386_RELATIVE
+# RELA-LABEL: Hex dump of section '.got.plt':
+# RELA-NEXT:  0x000042f8 68320000 00000000 00000000 56120000
+##  R_386_JUMP_SLOT target (0x1256) ----------------^
+
 .globl _start
 _start:
   call func@PLT
   movl func@GOT(%eax), %eax
 
 .section .text1,"awx"
   movl tls@GOTNTPOFF(%eax), %eax
 
 .data
   .long .data
   .long _start+42

lld/test/ELF/ppc64-abs64-dyn.s

 # REQUIRES: ppc
 # RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t.o
 # RUN: ld.lld -shared %t.o -o %t.so
-# RUN: llvm-readobj -r %t.so | FileCheck %s
+# RUN: llvm-readobj -r %t.so --syms | FileCheck %s
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t.o
 # RUN: ld.lld -shared %t.o -o %t.so
-# RUN: llvm-readobj -r %t.so | FileCheck %s
+# RUN: llvm-readobj -r %t.so --syms | FileCheck %s
 
 ## Test that we create R_PPC64_RELATIVE for R_PPC64_ADDR64 to non-preemptable
 ## symbols and R_PPC64_TOC in writable sections.
 
-## FIXME the addend for offset 0x20000 should be TOC base+0x8000+1, not 0x80001.
 # CHECK:      .rela.dyn {
-# CHECK-NEXT:   0x303B8 R_PPC64_RELATIVE - 0x8001
+# CHECK-NEXT:   0x303B8 R_PPC64_RELATIVE - 0x303B1
+## TOC base (0x283b0) + 0x8000 + 1 ---------^
 # CHECK-NEXT:   0x303C0 R_PPC64_RELATIVE - 0x303B9
 # CHECK-NEXT:   0x303C8 R_PPC64_ADDR64 external 0x1
 # CHECK-NEXT:   0x303D0 R_PPC64_ADDR64 global 0x1
 # CHECK-NEXT: }
+# CHECK-LABEL: Symbols [
+# CHECK:       Symbol {
+# CHECK:         Name: .TOC. ({{.+}})
+# CHECK-NEXT:    Value: 0x283B0
 
 .data
 .globl global
 global:
 local:
 
 .quad .TOC.@tocbase + 1
 .quad local + 1
 .quad external + 1
 .quad global + 1

lld/test/ELF/ppc64-long-branch-pi.s

 # SEC-PIE:    .got       PROGBITS 0000000002002100 2012100 000008 00  WA  0   0  8
 # SEC-PIE:    .branch_lt NOBITS   0000000002002110 2012110 000020 00  WA  0   0  8
 
 # SEC-SHARED: Name       Type     Address          Off     Size   ES Flg Lk Inf Al
 # SEC-SHARED: .got       PROGBITS 00000000020020e0 20120e0 000008 00  WA  0   0  8
 # SEC-SHARED: .branch_lt NOBITS   00000000020020f0 20120f0 000020 00  WA  0   0  8
 
 # RELOC:      .rela.dyn {
-# RELOC-NEXT:   0x2002108 R_PPC64_RELATIVE - 0x8000
+# RELOC-NEXT:   0x2002108 R_PPC64_RELATIVE - 0x2012100
 # RELOC-NEXT:   0x2002110 R_PPC64_RELATIVE - 0x2002000
 # RELOC-NEXT:   0x2002118 R_PPC64_RELATIVE - 0x2002008
 # RELOC-NEXT:   0x2002120 R_PPC64_RELATIVE - 0x200200C
 # RELOC-NEXT:   0x2002128 R_PPC64_RELATIVE - 0x2000
 # RELOC-NEXT: }
 
 # CHECK:      <_start>:
 # CHECK-NEXT:     2000:       bl 0x2010