[ELF][AArch64] Write addends for TLSDESC relocations with -z rel

[arichardson]

Summary

Since D100490 this case is diagnosed for -z rel. This commit implements
R_AARCH64_TLSDESC cases for AArch64::getImplicitAddend() and
AArch64::relocate(). However, there are probably further relocation types
that need to be handled for full support of -z rel.

Fixes https://bugs.llvm.org/show_bug.cgi?id=47009

Depends on D100490

[arichardson]

Breaks lld/test/ELF/x86-64-tlsdesc-gd.s, will investigate.

[arichardson]

Fix the failing amd64 test

[arichardson]

Rebase on top of D100489

[arichardson]

• fix doc comment

[arichardson]

rebase

[MaskRay]

lld/test/ELF/aarch64-tlsdesc-zrel.s

20

You can make --apply-dynamic-relocs and --no--apply-dynamic-relocs share prefixes for Relocations.

61

Delete comment which doesn't add any value

62

Just delete .type
.size can be deleted as well.

Technically this should be @tls_object, but @object or absence is fine for assemblers.

[arichardson]

rebase and shrink test case

[MaskRay]

LGTM.

lld/test/ELF/aarch64-tlsdesc-zrel.s

5

aarch64-pc-linux => aarch64

lld/ELF/Arch/AArch64.cpp

 
 namespace {
 class AArch64 : public TargetInfo {
 public:
   AArch64();
   RelExpr getRelExpr(RelType type, const Symbol &s,
                      const uint8_t *loc) const override;
   RelType getDynRel(RelType type) const override;
+  int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override;
   void writeGotPlt(uint8_t *buf, const Symbol &s) const override;
   void writePltHeader(uint8_t *buf) const override;
   void writePlt(uint8_t *buf, const Symbol &sym,
                 uint64_t pltEntryAddr) const override;
   bool needsThunk(RelExpr expr, RelType type, const InputFile *file,
                   uint64_t branchAddr, const Symbol &s,
                   int64_t a) const override;
   uint32_t getThunkSectionSpacing() const override;

 }
 
 RelType AArch64::getDynRel(RelType type) const {
   if (type == R_AARCH64_ABS64)
     return type;
   return R_AARCH64_NONE;
 }
 
+int64_t AArch64::getImplicitAddend(const uint8_t *buf, RelType type) const {
+  switch (type) {
+  case R_AARCH64_TLSDESC:
+    return read64(buf + 8);
+  default:
+    internalLinkerError(getErrorLocation(buf),
+                        "cannot read addend for relocation " + toString(type));
+    return 0;
+  }
+}
+
 void AArch64::writeGotPlt(uint8_t *buf, const Symbol &) const {
   write64(buf, in.plt->getVA());
 }
 
 void AArch64::writePltHeader(uint8_t *buf) const {
   const uint8_t pltData[] = {
       0xf0, 0x7b, 0xbf, 0xa9, // stp    x16, x30, [sp,#-16]!
       0x10, 0x00, 0x00, 0x90, // adrp   x16, Page(&(.plt.got[2]))
void AArch64::relocate(uint8_t *loc, const Relocation &rel,
   case R_AARCH64_TLSLE_ADD_TPREL_HI12:
     checkUInt(loc, val, 24, rel);
     or32AArch64Imm(loc, val >> 12);
     break;
   case R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
   case R_AARCH64_TLSDESC_ADD_LO12:
     or32AArch64Imm(loc, val);
     break;
+  case R_AARCH64_TLSDESC:
+    // For R_AARCH64_TLSDESC the addend is stored in the second 64-bit word.
+    write64(loc + 8, val);
+    break;
   default:
     llvm_unreachable("unknown relocation");
   }
 }
 
 void AArch64::relaxTlsGdToLe(uint8_t *loc, const Relocation &rel,
                              uint64_t val) const {
   // TLSDESC Global-Dynamic relocation are in the form:

lld/ELF/Relocations.cpp

handleTlsRelocation(RelType type, Symbol &sym, InputSectionBase &c,
   if (config->emachine == EM_MIPS)
     return handleMipsTlsRelocation(type, sym, c, offset, addend, expr);
 
   if (oneof<R_AARCH64_TLSDESC_PAGE, R_TLSDESC, R_TLSDESC_CALL, R_TLSDESC_PC>(
           expr) &&
       config->shared) {
     if (in.got->addDynTlsEntry(sym)) {
       uint64_t off = in.got->getGlobalDynOffset(sym);
-      mainPart->relaDyn->addReloc({target->tlsDescRel, in.got, off,
-                                   sym.isPreemptible
-                                       ? DynamicReloc::AgainstSymbol
-                                       : DynamicReloc::AddendOnlyWithTargetVA,
-                                   sym, 0, R_ABS});
+      mainPart->relaDyn->addAddendOnlyRelocIfNonPreemptible(
+          target->tlsDescRel, in.got, off, sym, target->tlsDescRel);
     }
     if (expr != R_TLSDESC_CALL)
       c.relocations.push_back({expr, type, offset, addend, &sym});
     return 1;
   }
 
   // ARM, Hexagon and RISC-V do not support GD/LD to IE/LE relaxation.  For
   // PPC64, if the file has missing R_PPC64_TLSGD/R_PPC64_TLSLD, disable
static void addGotEntry(Symbol &sym) {
   }
 
   // Otherwise, we emit a dynamic relocation to .rel[a].dyn so that
   // the GOT slot will be fixed at load-time.
   if (!sym.isTls() && !sym.isPreemptible && config->isPic) {
     addRelativeReloc(in.got, off, sym, 0, R_ABS, target->symbolicRel);
     return;
   }
-  mainPart->relaDyn->addReloc(
-      sym.isPreemptible ? DynamicReloc::AgainstSymbol
-                        : DynamicReloc::AddendOnlyWithTargetVA,
-      sym.isTls() ? target->tlsGotRel : target->gotRel, in.got, off, sym, 0,
-      sym.isPreemptible ? R_ADDEND : R_ABS, target->symbolicRel);
+  mainPart->relaDyn->addAddendOnlyRelocIfNonPreemptible(
+      sym.isTls() ? target->tlsGotRel : target->gotRel, in.got, off, sym,
+      target->symbolicRel);
 }
 
 // Return true if we can define a symbol in the executable that
 // contains the value/function of a symbol defined in a shared
 // library.
 static bool canDefineSymbolInExecutable(Symbol &sym) {
   // If the symbol has default visibility the symbol defined in the
   // executable will preempt it.

lld/ELF/SyntheticSections.h

public:
   void addSymbolReloc(RelType dynType, InputSectionBase *isec,
                       uint64_t offsetInSec, Symbol &sym, int64_t addend = 0,
                       llvm::Optional<RelType> addendRelType = llvm::None);
   /// Add a relative dynamic relocation that uses the target address of \p sym
   /// (i.e. InputSection::getRelocTargetVA()) + \p addend as the addend.
   void addRelativeReloc(RelType dynType, InputSectionBase *isec,
                         uint64_t offsetInSec, Symbol &sym, int64_t addend,
                         RelType addendRelType, RelExpr expr);
+  /// Add a dynamic relocation using the target address of \p sym as the addend
+  /// if \p sym is non-preemptible. Otherwise add a relocation against \p sym.
+  void addAddendOnlyRelocIfNonPreemptible(RelType dynType,
+                                          InputSectionBase *isec,
+                                          uint64_t offsetInSec, Symbol &sym,
+                                          RelType addendRelType);
   void addReloc(DynamicReloc::Kind kind, RelType dynType,
                 InputSectionBase *inputSec, uint64_t offsetInSec, Symbol &sym,
                 int64_t addend, RelExpr expr, RelType addendRelType);
   bool isNeeded() const override { return !relocs.empty(); }
   size_t getSize() const override { return relocs.size() * this->entsize; }
   size_t getRelativeRelocCount() const { return numRelativeRelocs; }
   void finalizeContents() override;
   static bool classof(const SectionBase *d) {

lld/ELF/SyntheticSections.cpp

void RelocationBaseSection::addRelativeReloc(
   // address of the GOT entry for a potentially preemptible symbol).
   assert((!sym.isPreemptible || expr == R_GOT) &&
          "cannot add relative relocation against preemptible symbol");
   assert(expr != R_ADDEND && "expected non-addend relocation expression");
   addReloc(DynamicReloc::AddendOnlyWithTargetVA, dynType, inputSec, offsetInSec,
            sym, addend, expr, addendRelType);
 }
 
+void RelocationBaseSection::addAddendOnlyRelocIfNonPreemptible(
+    RelType dynType, InputSectionBase *isec, uint64_t offsetInSec, Symbol &sym,
+    RelType addendRelType) {
+  // No need to write an addend to the section for preemptible symbols.
+  if (sym.isPreemptible)
+    addReloc({dynType, isec, offsetInSec, DynamicReloc::AgainstSymbol, sym, 0,
+              R_ABS});
+  else
+    addReloc(DynamicReloc::AddendOnlyWithTargetVA, dynType, isec, offsetInSec,
+             sym, 0, R_ABS, addendRelType);
+}
+
 void RelocationBaseSection::addReloc(DynamicReloc::Kind kind, RelType dynType,
                                      InputSectionBase *inputSec,
                                      uint64_t offsetInSec, Symbol &sym,
                                      int64_t addend, RelExpr expr,
                                      RelType addendRelType) {
   // Write the addends to the relocated address if required. We skip
   // it if the written value would be zero.
   if (config->writeAddends && (expr != R_ADDEND || addend != 0))

lld/test/ELF/aarch64-tlsdesc-zrel.s

+/// Check that we write addends for AArch64 TLSDESC relocations with -z rel
+/// See https://bugs.llvm.org/show_bug.cgi?id=47009
+// REQUIRES: aarch64
+// RUN: llvm-mc -filetype=obj -triple=aarch64 %s -o %t.o
+// RUN: ld.lld -shared %t.o -o %t-rela.so
+// RUN: llvm-readobj -W -r -x .got %t-rela.so | FileCheck %s --check-prefixes=RELA,RELA-NO-ADDENDS
+// RUN: ld.lld -shared %t.o -o %t-rela-addends.so --apply-dynamic-relocs
+// RUN: llvm-readobj -W -r -x .got %t-rela-addends.so | FileCheck %s --check-prefixes=RELA,RELA-WITH-ADDENDS
+
+// RELA:       Relocations [
+// RELA-NEXT:   Section (5) .rela.dyn {
+// RELA-NEXT:     0x20340 R_AARCH64_TLSDESC - 0x0
+// RELA-NEXT:     0x20350 R_AARCH64_TLSDESC - 0x4
+// RELA-NEXT:   }
+// RELA-NEXT: ]
+// RELA-NEXT:              Hex dump of section '.got':
+// RELA-NEXT:              0x00020340 00000000 00000000 00000000 00000000
+// RELA-NO-ADDENDS-NEXT:   0x00020350 00000000 00000000 00000000 00000000
+// RELA-WITH-ADDENDS-NEXT: 0x00020350 00000000 00000000 04000000 00000000
+///                Addend 0x4 for R_AARCH64_TLSDESC -----^
+// RELA-EMPTY:
+
+// RUN: ld.lld -shared %t.o -o %t-rel.so -z rel
+// RUN: llvm-readobj -W -r -x .got %t-rel.so | FileCheck %s --check-prefix=REL
+// REL:       Relocations [
+// REL-NEXT:   Section (5) .rel.dyn {
+// REL-NEXT:     0x20330 R_AARCH64_TLSDESC -{{$}}
+// REL-NEXT:     0x20340 R_AARCH64_TLSDESC -{{$}}
+// REL-NEXT:   }
+// REL-NEXT: ]
+// REL-NEXT: Hex dump of section '.got':
+// REL-NEXT: 0x00020330 00000000 00000000 00000000 00000000
+// REL-NEXT: 0x00020340 00000000 00000000 04000000 00000000
+///  Addend 0x4 for R_AARCH64_TLSDESC -----^
+// REL-EMPTY:
+
+        .text
+foo:
+        adrp    x0, :tlsdesc:x
+        ldr     x1, [x0, :tlsdesc_lo12:x]
+        add     x0, x0, :tlsdesc_lo12:x
+        .tlsdesccall x
+        blr     x1
+        adrp    x0, :tlsdesc:y
+        ldr     x1, [x0, :tlsdesc_lo12:y]
+        add     x0, x0, :tlsdesc_lo12:y
+        .tlsdesccall y
+        blr     x1
+        ret
+
+        .section        .tbss,"awT",@nobits
+        .p2align        2
+        .hidden x
+x:
+        .word   0
+
+        .p2align        2
+        .hidden y
+y:
+        .word   0