[ELF] Implement RISCV::getImplicitAddend()

[arichardson]

Summary

This allows checking dynamic relocation addends for -z rel and
--apply-dynamic-relocs output.

Depends on D101451 (not functionally, just to apply cleanly)

[jrtc27]

Honestly this seems rather academic, surely we should just mandate Elf_Rela for RISC-V? I've filed https://github.com/riscv/riscv-elf-psabi-doc/issues/186.

[arichardson]

In D101455#2722721, @jrtc27 wrote:

Honestly this seems rather academic, surely we should just mandate Elf_Rela for RISC-V? I've filed https://github.com/riscv/riscv-elf-psabi-doc/issues/186.

I don't think this should be a supported configuration, but it appears that -z rel is being used with AArch64, so it might make sense to allow it for RISC-V too.

[jrtc27]

In D101455#2722743, @arichardson wrote:

In D101455#2722721, @jrtc27 wrote:

Honestly this seems rather academic, surely we should just mandate Elf_Rela for RISC-V? I've filed https://github.com/riscv/riscv-elf-psabi-doc/issues/186.

I don't think this should be a supported configuration, but it appears that -z rel is being used with AArch64, so it might make sense to allow it for RISC-V too.

AAELF64 explicitly permits both, whereas RISC-V is silent on the matter and AFAIK nobody is using Elf_Rel because why would you inflict that pain upon yourself.

[MaskRay]

Looks reasonable to me. The base patches need a bit more work, though.

I think the overall complexity (generic code plus target-specific code) supporting REL isn't that high.
This supports both (1) -z rel and (2) check our dynamic relocation addends are correct.

lld/ELF/Arch/RISCV.cpp

155

The value at this location is not used.

ld.so implementations don't use addend for JUMP_SLOT/GLOB_DAT. NONE is just ignored.

lld/ELF/Arch/RISCV.cpp

 using namespace lld::elf;
 
 namespace {
 
 class RISCV final : public TargetInfo {
 public:
   RISCV();
   uint32_t calcEFlags() const override;
+  int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override;
   void writeGotHeader(uint8_t *buf) const override;
   void writeGotPlt(uint8_t *buf, const Symbol &s) const override;
   void writeIgotPlt(uint8_t *buf, const Symbol &s) const override;
   void writePltHeader(uint8_t *buf) const override;
   void writePlt(uint8_t *buf, const Symbol &sym,
                 uint64_t pltEntryAddr) const override;
   RelType getDynRel(RelType type) const override;
   RelExpr getRelExpr(RelType type, const Symbol &s,
for (InputFile *f : objectFiles) {
     if ((eflags & EF_RISCV_RVE) != (target & EF_RISCV_RVE))
       error(toString(f) +
             ": cannot link object files with different EF_RISCV_RVE");
   }
 
   return target;
 }
 
+int64_t RISCV::getImplicitAddend(const uint8_t *buf, RelType type) const {
+  switch (type) {
+  default:
+    internalLinkerError(getErrorLocation(buf),
+                        "cannot read addend for relocation " + toString(type));
+    return 0;
+  case R_RISCV_32:
+  case R_RISCV_TLS_DTPMOD32:
+  case R_RISCV_TLS_DTPREL32:
+    return SignExtend64<32>(read32le(buf));
+  case R_RISCV_64:
+    return read64le(buf);
+  case R_RISCV_RELATIVE:
+  case R_RISCV_IRELATIVE:
+    return config->is64 ? read64le(buf) : read32le(buf);
+  case R_RISCV_NONE:
+  case R_RISCV_JUMP_SLOT:
+    // These relocations are defined as not having an implicit addend.
+    return 0;
+  }
+}
+
 void RISCV::writeGotHeader(uint8_t *buf) const {
   if (config->is64)
     write64le(buf, mainPart->dynamic->getVA());
   else
     write32le(buf, mainPart->dynamic->getVA());
 }
 
 void RISCV::writeGotPlt(uint8_t *buf, const Symbol &s) const {

lld/ELF/Driver.cpp

static void setConfigs(opt::InputArgList &args) {
   config->writeAddends = args.hasFlag(OPT_apply_dynamic_relocs,
                                       OPT_no_apply_dynamic_relocs, false) ||
                          !config->isRela;
   // Validation of dynamic relocation addends is on by default for assertions
   // builds (for supported targets) and disabled otherwise. Ideally we would
   // enable the debug checks for all targets, but currently not all targets
   // have support for reading Elf_Rel addends, so we only enable for a subset.
 #ifndef NDEBUG
-  bool checkDynamicRelocsDefault =
-      m == EM_ARM || m == EM_386 || m == EM_MIPS || m == EM_X86_64;
+  bool checkDynamicRelocsDefault = m == EM_ARM || m == EM_386 || m == EM_MIPS ||
+                                   m == EM_X86_64 || m == EM_RISCV;
 #else
   bool checkDynamicRelocsDefault = false;
 #endif
   config->checkDynamicRelocs =
       args.hasFlag(OPT_check_dynamic_relocations,
                    OPT_no_check_dynamic_relocations, checkDynamicRelocsDefault);
   config->tocOptimize =
       args.hasFlag(OPT_toc_optimize, OPT_no_toc_optimize, m == EM_PPC64);