[AArch64][Driver][SVE] Push missing SVE feature error from driver to frontend

[peterwaller-arm]

Summary

... and give more guidance to users.

If specifying -msve-vector-bits on a non-SVE target, clang would say:

error: '-msve-vector-bits' is not supported without SVE enabled

1. The driver lacks logic for "implied features". This would result in this error being raised for -march=...+sve2, even though +sve2 implies +sve.

2. Feature implication is well modelled in LLVM, so push the error down the stack.

3. Hint to the user what flag they need to consider setting.

Now clang fails later, when the feature is used, saying:

aarch64-sve-vector-bits.c:42:41: error: 'arm_sve_vector_bits' attribute is not supported on targets missing 'sve'; specify an appropriate -march= or -mcpu=
typedef svint32_t noflag __attribute__((arm_sve_vector_bits(256)));

Move clang/test/Sema/{neon => arm}-vector-types-support.c and put tests for
this warning together in one place.

[sdesmalen]

Other than the nit, LGTM.

clang/lib/Sema/SemaType.cpp

7803

nit: s/ feature flag//
(otherwise, for this case it should be 'feature flags' and the case below would need 'the ' in front of it, to read nicely).

[peterwaller-arm]

Tweak message to address review comment.

[peterwaller-arm]

Update patch for clang-format

clang/include/clang/Basic/DiagnosticDriverKinds.td

def warn_drv_libstdcxx_not_found : Warning<
   "include path for libstdc++ headers not found; pass '-stdlib=libc++' on the "
   "command line to use the libc++ standard library instead">,
   InGroup<DiagGroup<"stdlibcxx-not-found">>;
 
 def err_drv_cannot_mix_options : Error<"cannot specify '%1' along with '%0'">;
 
 def err_drv_invalid_object_mode : Error<"OBJECT_MODE setting %0 is not recognized and is not a valid setting.">;
 
-def err_drv_invalid_sve_vector_bits : Error<
-  "'-msve-vector-bits' is not supported without SVE enabled">;
-
 def err_aix_default_altivec_abi : Error<
   "The default Altivec ABI on AIX is not yet supported, use '-mabi=vec-extabi' for the extended Altivec ABI">;
 
 def err_aix_altivec : Error<"'-mabi=vec-extabi' and '-mabi=vec-default' require '-maltivec'">;
 }

clang/include/clang/Basic/DiagnosticSemaKinds.td

 def err_invalid_branch_protection_spec : Error<
   "invalid or misplaced branch protection specification '%0'">;
 def warn_unsupported_target_attribute
     : Warning<"%select{unsupported|duplicate|unknown}0%select{| architecture|"
               " tune CPU}1 '%2' in the 'target' attribute string; 'target' "
               "attribute ignored">,
       InGroup<IgnoredAttributes>;
 def err_attribute_unsupported
-    : Error<"%0 attribute is not supported for this target">;
+    : Error<"%0 attribute is not supported on targets missing %1;"
+            " specify an appropriate -march= or -mcpu=">;
 // The err_*_attribute_argument_not_int are separate because they're used by
 // VerifyIntegerConstantExpression.
 def err_aligned_attribute_argument_not_int : Error<
   "'aligned' attribute requires integer constant">;
 def err_align_value_attribute_argument_not_int : Error<
   "'align_value' attribute requires integer constant">;
 def err_alignas_attribute_wrong_decl_type : Error<
   "%0 attribute cannot be applied to a %select{function parameter|"

clang/lib/Driver/ToolChains/Arch/AArch64.cpp

 //===--- AArch64.cpp - AArch64 (not ARM) Helpers for Tools ------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
if (HasCrypto && !NoCrypto) {
       }
     }
   }
 
   auto V8_6Pos = llvm::find(Features, "+v8.6a");
   if (V8_6Pos != std::end(Features))
     V8_6Pos = Features.insert(std::next(V8_6Pos), {"+i8mm", "+bf16"});
 
-  bool HasSve = llvm::is_contained(Features, "+sve");
-  // -msve-vector-bits=<bits> flag is valid only if SVE is enabled.
-  if (Args.hasArg(options::OPT_msve_vector_bits_EQ))
-    if (!HasSve)
-      D.Diag(diag::err_drv_invalid_sve_vector_bits);
-
   if (Arg *A = Args.getLastArg(options::OPT_mno_unaligned_access,
                                options::OPT_munaligned_access)) {
     if (A->getOption().matches(options::OPT_mno_unaligned_access))
       Features.push_back("+strict-align");
   } else if (Triple.isOSOpenBSD())
     Features.push_back("+strict-align");
 
   if (Args.hasArg(options::OPT_ffixed_x1))

clang/lib/Sema/SemaType.cpp

 //===--- SemaType.cpp - Semantic Analysis for Types -----------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //

 /// not the vector size in bytes.  The vector width and element type must
 /// match one of the standard Neon vector types.
 static void HandleNeonVectorTypeAttr(QualType &CurType, const ParsedAttr &Attr,
                                      Sema &S, VectorType::VectorKind VecKind) {
   // Target must have NEON (or MVE, whose vectors are similar enough
   // not to need a separate attribute)
   if (!S.Context.getTargetInfo().hasFeature("neon") &&
       !S.Context.getTargetInfo().hasFeature("mve")) {
-    S.Diag(Attr.getLoc(), diag::err_attribute_unsupported) << Attr;
+    S.Diag(Attr.getLoc(), diag::err_attribute_unsupported)
+        << Attr << "'neon' or 'mve'";
     Attr.setInvalid();
     return;
   }
   // Check the attribute arguments.
   if (Attr.getNumArgs() != 1) {
     S.Diag(Attr.getLoc(), diag::err_attribute_wrong_number_arguments) << Attr
                                                                       << 1;
     Attr.setInvalid();

 
 /// HandleArmSveVectorBitsTypeAttr - The "arm_sve_vector_bits" attribute is
 /// used to create fixed-length versions of sizeless SVE types defined by
 /// the ACLE, such as svint32_t and svbool_t.
 static void HandleArmSveVectorBitsTypeAttr(QualType &CurType, ParsedAttr &Attr,
                                            Sema &S) {
   // Target must have SVE.
   if (!S.Context.getTargetInfo().hasFeature("sve")) {
-    S.Diag(Attr.getLoc(), diag::err_attribute_unsupported) << Attr;
+    S.Diag(Attr.getLoc(), diag::err_attribute_unsupported) << Attr << "'sve'";
     Attr.setInvalid();
     return;
   }
 
   // Attribute is unsupported if '-msve-vector-bits=<bits>' isn't specified.
   if (!S.getLangOpts().ArmSveVectorBits) {
     S.Diag(Attr.getLoc(), diag::err_attribute_arm_feature_sve_bits_unsupported)
         << Attr;

clang/test/Driver/aarch64-sve-vector-bits.c

 
 // CHECK-128: "-msve-vector-bits=128"
 // CHECK-256: "-msve-vector-bits=256"
 // CHECK-512: "-msve-vector-bits=512"
 // CHECK-1024: "-msve-vector-bits=1024"
 // CHECK-2048: "-msve-vector-bits=2048"
 // CHECK-SCALABLE-NOT: "-msve-vector-bits=
 
-// Bail out if -msve-vector-bits is specified without SVE enabled
-// -----------------------------------------------------------------------------
-// RUN: %clang -c %s -### -target aarch64-none-linux-gnu -msve-vector-bits=128 \
-// RUN:  2>&1 | FileCheck --check-prefix=CHECK-NO-SVE-ERROR %s
-// RUN: %clang -c %s -### -target aarch64-none-linux-gnu -msve-vector-bits=256 \
-// RUN:  2>&1 | FileCheck --check-prefix=CHECK-NO-SVE-ERROR %s
-// RUN: %clang -c %s -### -target aarch64-none-linux-gnu -msve-vector-bits=512 \
-// RUN:  2>&1 | FileCheck --check-prefix=CHECK-NO-SVE-ERROR %s
-// RUN: %clang -c %s -### -target aarch64-none-linux-gnu -msve-vector-bits=1024 \
-// RUN:  2>&1 | FileCheck --check-prefix=CHECK-NO-SVE-ERROR %s
-// RUN: %clang -c %s -### -target aarch64-none-linux-gnu -msve-vector-bits=2048 \
-// RUN:  2>&1 | FileCheck --check-prefix=CHECK-NO-SVE-ERROR %s
-
-// CHECK-NO-SVE-ERROR: error: '-msve-vector-bits' is not supported without SVE enabled
-
 // Error out if an unsupported value is passed to -msve-vector-bits.
 // -----------------------------------------------------------------------------
 // RUN: %clang -c %s -### -target aarch64-none-linux-gnu -march=armv8-a+sve \
 // RUN:  -msve-vector-bits=64 2>&1 | FileCheck --check-prefix=CHECK-BAD-VALUE-ERROR %s
 // RUN: %clang -c %s -### -target aarch64-none-linux-gnu -march=armv8-a+sve \
 // RUN:  -msve-vector-bits=A 2>&1 | FileCheck --check-prefix=CHECK-BAD-VALUE-ERROR %s
 
 // CHECK-BAD-VALUE-ERROR: error: unsupported argument '{{.*}}' to option 'msve-vector-bits='

clang/test/Sema/arm-vector-types-support.c

+// RUN: %clang_cc1 %s -triple armv7 -fsyntax-only -verify
+
+typedef __attribute__((neon_vector_type(2))) int int32x2_t; // expected-error{{'neon_vector_type' attribute is not supported on targets missing 'neon' or 'mve'; specify an appropriate -march= or -mcpu=}}
+typedef __attribute__((neon_polyvector_type(16))) short poly8x16_t; // expected-error{{'neon_polyvector_type' attribute is not supported on targets missing 'neon' or 'mve'; specify an appropriate -march= or -mcpu=}}
+typedef __attribute__((arm_sve_vector_bits(256))) void nosveflag; // expected-error{{'arm_sve_vector_bits' attribute is not supported on targets missing 'sve'; specify an appropriate -march= or -mcpu=}}

clang/test/Sema/neon-vector-types-support.c

-// RUN: %clang_cc1 %s -triple armv7 -fsyntax-only -verify
-
-typedef __attribute__((neon_vector_type(2))) int int32x2_t; // expected-error{{'neon_vector_type' attribute is not supported for this target}}
-typedef __attribute__((neon_polyvector_type(16))) short poly8x16_t; // expected-error{{'neon_polyvector_type' attribute is not supported for this target}}