It makes RISC-V serve llvm.experimental.constrained.*.
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[RISCV] Support ISD::STRICT_FADD/FSUB/FMUL/FDIV/FMA for scalable vector types. Changes PlannedPublic Authored by fakepaper56 on Mar 6 2023, 7:15 AM.
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Summary It makes RISC-V serve llvm.experimental.constrained.*.
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Event TimelineHerald added subscribers: llvm-commits, alextsao1999, • pcwang-thead and 2 others. · View Herald Transcript
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Diff 502637 llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
llvm/test/CodeGen/RISCV/rvv/vfadd-constrained-sdnode.ll
llvm/test/CodeGen/RISCV/rvv/vfdiv-constrained-sdnode.ll
llvm/test/CodeGen/RISCV/rvv/vfmadd-constrained-sdnode.ll
llvm/test/CodeGen/RISCV/rvv/vfmsub-constrained-sdnode.ll
llvm/test/CodeGen/RISCV/rvv/vfmul-constrained-sdnode.ll
llvm/test/CodeGen/RISCV/rvv/vfnmadd-constrained-sdnode.ll
llvm/test/CodeGen/RISCV/rvv/vfnmsub-constrained-sdnode.ll
llvm/test/CodeGen/RISCV/rvv/vfsub-constrained-sdnode.ll
llvm/test/CodeGen/RISCV/rvv/vfwadd-constrained-sdnode.ll
llvm/test/CodeGen/RISCV/rvv/vfwmacc-constrained-sdnode.ll
llvm/test/CodeGen/RISCV/rvv/vfwmul-constrained-sdnode.ll
llvm/test/CodeGen/RISCV/rvv/vfwsub-constrained-sdnode.ll
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Shouldn't these be constrained.fpext?