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[RISCV][Driver] Add -mrvv-vector-bits= option similar to -msve-vector-bits=

Authored by craig.topper on Jan 19 2023, 10:49 AM.



This option will control the vscale min/max.

I have left out the '+' support that SVE supports for now. We already
have minimum controlled by the Zvl*b extension so this didn't seem that

I've added "scalable" from SVE to allow the option to be cancelled later on
command line. Though this name might make less sense for RISC-V since
the word "scalable" does not appear in the V spec. Maybe something like
"unknown" or "runtime" or "variable" would be better?

In addition to "scalable", 64, 128, 256, 512, ..., 65536, I have added an extra
value "zvl" that will use the value from Zvl*b as the min and max.
This avoids repeating the numeric value in two places or to get
min/max from -mcpu.

The primary effect of this option today is simplification of stack
address calculations for RVV vectors and avoiding the use of
vrgatherei16 in some cases if we know there are less than 256 elements.

Future patches may add something similar to the arm_sve_vector_bits
attribute to allow RVV vectors to be used in structs and global

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craig.topper created this revision.Jan 19 2023, 10:49 AM
Herald added a project: Restricted Project. · View Herald TranscriptJan 19 2023, 10:49 AM
craig.topper requested review of this revision.Jan 19 2023, 10:49 AM
Matt added a subscriber: Matt.Jan 19 2023, 9:50 PM
frasercrmck added inline comments.Jan 23 2023, 1:48 AM

Same question as below with the value "scalable". Should we excise it for now?


Is this check right? I don't see mention of "scalable" in the commit description. Should this be a plain else?


Need to adjust this comment


Another use of "scalable" which I'm not sure about.

craig.topper added inline comments.Jan 23 2023, 9:35 AM

"scalable" allows you to cancel the option appearing earlier on the command line. Similar to why most bool options have a "no-" version. It's let you do thing like append to CFLAGS to override a global setting in a make file.

craig.topper edited the summary of this revision. (Show Details)Jan 23 2023, 10:02 AM
MaskRay added inline comments.Jan 23 2023, 11:02 AM

Conform to the majority style, not the few exceptions



-target is legacy.

craig.topper retitled this revision from [RISCV][Driver] Add -rvv-vector-bits= option similar to -sve-vector-bits= to [RISCV][Driver] Add -mrvv-vector-bits= option similar to -msve-vector-bits=.Jan 23 2023, 5:30 PM
frasercrmck added inline comments.Jan 24 2023, 8:06 AM

Makes sense, thanks. I'm happy to include it as an option value, now that it's documented.

Generally supportive of having such an option, but going to defer to others on the review. I don't work enough on clang to have an opinion on code here.


Correct me if I'm wrong, but doesn't this set both an upper and lower bound? If so, the wording in the note here needs changed. If not, the naming should probably be something like rvv-vector-bits-max.

Address review comment in release notes.

frasercrmck accepted this revision.Feb 2 2023, 2:05 AM

LGTM other than test header comment that needs changed.


Still need to adjust this comment

This revision is now accepted and ready to land.Feb 2 2023, 2:05 AM
This revision was landed with ongoing or failed builds.Feb 2 2023, 10:32 AM
This revision was automatically updated to reflect the committed changes.