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[RISCV] Use vfirst.m to extract the first element from mask vector.
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Authored by jacquesguan on Dec 6 2022, 11:48 PM.

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Summary

This patch uses vfirst.m to extract the first bit of mask.

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Event Timeline

jacquesguan created this revision.Dec 6 2022, 11:48 PM
jacquesguan requested review of this revision.Dec 6 2022, 11:48 PM
reames added inline comments.Dec 7 2022, 7:46 AM
llvm/test/CodeGen/RISCV/rvv/extractelt-i1.ll
223

Hm, having a vsetvli toggle here is unfortunate. Can we achieve this in a slightly different way?

We could use a id vector, comparison with index, and then and to form a mask which could then be popcnt. This also generalize for any index.

We could use a vfirst.m and a scalar comparison against 0. This only works when index is the first potentially set bit.

We could extract the bottom ETYPE bits of the mask into a scalar, and then mask out the low bit. This works for any index < min(XLEN, sizeinbits(ETYPE)).

Have you given these options (or others) consideration? Your chosen solution appears correct, I'm just looking for some discussion of what other options you considered and rejected before we land this.

change to vfirst.m.

llvm/test/CodeGen/RISCV/rvv/extractelt-i1.ll
223

Let me summarize:

1, For all index:
vmv + vmseq create index mask
vcpop.m
extract the element

This way uses 3 instruction which is same as the current method, I don't think this way is better.

2, For the fisrt element:

vfirst.m + sltu

This way will change the vsetvli instruction with a scalar comparison instruction, I think it should be better as maybe avoid potential vsetvl insertion.

3, For the index located in min(XLEN, sizeinbits(ETYPE)):

This alreay achieved with fixed vector, but the scalable vector should be improved.

jacquesguan retitled this revision from [RISCV] Use vcpop.m to extract the first element from mask vector. to [RISCV] Use vfirst.m to extract the first element from mask vector..Dec 7 2022, 11:46 PM
jacquesguan edited the summary of this revision. (Show Details)
craig.topper added inline comments.Dec 8 2022, 9:52 AM
llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
1840

This comment appears to have been copy and pasted without updating

Address comment.

jacquesguan added inline comments.Dec 8 2022, 6:55 PM
llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
1840

Done.

This revision is now accepted and ready to land.Dec 30 2022, 9:01 AM
This revision was landed with ongoing or failed builds.Jan 2 2023, 7:24 PM
This revision was automatically updated to reflect the committed changes.