[AArch64] Improve TargetParser API

[tmatheson]

Summary

The TargetParser depends heavily on a collection of macros and enums to tie
together information about architectures, CPUs and extensions. Over time this
has led to some pretty awkward API choices. For example, recently a custom
operator-- has been added to the enum, which effectively turns iteration into
a graph traversal and makes the ordering of the macro calls in the header
significant. More generally there is a lot of string <-> enum conversion
going on. I think this shows the extent to which the current data structures
are constraining us, and the need for a rethink.

I tried to split this into smaller commits, but couldn't find a way to do it
without requiring people to review a lot of code that would be deleted in the
next patch.

AArch64 only for now, but if it is accepted I will work on the same for ARM.

Key changes:

• Get rid of Arch enum, which is used to bind fields together. Instead of passing around ArchKind, use the named ArchInfo objects directly or via references.
• The list of all known ArchInfo becomes an array of pointers.
• ArchKind::operator-- is replaced with ArchInfo::implies(), which defines which architectures are predecessors to each other. This allows features from predecessor architectures to be added in a more intuitive way.
• Free functions of the form f(ArchKind) are converted to ArchInfo::f(). Some functions become unnecessary and are deleted.
• Version number and profile are added to the ArchInfo. This makes comparison of architectures easier and moves a couple of functions out of clang and into AArch64TargetParser.
• clang::AArch64TargetInfo ArchInfo is initialised to Armv8a not INVALID.
• AArch64::ArchProfile which is distinct from ARM::ArchProfile
• Give things sensible names and add some comments.

[DavidSpickett]

Looks like a good direction to me. Plenty more bits in clang that should really live in the target parser, and this is a great start at moving those.

My only issue is the use of AI for ArchInfo. I see that ArchKind was also a type and a var name. If this new name is following the codestyle then fine but I'd go with ArchInfo (arch_info but that's against the style, sigh). Up to you, I know the acronym style is common elsewhere and IDE helpers mitigate it somewhat.

llvm/include/llvm/Support/AArch64TargetParser.h

119

Do you need to do anything to prevent moving from this?

[tmatheson]

Rename AI -> ArchInfo and delete move constructor/assignment

[tmatheson]

Thanks for the review!

[Hahnfeld]

Hi, I bisected this change to lead to a couple of test failures when building with LLVM_LINK_LLVM_DYLIB. In the past, this had to do with global variable initialization order, but nothing immediately jumps to my eye in this patch. Is AARCH64_ARCH used to define global variables?

[tmatheson]

In D138792#3966920, @Hahnfeld wrote:

Hi, I bisected this change to lead to a couple of test failures when building with LLVM_LINK_LLVM_DYLIB. In the past, this had to do with global variable initialization order, but nothing immediately jumps to my eye in this patch. Is AARCH64_ARCH used to define global variables?

Hi, yes this change introduces a bunch of inline constexpr global variables in AArch64TargetParser.h.

[bkramer]

llvm/include/llvm/Support/AArch64TargetParser.h

112–115

If this is really non-copyable add a (constexpr) constructor. non-copyable and aggregate initialization doesn't mix. C++20 doesn't allow it, C++17 accidentally has a lot of loopholes around the non-copyability if you do aggregate initialization.

155–162

Is there a good reason for these to be defined in the header? This was wrong before and now works because of inline constexpr, but it's still wasting a bunch of compile time.

[Hahnfeld]

llvm/include/llvm/Support/AArch64TargetParser.h

155–162

It's also likely that this is the reason for the failures I see with LLVM_LINK_LLVM_DYLIB, though I need to investigate more thoroughly what is going wrong in there...

[mgorny]

In D138792#3966920, @Hahnfeld wrote:

Hi, I bisected this change to lead to a couple of test failures when building with LLVM_LINK_LLVM_DYLIB. In the past, this had to do with global variable initialization order, but nothing immediately jumps to my eye in this patch. Is AARCH64_ARCH used to define global variables?

Did you hit these?

Failed Tests (4):
  Clang :: Driver/aarch64-target-as-march.s
  Clang :: Misc/target-invalid-cpu-note.c
  Clang :: Preprocessor/aarch64-target-features.c
  Clang :: Sema/attr-target.c

I've just bisected them to this commit, so I guess yes.

[Hahnfeld]

In D138792#3969310, @mgorny wrote:

In D138792#3966920, @Hahnfeld wrote:

Hi, I bisected this change to lead to a couple of test failures when building with LLVM_LINK_LLVM_DYLIB. In the past, this had to do with global variable initialization order, but nothing immediately jumps to my eye in this patch. Is AARCH64_ARCH used to define global variables?

Did you hit these?

Failed Tests (4):
  Clang :: Driver/aarch64-target-as-march.s
  Clang :: Misc/target-invalid-cpu-note.c
  Clang :: Preprocessor/aarch64-target-features.c
  Clang :: Sema/attr-target.c

I've just bisected them to this commit, so I guess yes.

Yes, these are the ones I see in my "default" configuration (RelWithDebInfo and assertions turned on). If I however modify my Release configuration to add LLVM_LINK_LLVM_DYLIB, I see the following 9 failures:

Failed Tests (9):
  Clang :: Driver/aarch64-march.c
  Clang :: Driver/aarch64-sve.c
  Clang :: Driver/aarch64-sve2.c
  Clang :: Driver/aarch64-target-as-march.s
  Clang :: Driver/aarch64-v91a.c
  Clang :: Driver/aarch64-v92a.c
  Clang :: Misc/target-invalid-cpu-note.c
  Clang :: Preprocessor/aarch64-target-features.c
  Clang :: Sema/attr-target.c

It's not entirely clear to me why there are more failing tests...

[tmatheson]

@Hahnfeld, @mgorny I was able to reproduce the failures with LLVM_LINK_LLVM_DYLIB, and they are failing because the comparison is failing because copies are being created. I don't fully understand how but presumably we are still ending up with one object per shared library. I tried adding a constructor as @bkramer suggested but this did not solve the issue. Please see D139278 for a fix.

[Hahnfeld]

What about @bkramer's suggestion to move the definitions out of the header? Based on what you write (comparison by address), this should also solve the issue.

[tmatheson]

Yes I will look into it and address the other comments when I have more time tomorrow or later this week. However I'm starting to think that the comparison by address is too easy to subtly break, and not immediately obvious to debug, and is therefore not worth it in this case. The performance of the comparison is not especially critical here afaik.

[tmatheson]

llvm/include/llvm/Support/AArch64TargetParser.h

155–162

Is there a good reason for these to be defined in the header? This was wrong before and now works because of inline constexpr, but it's still wasting a bunch of compile time.

I'm not aware of a good reason. Doing something to improve the compile time impact is on the list of things I'd like to get to. They need to be declared in the header because they are used for comparisons (open to other suggestions) but don't have to be defined there.

I expected inline constexpr to guarantee the same address across shared libraries, but it looks like maybe it doesn't?

[saugustine]

We are seeing constexpr failures with this change. They look like this:

In file included from llvm-project/llvm/lib/Support/AArch64TargetParser.cpp:14:
In file included from llvm-project/llvm/include/llvm/Support/AArch64TargetParser.h:160:
llvm-project/llvm/include/llvm/Support/AArch64TargetParser.def:20:47: error: constexpr variable cannot have non-literal type 'const ArchInfo'
AARCH64_ARCH(0, 0, InvalidProfile, "invalid", INVALID, "+",

I intend to revert this change early 5 December. Please let me know if that will be an issue.

[MaskRay]

@bkramer pushed a C++20 fix which was reverted by 8be0d8fb83aa359caf0a7413c4a0fe49aef0dff1 by @tmatheson , but the revert had no message about why.

[tmatheson]

@MaskRay I reverted that commit because it broke important functionality (comparison by address) to fix an issue in an unsupported C++ version, it wasn't reviewed, and it was not clear from the commit message what it was fixing. I explained this in a comment on the original commit but forgot to add it to the message for the revert, sorry.

@saugustine I have reverted the patch while I address the issues that you and others have raised. In future if would be helpful if you provided some information about how to reproduce the error. However it looks like this is also related to C++20, and I would like to understand what the policy is there. As far as I am aware this is an untested configuration. If you are building with C++20 and any otherwise-good patches that break your build must be reverted, then there should be a buildbot covering that configuration. Without a buildbot, I think the onus should be on you to suggesting a fix, or at least give enough details to reproduce the problem and allow time for a fix. Apologies if I have misunderstood something.

[MaskRay]

In D138792#3970376, @tmatheson wrote:

@MaskRay I reverted that commit because it broke important functionality (comparison by address) to fix an issue in an unsupported C++ version, it wasn't reviewed, and it was not clear from the commit message what it was fixing. I explained this in a comment on the original commit but forgot to add it to the message for the revert, sorry.

That happened! Don't worry.

@saugustine I have reverted the patch while I address the issues that you and others have raised. In future if would be helpful if you provided some information about how to reproduce the error. However it looks like this is also related to C++20, and I would like to understand what the policy is there. As far as I am aware this is an untested configuration. If you are building with C++20 and any otherwise-good patches that break your build must be reverted, then there should be a buildbot covering that configuration. Without a buildbot, I think the onus should be on you to suggesting a fix, or at least give enough details to reproduce the problem and allow time for a fix. Apologies if I have misunderstood something.

Thanks! You can set -DCMAKE_CXX_STANDARD=20 to test C++20. https://raw.githubusercontent.com/chromium/chromium/main/tools/clang/scripts/update.py has a prebuilt Clang which can be used as CMAKE_{C,CXX}_COMPILER.
A build bot is in plan https://discourse.llvm.org/t/adding-a-c-20-buildbot/67156

[tmatheson]

Reworked after several other major changes to the TargetParser since
this was reverted. Combined with several other approved changes.

Inline calls for the following macros and delete AArch64TargetParser.def:

AARCH64_ARCH,  AARCH64_CPU_NAME,  AARCH64_CPU_ALIAS, AARCH64_ARCH_EXT_NAME

Don't use address comparison, use string comparison instead.

[tmatheson]

Fix clang/test/Sema/attr-target-clones-aarch64.c

[tmatheson]

The most recent versions of this patch contains squashed changes from these reviews:

• D139278 "[AArch64] Use string comparison for ArchInfo equality." This fixes the test failures with shared libraries, which were caused by each shared library ending up with it's own copy of the ArchInfo instances and hence breaking the equality-by-address.
• D139102 "[AArch64] Inline AArch64TargetParser.def"

The ArchInfo class is no longer non-copyable to satisfy C++20. The alternative of adding a constructor would have resulted in global constructor calls, which is not allowed in Support (the same presumably applies to the new TargetParser library).

I've tested locally with LLVM_BUILD_LLVM_DYLIB=ON + LLVM_LINK_LLVM_DYLIB=ON + CMAKE_CXX_STANDARD=20.

[tmatheson]

Worth noting that this had to be reworked because both D127812 and D137838 went in since this was reverted.

[pratlucas]

LGTM with a tiny nit. Feel free to fix it when landing the changes.

llvm/include/llvm/TargetParser/AArch64TargetParser.h

164–166 ↗

(On Diff #488945)

Minor nit: can you replace the // ????? comments with a single TODO to document those better? It'd look a bit less confusing for others reading this in the future.

[danielkiss]

clang/lib/Basic/Targets/AArch64.cpp

445

clang/lib/Driver/ToolChains/Arch/AArch64.cpp

167

Would be nice to add a custom operator to ArchInfo to say *ArchInfo >= llvm::AArch64::ARMV9A
because it looks to me here the llvm::AArch64::ARMV9_3A and llvm::AArch64::ARMV9_4A are missing.

[tmatheson]

clang/lib/Basic/Targets/AArch64.cpp

445

I'll fix this when I push

clang/lib/Driver/ToolChains/Arch/AArch64.cpp

167

Good catch. This could be written as if(ArchInfo.implies(ARMV9A)), but I'll leave that for a follow up patch. I opted against a custom operator because they generally make things less understandable, except in cases where the ordering is very obvious, e.g. numeric types. For example 9.2 does not imply 8.8. If you want to do an actual numerical comparison of version numbers you can compare ArchInfo.Versions directly.

[tmatheson]

Address comments and fix flang test

clang/lib/Basic/Targets/AArch64.h

class LLVM_LIBRARY_VISIBILITY AArch64TargetInfo : public TargetInfo {
   bool HasSVE2BitPerm;
   bool HasMatmulFP64;
   bool HasMatmulFP32;
   bool HasLSE;
   bool HasFlagM;
   bool HasMOPS;
   bool HasRCPC;
 
-  llvm::AArch64::ArchKind ArchKind;
+  const llvm::AArch64::ArchInfo *AI = &llvm::AArch64::ARMV8A;
 
   static const Builtin::Info BuiltinInfo[];
 
   std::string ABI;
-  StringRef getArchProfile() const;
 
 public:
   AArch64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts);
 
   StringRef getABI() const override;
   bool setABI(const std::string &Name) override;
 
   bool validateBranchProtection(StringRef Spec, StringRef Arch,

clang/lib/Basic/Targets/AArch64.cpp

#define LANGBUILTIN(ID, TYPE, ATTRS, LANG)                                     \
   {#ID, TYPE, ATTRS, nullptr, LANG, nullptr},
 #define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE)                               \
   {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, FEATURE},
 #define TARGET_HEADER_BUILTIN(ID, TYPE, ATTRS, HEADER, LANGS, FEATURE)         \
   {#ID, TYPE, ATTRS, HEADER, LANGS, FEATURE},
 #include "clang/Basic/BuiltinsAArch64.def"
 };
 
-static StringRef getArchVersionString(llvm::AArch64::ArchKind Kind) {
-  switch (Kind) {
-  case llvm::AArch64::ArchKind::ARMV9A:
-  case llvm::AArch64::ArchKind::ARMV9_1A:
-  case llvm::AArch64::ArchKind::ARMV9_2A:
-  case llvm::AArch64::ArchKind::ARMV9_3A:
-  case llvm::AArch64::ArchKind::ARMV9_4A:
-    return "9";
-  default:
-    return "8";
-  }
-}
-
-StringRef AArch64TargetInfo::getArchProfile() const {
-  switch (ArchKind) {
-  case llvm::AArch64::ArchKind::ARMV8R:
-    return "R";
-  default:
-    return "A";
-  }
-}
-
 AArch64TargetInfo::AArch64TargetInfo(const llvm::Triple &Triple,
                                      const TargetOptions &Opts)
     : TargetInfo(Triple), ABI("aapcs") {
   if (getTriple().isOSOpenBSD()) {
     Int64Type = SignedLongLong;
     IntMaxType = SignedLongLong;
   } else {
     if (!getTriple().isOSDarwin() && !getTriple().isOSNetBSD())
else
     BPI.SignKey = LangOptions::SignReturnAddressKeyKind::BKey;
 
   BPI.BranchTargetEnforcement = PBP.BranchTargetEnforcement;
   return true;
 }
 
 bool AArch64TargetInfo::isValidCPUName(StringRef Name) const {
   return Name == "generic" ||
-         llvm::AArch64::parseCPUArch(Name) != llvm::AArch64::ArchKind::INVALID;
+         llvm::AArch64::parseCpu(Name).Arch != llvm::AArch64::INVALID;
 }
 
 bool AArch64TargetInfo::setCPU(const std::string &Name) {
   return isValidCPUName(Name);
 }
 
 void AArch64TargetInfo::fillValidCPUList(
     SmallVectorImpl<StringRef> &Values) const {
void AArch64TargetInfo::getTargetDefines(const LangOptions &Opts,
   if (CodeModel == "default")
     CodeModel = "small";
   for (char &c : CodeModel)
     c = toupper(c);
   Builder.defineMacro("__AARCH64_CMODEL_" + CodeModel + "__");
 
   // ACLE predefines. Many can only have one possible value on v8 AArch64.
   Builder.defineMacro("__ARM_ACLE", "200");
-  Builder.defineMacro("__ARM_ARCH", getArchVersionString(ArchKind));
-  Builder.defineMacro("__ARM_ARCH_PROFILE", "'" + getArchProfile() + "'");
+  Builder.defineMacro("__ARM_ARCH", std::to_string(AI->Version.getMajor()));
+  Builder.defineMacro("__ARM_ARCH_PROFILE",
+                      std::string("'") + (char)AI->Profile + "'");
 
   Builder.defineMacro("__ARM_64BIT_STATE", "1");
   Builder.defineMacro("__ARM_PCS_AAPCS64", "1");
   Builder.defineMacro("__ARM_ARCH_ISA_A64", "1");
 
   Builder.defineMacro("__ARM_FEATURE_CLZ", "1");
   Builder.defineMacro("__ARM_FEATURE_FMA", "1");
   Builder.defineMacro("__ARM_FEATURE_LDREX", "0xF");
if (HasLS64)
     Builder.defineMacro("__ARM_FEATURE_LS64", "1");
 
   if (HasRandGen)
     Builder.defineMacro("__ARM_FEATURE_RNG", "1");
 
   if (HasMOPS)
     Builder.defineMacro("__ARM_FEATURE_MOPS", "1");
 
-  switch (ArchKind) {
-  default:
-    break;
-  case llvm::AArch64::ArchKind::ARMV8_1A:
+  if (*AI == llvm::AArch64::ARMV8_1A)
     getTargetDefinesARMV81A(Opts, Builder);
-    break;
-  case llvm::AArch64::ArchKind::ARMV8_2A:
+  if (*AI == llvm::AArch64::ARMV8_2A)
     getTargetDefinesARMV82A(Opts, Builder);
-    break;
-  case llvm::AArch64::ArchKind::ARMV8_3A:
+  if (*AI == llvm::AArch64::ARMV8_3A)
     getTargetDefinesARMV83A(Opts, Builder);
-    break;
-  case llvm::AArch64::ArchKind::ARMV8_4A:
+  if (*AI == llvm::AArch64::ARMV8_4A)
     getTargetDefinesARMV84A(Opts, Builder);
-    break;
-  case llvm::AArch64::ArchKind::ARMV8_5A:
+  if (*AI == llvm::AArch64::ARMV8_5A)
     getTargetDefinesARMV85A(Opts, Builder);
-    break;
-  case llvm::AArch64::ArchKind::ARMV8_6A:
+  if (*AI == llvm::AArch64::ARMV8_6A)
     getTargetDefinesARMV86A(Opts, Builder);
-    break;
-  case llvm::AArch64::ArchKind::ARMV8_7A:
+  if (*AI == llvm::AArch64::ARMV8_7A)
     getTargetDefinesARMV87A(Opts, Builder);
-    break;
-  case llvm::AArch64::ArchKind::ARMV8_8A:
+  if (*AI == llvm::AArch64::ARMV8_8A)
     getTargetDefinesARMV88A(Opts, Builder);
-    break;
-  case llvm::AArch64::ArchKind::ARMV8_9A:
+  if (*AI == llvm::AArch64::ARMV8_9A)
     getTargetDefinesARMV89A(Opts, Builder);
-    break;
-  case llvm::AArch64::ArchKind::ARMV9A:
+  if (*AI == llvm::AArch64::ARMV9A)
     getTargetDefinesARMV9A(Opts, Builder);
-    break;
-  case llvm::AArch64::ArchKind::ARMV9_1A:
+  if (*AI == llvm::AArch64::ARMV9_1A)
     getTargetDefinesARMV91A(Opts, Builder);
-    break;
-  case llvm::AArch64::ArchKind::ARMV9_2A:
+  if (*AI == llvm::AArch64::ARMV9_2A)
     getTargetDefinesARMV92A(Opts, Builder);
-    break;
-  case llvm::AArch64::ArchKind::ARMV9_3A:
+  if (*AI == llvm::AArch64::ARMV9_3A)
     getTargetDefinesARMV93A(Opts, Builder);
-    break;
-  case llvm::AArch64::ArchKind::ARMV9_4A:
+  if (*AI == llvm::AArch64::ARMV9_4A)
     getTargetDefinesARMV94A(Opts, Builder);
-    break;
-  }
 
   // All of the __sync_(bool|val)_compare_and_swap_(1|2|4|8) builtins work.
   Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
   Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
   Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
   Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
 
   // Allow detection of fast FMA support.
return llvm::StringSwitch<bool>(Feature)
     .Cases("sve", "sve2", "sve2-bitperm", "sve2-aes", "sve2-sha3", "sve2-sm4", "f64mm", "f32mm", "i8mm", "bf16", FPU & SveMode)
     .Case("ls64", HasLS64)
     .Default(false);
 }
 
 void AArch64TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
                                           StringRef Name, bool Enabled) const {
   Features[Name] = Enabled;
-  llvm::AArch64::ArchKind AK = llvm::AArch64::getSubArchArchKind(Name);
-  // Add all previous architecture versions.
-  // In case of v9.x the v8.x counterparts are added too.
-  if ("9" == getArchVersionString(AK))
-    for (llvm::AArch64::ArchKind I = llvm::AArch64::convertV9toV8(AK);
-         I != llvm::AArch64::ArchKind::INVALID; --I)
-      Features[llvm::AArch64::getSubArch(I)] = Enabled;
-
-  for (llvm::AArch64::ArchKind I = --AK; I != llvm::AArch64::ArchKind::INVALID;
-       --I)
-    Features[llvm::AArch64::getSubArch(I)] = Enabled;
+  // If this "feature" is an architecture, also add features for all previous
+  // architecture versions. In case of v9.x the v8.x counterparts are added too.
+  const llvm::AArch64::ArchInfo &AI =
+      llvm::AArch64::ArchInfo::findBySubArch(Name);
+
+  if (AI == llvm::AArch64::INVALID)
+    return; // Not an architecure, nothing more to do.
+
+  for (const auto *OtherArch : llvm::AArch64::ArchInfos)
+    if (AI.implies(*OtherArch))
+      Features[OtherArch->getSubArch()] = Enabled;
 }
 
 bool AArch64TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
                                              DiagnosticsEngine &Diags) {
   FPU = FPUMode;
   HasCRC = false;
   HasAES = false;
   HasSHA2 = false;
bool AArch64TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
   HasSVE2SM4 = false;
   HasSVE2BitPerm = false;
   HasMatmulFP64 = false;
   HasMatmulFP32 = false;
   HasLSE = false;
   HasMOPS = false;
   HasRCPC = false;
 
-  ArchKind = llvm::AArch64::ArchKind::INVALID;
-
   for (const auto &Feature : Features) {
     if (Feature == "+neon")
       FPU |= NeonMode;
     if (Feature == "+sve") {
       FPU |= SveMode;
       HasFullFP16 = true;
     }
     if (Feature == "+sve2") {
if (Feature == "+sha3") {
       HasSHA2 = true;
       HasSHA3 = true;
     }
     if (Feature == "+sm4")
       HasSM4 = true;
     if (Feature == "+strict-align")
       HasUnaligned = false;
     // All predecessor archs are added but select the latest one for ArchKind.
-    if (Feature == "+v8a" && ArchKind < llvm::AArch64::ArchKind::ARMV8A)
-      ArchKind = llvm::AArch64::ArchKind::ARMV8A;
-    if (Feature == "+v8.1a" && ArchKind < llvm::AArch64::ArchKind::ARMV8_1A)
-      ArchKind = llvm::AArch64::ArchKind::ARMV8_1A;
-    if (Feature == "+v8.2a" && ArchKind < llvm::AArch64::ArchKind::ARMV8_2A)
-      ArchKind = llvm::AArch64::ArchKind::ARMV8_2A;
-    if (Feature == "+v8.3a" && ArchKind < llvm::AArch64::ArchKind::ARMV8_3A)
-      ArchKind = llvm::AArch64::ArchKind::ARMV8_3A;
-    if (Feature == "+v8.4a" && ArchKind < llvm::AArch64::ArchKind::ARMV8_4A)
-      ArchKind = llvm::AArch64::ArchKind::ARMV8_4A;
-    if (Feature == "+v8.5a" && ArchKind < llvm::AArch64::ArchKind::ARMV8_5A)
-      ArchKind = llvm::AArch64::ArchKind::ARMV8_5A;
-    if (Feature == "+v8.6a" && ArchKind < llvm::AArch64::ArchKind::ARMV8_6A)
-      ArchKind = llvm::AArch64::ArchKind::ARMV8_6A;
-    if (Feature == "+v8.7a" && ArchKind < llvm::AArch64::ArchKind::ARMV8_7A)
-      ArchKind = llvm::AArch64::ArchKind::ARMV8_7A;
-    if (Feature == "+v8.8a" && ArchKind < llvm::AArch64::ArchKind::ARMV8_8A)
-      ArchKind = llvm::AArch64::ArchKind::ARMV8_8A;
-    if (Feature == "+v8.9a" && ArchKind < llvm::AArch64::ArchKind::ARMV8_9A)
-      ArchKind = llvm::AArch64::ArchKind::ARMV8_9A;
-    if (Feature == "+v9a" && ArchKind < llvm::AArch64::ArchKind::ARMV9A)
-      ArchKind = llvm::AArch64::ArchKind::ARMV9A;
-    if (Feature == "+v9.1a" && ArchKind < llvm::AArch64::ArchKind::ARMV9_1A)
-      ArchKind = llvm::AArch64::ArchKind::ARMV9_1A;
-    if (Feature == "+v9.2a" && ArchKind < llvm::AArch64::ArchKind::ARMV9_2A)
-      ArchKind = llvm::AArch64::ArchKind::ARMV9_2A;
-    if (Feature == "+v9.3a" && ArchKind < llvm::AArch64::ArchKind::ARMV9_3A)
-      ArchKind = llvm::AArch64::ArchKind::ARMV9_3A;
-    if (Feature == "+v9.4a" && ArchKind < llvm::AArch64::ArchKind::ARMV9_4A)
-      ArchKind = llvm::AArch64::ArchKind::ARMV9_4A;
+    if (Feature == "+v8a" && AI->Version < llvm::AArch64::ARMV8A.Version)
+      AI = &llvm::AArch64::ARMV8A;
+    if (Feature == "+v8.1a" && AI->Version < llvm::AArch64::ARMV8_1A.Version)
+      AI = &llvm::AArch64::ARMV8_1A;
+    if (Feature == "+v8.2a" && AI->Version < llvm::AArch64::ARMV8_2A.Version)
+      AI = &llvm::AArch64::ARMV8_2A;
+    if (Feature == "+v8.3a" && AI->Version < llvm::AArch64::ARMV8_3A.Version)
+      AI = &llvm::AArch64::ARMV8_3A;
+    if (Feature == "+v8.4a" && AI->Version < llvm::AArch64::ARMV8_4A.Version)
+      AI = &llvm::AArch64::ARMV8_4A;
+    if (Feature == "+v8.5a" && AI->Version < llvm::AArch64::ARMV8_5A.Version)
+      AI = &llvm::AArch64::ARMV8_5A;
+    if (Feature == "+v8.6a" && AI->Version < llvm::AArch64::ARMV8_6A.Version)
+      AI = &llvm::AArch64::ARMV8_6A;
+    if (Feature == "+v8.7a" && AI->Version < llvm::AArch64::ARMV8_7A.Version)
+      AI = &llvm::AArch64::ARMV8_7A;
+    if (Feature == "+v8.8a" && AI->Version < llvm::AArch64::ARMV8_8A.Version)
+      AI = &llvm::AArch64::ARMV8_8A;
+    if (Feature == "+v8.9a" && AI->Version < llvm::AArch64::ARMV8_9A.Version)
+      AI = &llvm::AArch64::ARMV8_9A;
+    if (Feature == "+v9a" && AI->Version < llvm::AArch64::ARMV9A.Version)
+      AI = &llvm::AArch64::ARMV9A;
+    if (Feature == "+v9.1a" && AI->Version < llvm::AArch64::ARMV9_1A.Version)
+      AI = &llvm::AArch64::ARMV9_1A;
+    if (Feature == "+v9.2a" && AI->Version < llvm::AArch64::ARMV9_2A.Version)
+      AI = &llvm::AArch64::ARMV9_2A;
+    if (Feature == "+v9.3a" && AI->Version < llvm::AArch64::ARMV9_3A.Version)
+      AI = &llvm::AArch64::ARMV9_3A;
+    if (Feature == "+v9.4a" && AI->Version < llvm::AArch64::ARMV9_4A.Version)
+      AI = &llvm::AArch64::ARMV9_4A;
     if (Feature == "+v8r")
-      ArchKind = llvm::AArch64::ArchKind::ARMV8R;
+      AI = &llvm::AArch64::ARMV8R;
     if (Feature == "+fullfp16")
       HasFullFP16 = true;
     if (Feature == "+dotprod")
       HasDotProd = true;
     if (Feature == "+fp16fml")
       HasFP16FML = true;
     if (Feature == "+mte")
       HasMTE = true;
bool AArch64TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
 
   return true;
 }
 
 bool AArch64TargetInfo::initFeatureMap(
     llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU,
     const std::vector<std::string> &FeaturesVec) const {
   // Parse the CPU and add any implied features.
-  llvm::AArch64::ArchKind Arch = llvm::AArch64::parseCPUArch(CPU);
-  if (Arch != llvm::AArch64::ArchKind::INVALID) {
+  const llvm::AArch64::ArchInfo &Arch = llvm::AArch64::parseCpu(CPU).Arch;
+  if (Arch != llvm::AArch64::INVALID) {
     uint64_t Exts = llvm::AArch64::getDefaultExtensions(CPU, Arch);
     std::vector<StringRef> CPUFeats;
     llvm::AArch64::getExtensionFeatures(Exts, CPUFeats);
     for (auto F : CPUFeats) {
       assert((F[0] == '+' || F[0] == '-') && "Expected +/- in target feature!");
       setFeatureEnabled(Features, F.drop_front(), F[0] == '+');
     }
   }
for (auto &Feature : AttrFeatures) {
     }
 
     if (Feature.startswith("arch=")) {
       if (FoundArch)
         Ret.Duplicate = "arch=";
       FoundArch = true;
       std::pair<StringRef, StringRef> Split =
           Feature.split("=").second.trim().split("+");
-      llvm::AArch64::ArchKind ArchKind = llvm::AArch64::parseArch(Split.first);
+      const llvm::AArch64::ArchInfo &AI = llvm::AArch64::parseArch(Split.first);
 
       // Parse the architecture version, adding the required features to
       // Ret.Features.
-      if (ArchKind == llvm::AArch64::ArchKind::INVALID)
+      if (AI == llvm::AArch64::INVALID)
         continue;
-      Ret.Features.push_back(llvm::AArch64::getArchFeature(ArchKind).str());
+      Ret.Features.push_back(AI.ArchFeature.str());
       // Add any extra features, after the +
       SplitAndAddFeatures(Split.second, Ret.Features);
     } else if (Feature.startswith("cpu=")) {
       if (!Ret.CPU.empty())
         Ret.Duplicate = "cpu=";
       else {
         // Split the cpu string into "cpu=", "cortex-a710" and any remaining
         // "+feat" features.

clang/lib/Driver/ToolChains/Arch/AArch64.cpp

return Triple.getArch() == llvm::Triple::aarch64_32 ? "apple-s4"
                                                         : "apple-a7";
 
   return "generic";
 }
 
 // Decode AArch64 features from string like +[no]featureA+[no]featureB+...
 static bool DecodeAArch64Features(const Driver &D, StringRef text,
                                   std::vector<StringRef> &Features,
-                                  llvm::AArch64::ArchKind ArchKind) {
+                                  const llvm::AArch64::ArchInfo &AI) {
   SmallVector<StringRef, 8> Split;
   text.split(Split, StringRef("+"), -1, false);
 
   for (StringRef Feature : Split) {
     StringRef FeatureName = llvm::AArch64::getArchExtFeature(Feature);
     if (!FeatureName.empty())
       Features.push_back(FeatureName);
     else if (Feature == "neon" || Feature == "noneon")
else if (Feature == "sve2-bitperm" || Feature == "sve2-sha3" ||
       Features.push_back("-sve2-bitperm");
       Features.push_back("-sve2-sha3");
       Features.push_back("-sve2-aes");
       Features.push_back("-sve2-sm4");
     }
 
     // +sve implies +f32mm if the base architecture is >= v8.6A (except v9A)
     // It isn't the case in general that sve implies both f64mm and f32mm
-    if ((ArchKind == llvm::AArch64::ArchKind::ARMV8_6A ||
-         ArchKind == llvm::AArch64::ArchKind::ARMV8_7A ||
-         ArchKind == llvm::AArch64::ArchKind::ARMV8_8A ||
-         ArchKind == llvm::AArch64::ArchKind::ARMV8_9A ||
-         ArchKind == llvm::AArch64::ArchKind::ARMV9_1A ||
-         ArchKind == llvm::AArch64::ArchKind::ARMV9_2A ||
-         ArchKind == llvm::AArch64::ArchKind::ARMV9_3A ||
-         ArchKind == llvm::AArch64::ArchKind::ARMV9_4A) &&
+    if ((AI == llvm::AArch64::ARMV8_6A || AI == llvm::AArch64::ARMV8_7A ||
+         AI == llvm::AArch64::ARMV8_8A || AI == llvm::AArch64::ARMV8_9A ||
+         AI == llvm::AArch64::ARMV9_1A || AI == llvm::AArch64::ARMV9_2A ||
+         AI == llvm::AArch64::ARMV9_3A || AI == llvm::AArch64::ARMV9_4A) &&
         Feature == "sve")
       Features.push_back("+f32mm");
   }
   return true;
 }
 
 // Check if the CPU name and feature modifiers in -mcpu are legal. If yes,
 // decode CPU and feature.
 static bool DecodeAArch64Mcpu(const Driver &D, StringRef Mcpu, StringRef &CPU,
                               std::vector<StringRef> &Features) {
   std::pair<StringRef, StringRef> Split = Mcpu.split("+");
-  CPU = Split.first;
-  llvm::AArch64::ArchKind ArchKind = llvm::AArch64::ArchKind::ARMV8A;
-
-  CPU = llvm::AArch64::resolveCPUAlias(CPU);
+  const llvm::AArch64::ArchInfo *AI = &llvm::AArch64::ARMV8A;
+  CPU = llvm::AArch64::resolveCPUAlias(Split.first);
 
   if (CPU == "native")
     CPU = llvm::sys::getHostCPUName();
 
   if (CPU == "generic") {
     Features.push_back("+neon");
   } else {
-    ArchKind = llvm::AArch64::parseCPUArch(CPU);
-    if (ArchKind == llvm::AArch64::ArchKind::INVALID)
+    AI = &llvm::AArch64::parseCpu(CPU).Arch;
+    if (*AI == llvm::AArch64::INVALID)
       return false;
-    Features.push_back(llvm::AArch64::getArchFeature(ArchKind));
+    Features.push_back(AI->ArchFeature);
 
-    uint64_t Extension = llvm::AArch64::getDefaultExtensions(CPU, ArchKind);
+    uint64_t Extension = llvm::AArch64::getDefaultExtensions(CPU, *AI);
     if (!llvm::AArch64::getExtensionFeatures(Extension, Features))
       return false;
-   }
 
-   if (Split.second.size() &&
-       !DecodeAArch64Features(D, Split.second, Features, ArchKind))
-     return false;
+      !DecodeAArch64Features(D, Split.second, Features, *AI))
 
-   return true;
 }
 
 static bool
 getAArch64ArchFeaturesFromMarch(const Driver &D, StringRef March,
                                 const ArgList &Args,
                                 std::vector<StringRef> &Features) {
   std::string MarchLowerCase = March.lower();
   std::pair<StringRef, StringRef> Split = StringRef(MarchLowerCase).split("+");
 
-  llvm::AArch64::ArchKind ArchKind = llvm::AArch64::parseArch(Split.first);
+  const llvm::AArch64::ArchInfo *AI = &llvm::AArch64::parseArch(Split.first);
   if (Split.first == "native")
-    ArchKind = llvm::AArch64::getCPUArchKind(llvm::sys::getHostCPUName().str());
-  if (ArchKind == llvm::AArch64::ArchKind::INVALID)
+    AI = &llvm::AArch64::getArchForCpu(llvm::sys::getHostCPUName().str());
+  if (*AI == llvm::AArch64::INVALID)
     return false;
-  Features.push_back(llvm::AArch64::getArchFeature(ArchKind));
+  Features.push_back(AI->ArchFeature);
 
   // Enable SVE2 by default on Armv9-A.
   // It can still be disabled if +nosve2 is present.
   // We must do this early so that DecodeAArch64Features has the correct state
-  if ((ArchKind == llvm::AArch64::ArchKind::ARMV9A ||
-       ArchKind == llvm::AArch64::ArchKind::ARMV9_1A ||
-       ArchKind == llvm::AArch64::ArchKind::ARMV9_2A)) {
+  if ((*AI == llvm::AArch64::ARMV9A || *AI == llvm::AArch64::ARMV9_1A ||
+       *AI == llvm::AArch64::ARMV9_2A)) {
     Features.push_back("+sve");
     Features.push_back("+sve2");
   }
 
   if ((Split.second.size() &&
-       !DecodeAArch64Features(D, Split.second, Features, ArchKind)))
+       !DecodeAArch64Features(D, Split.second, Features, *AI)))
     return false;
 
   return true;
 }
 
 static bool
 getAArch64ArchFeaturesFromMcpu(const Driver &D, StringRef Mcpu,
                                const ArgList &Args,

llvm/include/llvm/Support/AArch64TargetParser.h

 // such as FPU/CPU/ARCH and extension names.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLVM_SUPPORT_AARCH64TARGETPARSER_H
 #define LLVM_SUPPORT_AARCH64TARGETPARSER_H
 
 #include "llvm/ADT/StringRef.h"
+#include "llvm/Support/VersionTuple.h"
 #include <vector>
 
-// FIXME:This should be made into class design,to avoid dupplication.
 namespace llvm {
 
 class Triple;
 
 namespace AArch64 {
 
 // Arch extension modifiers for CPUs. These are labelled with their Arm ARM
 // feature name (though the canonical reference for those is AArch64.td)
enum ArchExtKind : uint64_t {
   AEK_SVE2p1 =      1ULL << 44, // FEAT_SVE2p1
   AEK_SME2p1 =      1ULL << 45, // FEAT_SME2p1
   AEK_B16B16 =      1ULL << 46, // FEAT_B16B16
   AEK_SMEF16F16 =   1ULL << 47, // FEAT_SMEF16F16
   AEK_CSSC =        1ULL << 48, // FEAT_CSSC
   AEK_RCPC3 =       1ULL << 49, // FEAT_LRCPC3
 };
 
-enum class ArchKind {
-#define AARCH64_ARCH(NAME, ID, ARCH_FEATURE, ARCH_BASE_EXT) ID,
+// Represents an extension that can be enabled with -march=<arch>+<extension>.
+// Typically these correspond to Arm Architecture extensions, unlike
+// SubtargetFeature which may represent either an actual extension or some
+// internal LLVM property.
+struct ExtensionInfo {
+  StringRef Name;       // Human readable name, e.g. "profile".
+  ArchExtKind ID;       // Corresponding to the ArchExtKind, this extensions
+                        // representation in the bitfield.
+  StringRef Feature;    // -mattr enable string, e.g. "+spe"
+  StringRef NegFeature; // -mattr disable string, e.g. "-spe"
+};
+
+inline constexpr ExtensionInfo Extensions[] = {
+#define AARCH64_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE)                   \
+  {NAME, ID, FEATURE, NEGFEATURE},
 #include "AArch64TargetParser.def"
 };
 
-struct ArchNames {
-  StringRef Name;
-  StringRef ArchFeature;
-  uint64_t ArchBaseExtensions;
-  ArchKind ID;
+enum ArchProfile { AProfile = 'A', RProfile = 'R', InvalidProfile = '?' };
+
+// Information about a specific architecture, e.g. V8.1-A
+struct ArchInfo {
+  VersionTuple Version;  // Architecture version, major + minor.
+  ArchProfile Profile;   // Architecuture profile
+  StringRef Name;        // Human readable name, e.g. "armv8.1-a"
+  StringRef ArchFeature; // Command line feature flag, e.g. +v8a
+  uint64_t DefaultExts;  // bitfield of default extensions ArchExtKind
+
+  constexpr ArchInfo(unsigned Major, unsigned Minor, ArchProfile Profile,
+                     StringRef Name, StringRef ArchFeature,
+                     uint64_t DefaultExts)
+      : Version(Major, Minor), Profile(Profile), Name(Name),
+        ArchFeature(ArchFeature), DefaultExts(DefaultExts) {}
+
+  // These are not intended to be copied or created outside of this file.
+  ArchInfo(const ArchInfo &) = delete;
+  ArchInfo &operator=(const ArchInfo &rhs) = delete;
+
+  // Comparison is done by address. Copies should not exist.
+  bool operator==(const ArchInfo &Other) const { return this == &Other; }
+  bool operator!=(const ArchInfo &Other) const { return this != &Other; }
+
+  // Defines the following partial order, indicating when an architecture is
+  // a superset of another:
+  //
+  //     v9.4a > v9.3a > v9.3a > v9.3a > v9a;
+  //       v       v       v       v       v
+  //     v8.9a > v8.8a > v8.7a > v8.6a > v8.5a > v8.4a > ... > v8a;
+  //
+  // v8r and INVALID have no relation to anything. This is used to
+  // determine which features to enable for a given architecture. See
+  // AArch64TargetInfo::setFeatureEnabled.
+  bool implies(const ArchInfo &Other) const {
+    if (this->Profile != Other.Profile)
+      return false; // ARMV8R and INVALID
+    if (this->Version.getMajor() == Other.Version.getMajor()) {
+      return this->Version > Other.Version;
+    }
+    if (this->Version.getMajor() == 9 && Other.Version.getMajor() == 8) {
+      return this->Version.getMinor().value() + 5 >=
+             Other.Version.getMinor().value();
+    }
+    return false;
+  }
 
   // Return ArchFeature without the leading "+".
-  StringRef getSubArch() const { return ArchFeature.substr(1); }
-};
+  constexpr StringRef getSubArch() const { return ArchFeature.substr(1); }
 
-const ArchNames AArch64ARCHNames[] = {
-#define AARCH64_ARCH(NAME, ID, ARCH_FEATURE, ARCH_BASE_EXT)                    \
-  {NAME, ARCH_FEATURE, ARCH_BASE_EXT, AArch64::ArchKind::ID},
-#include "AArch64TargetParser.def"
+  // Search for ArchInfo by SubArch name
+  static const ArchInfo &findBySubArch(StringRef SubArch);
 };
 
-// List of Arch Extension names.
-struct ExtName {
-  StringRef Name;
-  uint64_t ID;
-  StringRef Feature;
-  StringRef NegFeature;
-};
+// Create ArchInfo structs named <ID>
+#define AARCH64_ARCH(MAJOR, MINOR, PROFILE, NAME, ID, ARCH_FEATURE,            \
+                     ARCH_BASE_EXT)                                            \
+  inline constexpr ArchInfo ID = {MAJOR, MINOR,        PROFILE,                \
+                                  NAME,  ARCH_FEATURE, ARCH_BASE_EXT};
+#include "AArch64TargetParser.def"
+#undef AARCH64_ARCH
 
-const ExtName AArch64ARCHExtNames[] = {
-#define AARCH64_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE)                   \
-  {NAME, ID, FEATURE, NEGFEATURE},
+// The set of all architectures
+inline constexpr std::array<const ArchInfo *, 17> ArchInfos = {
+#define AARCH64_ARCH(MAJOR, MINOR, PROFILE, NAME, ID, ARCH_FEATURE,            \
+                     ARCH_BASE_EXT)                                            \
+  &ID,
 #include "AArch64TargetParser.def"
 };
 
-// List of CPU names and their arches.
-// The same CPU can have multiple arches and can be default on multiple arches.
-// When finding the Arch for a CPU, first-found prevails. Sort them accordingly.
-// When this becomes table-generated, we'd probably need two tables.
-struct CpuNames {
-  StringRef Name;
-  ArchKind ArchID;
+// Details of a specific CPU.
+struct CpuInfo {
+  StringRef Name; // Name, as written for -mcpu.
+  const ArchInfo &Arch;
   uint64_t DefaultExtensions;
 };
 
-const CpuNames AArch64CPUNames[] = {
-#define AARCH64_CPU_NAME(NAME, ID, DEFAULT_EXT)                                \
-  {NAME, AArch64::ArchKind::ID, DEFAULT_EXT},
+inline constexpr CpuInfo CpuInfos[] = {
+#define AARCH64_CPU_NAME(NAME, ARCH_ID, DEFAULT_EXT)                           \
+  {NAME, ARCH_ID, DEFAULT_EXT},
 #include "AArch64TargetParser.def"
 };
 
-const struct {
+// An alias for a CPU.
+struct CpuAlias {
   StringRef Alias;
   StringRef Name;
-} AArch64CPUAliases[] = {
-#define AARCH64_CPU_ALIAS(ALIAS, NAME) {ALIAS, NAME},
-#include "AArch64TargetParser.def"
 };
 
-const ArchKind ArchKinds[] = {
-#define AARCH64_ARCH(NAME, ID, ARCH_FEATURE, ARCH_BASE_EXT) ArchKind::ID,
+inline constexpr CpuAlias CpuAliases[] = {
+#define AARCH64_CPU_ALIAS(ALIAS, NAME) {ALIAS, NAME},
 #include "AArch64TargetParser.def"
 };
 
-inline ArchKind &operator--(ArchKind &Kind) {
-  if ((Kind == ArchKind::INVALID) || (Kind == ArchKind::ARMV8A) ||
-      (Kind == ArchKind::ARMV9A) || (Kind == ArchKind::ARMV8R))
-    Kind = ArchKind::INVALID;
-  else {
-    unsigned KindAsInteger = static_cast<unsigned>(Kind);
-    Kind = static_cast<ArchKind>(--KindAsInteger);
-  }
-  return Kind;
-}
-
 bool getExtensionFeatures(uint64_t Extensions,
                           std::vector<StringRef> &Features);
-StringRef getArchFeature(ArchKind AK);
 
-StringRef getArchName(ArchKind AK);
-StringRef getSubArch(ArchKind AK);
-StringRef getArchExtName(unsigned ArchExtKind);
 StringRef getArchExtFeature(StringRef ArchExt);
-ArchKind convertV9toV8(ArchKind AK);
 StringRef resolveCPUAlias(StringRef CPU);
 
 // Information by Name
-uint64_t getDefaultExtensions(StringRef CPU, ArchKind AK);
-ArchKind getCPUArchKind(StringRef CPU);
-ArchKind getSubArchArchKind(StringRef SubArch);
+uint64_t getDefaultExtensions(StringRef CPU, const ArchInfo &AI);
+const ArchInfo &getArchForCpu(StringRef CPU);
 
 // Parser
-ArchKind parseArch(StringRef Arch);
+const ArchInfo &parseArch(StringRef Arch);
 ArchExtKind parseArchExt(StringRef ArchExt);
-ArchKind parseCPUArch(StringRef CPU);
+// Given the name of a CPU or alias, return the correponding CpuInfo.
+const CpuInfo &parseCpu(StringRef Name);
 // Used by target parser tests
 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values);
 
 bool isX18ReservedByDefault(const Triple &TT);
 
 } // namespace AArch64
 } // namespace llvm
 
 #endif

llvm/include/llvm/Support/AArch64TargetParser.def

 //===- AARCH64TargetParser.def - AARCH64 target parsing defines ---------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
 // This file provides defines to build up the AARCH64 target parser's logic.
 //
 //===----------------------------------------------------------------------===//
 
 // NOTE: NO INCLUDE GUARD DESIRED!
 
 #ifndef AARCH64_ARCH
-#define AARCH64_ARCH(NAME, ID, ARCH_FEATURE, ARCH_BASE_EXT)
+#define AARCH64_ARCH(MAJOR, MINOR, PROFILE, NAME, ID, ARCH_FEATURE, ARCH_BASE_EXT)
 #endif
 // NOTE: The order and the grouping of the elements matter to make ArchKind iterable.
 // List is organised as armv8a -> armv8n-a, armv9a -> armv9m-a and armv8-r.
-AARCH64_ARCH("invalid", INVALID, "+",
+AARCH64_ARCH(0, 0, InvalidProfile, "invalid", INVALID, "+",
              AArch64::AEK_NONE)
-AARCH64_ARCH("armv8-a", ARMV8A, "+v8a",
+AARCH64_ARCH(8, 0, AProfile, "armv8-a", ARMV8A, "+v8a",
              (AArch64::AEK_CRYPTO | AArch64::AEK_FP | AArch64::AEK_SIMD))
-AARCH64_ARCH("armv8.1-a", ARMV8_1A, "+v8.1a",
+AARCH64_ARCH(8, 1, AProfile, "armv8.1-a", ARMV8_1A, "+v8.1a",
              (AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
               AArch64::AEK_SIMD | AArch64::AEK_LSE | AArch64::AEK_RDM))
-AARCH64_ARCH("armv8.2-a", ARMV8_2A, "+v8.2a",
+AARCH64_ARCH(8, 2, AProfile, "armv8.2-a", ARMV8_2A, "+v8.2a",
              (AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
               AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
               AArch64::AEK_RDM))
-AARCH64_ARCH("armv8.3-a", ARMV8_3A, "+v8.3a",
+AARCH64_ARCH(8, 3, AProfile, "armv8.3-a", ARMV8_3A, "+v8.3a",
              (AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
               AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
               AArch64::AEK_RDM | AArch64::AEK_RCPC))
-AARCH64_ARCH("armv8.4-a", ARMV8_4A, "+v8.4a",
+AARCH64_ARCH(8, 4, AProfile, "armv8.4-a", ARMV8_4A, "+v8.4a",
              (AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
               AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
               AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD))
-AARCH64_ARCH("armv8.5-a", ARMV8_5A, "+v8.5a",
+AARCH64_ARCH(8, 5, AProfile, "armv8.5-a", ARMV8_5A, "+v8.5a",
              (AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
               AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
               AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD))
-AARCH64_ARCH("armv8.6-a", ARMV8_6A, "+v8.6a",
+AARCH64_ARCH(8, 6, AProfile, "armv8.6-a", ARMV8_6A, "+v8.6a",
              (AArch64::AEK_CRC  | AArch64::AEK_FP   |
               AArch64::AEK_SIMD | AArch64::AEK_RAS  | AArch64::AEK_LSE     |
               AArch64::AEK_RDM  | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
               AArch64::AEK_SM4  | AArch64::AEK_SHA3 | AArch64::AEK_BF16    |
               AArch64::AEK_SHA2 | AArch64::AEK_AES  | AArch64::AEK_I8MM))
-AARCH64_ARCH("armv8.7-a", ARMV8_7A, "+v8.7a",
+AARCH64_ARCH(8, 7, AProfile, "armv8.7-a", ARMV8_7A, "+v8.7a",
              (AArch64::AEK_CRC | AArch64::AEK_FP |
               AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
               AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
               AArch64::AEK_SM4 | AArch64::AEK_SHA3 | AArch64::AEK_BF16 |
               AArch64::AEK_SHA2 | AArch64::AEK_AES | AArch64::AEK_I8MM))
-AARCH64_ARCH("armv8.8-a", ARMV8_8A, "+v8.8a",
+AARCH64_ARCH(8, 8, AProfile, "armv8.8-a", ARMV8_8A, "+v8.8a",
              (AArch64::AEK_CRC | AArch64::AEK_FP |
               AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
               AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
               AArch64::AEK_SM4 | AArch64::AEK_SHA3 | AArch64::AEK_BF16 |
               AArch64::AEK_SHA2 | AArch64::AEK_AES | AArch64::AEK_I8MM))
-AARCH64_ARCH("armv8.9-a", ARMV8_9A, "+v8.9a",
+AARCH64_ARCH(8, 9, AProfile, "armv8.9-a", ARMV8_9A, "+v8.9a",
              (AArch64::AEK_CRC | AArch64::AEK_FP |
               AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
               AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
               AArch64::AEK_SM4 | AArch64::AEK_SHA3 | AArch64::AEK_BF16 |
               AArch64::AEK_SHA2 | AArch64::AEK_AES | AArch64::AEK_I8MM))
-AARCH64_ARCH("armv9-a",   ARMV9A, "+v9a",
+AARCH64_ARCH(9, 0, AProfile, "armv9-a",   ARMV9A, "+v9a",
              (AArch64::AEK_CRC | AArch64::AEK_FP |
               AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
               AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
               AArch64::AEK_SVE2))
-AARCH64_ARCH("armv9.1-a", ARMV9_1A, "+v9.1a",
+AARCH64_ARCH(9, 1, AProfile, "armv9.1-a", ARMV9_1A, "+v9.1a",
              (AArch64::AEK_CRC | AArch64::AEK_FP |
               AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
               AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
               AArch64::AEK_BF16 | AArch64::AEK_I8MM | AArch64::AEK_SVE2))
-AARCH64_ARCH("armv9.2-a", ARMV9_2A, "+v9.2a",
+AARCH64_ARCH(9, 2, AProfile, "armv9.2-a", ARMV9_2A, "+v9.2a",
              (AArch64::AEK_CRC | AArch64::AEK_FP |
               AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
               AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
               AArch64::AEK_BF16 | AArch64::AEK_I8MM | AArch64::AEK_SVE2))
-AARCH64_ARCH("armv9.3-a", ARMV9_3A, "+v9.3a",
+AARCH64_ARCH(9, 3, AProfile, "armv9.3-a", ARMV9_3A, "+v9.3a",
              (AArch64::AEK_CRC | AArch64::AEK_FP |
               AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
               AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
               AArch64::AEK_BF16 | AArch64::AEK_I8MM | AArch64::AEK_SVE2))
-AARCH64_ARCH("armv9.4-a", ARMV9_4A, "+v9.4a",
+AARCH64_ARCH(9, 4, AProfile, "armv9.4-a", ARMV9_4A, "+v9.4a",
              (AArch64::AEK_CRC | AArch64::AEK_FP |
               AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
               AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
               AArch64::AEK_BF16 | AArch64::AEK_I8MM | AArch64::AEK_SVE2))
 // For v8-R, we do not enable crypto and align with GCC that enables a more
 // minimal set of optional architecture extensions.
-AARCH64_ARCH("armv8-r", ARMV8R, "+v8r",
+AARCH64_ARCH(8, 0, RProfile, "armv8-r", ARMV8R, "+v8r",
              (AArch64::AEK_CRC     | AArch64::AEK_RDM  | AArch64::AEK_SSBS |
               AArch64::AEK_DOTPROD | AArch64::AEK_FP   | AArch64::AEK_SIMD |
               AArch64::AEK_FP16    | AArch64::AEK_FP16FML | AArch64::AEK_RAS |
               AArch64::AEK_RCPC    | AArch64::AEK_SB))
 #undef AARCH64_ARCH
 
 #ifndef AARCH64_ARCH_EXT_NAME
 #define AARCH64_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE)
 #endif
-// FIXME: This would be nicer were it tablegen
 AARCH64_ARCH_EXT_NAME("invalid",      AArch64::AEK_INVALID,     {},                  {})
 AARCH64_ARCH_EXT_NAME("none",         AArch64::AEK_NONE,        {},                  {})
 AARCH64_ARCH_EXT_NAME("crc",          AArch64::AEK_CRC,         "+crc",          "-crc")
 AARCH64_ARCH_EXT_NAME("lse",          AArch64::AEK_LSE,         "+lse",          "-lse")
 AARCH64_ARCH_EXT_NAME("rdm",          AArch64::AEK_RDM,         "+rdm",          "-rdm")
 AARCH64_ARCH_EXT_NAME("crypto",       AArch64::AEK_CRYPTO,      "+crypto",       "-crypto")
 AARCH64_ARCH_EXT_NAME("sm4",          AArch64::AEK_SM4,         "+sm4",          "-sm4")
 AARCH64_ARCH_EXT_NAME("sha3",         AArch64::AEK_SHA3,        "+sha3",         "-sha3")

llvm/include/llvm/Support/VersionTuple.h

class VersionTuple {
 
   unsigned Subminor : 31;
   unsigned HasSubminor : 1;
 
   unsigned Build : 31;
   unsigned HasBuild : 1;
 
 public:
-  VersionTuple()
+  constexpr VersionTuple()
       : Major(0), Minor(0), HasMinor(false), Subminor(0), HasSubminor(false),
         Build(0), HasBuild(false) {}
 
-  explicit VersionTuple(unsigned Major)
+  explicit constexpr VersionTuple(unsigned Major)
       : Major(Major), Minor(0), HasMinor(false), Subminor(0),
         HasSubminor(false), Build(0), HasBuild(false) {}
 
-  explicit VersionTuple(unsigned Major, unsigned Minor)
+  explicit constexpr VersionTuple(unsigned Major, unsigned Minor)
       : Major(Major), Minor(Minor), HasMinor(true), Subminor(0),
         HasSubminor(false), Build(0), HasBuild(false) {}
 
-  explicit VersionTuple(unsigned Major, unsigned Minor, unsigned Subminor)
+  explicit constexpr VersionTuple(unsigned Major, unsigned Minor,
+                                  unsigned Subminor)
       : Major(Major), Minor(Minor), HasMinor(true), Subminor(Subminor),
         HasSubminor(true), Build(0), HasBuild(false) {}
 
-  explicit VersionTuple(unsigned Major, unsigned Minor, unsigned Subminor,
-                        unsigned Build)
+  explicit constexpr VersionTuple(unsigned Major, unsigned Minor,
+                                  unsigned Subminor, unsigned Build)
       : Major(Major), Minor(Minor), HasMinor(true), Subminor(Subminor),
         HasSubminor(true), Build(Build), HasBuild(true) {}
 
   /// Determine whether this version information is empty
   /// (e.g., all version components are zero).
   bool empty() const {
     return Major == 0 && Minor == 0 && Subminor == 0 && Build == 0;
   }

llvm/lib/Support/AArch64TargetParser.cpp

 using namespace llvm;
 
 static unsigned checkArchVersion(llvm::StringRef Arch) {
   if (Arch.size() >= 2 && Arch[0] == 'v' && std::isdigit(Arch[1]))
     return (Arch[1] - 48);
   return 0;
 }
 
-uint64_t AArch64::getDefaultExtensions(StringRef CPU, AArch64::ArchKind AK) {
+uint64_t AArch64::getDefaultExtensions(StringRef CPU,
+                                       const AArch64::ArchInfo &AI) {
   if (CPU == "generic")
-    return AArch64ARCHNames[static_cast<unsigned>(AK)].ArchBaseExtensions;
+    return AI.DefaultExts;
 
   return StringSwitch<uint64_t>(CPU)
-#define AARCH64_CPU_NAME(NAME, ID, DEFAULT_EXT)                                \
-  .Case(NAME, AArch64ARCHNames[static_cast<unsigned>(ArchKind::ID)]            \
-                      .ArchBaseExtensions |                                    \
-                  DEFAULT_EXT)
+#define AARCH64_CPU_NAME(NAME, ARCH_ID, DEFAULT_EXT)                           \
+  .Case(NAME, ARCH_ID.DefaultExts | DEFAULT_EXT)
 #include "../../include/llvm/Support/AArch64TargetParser.def"
       .Default(AArch64::AEK_INVALID);
 }
 
-AArch64::ArchKind AArch64::getCPUArchKind(StringRef CPU) {
+const AArch64::ArchInfo &AArch64::getArchForCpu(StringRef CPU) {
   if (CPU == "generic")
-    return ArchKind::ARMV8A;
+    return ARMV8A;
 
-  return StringSwitch<AArch64::ArchKind>(CPU)
-#define AARCH64_CPU_NAME(NAME, ID, DEFAULT_EXT) .Case(NAME, ArchKind::ID)
+  return *StringSwitch<const AArch64::ArchInfo *>(CPU)
+#define AARCH64_CPU_NAME(NAME, ARCH_ID, DEFAULT_EXT) .Case(NAME, &ARCH_ID)
 #include "../../include/llvm/Support/AArch64TargetParser.def"
-      .Default(ArchKind::INVALID);
+              .Default(&INVALID);
 }
 
-AArch64::ArchKind AArch64::getSubArchArchKind(StringRef SubArch) {
-  for (const auto &A : AArch64ARCHNames)
-    if (A.getSubArch() == SubArch)
-      return A.ID;
-  return ArchKind::INVALID;
+const AArch64::ArchInfo &AArch64::ArchInfo::findBySubArch(StringRef SubArch) {
+  for (const auto *A : AArch64::ArchInfos)
+    if (A->getSubArch() == SubArch)
+      return *A;
+  return AArch64::INVALID;
 }
 
 bool AArch64::getExtensionFeatures(uint64_t Extensions,
                                    std::vector<StringRef> &Features) {
   if (Extensions == AArch64::AEK_INVALID)
     return false;
 
 #define AARCH64_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE)                   \

 StringRef AArch64::resolveCPUAlias(StringRef CPU) {
   return StringSwitch<StringRef>(CPU)
 #define AARCH64_CPU_ALIAS(ALIAS,NAME)                                          \
   .Case(ALIAS, NAME)
 #include "../../include/llvm/Support/AArch64TargetParser.def"
   .Default(CPU);
 }
 
-StringRef AArch64::getArchFeature(AArch64::ArchKind AK) {
-  return AArch64ARCHNames[static_cast<unsigned>(AK)].ArchFeature;
-}
-
-StringRef AArch64::getArchName(AArch64::ArchKind AK) {
-  return AArch64ARCHNames[static_cast<unsigned>(AK)].Name;
-}
-
-StringRef AArch64::getSubArch(AArch64::ArchKind AK) {
-  return AArch64ARCHNames[static_cast<unsigned>(AK)].getSubArch();
-}
-
 StringRef AArch64::getArchExtFeature(StringRef ArchExt) {
   if (ArchExt.startswith("no")) {
     StringRef ArchExtBase(ArchExt.substr(2));
-    for (const auto &AE : AArch64ARCHExtNames) {
+    for (const auto &AE : Extensions) {
       if (!AE.NegFeature.empty() && ArchExtBase == AE.Name)
         return AE.NegFeature;
     }
   }
 
-  for (const auto &AE : AArch64ARCHExtNames)
+  for (const auto &AE : Extensions)
     if (!AE.Feature.empty() && ArchExt == AE.Name)
       return AE.Feature;
   return StringRef();
 }
 
-AArch64::ArchKind AArch64::convertV9toV8(AArch64::ArchKind AK) {
-  if (AK == AArch64::ArchKind::INVALID)
-    return AK;
-  if (AK < AArch64::ArchKind::ARMV9A)
-    return AK;
-  if (AK >= AArch64::ArchKind::ARMV8R)
-    return AArch64::ArchKind::INVALID;
-  unsigned AK_v8 = static_cast<unsigned>(AArch64::ArchKind::ARMV8_5A);
-  AK_v8 += static_cast<unsigned>(AK) -
-           static_cast<unsigned>(AArch64::ArchKind::ARMV9A);
-  return static_cast<AArch64::ArchKind>(AK_v8);
-}
-
 void AArch64::fillValidCPUArchList(SmallVectorImpl<StringRef> &Values) {
-  for (const auto &Arch : AArch64CPUNames) {
-    if (Arch.ArchID != ArchKind::INVALID)
-      Values.push_back(Arch.Name);
-  }
+  for (const auto &C : CpuInfos)
+    if (C.Arch != INVALID)
+      Values.push_back(C.Name);
 
-  for (const auto &Alias: AArch64CPUAliases)
+  for (const auto &Alias : CpuAliases)
     Values.push_back(Alias.Alias);
 }
 
 bool AArch64::isX18ReservedByDefault(const Triple &TT) {
   return TT.isAndroid() || TT.isOSDarwin() || TT.isOSFuchsia() ||
          TT.isOSWindows();
 }
 
 // Allows partial match, ex. "v8a" matches "armv8a".
-AArch64::ArchKind AArch64::parseArch(StringRef Arch) {
+const AArch64::ArchInfo &AArch64::parseArch(StringRef Arch) {
   Arch = llvm::ARM::getCanonicalArchName(Arch);
   if (checkArchVersion(Arch) < 8)
-    return ArchKind::INVALID;
+    return AArch64::INVALID;
 
   StringRef Syn = llvm::ARM::getArchSynonym(Arch);
-  for (const auto &A : AArch64ARCHNames) {
-    if (A.Name.endswith(Syn))
-      return A.ID;
+  for (const auto *A : ArchInfos) {
+    if (A->Name.endswith(Syn))
+      return *A;
   }
-  return ArchKind::INVALID;
+  return AArch64::INVALID;
 }
 
 AArch64::ArchExtKind AArch64::parseArchExt(StringRef ArchExt) {
-  for (const auto &A : AArch64ARCHExtNames) {
+  for (const auto &A : Extensions) {
     if (ArchExt == A.Name)
       return static_cast<ArchExtKind>(A.ID);
   }
   return AArch64::AEK_INVALID;
 }
 
-AArch64::ArchKind AArch64::parseCPUArch(StringRef CPU) {
+const AArch64::CpuInfo &AArch64::parseCpu(StringRef Name) {
   // Resolve aliases first.
-  for (const auto &Alias : AArch64CPUAliases) {
-    if (CPU == Alias.Alias) {
-      CPU = Alias.Name;
-      break;
-    }
-  }
-  // Then find the CPU name.
-  for (const auto &C : AArch64CPUNames)
-    if (CPU == C.Name)
-      return C.ArchID;
+  Name = resolveCPUAlias(Name);
 
-  return ArchKind::INVALID;
+  // Then find the CPU name.
+  for (const auto &C : CpuInfos)
+    if (Name == C.Name)
+      return C;
+
+  // "generic" returns invalid.
+  assert(Name != "invalid" && "Unexpected recursion.");
+  return parseCpu("invalid");
 }

llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

else if (IDVal == ".seh_save_any_reg_px")
       parseDirectiveSEHSaveAnyReg(Loc, true, true);
     else
       return true;
   } else
     return true;
   return false;
 }
 
-static void ExpandCryptoAEK(AArch64::ArchKind ArchKind,
+static void ExpandCryptoAEK(const AArch64::ArchInfo &AI,
                             SmallVector<StringRef, 4> &RequestedExtensions) {
   const bool NoCrypto = llvm::is_contained(RequestedExtensions, "nocrypto");
   const bool Crypto = llvm::is_contained(RequestedExtensions, "crypto");
 
   if (!NoCrypto && Crypto) {
-    switch (ArchKind) {
-    default:
-      // Map 'generic' (and others) to sha2 and aes, because
-      // that was the traditional meaning of crypto.
-    case AArch64::ArchKind::ARMV8_1A:
-    case AArch64::ArchKind::ARMV8_2A:
-    case AArch64::ArchKind::ARMV8_3A:
+    if (AI == AArch64::ARMV8_1A || AI == AArch64::ARMV8_2A ||
+        AI == AArch64::ARMV8_3A) {
       RequestedExtensions.push_back("sha2");
       RequestedExtensions.push_back("aes");
-      break;
-    case AArch64::ArchKind::ARMV8_4A:
-    case AArch64::ArchKind::ARMV8_5A:
-    case AArch64::ArchKind::ARMV8_6A:
-    case AArch64::ArchKind::ARMV8_7A:
-    case AArch64::ArchKind::ARMV8_8A:
-    case AArch64::ArchKind::ARMV8_9A:
-    case AArch64::ArchKind::ARMV9A:
-    case AArch64::ArchKind::ARMV9_1A:
-    case AArch64::ArchKind::ARMV9_2A:
-    case AArch64::ArchKind::ARMV9_3A:
-    case AArch64::ArchKind::ARMV9_4A:
-    case AArch64::ArchKind::ARMV8R:
+    }
+    if (AI == AArch64::ARMV8_4A || AI == AArch64::ARMV8_5A ||
+        AI == AArch64::ARMV8_6A || AI == AArch64::ARMV8_7A ||
+        AI == AArch64::ARMV8_8A || AI == AArch64::ARMV8_9A ||
+        AI == AArch64::ARMV9A || AI == AArch64::ARMV9_1A ||
+        AI == AArch64::ARMV9_2A || AI == AArch64::ARMV9_3A ||
+        AI == AArch64::ARMV9_4A || AI == AArch64::ARMV8R) {
       RequestedExtensions.push_back("sm4");
       RequestedExtensions.push_back("sha3");
       RequestedExtensions.push_back("sha2");
       RequestedExtensions.push_back("aes");
-      break;
     }
   } else if (NoCrypto) {
-    switch (ArchKind) {
-    default:
-      // Map 'generic' (and others) to sha2 and aes, because
-      // that was the traditional meaning of crypto.
-    case AArch64::ArchKind::ARMV8_1A:
-    case AArch64::ArchKind::ARMV8_2A:
-    case AArch64::ArchKind::ARMV8_3A:
+    if (AI == AArch64::ARMV8_1A || AI == AArch64::ARMV8_2A ||
+        AI == AArch64::ARMV8_3A) {
       RequestedExtensions.push_back("nosha2");
       RequestedExtensions.push_back("noaes");
-      break;
-    case AArch64::ArchKind::ARMV8_4A:
-    case AArch64::ArchKind::ARMV8_5A:
-    case AArch64::ArchKind::ARMV8_6A:
-    case AArch64::ArchKind::ARMV8_7A:
-    case AArch64::ArchKind::ARMV8_8A:
-    case AArch64::ArchKind::ARMV8_9A:
-    case AArch64::ArchKind::ARMV9A:
-    case AArch64::ArchKind::ARMV9_1A:
-    case AArch64::ArchKind::ARMV9_2A:
-    case AArch64::ArchKind::ARMV9_3A:
-    case AArch64::ArchKind::ARMV9_4A:
+    }
+    if (AI == AArch64::ARMV8_4A || AI == AArch64::ARMV8_5A ||
+        AI == AArch64::ARMV8_6A || AI == AArch64::ARMV8_7A ||
+        AI == AArch64::ARMV8_8A || AI == AArch64::ARMV8_9A ||
+        AI == AArch64::ARMV9A || AI == AArch64::ARMV9_1A ||
+        AI == AArch64::ARMV9_2A || AI == AArch64::ARMV9_3A ||
+        AI == AArch64::ARMV9_4A) {
       RequestedExtensions.push_back("nosm4");
       RequestedExtensions.push_back("nosha3");
       RequestedExtensions.push_back("nosha2");
       RequestedExtensions.push_back("noaes");
-      break;
     }
   }
 }
 
 /// parseDirectiveArch
 ///   ::= .arch token
 bool AArch64AsmParser::parseDirectiveArch(SMLoc L) {
   SMLoc ArchLoc = getLoc();
 
   StringRef Arch, ExtensionString;
   std::tie(Arch, ExtensionString) =
       getParser().parseStringToEndOfStatement().trim().split('+');
 
-  AArch64::ArchKind ID = AArch64::parseArch(Arch);
-  if (ID == AArch64::ArchKind::INVALID)
+  const AArch64::ArchInfo &AI = AArch64::parseArch(Arch);
+  if (AI == AArch64::INVALID)
     return Error(ArchLoc, "unknown arch name");
 
   if (parseToken(AsmToken::EndOfStatement))
     return true;
 
   // Get the architecture and extension features.
   std::vector<StringRef> AArch64Features;
-  AArch64Features.push_back(AArch64::getArchFeature(ID));
-  AArch64::getExtensionFeatures(AArch64::getDefaultExtensions("generic", ID),
+  AArch64Features.push_back(AI.ArchFeature);
+  AArch64::getExtensionFeatures(AArch64::getDefaultExtensions("generic", AI),
                                 AArch64Features);
 
   MCSubtargetInfo &STI = copySTI();
   std::vector<std::string> ArchFeatures(AArch64Features.begin(), AArch64Features.end());
   STI.setDefaultFeatures("generic", /*TuneCPU*/ "generic",
                          join(ArchFeatures.begin(), ArchFeatures.end(), ","));
 
   SmallVector<StringRef, 4> RequestedExtensions;
   if (!ExtensionString.empty())
     ExtensionString.split(RequestedExtensions, '+');
 
-  ExpandCryptoAEK(ID, RequestedExtensions);
+  ExpandCryptoAEK(AI, RequestedExtensions);
 
   FeatureBitset Features = STI.getFeatureBits();
   for (auto Name : RequestedExtensions) {
     bool EnableFeature = true;
 
     if (Name.startswith_insensitive("no")) {
       EnableFeature = false;
       Name = Name.substr(2);
if (!getSTI().isCPUStringValid(CPU)) {
     Error(CurLoc, "unknown CPU name");
     return false;
   }
 
   MCSubtargetInfo &STI = copySTI();
   STI.setDefaultFeatures(CPU, /*TuneCPU*/ CPU, "");
   CurLoc = incrementLoc(CurLoc, CPU.size());
 
-  ExpandCryptoAEK(llvm::AArch64::getCPUArchKind(CPU), RequestedExtensions);
+  ExpandCryptoAEK(llvm::AArch64::getArchForCpu(CPU), RequestedExtensions);
 
   for (auto Name : RequestedExtensions) {
     // Advance source location past '+'.
     CurLoc = incrementLoc(CurLoc, 1);
 
     bool EnableFeature = true;
 
     if (Name.startswith_insensitive("no")) {

llvm/unittests/Support/TargetParserTest.cpp

 }
 
 class AArch64CPUTestFixture
     : public ::testing::TestWithParam<ARMCPUTestParams> {};
 
 TEST_P(AArch64CPUTestFixture, testAArch64CPU) {
   ARMCPUTestParams params = GetParam();
 
-  AArch64::ArchKind AK = AArch64::parseCPUArch(params.CPUName);
-  EXPECT_EQ(params.ExpectedArch, AArch64::getArchName(AK));
+  const AArch64::ArchInfo &AI = AArch64::parseCpu(params.CPUName).Arch;
+  EXPECT_EQ(params.ExpectedArch, AI.Name);
 
   uint64_t default_extensions =
-      AArch64::getDefaultExtensions(params.CPUName, AK);
+      AArch64::getDefaultExtensions(params.CPUName, AI);
   EXPECT_PRED_FORMAT2(AssertSameExtensionFlags<ARM::ISAKind::AARCH64>,
                       params.ExpectedFlags, default_extensions);
 }
 
 INSTANTIATE_TEST_SUITE_P(
     AArch64CPUTests, AArch64CPUTestFixture,
     ::testing::Values(
         ARMCPUTestParams("invalid", "invalid", "invalid", AArch64::AEK_NONE,

 TEST(TargetParserTest, testAArch64CPUArchList) {
   SmallVector<StringRef, NumAArch64CPUArchs> List;
   AArch64::fillValidCPUArchList(List);
 
   // No list exists for these in this test suite, so ensure all are
   // valid, and match the expected 'magic' count.
   EXPECT_EQ(List.size(), NumAArch64CPUArchs);
   for(StringRef CPU : List) {
-    EXPECT_NE(AArch64::parseCPUArch(CPU), AArch64::ArchKind::INVALID);
+    EXPECT_NE(AArch64::parseCpu(CPU).Arch, AArch64::INVALID);
   }
 }
 
 bool testAArch64Arch(StringRef Arch, StringRef DefaultCPU, StringRef SubArch,
                      unsigned ArchAttr) {
-  AArch64::ArchKind AK = AArch64::parseArch(Arch);
-  return AK != AArch64::ArchKind::INVALID;
+  const AArch64::ArchInfo &AI = AArch64::parseArch(Arch);
+  return AI != AArch64::INVALID;
 }
 
 TEST(TargetParserTest, testAArch64Arch) {
   EXPECT_TRUE(testAArch64Arch("armv8-a", "cortex-a53", "v8a",
                               ARMBuildAttrs::CPUArch::v8_A));
   EXPECT_TRUE(testAArch64Arch("armv8.1-a", "generic", "v8.1a",
                               ARMBuildAttrs::CPUArch::v8_A));
   EXPECT_TRUE(testAArch64Arch("armv8.2-a", "generic", "v8.2a",
TEST(TargetParserTest, testAArch64Arch) {
   EXPECT_TRUE(testAArch64Arch("armv9.2-a", "generic", "v9.2a",
                               ARMBuildAttrs::CPUArch::v8_A));
   EXPECT_TRUE(testAArch64Arch("armv9.3-a", "generic", "v9.3a",
                               ARMBuildAttrs::CPUArch::v8_A));
   EXPECT_TRUE(testAArch64Arch("armv9.4-a", "generic", "v9.4a",
                               ARMBuildAttrs::CPUArch::v8_A));
 }
 
-bool testAArch64Extension(StringRef CPUName, AArch64::ArchKind AK,
+bool testAArch64Extension(StringRef CPUName, const AArch64::ArchInfo &AI,
                           StringRef ArchExt) {
-  return AArch64::getDefaultExtensions(CPUName, AK) &
+  return AArch64::getDefaultExtensions(CPUName, AI) &
          AArch64::parseArchExt(ArchExt);
 }
 
 TEST(TargetParserTest, testAArch64Extension) {
-  EXPECT_FALSE(testAArch64Extension("cortex-a34",
-                                    AArch64::ArchKind::INVALID, "ras"));
-  EXPECT_FALSE(testAArch64Extension("cortex-a35",
-                                    AArch64::ArchKind::INVALID, "ras"));
-  EXPECT_FALSE(testAArch64Extension("cortex-a53",
-                                    AArch64::ArchKind::INVALID, "ras"));
-  EXPECT_TRUE(testAArch64Extension("cortex-a55",
-                                    AArch64::ArchKind::INVALID, "ras"));
-  EXPECT_TRUE(testAArch64Extension("cortex-a55",
-                                    AArch64::ArchKind::INVALID, "fp16"));
-  EXPECT_FALSE(testAArch64Extension("cortex-a55",
-                                    AArch64::ArchKind::INVALID, "fp16fml"));
-  EXPECT_TRUE(testAArch64Extension("cortex-a55",
-                                    AArch64::ArchKind::INVALID, "dotprod"));
-  EXPECT_FALSE(testAArch64Extension("cortex-a57",
-                                    AArch64::ArchKind::INVALID, "ras"));
-  EXPECT_FALSE(testAArch64Extension("cortex-a72",
-                                    AArch64::ArchKind::INVALID, "ras"));
-  EXPECT_FALSE(testAArch64Extension("cortex-a73",
-                                    AArch64::ArchKind::INVALID, "ras"));
-  EXPECT_TRUE(testAArch64Extension("cortex-a75",
-                                    AArch64::ArchKind::INVALID, "ras"));
-  EXPECT_TRUE(testAArch64Extension("cortex-a75",
-                                    AArch64::ArchKind::INVALID, "fp16"));
-  EXPECT_FALSE(testAArch64Extension("cortex-a75",
-                                    AArch64::ArchKind::INVALID, "fp16fml"));
-  EXPECT_TRUE(testAArch64Extension("cortex-a75",
-                                   AArch64::ArchKind::INVALID, "dotprod"));
-  EXPECT_TRUE(testAArch64Extension("cortex-r82",
-                                   AArch64::ArchKind::INVALID, "ras"));
-  EXPECT_TRUE(testAArch64Extension("cortex-r82",
-                                   AArch64::ArchKind::INVALID, "fp16"));
-  EXPECT_TRUE(testAArch64Extension("cortex-r82",
-                                   AArch64::ArchKind::INVALID, "fp16fml"));
-  EXPECT_TRUE(testAArch64Extension("cortex-r82",
-                                   AArch64::ArchKind::INVALID, "dotprod"));
-  EXPECT_TRUE(testAArch64Extension("cortex-r82",
-                                   AArch64::ArchKind::INVALID, "lse"));
-  EXPECT_FALSE(testAArch64Extension("cyclone",
-                                    AArch64::ArchKind::INVALID, "ras"));
-  EXPECT_FALSE(testAArch64Extension("exynos-m3",
-                                    AArch64::ArchKind::INVALID, "ras"));
-  EXPECT_TRUE(testAArch64Extension("exynos-m4",
-                                   AArch64::ArchKind::INVALID, "dotprod"));
-  EXPECT_TRUE(testAArch64Extension("exynos-m4",
-                                   AArch64::ArchKind::INVALID, "fp16"));
-  EXPECT_TRUE(testAArch64Extension("exynos-m4",
-                                   AArch64::ArchKind::INVALID, "lse"));
-  EXPECT_TRUE(testAArch64Extension("exynos-m4",
-                                   AArch64::ArchKind::INVALID, "ras"));
-  EXPECT_TRUE(testAArch64Extension("exynos-m4",
-                                   AArch64::ArchKind::INVALID, "rdm"));
-  EXPECT_TRUE(testAArch64Extension("exynos-m5",
-                                   AArch64::ArchKind::INVALID, "dotprod"));
-  EXPECT_TRUE(testAArch64Extension("exynos-m5",
-                                   AArch64::ArchKind::INVALID, "fp16"));
-  EXPECT_TRUE(testAArch64Extension("exynos-m5",
-                                   AArch64::ArchKind::INVALID, "lse"));
-  EXPECT_TRUE(testAArch64Extension("exynos-m5",
-                                   AArch64::ArchKind::INVALID, "ras"));
-  EXPECT_TRUE(testAArch64Extension("exynos-m5",
-                                   AArch64::ArchKind::INVALID, "rdm"));
-  EXPECT_TRUE(testAArch64Extension("falkor",
-                                   AArch64::ArchKind::INVALID, "rdm"));
-  EXPECT_FALSE(testAArch64Extension("kryo",
-                                    AArch64::ArchKind::INVALID, "ras"));
-  EXPECT_TRUE(testAArch64Extension("saphira",
-                                    AArch64::ArchKind::INVALID, "crc"));
-  EXPECT_TRUE(testAArch64Extension("saphira",
-                                    AArch64::ArchKind::INVALID, "lse"));
-  EXPECT_TRUE(testAArch64Extension("saphira",
-                                   AArch64::ArchKind::INVALID, "rdm"));
-  EXPECT_TRUE(testAArch64Extension("saphira",
-                                   AArch64::ArchKind::INVALID, "ras"));
-  EXPECT_TRUE(testAArch64Extension("saphira",
-                                   AArch64::ArchKind::INVALID, "rcpc"));
-  EXPECT_TRUE(testAArch64Extension("saphira",
-                                   AArch64::ArchKind::INVALID, "profile"));
-  EXPECT_FALSE(testAArch64Extension("saphira",
-                                    AArch64::ArchKind::INVALID, "fp16"));
-  EXPECT_FALSE(testAArch64Extension("thunderx2t99",
-                                    AArch64::ArchKind::INVALID, "ras"));
-  EXPECT_FALSE(testAArch64Extension("thunderx",
-                                    AArch64::ArchKind::INVALID, "lse"));
-  EXPECT_FALSE(testAArch64Extension("thunderxt81",
-                                    AArch64::ArchKind::INVALID, "lse"));
-  EXPECT_FALSE(testAArch64Extension("thunderxt83",
-                                    AArch64::ArchKind::INVALID, "lse"));
-  EXPECT_FALSE(testAArch64Extension("thunderxt88",
-                                    AArch64::ArchKind::INVALID, "lse"));
-  EXPECT_TRUE(testAArch64Extension("tsv110",
-                                   AArch64::ArchKind::INVALID, "crypto"));
-  EXPECT_FALSE(testAArch64Extension("tsv110",
-                                    AArch64::ArchKind::INVALID, "sha3"));
-  EXPECT_FALSE(testAArch64Extension("tsv110",
-                                    AArch64::ArchKind::INVALID, "sm4"));
-  EXPECT_TRUE(testAArch64Extension("tsv110",
-                                   AArch64::ArchKind::INVALID, "ras"));
-  EXPECT_TRUE(testAArch64Extension("tsv110",
-                                   AArch64::ArchKind::INVALID, "profile"));
-  EXPECT_TRUE(testAArch64Extension("tsv110",
-                                   AArch64::ArchKind::INVALID, "fp16"));
-  EXPECT_TRUE(testAArch64Extension("tsv110",
-                                   AArch64::ArchKind::INVALID, "fp16fml"));
-  EXPECT_TRUE(testAArch64Extension("tsv110",
-                                   AArch64::ArchKind::INVALID, "dotprod"));
-  EXPECT_TRUE(testAArch64Extension("a64fx",
-                                   AArch64::ArchKind::INVALID, "fp16"));
-  EXPECT_TRUE(testAArch64Extension("a64fx",
-                                   AArch64::ArchKind::INVALID, "sve"));
-  EXPECT_FALSE(testAArch64Extension("a64fx",
-                                   AArch64::ArchKind::INVALID, "sve2"));
-  EXPECT_TRUE(
-      testAArch64Extension("carmel", AArch64::ArchKind::INVALID, "crypto"));
-  EXPECT_TRUE(
-      testAArch64Extension("carmel", AArch64::ArchKind::INVALID, "fp16"));
-
-  EXPECT_FALSE(testAArch64Extension(
-      "generic", AArch64::ArchKind::ARMV8A, "ras"));
-  EXPECT_FALSE(testAArch64Extension(
-      "generic", AArch64::ArchKind::ARMV8_1A, "ras"));
-  EXPECT_FALSE(testAArch64Extension(
-      "generic", AArch64::ArchKind::ARMV8_2A, "profile"));
-  EXPECT_FALSE(testAArch64Extension(
-      "generic", AArch64::ArchKind::ARMV8_2A, "fp16"));
-  EXPECT_FALSE(testAArch64Extension(
-      "generic", AArch64::ArchKind::ARMV8_2A, "fp16fml"));
-  EXPECT_FALSE(testAArch64Extension(
-      "generic", AArch64::ArchKind::ARMV8_3A, "fp16"));
-  EXPECT_FALSE(testAArch64Extension(
-      "generic", AArch64::ArchKind::ARMV8_3A, "fp16fml"));
-  EXPECT_FALSE(testAArch64Extension(
-      "generic", AArch64::ArchKind::ARMV8_4A, "fp16"));
-  EXPECT_FALSE(testAArch64Extension(
-      "generic", AArch64::ArchKind::ARMV8_4A, "fp16fml"));
+  EXPECT_FALSE(testAArch64Extension("cortex-a34", AArch64::INVALID, "ras"));
+  EXPECT_FALSE(testAArch64Extension("cortex-a35", AArch64::INVALID, "ras"));
+  EXPECT_FALSE(testAArch64Extension("cortex-a53", AArch64::INVALID, "ras"));
+  EXPECT_TRUE(testAArch64Extension("cortex-a55", AArch64::INVALID, "ras"));
+  EXPECT_TRUE(testAArch64Extension("cortex-a55", AArch64::INVALID, "fp16"));
+  EXPECT_FALSE(testAArch64Extension("cortex-a55", AArch64::INVALID, "fp16fml"));
+  EXPECT_TRUE(testAArch64Extension("cortex-a55", AArch64::INVALID, "dotprod"));
+  EXPECT_FALSE(testAArch64Extension("cortex-a57", AArch64::INVALID, "ras"));
+  EXPECT_FALSE(testAArch64Extension("cortex-a72", AArch64::INVALID, "ras"));
+  EXPECT_FALSE(testAArch64Extension("cortex-a73", AArch64::INVALID, "ras"));
+  EXPECT_TRUE(testAArch64Extension("cortex-a75", AArch64::INVALID, "ras"));
+  EXPECT_TRUE(testAArch64Extension("cortex-a75", AArch64::INVALID, "fp16"));
+  EXPECT_FALSE(testAArch64Extension("cortex-a75", AArch64::INVALID, "fp16fml"));
+  EXPECT_TRUE(testAArch64Extension("cortex-a75", AArch64::INVALID, "dotprod"));
+  EXPECT_TRUE(testAArch64Extension("cortex-r82", AArch64::INVALID, "ras"));
+  EXPECT_TRUE(testAArch64Extension("cortex-r82", AArch64::INVALID, "fp16"));
+  EXPECT_TRUE(testAArch64Extension("cortex-r82", AArch64::INVALID, "fp16fml"));
+  EXPECT_TRUE(testAArch64Extension("cortex-r82", AArch64::INVALID, "dotprod"));
+  EXPECT_TRUE(testAArch64Extension("cortex-r82", AArch64::INVALID, "lse"));
+  EXPECT_FALSE(testAArch64Extension("cyclone", AArch64::INVALID, "ras"));
+  EXPECT_FALSE(testAArch64Extension("exynos-m3", AArch64::INVALID, "ras"));
+  EXPECT_TRUE(testAArch64Extension("exynos-m4", AArch64::INVALID, "dotprod"));
+  EXPECT_TRUE(testAArch64Extension("exynos-m4", AArch64::INVALID, "fp16"));
+  EXPECT_TRUE(testAArch64Extension("exynos-m4", AArch64::INVALID, "lse"));
+  EXPECT_TRUE(testAArch64Extension("exynos-m4", AArch64::INVALID, "ras"));
+  EXPECT_TRUE(testAArch64Extension("exynos-m4", AArch64::INVALID, "rdm"));
+  EXPECT_TRUE(testAArch64Extension("exynos-m5", AArch64::INVALID, "dotprod"));
+  EXPECT_TRUE(testAArch64Extension("exynos-m5", AArch64::INVALID, "fp16"));
+  EXPECT_TRUE(testAArch64Extension("exynos-m5", AArch64::INVALID, "lse"));
+  EXPECT_TRUE(testAArch64Extension("exynos-m5", AArch64::INVALID, "ras"));
+  EXPECT_TRUE(testAArch64Extension("exynos-m5", AArch64::INVALID, "rdm"));
+  EXPECT_TRUE(testAArch64Extension("falkor", AArch64::INVALID, "rdm"));
+  EXPECT_FALSE(testAArch64Extension("kryo", AArch64::INVALID, "ras"));
+  EXPECT_TRUE(testAArch64Extension("saphira", AArch64::INVALID, "crc"));
+  EXPECT_TRUE(testAArch64Extension("saphira", AArch64::INVALID, "lse"));
+  EXPECT_TRUE(testAArch64Extension("saphira", AArch64::INVALID, "rdm"));
+  EXPECT_TRUE(testAArch64Extension("saphira", AArch64::INVALID, "ras"));
+  EXPECT_TRUE(testAArch64Extension("saphira", AArch64::INVALID, "rcpc"));
+  EXPECT_TRUE(testAArch64Extension("saphira", AArch64::INVALID, "profile"));
+  EXPECT_FALSE(testAArch64Extension("saphira", AArch64::INVALID, "fp16"));
+  EXPECT_FALSE(testAArch64Extension("thunderx2t99", AArch64::INVALID, "ras"));
+  EXPECT_FALSE(testAArch64Extension("thunderx", AArch64::INVALID, "lse"));
+  EXPECT_FALSE(testAArch64Extension("thunderxt81", AArch64::INVALID, "lse"));
+  EXPECT_FALSE(testAArch64Extension("thunderxt83", AArch64::INVALID, "lse"));
+  EXPECT_FALSE(testAArch64Extension("thunderxt88", AArch64::INVALID, "lse"));
+  EXPECT_TRUE(testAArch64Extension("tsv110", AArch64::INVALID, "crypto"));
+  EXPECT_FALSE(testAArch64Extension("tsv110", AArch64::INVALID, "sha3"));
+  EXPECT_FALSE(testAArch64Extension("tsv110", AArch64::INVALID, "sm4"));
+  EXPECT_TRUE(testAArch64Extension("tsv110", AArch64::INVALID, "ras"));
+  EXPECT_TRUE(testAArch64Extension("tsv110", AArch64::INVALID, "profile"));
+  EXPECT_TRUE(testAArch64Extension("tsv110", AArch64::INVALID, "fp16"));
+  EXPECT_TRUE(testAArch64Extension("tsv110", AArch64::INVALID, "fp16fml"));
+  EXPECT_TRUE(testAArch64Extension("tsv110", AArch64::INVALID, "dotprod"));
+  EXPECT_TRUE(testAArch64Extension("a64fx", AArch64::INVALID, "fp16"));
+  EXPECT_TRUE(testAArch64Extension("a64fx", AArch64::INVALID, "sve"));
+  EXPECT_FALSE(testAArch64Extension("a64fx", AArch64::INVALID, "sve2"));
+  EXPECT_TRUE(testAArch64Extension("carmel", AArch64::INVALID, "crypto"));
+  EXPECT_TRUE(testAArch64Extension("carmel", AArch64::INVALID, "fp16"));
+
+  EXPECT_FALSE(testAArch64Extension("generic", AArch64::ARMV8A, "ras"));
+  EXPECT_FALSE(testAArch64Extension("generic", AArch64::ARMV8_1A, "ras"));
+  EXPECT_FALSE(testAArch64Extension("generic", AArch64::ARMV8_2A, "profile"));
+  EXPECT_FALSE(testAArch64Extension("generic", AArch64::ARMV8_2A, "fp16"));
+  EXPECT_FALSE(testAArch64Extension("generic", AArch64::ARMV8_2A, "fp16fml"));
+  EXPECT_FALSE(testAArch64Extension("generic", AArch64::ARMV8_3A, "fp16"));
+  EXPECT_FALSE(testAArch64Extension("generic", AArch64::ARMV8_3A, "fp16fml"));
+  EXPECT_FALSE(testAArch64Extension("generic", AArch64::ARMV8_4A, "fp16"));
+  EXPECT_FALSE(testAArch64Extension("generic", AArch64::ARMV8_4A, "fp16fml"));
 }
 
 TEST(TargetParserTest, AArch64ExtensionFeatures) {
   std::vector<uint64_t> Extensions = {
       AArch64::AEK_CRC,     AArch64::AEK_LSE,      AArch64::AEK_RDM,
       AArch64::AEK_CRYPTO,  AArch64::AEK_SM4,      AArch64::AEK_SHA3,
       AArch64::AEK_SHA2,    AArch64::AEK_AES,      AArch64::AEK_DOTPROD,
       AArch64::AEK_FP,      AArch64::AEK_SIMD,     AArch64::AEK_FP16,
TEST(TargetParserTest, AArch64ExtensionFeatures) {
   // Assuming we listed every extension above, this should produce the same
   // result. (note that AEK_NONE doesn't have a name so it won't be in the
   // result despite its bit being set)
   std::vector<StringRef> AllFeatures;
   EXPECT_TRUE(AArch64::getExtensionFeatures(-1, AllFeatures));
   EXPECT_THAT(Features, ::testing::ContainerEq(AllFeatures));
 }
 
-TEST(TargetParserTest, AArch64ArchV9toV8Conversion) {
-  for (auto AK : AArch64::ArchKinds) {
-    if (AK == AArch64::ArchKind::INVALID)
-      EXPECT_EQ(AK, AArch64::convertV9toV8(AK));
-    else if (AK < AArch64::ArchKind::ARMV9A)
-      EXPECT_EQ(AK, AArch64::convertV9toV8(AK));
-    else if (AK >= AArch64::ArchKind::ARMV8R)
-      EXPECT_EQ(AArch64::ArchKind::INVALID, AArch64::convertV9toV8(AK));
-    else
-      EXPECT_TRUE(AArch64::convertV9toV8(AK) < AArch64::ArchKind::ARMV9A);
+TEST(TargetParserTest, AArch64ArchPartialOrder) {
+  EXPECT_FALSE(AArch64::INVALID.implies(AArch64::INVALID));
+
+  for (const auto *A : AArch64::ArchInfos) {
+    EXPECT_EQ(*A, *A);
+    if (!(*A == *A)) {
+      EXPECT_NE(*A, *A);
+    }
+    // Comparison with invalid is always false
+    EXPECT_FALSE(A->implies(AArch64::INVALID));
+    EXPECT_FALSE(AArch64::INVALID.implies(*A));
+
+    // v8r has no relation to other valid architectures
+    if (*A != AArch64::ARMV8R) {
+      EXPECT_FALSE(A->implies(AArch64::ARMV8R));
+      EXPECT_FALSE(AArch64::ARMV8R.implies(*A));
     }
-  EXPECT_EQ(AArch64::ArchKind::ARMV8_5A,
-              AArch64::convertV9toV8(AArch64::ArchKind::ARMV9A));
-  EXPECT_EQ(AArch64::ArchKind::ARMV8_6A,
-              AArch64::convertV9toV8(AArch64::ArchKind::ARMV9_1A));
-  EXPECT_EQ(AArch64::ArchKind::ARMV8_7A,
-              AArch64::convertV9toV8(AArch64::ArchKind::ARMV9_2A));
-  EXPECT_EQ(AArch64::ArchKind::ARMV8_8A,
-              AArch64::convertV9toV8(AArch64::ArchKind::ARMV9_3A));
+  }
+
+  for (const auto *A : {
+           &AArch64::ARMV8_1A,
+           &AArch64::ARMV8_2A,
+           &AArch64::ARMV8_3A,
+           &AArch64::ARMV8_4A,
+           &AArch64::ARMV8_5A,
+           &AArch64::ARMV8_6A,
+           &AArch64::ARMV8_7A,
+           &AArch64::ARMV8_8A,
+           &AArch64::ARMV8_9A,
+       })
+    EXPECT_TRUE(A->implies(AArch64::ARMV8A));
+
+  for (const auto *A : {&AArch64::ARMV9_1A, &AArch64::ARMV9_2A,
+                        &AArch64::ARMV9_3A, &AArch64::ARMV9_4A})
+    EXPECT_TRUE(A->implies(AArch64::ARMV9A));
+
+  EXPECT_TRUE(AArch64::ARMV8_1A.implies(AArch64::ARMV8A));
+  EXPECT_TRUE(AArch64::ARMV8_2A.implies(AArch64::ARMV8_1A));
+  EXPECT_TRUE(AArch64::ARMV8_3A.implies(AArch64::ARMV8_2A));
+  EXPECT_TRUE(AArch64::ARMV8_4A.implies(AArch64::ARMV8_3A));
+  EXPECT_TRUE(AArch64::ARMV8_5A.implies(AArch64::ARMV8_4A));
+  EXPECT_TRUE(AArch64::ARMV8_6A.implies(AArch64::ARMV8_5A));
+  EXPECT_TRUE(AArch64::ARMV8_7A.implies(AArch64::ARMV8_6A));
+  EXPECT_TRUE(AArch64::ARMV8_8A.implies(AArch64::ARMV8_7A));
+  EXPECT_TRUE(AArch64::ARMV8_9A.implies(AArch64::ARMV8_8A));
+
+  EXPECT_TRUE(AArch64::ARMV9_1A.implies(AArch64::ARMV9A));
+  EXPECT_TRUE(AArch64::ARMV9_2A.implies(AArch64::ARMV9_1A));
+  EXPECT_TRUE(AArch64::ARMV9_3A.implies(AArch64::ARMV9_2A));
+  EXPECT_TRUE(AArch64::ARMV9_4A.implies(AArch64::ARMV9_3A));
+
+  EXPECT_TRUE(AArch64::ARMV9A.implies(AArch64::ARMV8_5A));
+  EXPECT_TRUE(AArch64::ARMV9_1A.implies(AArch64::ARMV8_6A));
+  EXPECT_TRUE(AArch64::ARMV9_2A.implies(AArch64::ARMV8_7A));
+  EXPECT_TRUE(AArch64::ARMV9_3A.implies(AArch64::ARMV8_8A));
+  EXPECT_TRUE(AArch64::ARMV9_4A.implies(AArch64::ARMV8_9A));
 }
 
 TEST(TargetParserTest, AArch64ArchExtFeature) {
   const char *ArchExt[][4] = {
       {"crc", "nocrc", "+crc", "-crc"},
       {"crypto", "nocrypto", "+crypto", "-crypto"},
       {"flagm", "noflagm", "+flagm", "-flagm"},
       {"fp", "nofp", "+fp-armv8", "-fp-armv8"},