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Differential D131552

[RISCV] Add cost model for mask vector extend and truncate instruction.
ClosedPublic

Authored by jacquesguan on Aug 10 2022, 2:29 AM.

Details

Reviewers
reames
craig.topper
asb
luismarques
frasercrmck
benshi001
Commits
rG21bf59c92af1: [RISCV] Add cost model for mask vector extend and truncate instruction.
Summary

As extending from or truncating to mask vector do not use the same instructions as the normal cast, this path changed it to 2 which is the number of instructions we used.

Diff Detail

Unit TestsFailed

TimeTest
60,110 msx64 debian > AddressSanitizer-x86_64-linux.TestCases::scariness_score_test.cpp

Event Timeline

jacquesguan created this revision.Aug 10 2022, 2:29 AM
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jacquesguan requested review of this revision.Aug 10 2022, 2:29 AM
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Harbormaster completed remote builds in B180340: Diff 451393.Aug 10 2022, 4:11 AM
reames accepted this revision.Aug 10 2022, 7:16 AM

LGTM

This revision is now accepted and ready to land.Aug 10 2022, 7:16 AM
This revision was landed with ongoing or failed builds.Aug 10 2022, 7:56 PM
Closed by commit rG21bf59c92af1: [RISCV] Add cost model for mask vector extend and truncate instruction. (authored by jacquesguan). · Explain Why
This revision was automatically updated to reflect the committed changes.
jacquesguan added a commit: rG21bf59c92af1: [RISCV] Add cost model for mask vector extend and truncate instruction..

Revision Contents

PathSize
llvm/
lib/
Target/
RISCV/
16 lines
test/
Analysis/
CostModel/
RISCV/
60 lines

Diff 451393

llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp

Show First 20 Lines • Show All 284 Lines • ▼ Show 20 Lines if (isa<VectorType>(Dst) && isa<VectorType>(Src)) {
assert(ISD && "Invalid opcode"); assert(ISD && "Invalid opcode");
// FIXME: Need to consider vsetvli and lmul. // FIXME: Need to consider vsetvli and lmul.
int PowDiff = (int)Log2_32(Dst->getScalarSizeInBits()) - int PowDiff = (int)Log2_32(Dst->getScalarSizeInBits()) -
(int)Log2_32(Src->getScalarSizeInBits()); (int)Log2_32(Src->getScalarSizeInBits());
switch (ISD) { switch (ISD) {
case ISD::SIGN_EXTEND: case ISD::SIGN_EXTEND:
case ISD::ZERO_EXTEND: case ISD::ZERO_EXTEND:
if (Src->getScalarSizeInBits() == 1) {
// We do not use vsext/vzext to extend from mask vector.
// Instead we use the following instructions to extend from mask vector:
// vmv.v.i v8, 0
// vmerge.vim v8, v8, -1, v0
return 2;
}
return 1; return 1;
case ISD::TRUNCATE: case ISD::TRUNCATE:
if (Dst->getScalarSizeInBits() == 1) {
// We do not use several vncvt to truncate to mask vector. So we could
// not use PowDiff to calculate it.
// Instead we use the following instructions to truncate to mask vector:
// vand.vi v8, v8, 1
// vmsne.vi v0, v8, 0
return 2;
}
[[fallthrough]];
case ISD::FP_EXTEND: case ISD::FP_EXTEND:
case ISD::FP_ROUND: case ISD::FP_ROUND:
// Counts of narrow/widen instructions. // Counts of narrow/widen instructions.
return std::abs(PowDiff); return std::abs(PowDiff);
case ISD::FP_TO_SINT: case ISD::FP_TO_SINT:
case ISD::FP_TO_UINT: case ISD::FP_TO_UINT:
case ISD::SINT_TO_FP: case ISD::SINT_TO_FP:
case ISD::UINT_TO_FP: case ISD::UINT_TO_FP:
▲ Show 20 Lines • Show All 212 Lines • Show Last 20 Lines

llvm/test/Analysis/CostModel/RISCV/cast.ll

Show All 10 Lines
; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i8i64 = sext <4 x i8> undef to <4 x i64> ; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i8i64 = sext <4 x i8> undef to <4 x i64>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z4i8i64 = zext <4 x i8> undef to <4 x i64> ; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z4i8i64 = zext <4 x i8> undef to <4 x i64>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i16i32 = sext <4 x i16> undef to <4 x i32> ; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i16i32 = sext <4 x i16> undef to <4 x i32>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z4i16i32 = zext <4 x i16> undef to <4 x i32> ; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z4i16i32 = zext <4 x i16> undef to <4 x i32>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i16i64 = sext <4 x i16> undef to <4 x i64> ; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i16i64 = sext <4 x i16> undef to <4 x i64>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z4i16i64 = zext <4 x i16> undef to <4 x i64> ; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z4i16i64 = zext <4 x i16> undef to <4 x i64>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i32i64 = sext <4 x i32> undef to <4 x i64> ; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i32i64 = sext <4 x i32> undef to <4 x i64>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z4i32i64 = zext <4 x i32> undef to <4 x i64> ; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z4i32i64 = zext <4 x i32> undef to <4 x i64>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s4i1i8 = sext <4 x i1> undef to <4 x i8>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %z4i1i8 = zext <4 x i1> undef to <4 x i8>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s4i1i16 = sext <4 x i1> undef to <4 x i16>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %z4i1i16 = zext <4 x i1> undef to <4 x i16>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s4i1i32 = sext <4 x i1> undef to <4 x i32>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %z4i1i32 = zext <4 x i1> undef to <4 x i32>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s4i1i64 = sext <4 x i1> undef to <4 x i64>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %z4i1i64 = zext <4 x i1> undef to <4 x i64>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s8i8i16 = sext <8 x i8> undef to <8 x i16> ; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s8i8i16 = sext <8 x i8> undef to <8 x i16>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z8i8i16 = zext <8 x i8> undef to <8 x i16> ; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z8i8i16 = zext <8 x i8> undef to <8 x i16>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s8i8i32 = sext <8 x i8> undef to <8 x i32> ; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s8i8i32 = sext <8 x i8> undef to <8 x i32>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z8i8i32 = zext <8 x i8> undef to <8 x i32> ; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z8i8i32 = zext <8 x i8> undef to <8 x i32>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s8i8i64 = sext <8 x i8> undef to <8 x i64> ; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s8i8i64 = sext <8 x i8> undef to <8 x i64>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z8i8i64 = zext <8 x i8> undef to <8 x i64> ; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z8i8i64 = zext <8 x i8> undef to <8 x i64>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s8i16i32 = sext <8 x i16> undef to <8 x i32> ; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s8i16i32 = sext <8 x i16> undef to <8 x i32>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z8i16i32 = zext <8 x i16> undef to <8 x i32> ; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z8i16i32 = zext <8 x i16> undef to <8 x i32>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s8i16i64 = sext <8 x i16> undef to <8 x i64> ; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s8i16i64 = sext <8 x i16> undef to <8 x i64>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z8i16i64 = zext <8 x i16> undef to <8 x i64> ; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z8i16i64 = zext <8 x i16> undef to <8 x i64>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s8i1i8 = sext <8 x i1> undef to <8 x i8>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %z8i1i8 = zext <8 x i1> undef to <8 x i8>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s8i1i16 = sext <8 x i1> undef to <8 x i16>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %z8i1i16 = zext <8 x i1> undef to <8 x i16>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s8i1i32 = sext <8 x i1> undef to <8 x i32>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %z8i1i32 = zext <8 x i1> undef to <8 x i32>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s8i1i64 = sext <8 x i1> undef to <8 x i64>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %z8i1i64 = zext <8 x i1> undef to <8 x i64>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void ; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
; ;
; RISCV64-LABEL: 'ext' ; RISCV64-LABEL: 'ext'
; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i8i16 = sext <4 x i8> undef to <4 x i16> ; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i8i16 = sext <4 x i8> undef to <4 x i16>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z4i8i16 = zext <4 x i8> undef to <4 x i16> ; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z4i8i16 = zext <4 x i8> undef to <4 x i16>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i8i32 = sext <4 x i8> undef to <4 x i32> ; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i8i32 = sext <4 x i8> undef to <4 x i32>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z4i8i32 = zext <4 x i8> undef to <4 x i32> ; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z4i8i32 = zext <4 x i8> undef to <4 x i32>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i8i64 = sext <4 x i8> undef to <4 x i64> ; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i8i64 = sext <4 x i8> undef to <4 x i64>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z4i8i64 = zext <4 x i8> undef to <4 x i64> ; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z4i8i64 = zext <4 x i8> undef to <4 x i64>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i16i32 = sext <4 x i16> undef to <4 x i32> ; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i16i32 = sext <4 x i16> undef to <4 x i32>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z4i16i32 = zext <4 x i16> undef to <4 x i32> ; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z4i16i32 = zext <4 x i16> undef to <4 x i32>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i16i64 = sext <4 x i16> undef to <4 x i64> ; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i16i64 = sext <4 x i16> undef to <4 x i64>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z4i16i64 = zext <4 x i16> undef to <4 x i64> ; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z4i16i64 = zext <4 x i16> undef to <4 x i64>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i32i64 = sext <4 x i32> undef to <4 x i64> ; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i32i64 = sext <4 x i32> undef to <4 x i64>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z4i32i64 = zext <4 x i32> undef to <4 x i64> ; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z4i32i64 = zext <4 x i32> undef to <4 x i64>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s4i1i8 = sext <4 x i1> undef to <4 x i8>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %z4i1i8 = zext <4 x i1> undef to <4 x i8>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s4i1i16 = sext <4 x i1> undef to <4 x i16>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %z4i1i16 = zext <4 x i1> undef to <4 x i16>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s4i1i32 = sext <4 x i1> undef to <4 x i32>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %z4i1i32 = zext <4 x i1> undef to <4 x i32>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s4i1i64 = sext <4 x i1> undef to <4 x i64>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %z4i1i64 = zext <4 x i1> undef to <4 x i64>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s8i8i16 = sext <8 x i8> undef to <8 x i16> ; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s8i8i16 = sext <8 x i8> undef to <8 x i16>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z8i8i16 = zext <8 x i8> undef to <8 x i16> ; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z8i8i16 = zext <8 x i8> undef to <8 x i16>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s8i8i32 = sext <8 x i8> undef to <8 x i32> ; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s8i8i32 = sext <8 x i8> undef to <8 x i32>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z8i8i32 = zext <8 x i8> undef to <8 x i32> ; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z8i8i32 = zext <8 x i8> undef to <8 x i32>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s8i8i64 = sext <8 x i8> undef to <8 x i64> ; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s8i8i64 = sext <8 x i8> undef to <8 x i64>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z8i8i64 = zext <8 x i8> undef to <8 x i64> ; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z8i8i64 = zext <8 x i8> undef to <8 x i64>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s8i16i32 = sext <8 x i16> undef to <8 x i32> ; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s8i16i32 = sext <8 x i16> undef to <8 x i32>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z8i16i32 = zext <8 x i16> undef to <8 x i32> ; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z8i16i32 = zext <8 x i16> undef to <8 x i32>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s8i16i64 = sext <8 x i16> undef to <8 x i64> ; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s8i16i64 = sext <8 x i16> undef to <8 x i64>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z8i16i64 = zext <8 x i16> undef to <8 x i64> ; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %z8i16i64 = zext <8 x i16> undef to <8 x i64>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s8i1i8 = sext <8 x i1> undef to <8 x i8>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %z8i1i8 = zext <8 x i1> undef to <8 x i8>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s8i1i16 = sext <8 x i1> undef to <8 x i16>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %z8i1i16 = zext <8 x i1> undef to <8 x i16>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s8i1i32 = sext <8 x i1> undef to <8 x i32>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %z8i1i32 = zext <8 x i1> undef to <8 x i32>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s8i1i64 = sext <8 x i1> undef to <8 x i64>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %z8i1i64 = zext <8 x i1> undef to <8 x i64>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void ; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
; ;
%s4i8i16 = sext <4 x i8> undef to <4 x i16> %s4i8i16 = sext <4 x i8> undef to <4 x i16>
%z4i8i16 = zext <4 x i8> undef to <4 x i16> %z4i8i16 = zext <4 x i8> undef to <4 x i16>
%s4i8i32 = sext <4 x i8> undef to <4 x i32> %s4i8i32 = sext <4 x i8> undef to <4 x i32>
%z4i8i32 = zext <4 x i8> undef to <4 x i32> %z4i8i32 = zext <4 x i8> undef to <4 x i32>
%s4i8i64 = sext <4 x i8> undef to <4 x i64> %s4i8i64 = sext <4 x i8> undef to <4 x i64>
%z4i8i64 = zext <4 x i8> undef to <4 x i64> %z4i8i64 = zext <4 x i8> undef to <4 x i64>
%s4i16i32 = sext <4 x i16> undef to <4 x i32> %s4i16i32 = sext <4 x i16> undef to <4 x i32>
%z4i16i32 = zext <4 x i16> undef to <4 x i32> %z4i16i32 = zext <4 x i16> undef to <4 x i32>
%s4i16i64 = sext <4 x i16> undef to <4 x i64> %s4i16i64 = sext <4 x i16> undef to <4 x i64>
%z4i16i64 = zext <4 x i16> undef to <4 x i64> %z4i16i64 = zext <4 x i16> undef to <4 x i64>
%s4i32i64 = sext <4 x i32> undef to <4 x i64> %s4i32i64 = sext <4 x i32> undef to <4 x i64>
%z4i32i64 = zext <4 x i32> undef to <4 x i64> %z4i32i64 = zext <4 x i32> undef to <4 x i64>
%s4i1i8 = sext <4 x i1> undef to <4 x i8>
%z4i1i8 = zext <4 x i1> undef to <4 x i8>
%s4i1i16 = sext <4 x i1> undef to <4 x i16>
%z4i1i16 = zext <4 x i1> undef to <4 x i16>
%s4i1i32 = sext <4 x i1> undef to <4 x i32>
%z4i1i32 = zext <4 x i1> undef to <4 x i32>
%s4i1i64 = sext <4 x i1> undef to <4 x i64>
%z4i1i64 = zext <4 x i1> undef to <4 x i64>
%s8i8i16 = sext <8 x i8> undef to <8 x i16> %s8i8i16 = sext <8 x i8> undef to <8 x i16>
%z8i8i16 = zext <8 x i8> undef to <8 x i16> %z8i8i16 = zext <8 x i8> undef to <8 x i16>
%s8i8i32 = sext <8 x i8> undef to <8 x i32> %s8i8i32 = sext <8 x i8> undef to <8 x i32>
%z8i8i32 = zext <8 x i8> undef to <8 x i32> %z8i8i32 = zext <8 x i8> undef to <8 x i32>
%s8i8i64 = sext <8 x i8> undef to <8 x i64> %s8i8i64 = sext <8 x i8> undef to <8 x i64>
%z8i8i64 = zext <8 x i8> undef to <8 x i64> %z8i8i64 = zext <8 x i8> undef to <8 x i64>
%s8i16i32 = sext <8 x i16> undef to <8 x i32> %s8i16i32 = sext <8 x i16> undef to <8 x i32>
%z8i16i32 = zext <8 x i16> undef to <8 x i32> %z8i16i32 = zext <8 x i16> undef to <8 x i32>
%s8i16i64 = sext <8 x i16> undef to <8 x i64> %s8i16i64 = sext <8 x i16> undef to <8 x i64>
%z8i16i64 = zext <8 x i16> undef to <8 x i64> %z8i16i64 = zext <8 x i16> undef to <8 x i64>
%s8i1i8 = sext <8 x i1> undef to <8 x i8>
%z8i1i8 = zext <8 x i1> undef to <8 x i8>
%s8i1i16 = sext <8 x i1> undef to <8 x i16>
%z8i1i16 = zext <8 x i1> undef to <8 x i16>
%s8i1i32 = sext <8 x i1> undef to <8 x i32>
%z8i1i32 = zext <8 x i1> undef to <8 x i32>
%s8i1i64 = sext <8 x i1> undef to <8 x i64>
%z8i1i64 = zext <8 x i1> undef to <8 x i64>
ret void ret void
} }
define void @trunc() { define void @trunc() {
; RISCV32-LABEL: 'trunc' ; RISCV32-LABEL: 'trunc'
; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i8i16 = trunc <4 x i16> undef to <4 x i8> ; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i8i16 = trunc <4 x i16> undef to <4 x i8>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s4i8i32 = trunc <4 x i32> undef to <4 x i8> ; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s4i8i32 = trunc <4 x i32> undef to <4 x i8>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %s4i8i64 = trunc <4 x i64> undef to <4 x i8> ; RISCV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %s4i8i64 = trunc <4 x i64> undef to <4 x i8>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i16i32 = trunc <4 x i32> undef to <4 x i16> ; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i16i32 = trunc <4 x i32> undef to <4 x i16>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s4i16i64 = trunc <4 x i64> undef to <4 x i16> ; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s4i16i64 = trunc <4 x i64> undef to <4 x i16>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i32i64 = trunc <4 x i64> undef to <4 x i32> ; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i32i64 = trunc <4 x i64> undef to <4 x i32>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s4i1i8 = trunc <4 x i8> undef to <4 x i1>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s4i1i16 = trunc <4 x i16> undef to <4 x i1>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s4i1i32 = trunc <4 x i32> undef to <4 x i1>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s4i1i64 = trunc <4 x i64> undef to <4 x i1>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void ; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
; ;
; RISCV64-LABEL: 'trunc' ; RISCV64-LABEL: 'trunc'
; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i8i16 = trunc <4 x i16> undef to <4 x i8> ; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i8i16 = trunc <4 x i16> undef to <4 x i8>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s4i8i32 = trunc <4 x i32> undef to <4 x i8> ; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s4i8i32 = trunc <4 x i32> undef to <4 x i8>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %s4i8i64 = trunc <4 x i64> undef to <4 x i8> ; RISCV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %s4i8i64 = trunc <4 x i64> undef to <4 x i8>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i16i32 = trunc <4 x i32> undef to <4 x i16> ; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i16i32 = trunc <4 x i32> undef to <4 x i16>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s4i16i64 = trunc <4 x i64> undef to <4 x i16> ; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s4i16i64 = trunc <4 x i64> undef to <4 x i16>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i32i64 = trunc <4 x i64> undef to <4 x i32> ; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s4i32i64 = trunc <4 x i64> undef to <4 x i32>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s4i1i8 = trunc <4 x i8> undef to <4 x i1>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s4i1i16 = trunc <4 x i16> undef to <4 x i1>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s4i1i32 = trunc <4 x i32> undef to <4 x i1>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s4i1i64 = trunc <4 x i64> undef to <4 x i1>
; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void ; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
; ;
%s4i8i16 = trunc <4 x i16> undef to <4 x i8> %s4i8i16 = trunc <4 x i16> undef to <4 x i8>
%s4i8i32 = trunc <4 x i32> undef to <4 x i8> %s4i8i32 = trunc <4 x i32> undef to <4 x i8>
%s4i8i64 = trunc <4 x i64> undef to <4 x i8> %s4i8i64 = trunc <4 x i64> undef to <4 x i8>
%s4i16i32 = trunc <4 x i32> undef to <4 x i16> %s4i16i32 = trunc <4 x i32> undef to <4 x i16>
%s4i16i64 = trunc <4 x i64> undef to <4 x i16> %s4i16i64 = trunc <4 x i64> undef to <4 x i16>
%s4i32i64 = trunc <4 x i64> undef to <4 x i32> %s4i32i64 = trunc <4 x i64> undef to <4 x i32>
%s4i1i8 = trunc <4 x i8> undef to <4 x i1>
%s4i1i16 = trunc <4 x i16> undef to <4 x i1>
%s4i1i32 = trunc <4 x i32> undef to <4 x i1>
%s4i1i64 = trunc <4 x i64> undef to <4 x i1>
ret void ret void
} }
define void @fpext() { define void @fpext() {
; RISCV32-LABEL: 'fpext' ; RISCV32-LABEL: 'fpext'
; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v0 = fpext <8 x half> undef to <8 x float> ; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v0 = fpext <8 x half> undef to <8 x float>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v1 = fpext <8 x half> undef to <8 x double> ; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v1 = fpext <8 x half> undef to <8 x double>
; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2 = fpext <8 x float> undef to <8 x double> ; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2 = fpext <8 x float> undef to <8 x double>
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