[ELF] Split scanRelocations into scanRelocations/postScanRelocations

[MaskRay]

Summary

The idea is to make scanRelocations just some actions are needed (GOT/PLT/etc)
and postpone the real work to postScanRelocations. It gives some flexibility:

• Make it feasible to support .plt.got (PR32938): we need to know whether GLOB_DAT and JUMP_SLOT are both needed.
• Make non-preemptible IFUNC handling slightly cleaner: avoid setting/clearing sym.gotInIgot
• -z nocopyrel: report all copy relocation places for one symbol
• Make parallel relocation scanning possible (if we can avoid all stateful operations and make Symbol attributes atomic), but parallelism may not be the appealing choice
• Make GOT deduplication feasible

Since this patch moves a large chunk of code out of ELFT templates. My x86-64
executable is actually a few hundred bytes smaller.

For ppc32-ifunc-nonpreemptible-pic.s: I remove absolute relocation references to non-preemptible ifunc
because absolute relocation references are incorrect in -fpie mode.

[peter.smith]

I'm personally in favour of postponing some of the calculations from scan relocations as I think it can give us more flexibility. One possible concern is performance, although I'd expect that to be relatively small. I've left some subjective comments, I understand that this is WIP so no need to follow them.

lld/ELF/Relocations.cpp

1614

Maybe a bit easier to read by making fn specific to non-preemptible ifuncs:

for (Symbol *sym : symtab->symbols()) {
    bool canonicalised = handleNonPreemptibleIfunc();
    if (canonicalised)
      continue;
    if (sym.needsGot)
      addGotEntry(sym);
    if (sym.needsPlt && !sym.isInPlt())
      addPltEntry(in.plt, in.gotPlt, in.relaPlt, target->pltRel, sym);
}

for (InputFile *file : objectFiles)
    for (Symbol *sym : cast<ELFFileBase>(file)->getLocalSymbols())
      handleNonPreemptibleIfunc();

lld/ELF/Symbols.h

283

A potential danger of using flags for a very local use case is that they get used later on, or by mistake by earlier code. Will be worth a comment describing what an appropriate use of the flags is. For example:

// Temporary flags used to communicate which symbol entries need PLT and GOT entries during postScanRelocations();

In theory we could use a local container to store the flags, but this would come at a performance cost.

285

perhaps needsCanonicalPlt?

[MaskRay]

Ready for review

Moved copy relocations / canonical PLT entries code.

local symbols need GOT, too, because assembly can use GOT-generating relocations against local symbols.

[MaskRay]

lld/ELF/Symbols.h

285

needsCopy indicates whether copy relocations/canonical PLT entries are needed for non-ifunc symbols.

hasDirectReloc indicates whether canonical PLT entry is needed for ifunc. hasDirectReloc needs to be true even for isStaticLinkTimeConstant relocations.

[peter.smith]

Thanks for the update. Will try and take a look later this week.

[peter.smith]

LGTM, I think this is a good simplification. The test changes all look related to GOT ordering, although I've concentrated my checking on AArch64. Maybe worth widening the reviewer pool to see if there are any alternative opinions.

lld/ELF/Relocations.cpp

1618

Worth an assert(sym.isFunc() && !sym.isGnuIFunc()) here?

lld/ELF/Symbols.h

287

My initial thought was that needsCopy isn't specific enough, although I've struggled to come up with anything better. I think needsCopyRelOrCanonicalPLT is the best I could come up with. Similarly for hasDirectReloc the best alternative I could think of was hasNonGotGeneratingReloc.

Best stick to the names here unless someone can think of a better one. Perhaps worth some comments:

// Needs a copy relocation if Object or a Canonical PLT if a non-ifunc function symbol.
uint8_t needsCopy : 1;
// Target of a non-GOT-generating relocation.
uint8_t hasDirectReloc : 1;

lld/test/ELF/aarch64-cortex-a53-843419-recognize.s

611

I was curious why the .got entries were different. As part of the investigation I noticed a couple of things:
The first .globl dat has a typo, it should be .globl dat1 this causes GOT generating relocations to a local symbol which maybe causing some of the differences. The second is that the ADRPs that are notionally paired with ldr xr, [xs, :got_lo12: symbol] should be adrp xr, :got: symbol This doesn't matter for the test as we're not executing it, but it may be worth correcting at some point.

[MaskRay]

Add an assert

[MaskRay]

lld/ELF/Relocations.cpp

1618

Thanks. Applied. isFunc does not inclue isGnuIFunc() so I omitted isGnuIFunc().

lld/ELF/Symbols.h

283

In theory we could use a local container to store the flags, but this would come at a performance cost.

Some flags are non-local symbol only and using an indirection and another container may be better for the SymbolUnion structure size, which can save memory usage. For the immediate usage of this patch, both needsGot and hasDirectReloc can be used by local symbols, which may make the idea non-appealing.

287

I struggled a bit with needsCopyRelOrCanonicalPLT and needsCopy, too, and picked needsCopy because the former seems too long.

For hasDirectReloc, I thought about needsNonGotNonPlt (using the "needs" prefix). It is also too long but don't mind if others think it is better.

[MaskRay]

@ikudrin Opinions? :)

[ikudrin]

Looking at it. Sorry for the delay.

[ikudrin]

lld/ELF/Relocations.cpp

1106

As we know that a PLT entry is needed, we can set the flag and simplify postScanRelocations() a bit.

1612

The symbol has not been added in PLT yet, right?

1618–1620

If the suggested change for processRelocAux() is applied.

1639–1640

Maybe extract a shortened version of fn, so that local symbols do not waste time checking flags that are always false for them?

lld/test/ELF/aarch64-ifunc-bti.s

45

The comment should be moved before <ifunc2>:

lld/test/ELF/arm-branch-undef-weak-plt-thunk.s

30

Do we really need such precise checks in the test?

lld/test/ELF/ppc32-canonical-plt.s

37

45

lld/test/ELF/ppc32-reloc-got.s

14

This is not checked (and not accurate), thus, can be removed.

20

24–25

27–28

lld/test/ELF/riscv-reloc-got.s

39–40

[bd1976llvm]

Sorry I missed this review - looks great! Did you try getting performance numbers using the tar packages that Rafael gathered up?

I have been working on a change to deduplicate redundant GOT entries (e.g. from GOT references to aliased symbols) a postscan pass should make that sort of optimisation more viable.

[MaskRay]

address comments

lld/ELF/Relocations.cpp

1639–1640

A local symbol does not need to check needsCopy, but the majority of checks (non-preemptible ifunc/GOT/PLT) are possible.

lld/test/ELF/aarch64-cortex-a53-843419-recognize.s

611

Fixed the typo in a separate commit. The differences disappeared.

lld/test/ELF/arm-branch-undef-weak-plt-thunk.s

30

No, this just keeps the state as is. It would be nice if movt/movw can symbolize the target then we can avoid the immediates.

[MaskRay]

Move // needsCopy is cleared for sym and its aliases so that in later comment to this patch

[ikudrin]

LGTM

[MaskRay]

update description
update comment for needsCopy

lld/ELF/Relocations.h

struct JumpInstrMod {
   uint64_t offset;
   unsigned size;
 };
 
 // This function writes undefined symbol diagnostics to an internal buffer.
 // Call reportUndefinedSymbols() after calling scanRelocations() to emit
 // the diagnostics.
 template <class ELFT> void scanRelocations(InputSectionBase &);
+void postScanRelocations();
 
 template <class ELFT> void reportUndefinedSymbols();
 
 void hexagonTLSSymbolUpdate(ArrayRef<OutputSection *> outputSections);
 bool hexagonNeedsTLSSymbol(ArrayRef<OutputSection *> outputSections);
 
 class ThunkSection;
 class Thunk;

lld/ELF/Relocations.cpp

 // variable of type T. It is an ABI-breaking change to add new members at
 // end of T even though doing that doesn't change the layout of the
 // existing members. That's because the space for the new members are not
 // reserved in .bss unless you recompile the main program. That means they
 // are likely to overlap with other data that happens to be laid out next
 // to the variable in .bss. This kind of issue is sometimes very hard to
 // debug. What's a solution? Instead of exporting a variable V from a DSO,
 // define an accessor getV().
-template <class ELFT> static void addCopyRelSymbol(SharedSymbol &ss) {
+template <class ELFT> static void addCopyRelSymbolImpl(SharedSymbol &ss) {
   // Copy relocation against zero-sized symbol doesn't make sense.
   uint64_t symSize = ss.getSize();
   if (symSize == 0 || ss.alignment == 0)
     fatal("cannot create a copy relocation for symbol " + toString(ss));
 
   // See if this symbol is in a read-only segment. If so, preserve the symbol's
   // memory protection by reserving space in the .bss.rel.ro section.
   bool isRO = isReadOnly<ELFT>(ss);
template <class ELFT> static void addCopyRelSymbolImpl(SharedSymbol &ss) {
   // dynamic symbol for each one. This causes the copy relocation to correctly
   // interpose any aliases.
   for (SharedSymbol *sym : getSymbolsAt<ELFT>(ss))
     replaceWithDefined(*sym, sec, 0, sym->size);
 
   mainPart->relaDyn->addSymbolReloc(target->copyRel, sec, 0, ss);
 }
 
+static void addCopyRelSymbol(SharedSymbol &ss) {
+  const SharedFile &file = ss.getFile();
+  switch (file.ekind) {
+  case ELF32LEKind:
+    addCopyRelSymbolImpl<ELF32LE>(ss);
+    break;
+  case ELF32BEKind:
+    addCopyRelSymbolImpl<ELF32BE>(ss);
+    break;
+  case ELF64LEKind:
+    addCopyRelSymbolImpl<ELF64LE>(ss);
+    break;
+  case ELF64BEKind:
+    addCopyRelSymbolImpl<ELF64BE>(ss);
+    break;
+  default:
+    llvm_unreachable("");
+  }
+}
+
 // MIPS has an odd notion of "paired" relocations to calculate addends.
 // For example, if a relocation is of R_MIPS_HI16, there must be a
 // R_MIPS_LO16 relocation after that, and an addend is calculated using
 // the two relocations.
 template <class ELFT, class RelTy>
 static int64_t computeMipsAddend(const RelTy &rel, const RelTy *end,
                                  InputSectionBase &sec, RelExpr expr,
                                  bool isLocal) {
if (!config->shared) {
     if (sym.isObject()) {
       // Produce a copy relocation.
       if (auto *ss = dyn_cast<SharedSymbol>(&sym)) {
         if (!config->zCopyreloc)
           error("unresolvable relocation " + toString(type) +
                 " against symbol '" + toString(*ss) +
                 "'; recompile with -fPIC or remove '-z nocopyreloc'" +
                 getLocation(sec, sym, offset));
-        addCopyRelSymbol<ELFT>(*ss);
+        sym.needsCopy = true;
       }
       sec.relocations.push_back({expr, type, offset, addend, &sym});
       return;
     }
 
     // This handles a non PIC program call to function in a shared library. In
     // an ideal world, we could just report an error saying the relocation can
     // overflow at runtime. In the real world with glibc, crt1.o has a
if (!config->shared) {
     //   compiled without -fPIE/-fPIC and doesn't maintain ebx.
     // * If a library definition gets preempted to the executable, it will have
     //   the wrong ebx value.
     if (sym.isFunc()) {
       if (config->pie && config->emachine == EM_386)
         errorOrWarn("symbol '" + toString(sym) +
                     "' cannot be preempted; recompile with -fPIE" +
                     getLocation(sec, sym, offset));
-      if (!sym.isInPlt())
-        addPltEntry(in.plt, in.gotPlt, in.relaPlt, target->pltRel, sym);
-      if (!sym.isDefined()) {
-        replaceWithDefined(
-            sym, in.plt,
-            target->pltHeaderSize + target->pltEntrySize * sym.pltIndex, 0);
-        if (config->emachine == EM_PPC) {
-          // PPC32 canonical PLT entries are at the beginning of .glink
-          cast<Defined>(sym).value = in.plt->headerSize;
-          in.plt->headerSize += 16;
-          cast<PPC32GlinkSection>(in.plt)->canonical_plts.push_back(&sym);
-        }
-      }
-      sym.needsPltAddr = true;
+      sym.needsCopy = true;
       sec.relocations.push_back({expr, type, offset, addend, &sym});
       return;
     }
   }
 
   errorOrWarn("relocation " + toString(type) + " cannot be used against " +
               (sym.getName().empty() ? "local symbol"
                                      : "symbol '" + toString(sym) + "'") +
static void scanReloc(InputSectionBase &sec, OffsetGetter &getOffset, RelTy *&i,
   // We were asked not to generate PLT entries for ifuncs. Instead, pass the
   // direct relocation on through.
   if (sym.isGnuIFunc() && config->zIfuncNoplt) {
     sym.exportDynamic = true;
     mainPart->relaDyn->addSymbolReloc(type, &sec, offset, sym, addend, type);
     return;
   }
 
-  // Non-preemptible ifuncs require special handling. First, handle the usual
-  // case where the symbol isn't one of these.
-  if (!sym.isGnuIFunc() || sym.isPreemptible) {
-    // If a relocation needs PLT, we create PLT and GOTPLT slots for the symbol.
-    if (needsPlt(expr) && !sym.isInPlt())
-      addPltEntry(in.plt, in.gotPlt, in.relaPlt, target->pltRel, sym);
-
-    // Create a GOT slot if a relocation needs GOT.
-    if (needsGot(expr)) {
-      if (config->emachine == EM_MIPS) {
-        // MIPS ABI has special rules to process GOT entries and doesn't
-        // require relocation entries for them. A special case is TLS
-        // relocations. In that case dynamic loader applies dynamic
-        // relocations to initialize TLS GOT entries.
-        // See "Global Offset Table" in Chapter 5 in the following document
-        // for detailed description:
-        // ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf
-        in.mipsGot->addEntry(*sec.file, sym, addend, expr);
-      } else if (!sym.isInGot()) {
-        addGotEntry(sym);
-      }
-    }
     } else {
-    // Handle a reference to a non-preemptible ifunc. These are special in a
-    // few ways:
-    //
-    // - Unlike most non-preemptible symbols, non-preemptible ifuncs do not have
-    //   a fixed value. But assuming that all references to the ifunc are
-    //   GOT-generating or PLT-generating, the handling of an ifunc is
-    //   relatively straightforward. We create a PLT entry in Iplt, which is
-    //   usually at the end of .plt, which makes an indirect call using a
-    //   matching GOT entry in igotPlt, which is usually at the end of .got.plt.
-    //   The GOT entry is relocated using an IRELATIVE relocation in relaIplt,
-    //   which is usually at the end of .rela.plt. Unlike most relocations in
-    //   .rela.plt, which may be evaluated lazily without -z now, dynamic
-    //   loaders evaluate IRELATIVE relocs eagerly, which means that for
-    //   IRELATIVE relocs only, GOT-generating relocations can point directly to
-    //   .got.plt without requiring a separate GOT entry.
-    //
-    // - Despite the fact that an ifunc does not have a fixed value, compilers
-    //   that are not passed -fPIC will assume that they do, and will emit
-    //   direct (non-GOT-generating, non-PLT-generating) relocations to the
-    //   symbol. This means that if a direct relocation to the symbol is
-    //   seen, the linker must set a value for the symbol, and this value must
-    //   be consistent no matter what type of reference is made to the symbol.
-    //   This can be done by creating a PLT entry for the symbol in the way
-    //   described above and making it canonical, that is, making all references
-    //   point to the PLT entry instead of the resolver. In lld we also store
-    //   the address of the PLT entry in the dynamic symbol table, which means
-    //   that the symbol will also have the same value in other modules.
-    //   Because the value loaded from the GOT needs to be consistent with
-    //   the value computed using a direct relocation, a non-preemptible ifunc
-    //   may end up with two GOT entries, one in .got.plt that points to the
-    //   address returned by the resolver and is used only by the PLT entry,
-    //   and another in .got that points to the PLT entry and is used by
-    //   GOT-generating relocations.
-    //
-    // - The fact that these symbols do not have a fixed value makes them an
-    //   exception to the general rule that a statically linked executable does
-    //   not require any form of dynamic relocation. To handle these relocations
-    //   correctly, the IRELATIVE relocations are stored in an array which a
-    //   statically linked executable's startup code must enumerate using the
-    //   linker-defined symbols __rela?_iplt_{start,end}.
-    if (!sym.isInPlt()) {
-      // Create PLT and GOTPLT slots for the symbol.
-      sym.isInIplt = true;
-
-      // Create a copy of the symbol to use as the target of the IRELATIVE
-      // relocation in the igotPlt. This is in case we make the PLT canonical
-      // later, which would overwrite the original symbol.
-      //
-      // FIXME: Creating a copy of the symbol here is a bit of a hack. All
-      // that's really needed to create the IRELATIVE is the section and value,
-      // so ideally we should just need to copy those.
-      auto *directSym = make<Defined>(cast<Defined>(sym));
-      addPltEntry(in.iplt, in.igotPlt, in.relaIplt, target->iRelativeRel,
-                  *directSym);
-      sym.pltIndex = directSym->pltIndex;
-    }
-    if (needsGot(expr)) {
-      // Redirect GOT accesses to point to the Igot.
-      //
-      // This field is also used to keep track of whether we ever needed a GOT
-      // entry. If we did and we make the PLT canonical later, we'll need to
-      // create a GOT entry pointing to the PLT entry for Sym.
-      sym.gotInIgot = true;
-    } else if (!needsPlt(expr)) {
-      // Make the ifunc's PLT entry canonical by changing the value of its
-      // symbol to redirect all references to point to it.
-      auto &d = cast<Defined>(sym);
-      d.section = in.iplt;
-      d.value = sym.pltIndex * target->ipltEntrySize;
-      d.size = 0;
-      // It's important to set the symbol type here so that dynamic loaders
-      // don't try to call the PLT as if it were an ifunc resolver.
-      d.type = STT_FUNC;
-
-      if (sym.gotInIgot) {
-        // We previously encountered a GOT generating reference that we
-        // redirected to the Igot. Now that the PLT entry is canonical we must
-        // clear the redirection to the Igot and add a GOT entry. As we've
-        // changed the symbol type to STT_FUNC future GOT generating references
-        // will naturally use this GOT entry.
-        //
-        // We don't need to worry about creating a MIPS GOT here because ifuncs
-        // aren't a thing on MIPS.
-        sym.gotInIgot = false;
-        addGotEntry(sym);
-      }
+      sym.needsGot = true;
     }
+  } else if (needsPlt(expr)) {
+    sym.needsPlt = true;
+  } else {
+    sym.hasDirectReloc = true;
   }
 
   processRelocAux<ELFT>(sec, expr, type, offset, sym, addend);
 }
 
 // R_PPC64_TLSGD/R_PPC64_TLSLD is required to mark `bl __tls_get_addr` for
 // General Dynamic/Local Dynamic code sequences. If a GD/LD GOT relocation is
 // found but no R_PPC64_TLSGD/R_PPC64_TLSLD is seen, we assume that the

 template <class ELFT> void elf::scanRelocations(InputSectionBase &s) {
   const RelsOrRelas<ELFT> rels = s.template relsOrRelas<ELFT>();
   if (rels.areRelocsRel())
     scanRelocs<ELFT>(s, rels.rels);
   else
     scanRelocs<ELFT>(s, rels.relas);
 }
 
+static bool handleNonPreemptibleIfunc(Symbol &sym) {
+  // Handle a reference to a non-preemptible ifunc. These are special in a
+  // few ways:
+  //
+  // - Unlike most non-preemptible symbols, non-preemptible ifuncs do not have
+  //   a fixed value. But assuming that all references to the ifunc are
+  //   GOT-generating or PLT-generating, the handling of an ifunc is
+  //   relatively straightforward. We create a PLT entry in Iplt, which is
+  //   usually at the end of .plt, which makes an indirect call using a
+  //   matching GOT entry in igotPlt, which is usually at the end of .got.plt.
+  //   The GOT entry is relocated using an IRELATIVE relocation in relaIplt,
+  //   which is usually at the end of .rela.plt. Unlike most relocations in
+  //   .rela.plt, which may be evaluated lazily without -z now, dynamic
+  //   loaders evaluate IRELATIVE relocs eagerly, which means that for
+  //   IRELATIVE relocs only, GOT-generating relocations can point directly to
+  //   .got.plt without requiring a separate GOT entry.
+  //
+  // - Despite the fact that an ifunc does not have a fixed value, compilers
+  //   that are not passed -fPIC will assume that they do, and will emit
+  //   direct (non-GOT-generating, non-PLT-generating) relocations to the
+  //   symbol. This means that if a direct relocation to the symbol is
+  //   seen, the linker must set a value for the symbol, and this value must
+  //   be consistent no matter what type of reference is made to the symbol.
+  //   This can be done by creating a PLT entry for the symbol in the way
+  //   described above and making it canonical, that is, making all references
+  //   point to the PLT entry instead of the resolver. In lld we also store
+  //   the address of the PLT entry in the dynamic symbol table, which means
+  //   that the symbol will also have the same value in other modules.
+  //   Because the value loaded from the GOT needs to be consistent with
+  //   the value computed using a direct relocation, a non-preemptible ifunc
+  //   may end up with two GOT entries, one in .got.plt that points to the
+  //   address returned by the resolver and is used only by the PLT entry,
+  //   and another in .got that points to the PLT entry and is used by
+  //   GOT-generating relocations.
+  //
+  // - The fact that these symbols do not have a fixed value makes them an
+  //   exception to the general rule that a statically linked executable does
+  //   not require any form of dynamic relocation. To handle these relocations
+  //   correctly, the IRELATIVE relocations are stored in an array which a
+  //   statically linked executable's startup code must enumerate using the
+  //   linker-defined symbols __rela?_iplt_{start,end}.
+  if (!sym.isGnuIFunc() || sym.isPreemptible || config->zIfuncNoplt)
+    return false;
+
+  sym.isInIplt = true;
+
+  // Create an Iplt and the associated IRELATIVE relocation pointing to the
+  // original section/value pairs. For non-GOT non-PLT relocation case below, we
+  // may alter section/value, so create a copy of the symbol to make
+  // section/value fixed.
+  auto *directSym = make<Defined>(cast<Defined>(sym));
+  addPltEntry(in.iplt, in.igotPlt, in.relaIplt, target->iRelativeRel,
+              *directSym);
+  sym.pltIndex = directSym->pltIndex;
+
+  if (sym.hasDirectReloc) {
+    // Change the value to the IPLT and redirect all references to it.
+    auto &d = cast<Defined>(sym);
+    d.section = in.iplt;
+    d.value = sym.pltIndex * target->ipltEntrySize;
+    d.size = 0;
+    // It's important to set the symbol type here so that dynamic loaders
+    // don't try to call the PLT as if it were an ifunc resolver.
+    d.type = STT_FUNC;
+
+    if (sym.needsGot)
+      addGotEntry(sym);
+  } else if (sym.needsGot) {
+    // Redirect GOT accesses to point to the Igot.
+    sym.gotInIgot = true;
+  }
+  return true;
+}
+
+void elf::postScanRelocations() {
+  auto fn = [](Symbol &sym) {
+    if (handleNonPreemptibleIfunc(sym))
+      return;
+    if (sym.needsGot)
+      addGotEntry(sym);
+    if (sym.needsPlt && !sym.isInPlt())
+      addPltEntry(in.plt, in.gotPlt, in.relaPlt, target->pltRel, sym);
+    if (sym.needsCopy) {
+      if (sym.isObject()) {
+        addCopyRelSymbol(cast<SharedSymbol>(sym));
+      } else {
+        assert(sym.isFunc());
+        if (!sym.isInPlt())
+          addPltEntry(in.plt, in.gotPlt, in.relaPlt, target->pltRel, sym);
+        if (!sym.isDefined()) {
+          replaceWithDefined(
+              sym, in.plt,
+              target->pltHeaderSize + target->pltEntrySize * sym.pltIndex, 0);
+          if (config->emachine == EM_PPC) {
+            // PPC32 canonical PLT entries are at the beginning of .glink
+            cast<Defined>(sym).value = in.plt->headerSize;
+            in.plt->headerSize += 16;
+            cast<PPC32GlinkSection>(in.plt)->canonical_plts.push_back(&sym);
+          }
+        }
+        sym.needsPltAddr = true;
+      }
+    }
+  };
+  for (Symbol *sym : symtab->symbols())
+    fn(*sym);
+
+  // Local symbols may need the aforementioned non-preemptible ifunc and GOT
+  // handling. They don't need regular PLT.
+  for (InputFile *file : objectFiles)
+    for (Symbol *sym : cast<ELFFileBase>(file)->getLocalSymbols())
+      fn(*sym);
+}
+
 static bool mergeCmp(const InputSection *a, const InputSection *b) {
   // std::merge requires a strict weak ordering.
   if (a->outSecOff < b->outSecOff)
     return true;
 
   if (a->outSecOff == b->outSecOff) {
     auto *ta = dyn_cast<ThunkSection>(a);
     auto *tb = dyn_cast<ThunkSection>(b);

lld/ELF/Symbols.h

protected:
   Symbol(Kind k, InputFile *file, StringRefZ name, uint8_t binding,
          uint8_t stOther, uint8_t type)
       : file(file), nameData(name.data), nameSize(name.size), binding(binding),
         type(type), stOther(stOther), symbolKind(k), visibility(stOther & 3),
         isUsedInRegularObj(!file || file->kind() == InputFile::ObjKind),
         exportDynamic(isExportDynamic(k, visibility)), inDynamicList(false),
         canInline(false), referenced(false), traced(false), needsPltAddr(false),
         isInIplt(false), gotInIgot(false), isPreemptible(false),
-        used(!config->gcSections), needsTocRestore(false),
-        scriptDefined(false) {}
+        used(!config->gcSections), needsTocRestore(false), scriptDefined(false),
+        needsGot(false), needsPlt(false), needsCopy(false),
+        hasDirectReloc(false) {}
 
 public:
   // True the symbol should point to its PLT entry.
   // For SharedSymbol only.
   uint8_t needsPltAddr : 1;
 
   // True if this symbol is in the Iplt sub-section of the Plt and the Igot
   // sub-section of the .got.plt or .got.
public:
 
   // True if a call to this symbol needs to be followed by a restore of the
   // PPC64 toc pointer.
   uint8_t needsTocRestore : 1;
 
   // True if this symbol is defined by a linker script.
   uint8_t scriptDefined : 1;
 
+  // Temporary flags used to communicate which symbol entries need PLT and GOT
+  // entries during postScanRelocations();
+  uint8_t needsGot : 1;
+  uint8_t needsPlt : 1;
+  uint8_t needsCopy : 1;
+  uint8_t hasDirectReloc : 1;
+
   // The partition whose dynamic symbol table contains this symbol's definition.
   uint8_t partition = 1;
 
   bool isSection() const { return type == llvm::ELF::STT_SECTION; }
   bool isTls() const { return type == llvm::ELF::STT_TLS; }
   bool isFunc() const { return type == llvm::ELF::STT_FUNC; }
   bool isGnuIFunc() const { return type == llvm::ELF::STT_GNU_IFUNC; }
   bool isObject() const { return type == llvm::ELF::STT_OBJECT; }

lld/ELF/Writer.cpp

script->processSymbolAssignments();
     // Scan relocations. This must be done after every symbol is declared so
     // that we can correctly decide if a dynamic relocation is needed. This is
     // called after processSymbolAssignments() because it needs to know whether
     // a linker-script-defined symbol is absolute.
     ppc64noTocRelax.clear();
     if (!config->relocatable) {
       forEachRelSec(scanRelocations<ELFT>);
       reportUndefinedSymbols<ELFT>();
+      postScanRelocations();
     }
   }
 
   if (in.plt && in.plt->isNeeded())
     in.plt->addSymbols();
   if (in.iplt && in.iplt->isNeeded())
     in.iplt->addSymbols();
 

lld/test/ELF/aarch64-cortex-a53-843419-recognize.s

 // - Optional instruction 3 present or not.
 // - Load or store for instruction 4.
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 211FF8 in unpatched output.
 // CHECK: <t3_ff8_ldr>:
 // CHECK-NEXT:    211ff8:        60 02 00 f0     adrp    x0, 0x260000
 // CHECK-NEXT:    211ffc:        21 00 40 f9     ldr             x1, [x1]
 // CHECK-FIX:     212000:        03 c8 00 14     b       0x24400c
-// CHECK-NOFIX:   212000:        00 00 40 f9     ldr             x0, [x0]
+// CHECK-NOFIX:   212000:        00 08 40 f9     ldr             x0, [x0, #16]
 // CHECK-NEXT:    212004:        c0 03 5f d6     ret
 // CHECK-RELOCATABLE: <t3_ff8_ldr>:
 // CHECK-RELOCATABLE-NEXT:    ff8:        00 00 00 90     adrp    x0, 0x0
 // CHECK-RELOCATABLE-NEXT:    ffc:        21 00 40 f9     ldr             x1, [x1]
 // CHECK-RELOCATABLE-NEXT:   1000:        00 00 40 f9     ldr             x0, [x0]
 // CHECK-RELOCATABLE-NEXT:   1004:        c0 03 5f d6     ret
 
         .section .text.01, "ax", %progbits
         .balign 4096
         .globl t3_ff8_ldr
         .type t3_ff8_ldr, %function
         .space 4096 - 8
 t3_ff8_ldr:
         adrp x0, dat1
         ldr x1, [x1, #0]
         ldr x0, [x0, :got_lo12:dat1]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 213FF8 in unpatched output.
 // CHECK: <t3_ff8_ldrsimd>:
 // CHECK-NEXT:    213ff8:        60 02 00 b0     adrp    x0, 0x260000
 // CHECK-NEXT:    213ffc:        21 00 40 bd     ldr             s1, [x1]
 // CHECK-FIX:     214000:        05 c0 00 14     b       0x244014
-// CHECK-NOFIX:   214000:        02 04 40 f9     ldr     x2, [x0, #8]
+// CHECK-NOFIX:   214000:        02 00 40 f9     ldr     x2, [x0]
 // CHECK-NEXT:    214004:        c0 03 5f d6     ret
         .section .text.02, "ax", %progbits
         .balign 4096
         .globl t3_ff8_ldrsimd
         .type t3_ff8_ldrsimd, %function
         .space 4096 - 8
 t3_ff8_ldrsimd:
         adrp x0, dat2
         ldr s1, [x1, #0]
         ldr x2, [x0, :got_lo12:dat2]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 215FFC in unpatched output.
 // CHECK: <t3_ffc_ldrpost>:
 // CHECK-NEXT:    215ffc:        40 02 00 f0     adrp    x0, 0x260000
 // CHECK-NEXT:    216000:        21 84 40 bc     ldr     s1, [x1], #8
 // CHECK-FIX:     216004:        06 b8 00 14     b       0x24401c
-// CHECK-NOFIX:   216004:        03 08 40 f9     ldr     x3, [x0, #16]
+// CHECK-NOFIX:   216004:        03 04 40 f9     ldr     x3, [x0, #8]
 // CHECK-NEXT:    216008:        c0 03 5f d6     ret
         .section .text.03, "ax", %progbits
         .balign 4096
         .globl t3_ffc_ldrpost
         .type t3_ffc_ldrpost, %function
         .space 4096 - 4
 t3_ffc_ldrpost:
         adrp x0, dat3
t3_ffc_strsimd:
         str x4, [x28, :lo12:dat3]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 21DFF8 in unpatched output.
 // CHECK: <t3_ff8_ldrunpriv>:
 // CHECK-NEXT:    21dff8:        1d 02 00 f0     adrp    x29, 0x260000
 // CHECK-NEXT:    21dffc:        41 08 40 38     ldtrb           w1, [x2]
 // CHECK-FIX:     21e000:        0f 98 00 14     b       0x24403c
-// CHECK-NOFIX:   21e000:        bd 03 40 f9     ldr             x29, [x29]
+// CHECK-NOFIX:   21e000:        bd 0b 40 f9     ldr             x29, [x29, #16]
 // CHECK-NEXT:    21e004:        c0 03 5f d6     ret
         .section .text.07, "ax", %progbits
         .balign 4096
         .globl t3_ff8_ldrunpriv
         .type t3_ff8_ldrunpriv, %function
         .space 4096 - 8
 t3_ff8_ldrunpriv:
         adrp x29, dat1
         ldtrb w1, [x2, #0]
         ldr x29, [x29, :got_lo12:dat1]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 21FFFC in unpatched output.
 // CHECK: <t3_ffc_ldur>:
 // CHECK-NEXT:    21fffc:        1d 02 00 b0     adrp    x29, 0x260000
 // CHECK-NEXT:    220000:        42 40 40 b8     ldur    w2, [x2, #4]
 // CHECK-FIX:     220004:        10 90 00 14     b       0x244044
-// CHECK-NOFIX:   220004:        bd 07 40 f9     ldr     x29, [x29, #8]
+// CHECK-NOFIX:   220004:        bd 03 40 f9     ldr     x29, [x29]
 // CHECK-NEXT:    220008:        c0 03 5f d6     ret
         .balign 4096
         .globl t3_ffc_ldur
         .type t3_ffc_ldur, %function
         .space 4096 - 4
 t3_ffc_ldur:
         adrp x29, dat2
         ldur w2, [x2, #4]
         ldr x29, [x29, :got_lo12:dat2]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 221FFC in unpatched output.
 // CHECK: <t3_ffc_sturh>:
 // CHECK-NEXT:    221ffc:        f2 01 00 f0     adrp    x18, 0x260000
 // CHECK-NEXT:    222000:        43 40 00 78     sturh   w3, [x2, #4]
 // CHECK-FIX:     222004:        12 88 00 14     b       0x24404c
-// CHECK-NOFIX:   222004:        41 0a 40 f9     ldr     x1, [x18, #16]
+// CHECK-NOFIX:   222004:        41 06 40 f9     ldr     x1, [x18, #8]
 // CHECK-NEXT:    222008:        c0 03 5f d6     ret
         .section .text.09, "ax", %progbits
         .balign 4096
         .globl t3_ffc_sturh
         .type t3_ffc_sturh, %function
         .space 4096 - 4
 t3_ffc_sturh:
         adrp x18, dat3
t3_ff8_st1multiple:
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 22FFF8 in unpatched output.
 // CHECK: <t4_ff8_ldr>:
 // CHECK-NEXT:    22fff8:        80 01 00 b0     adrp    x0, 0x260000
 // CHECK-NEXT:    22fffc:        21 00 40 f9     ldr             x1, [x1]
 // CHECK-NEXT:    230000:        42 00 00 8b     add             x2, x2, x0
 // CHECK-FIX:     230004:        20 50 00 14     b       0x244084
-// CHECK-NOFIX:   230004:        02 00 40 f9     ldr             x2, [x0]
+// CHECK-NOFIX:   230004:        02 08 40 f9     ldr             x2, [x0, #16]
 // CHECK-NEXT:    230008:        c0 03 5f d6     ret
         .section .text.16, "ax", %progbits
         .balign 4096
         .globl t4_ff8_ldr
         .type t4_ff8_ldr, %function
         .space 4096 - 8
 t4_ff8_ldr:
         adrp x0, dat1
         ldr x1, [x1, #0]
         add x2, x2, x0
         ldr x2, [x0, :got_lo12:dat1]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 231FFC in unpatched output.
 // CHECK: <t4_ffc_str>:
 // CHECK-NEXT:    231ffc:        7c 01 00 f0     adrp    x28, 0x260000
 // CHECK-NEXT:    232000:        42 00 00 f9     str             x2, [x2]
 // CHECK-NEXT:    232004:        20 00 02 cb     sub             x0, x1, x2
 // CHECK-FIX:     232008:        21 48 00 14     b       0x24408c
-// CHECK-NOFIX:   232008:        9b 07 00 f9     str     x27, [x28, #8]
+// CHECK-NOFIX:   232008:        9b 03 00 f9     str     x27, [x28]
 // CHECK-NEXT:    23200c:        c0 03 5f d6     ret
         .section .text.17, "ax", %progbits
         .balign 4096
         .globl t4_ffc_str
         .type t4_ffc_str, %function
         .space 4096 - 4
 t4_ffc_str:
         adrp x28, dat2
         str x2, [x2, #0]
         sub x0, x1, x2
         str x27, [x28, :got_lo12:dat2]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 233FF8 in unpatched output.
 // CHECK: <t4_ff8_stp>:
 // CHECK-NEXT:    233ff8:        70 01 00 b0     adrp    x16, 0x260000
 // CHECK-NEXT:    233ffc:        61 08 00 a9     stp             x1, x2, [x3]
 // CHECK-NEXT:    234000:        03 7e 10 9b     mul             x3, x16, x16
 // CHECK-FIX:     234004:        24 40 00 14     b       0x244094
-// CHECK-NOFIX:   234004:        0e 0a 40 f9     ldr     x14, [x16, #16]
+// CHECK-NOFIX:   234004:        0e 06 40 f9     ldr     x14, [x16, #8]
 // CHECK-NEXT:    234008:        c0 03 5f d6     ret
         .section .text.18, "ax", %progbits
         .balign 4096
         .globl t4_ff8_stp
         .type t4_ff8_stp, %function
         .space 4096 - 8
 t4_ff8_stp:
         adrp x16, dat3
t4_ffc_stpsimd:
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 23BFFC in unpatched output.
 // CHECK: <t4_ffc_stnp>:
 // CHECK-NEXT:    23bffc:        27 01 00 b0     adrp    x7, 0x260000
 // CHECK-NEXT:    23c000:        61 08 00 a8     stnp            x1, x2, [x3]
 // CHECK-NEXT:    23c004:        1f 20 03 d5     nop
 // CHECK-FIX:     23c008:        2b 20 00 14     b       0x2440b4
-// CHECK-NOFIX:   23c008:        ea 00 40 f9     ldr             x10, [x7]
+// CHECK-NOFIX:   23c008:        ea 08 40 f9     ldr             x10, [x7, #16]
 // CHECK-NEXT:    23c00c:        c0 03 5f d6     ret
         .section .text.22, "ax", %progbits
         .balign 4096
         .globl t4_ffc_stnp
         .type t4_ffc_stnp, %function
         .space 4096 - 4
 t4_ffc_stnp:
         adrp x7, dat1
         stnp x1,x2, [x3, #0]
         nop
         ldr x10, [x7, :got_lo12:dat1]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 23DFFC in unpatched output.
 // CHECK: <t4_ffc_st1>:
 // CHECK-NEXT:    23dffc:        18 01 00 f0     adrp    x24, 0x260000
 // CHECK-NEXT:    23e000:        20 80 00 4d     st1 { v0.s }[2], [x1]
-// CHECK-NEXT:    23e004:        f6 06 40 f9     ldr     x22, [x23, #8]
+// CHECK-NEXT:    23e004:        f6 02 40 f9     ldr     x22, [x23]
 // CHECK-FIX:     23e008:        2d 18 00 14     b       0x2440bc
 // CHECK-NOFIX:   23e008:        18 ff 3f f9     str     x24, [x24, #32760]
 // CHECK-NEXT:    23e00c:        c0 03 5f d6     ret
         .section .text.23, "ax", %progbits
         .balign 4096
         .globl t4_ffc_st1
         .type t4_ffc_st1, %function
         .space 4096 - 4
t3_ff8_stxr:
 
         .text
         .globl _start
         .type _start, %function
 _start:
         ret
 
 // CHECK-FIX: <__CortexA53843419_212000>:
-// CHECK-FIX-NEXT:    24400c:    00 00 40 f9     ldr     x0, [x0]
+// CHECK-FIX-NEXT:    24400c:    00 08 40 f9     ldr     x0, [x0, #16]
 // CHECK-FIX-NEXT:    244010:    fd 37 ff 17     b       0x212004
 // CHECK-FIX: <__CortexA53843419_214000>:
-// CHECK-FIX-NEXT:    244014:    02 04 40 f9     ldr     x2, [x0, #8]
+// CHECK-FIX-NEXT:    244014:    02 00 40 f9     ldr     x2, [x0]
 // CHECK-FIX-NEXT:    244018:    fb 3f ff 17     b       0x214004
 // CHECK-FIX: <__CortexA53843419_216004>:
-// CHECK-FIX-NEXT:    24401c:    03 08 40 f9     ldr     x3, [x0, #16]
+// CHECK-FIX-NEXT:    24401c:    03 04 40 f9     ldr     x3, [x0, #8]
 // CHECK-FIX-NEXT:    244020:    fa 47 ff 17     b       0x216008
 // CHECK-FIX: <__CortexA53843419_218000>:
 // CHECK-FIX-NEXT:    244024:    02 0c 40 f9     ldr     x2, [x0, #24]
 // CHECK-FIX-NEXT:    244028:    f7 4f ff 17     b       0x218004
 // CHECK-FIX: <__CortexA53843419_21A004>:
 // CHECK-FIX-NEXT:    24402c:    9c 13 00 f9     str     x28, [x28, #32]
 // CHECK-FIX-NEXT:    244030:    f6 57 ff 17     b       0x21a008
 // CHECK-FIX: <__CortexA53843419_21C004>:
 // CHECK-FIX-NEXT:    244034:    84 17 00 f9     str     x4, [x28, #40]
 // CHECK-FIX-NEXT:    244038:    f4 5f ff 17     b       0x21c008
 // CHECK-FIX: <__CortexA53843419_21E000>:
-// CHECK-FIX-NEXT:    24403c:    bd 03 40 f9     ldr     x29, [x29]
+// CHECK-FIX-NEXT:    24403c:    bd 0b 40 f9     ldr     x29, [x29, #16]
 // CHECK-FIX-NEXT:    244040:    f1 67 ff 17     b       0x21e004
 // CHECK-FIX: <__CortexA53843419_220004>:
-// CHECK-FIX-NEXT:    244044:    bd 07 40 f9     ldr     x29, [x29, #8]
+// CHECK-FIX-NEXT:    244044:    bd 03 40 f9     ldr     x29, [x29]
 // CHECK-FIX-NEXT:    244048:    f0 6f ff 17     b       0x220008
 // CHECK-FIX: <__CortexA53843419_222004>:
-// CHECK-FIX-NEXT:    24404c:    41 0a 40 f9     ldr     x1, [x18, #16]
+// CHECK-FIX-NEXT:    24404c:    41 06 40 f9     ldr     x1, [x18, #8]
 // CHECK-FIX-NEXT:    244050:    ee 77 ff 17     b       0x222008
 // CHECK-FIX: <__CortexA53843419_224000>:
 // CHECK-FIX-NEXT:    244054:    52 0e 40 f9     ldr     x18, [x18, #24]
 // CHECK-FIX-NEXT:    244058:    eb 7f ff 17     b       0x224004
 // CHECK-FIX: <__CortexA53843419_226004>:
 // CHECK-FIX-NEXT:    24405c:    ea 11 40 f9     ldr     x10, [x15, #32]
 // CHECK-FIX-NEXT:    244060:    ea 87 ff 17     b       0x226008
 // CHECK-FIX: <__CortexA53843419_228000>:
 // CHECK-FIX-NEXT:    244064:    0d 16 40 f9     ldr     x13, [x16, #40]
 // CHECK-FIX-NEXT:    244068:    e7 8f ff 17     b       0x228004
 // CHECK-FIX: <__CortexA53843419_22A004>:
 // CHECK-FIX-NEXT:    24406c:    e9 0c 40 f9     ldr     x9, [x7, #24]
 // CHECK-FIX-NEXT:    244070:    e6 97 ff 17     b       0x22a008
 // CHECK-FIX: <__CortexA53843419_22C004>:
 // CHECK-FIX-NEXT:    244074:    f6 12 40 f9     ldr     x22, [x23, #32]
 // CHECK-FIX-NEXT:    244078:    e4 9f ff 17     b       0x22c008
 // CHECK-FIX: <__CortexA53843419_22E000>:
 // CHECK-FIX-NEXT:    24407c:    f8 16 40 f9     ldr     x24, [x23, #40]
 // CHECK-FIX-NEXT:    244080:    e1 a7 ff 17     b       0x22e004
 // CHECK-FIX: <__CortexA53843419_230004>:
-// CHECK-FIX-NEXT:    244084:    02 00 40 f9     ldr     x2, [x0]
+// CHECK-FIX-NEXT:    244084:    02 08 40 f9     ldr     x2, [x0, #16]
 // CHECK-FIX-NEXT:    244088:    e0 af ff 17     b       0x230008
 // CHECK-FIX: <__CortexA53843419_232008>:
-// CHECK-FIX-NEXT:    24408c:    9b 07 00 f9     str     x27, [x28, #8]
+// CHECK-FIX-NEXT:    24408c:    9b 03 00 f9     str     x27, [x28]
 // CHECK-FIX-NEXT:    244090:    df b7 ff 17     b       0x23200c
 // CHECK-FIX: <__CortexA53843419_234004>:
-// CHECK-FIX-NEXT:    244094:    0e 0a 40 f9     ldr     x14, [x16, #16]
+// CHECK-FIX-NEXT:    244094:    0e 06 40 f9     ldr     x14, [x16, #8]
 // CHECK-FIX-NEXT:    244098:    dc bf ff 17     b       0x234008
 // CHECK-FIX: <__CortexA53843419_236004>:
 // CHECK-FIX-NEXT:    24409c:    0e 06 40 f9     ldr     x14, [x16, #8]
 // CHECK-FIX-NEXT:    2440a0:    da c7 ff 17     b       0x236008
 // CHECK-FIX: <__CortexA53843419_238004>:
 // CHECK-FIX-NEXT:    2440a4:    0e 06 40 f9     ldr     x14, [x16, #8]
 // CHECK-FIX-NEXT:    2440a8:    d8 cf ff 17     b       0x238008
 // CHECK-FIX: <__CortexA53843419_23A008>:
 // CHECK-FIX-NEXT:    2440ac:    0e 06 40 f9     ldr     x14, [x16, #8]
 // CHECK-FIX-NEXT:    2440b0:    d7 d7 ff 17     b       0x23a00c
 // CHECK-FIX: <__CortexA53843419_23C008>:
-// CHECK-FIX-NEXT:    2440b4:    ea 00 40 f9     ldr     x10, [x7]
+// CHECK-FIX-NEXT:    2440b4:    ea 08 40 f9     ldr     x10, [x7, #16]
 // CHECK-FIX-NEXT:    2440b8:    d5 df ff 17     b       0x23c00c
 // CHECK-FIX: <__CortexA53843419_23E008>:
 // CHECK-FIX-NEXT:    2440bc:    18 ff 3f f9     str     x24, [x24, #32760]
 // CHECK-FIX-NEXT:    2440c0:    d3 e7 ff 17     b       0x23e00c
 // CHECK-FIX: <__CortexA53843419_240000>:
 // CHECK-FIX-NEXT:    2440c4:    01 08 40 f9     ldr     x1, [x0, #16]
 // CHECK-FIX-NEXT:    2440c8:    cf ef ff 17     b       0x240004
 // CHECK-FIX: <__CortexA53843419_242000>:
 // CHECK-FIX-NEXT:    2440cc:    01 08 40 f9     ldr     x1, [x0, #16]
 // CHECK-FIX-NEXT:    2440d0:    cd f7 ff 17     b       0x242004
 // CHECK-FIX: <__CortexA53843419_244000>:
 // CHECK-FIX-NEXT:    2440d4:    01 08 40 f9     ldr     x1, [x0, #16]
 // CHECK-FIX-NEXT:    2440d8:    cb ff ff 17     b       0x244004
         .data
         .globl dat1
         .globl dat2
         .globl dat3
 dat1:   .quad 1
 dat2:   .quad 2
 dat3:   .quad 3

lld/test/ELF/aarch64-ifunc-bti.s

 # CHECK-NEXT:                   br      x17
 # CHECK-NEXT:                   nop
 # CHECK-NEXT:                   nop
 # CHECK-EMPTY:
 # CHECK: Disassembly of section .iplt:
 # CHECK-EMPTY:
 ## The address of ifunc1@plt does not escape so it does not need `bti c`,
 ## but having bti is not wrong.
-# CHECK-NEXT: 00000000000103e0 <.iplt>:
+# CHECK-NEXT: 00000000000103e0 <ifunc2>:
 # CHECK-NEXT:    103e0:         bti     c
 # CHECK-NEXT:                   adrp    x16, 0x30000
 # CHECK-NEXT:                   ldr     x17, [x16, #1360]
 # CHECK-NEXT:                   add     x16, x16, #1360
 # CHECK-NEXT:                   br      x17
 # CHECK-NEXT:                   nop
-# CHECK-EMPTY:
 ## The address of ifunc2 (STT_FUNC) escapes, so it must have `bti c`.
-# CHECK-NEXT: 00000000000103f8 <ifunc2>:
 # CHECK-NEXT:    103f8:         bti     c
 # CHECK-NEXT:                   adrp    x16, 0x30000
 # CHECK-NEXT:                   ldr     x17, [x16, #1368]
 # CHECK-NEXT:                   add     x16, x16, #1368
 # CHECK-NEXT:                   br      x17
 # CHECK-NEXT:                   nop
 
-# SHARED:      <.iplt>:
+# SHARED:      <ifunc2>:
 # SHARED-NEXT:    bti     c
 
-# SHARED:      <ifunc2>:
+# SHARED:         nop
 # SHARED-NEXT:    bti     c
 
 .section ".note.gnu.property", "a"
 .long 4
 .long 0x10
 .long 0x5
 .asciz "GNU"
 

lld/test/ELF/aarch64-thunk-pi.s

 // CHECK-NEXT:        8:       bl      0x20 <__AArch64ADRPThunk_high_target2>
 // CHECK-NEXT:        c:       bl      0x2c <__AArch64ADRPThunk_>
 // CHECK-NEXT:                 ret
 
 // Expect range extension thunks for .text_low
 // adrp calculation is (PC + signed immediate) & (!0xfff)
 // CHECK: <__AArch64ADRPThunk_high_target>:
 // CHECK-NEXT:       14:       adrp    x16, 0x10000000
-// CHECK-NEXT:                 add     x16, x16, #0x40
+// CHECK-NEXT:                 add     x16, x16, #0x50
 // CHECK-NEXT:                 br      x16
 // CHECK: <__AArch64ADRPThunk_high_target2>:
 // CHECK-NEXT:       20:       adrp    x16, 0x10000000
 // CHECK-NEXT:                 add     x16, x16, #0x8
 // CHECK-NEXT:                 br      x16
 /// Identical to the previous one, but for the target .text_high+8.
 // CHECK: <__AArch64ADRPThunk_>:
 // CHECK-NEXT:       2c:       adrp    x16, 0x10000000
 // CHECK-NEXT:                 add     x16, x16, #0x8
 // CHECK-NEXT:                 br      x16
 
 
  .section .text_high, "ax", %progbits
  .globl high_target
  .type high_target, %function
 high_target:
  // No thunk needed as we can reach low_target@plt
  bl low_target
  ret
 // CHECK: <high_target>:
-// CHECK-NEXT: 10000000:       bl 0x10000050 <low_target@plt>
+// CHECK-NEXT: 10000000:       bl 0x10000040 <low_target@plt>
 // CHECK-NEXT:                 ret
 
  .hidden high_target2
  .globl high_target2
  .type high_target2, %function
 high_target2:
  // Need thunk to low_target
  bl low_target2

 // CHECK-NEXT:                 adrp    x16, 0x10000000
 // CHECK-NEXT:                 ldr     x17, [x16, #0x1f8]
 // CHECK-NEXT:                 add     x16, x16, #0x1f8
 // CHECK-NEXT:                 br      x17
 // CHECK-NEXT:                 nop
 // CHECK-NEXT:                 nop
 // CHECK-NEXT:                 nop
 // CHECK-EMPTY:
-// CHECK-NEXT:   <high_target@plt>:
+// CHECK-NEXT:   <low_target@plt>:
 // CHECK-NEXT: 10000040:       adrp    x16, 0x10000000
 // CHECK-NEXT:                 ldr     x17, [x16, #0x200]
 // CHECK-NEXT:                 add     x16, x16, #0x200
 // CHECK-NEXT:                 br      x17
 // CHECK-EMPTY:
-// CHECK-NEXT:   <low_target@plt>:
+// CHECK-NEXT:   <high_target@plt>:
 // CHECK-NEXT: 10000050:       adrp    x16, 0x10000000
 // CHECK-NEXT:                 ldr     x17, [x16, #0x208]
 // CHECK-NEXT:                 add     x16, x16, #0x208
 // CHECK-NEXT:                 br      x17
 
 //--- lds
 PHDRS {
   low PT_LOAD FLAGS(0x1 | 0x4);
   high PT_LOAD FLAGS(0x1 | 0x4);
 }
 SECTIONS {
   .text_low : { *(.text_low) } :low
   .text_high 0x10000000 : { *(.text_high) } :high
 }

lld/test/ELF/arm-branch-undef-weak-plt-thunk.s

  .space 32 * 1024 * 1024
 
 // CHECK: Disassembly of section .text:
 // CHECK-EMPTY:
 // CHECK-NEXT: <_start>:
 // CHECK-NEXT:    201e4:       00 00 00 ea     b       0x201ec <__ARMv7ABSLongThunk_undefined_weak_we_expect_a_plt_entry_for>
 // CHECK-NEXT:    201e8:       02 00 00 eb     bl      0x201f8 <__ARMv7ABSLongThunk_bar2>
 // CHECK: <__ARMv7ABSLongThunk_undefined_weak_we_expect_a_plt_entry_for>:
-// CHECK-NEXT:    201ec:        30 c2 00 e3     movw    r12, #560
+// CHECK-NEXT:    201ec:        40 c2 00 e3     movw    r12, #576
 // CHECK-NEXT:    201f0:        02 c2 40 e3     movt    r12, #514
 // CHECK-NEXT:    201f4:        1c ff 2f e1     bx      r12
 // CHECK: <__ARMv7ABSLongThunk_bar2>:
-// CHECK-NEXT:    201f8:        40 c2 00 e3     movw    r12, #576
+// CHECK-NEXT:    201f8:        30 c2 00 e3     movw    r12, #560
 // CHECK-NEXT:    201fc:        02 c2 40 e3     movt    r12, #514
 // CHECK-NEXT:    20200:        1c ff 2f e1     bx      r12

lld/test/ELF/arm-gnu-ifunc.s

 
 // DISASM: Disassembly of section .text:
 // DISASM-EMPTY:
 // DISASM-NEXT: <foo>:
 // DISASM-NEXT:    20104:      bx      lr
 // DISASM: <bar>:
 // DISASM-NEXT:    20108:      bx      lr
 // DISASM: <_start>:
-// DISASM-NEXT:    2010c:      bl      0x20130
-// DISASM-NEXT:    20110:      bl      0x20140
+// DISASM-NEXT:    2010c:      bl      0x20140
+// DISASM-NEXT:    20110:      bl      0x20130
 // 1 * 65536 + 244 = 0x100f4 __rel_iplt_start
 // DISASM-NEXT:    20114:      movw    r0, #244
 // DISASM-NEXT:    20118:      movt    r0, #1
 // 1 * 65536 + 260 = 0x10104 __rel_iplt_end
 // DISASM-NEXT:    2011c:      movw    r0, #260
 // DISASM-NEXT:    20120:      movt    r0, #1
 // DISASM-EMPTY:
 // DISASM-NEXT: Disassembly of section .iplt:

lld/test/ELF/arm-thumb-interwork-thunk.s

 // CHECK-PI-ARM-NEXT: 134c: movt    r12, #0
 // CHECK-PI-ARM-NEXT: 1350: add     r12, r12, pc
 // CHECK-PI-ARM-NEXT: 1354: bx      r12
 
 /// All PLT entries are ARM, callers via PLT no need for interworking thunks.
 // CHECK-ARM-PLT: Disassembly of section .arm_caller:
 // CHECK-ARM-PLT-EMPTY:
 // CHECK-ARM-PLT-NEXT: <arm_caller>:
-// CHECK-ARM-PLT-NEXT: 1300:        bl      0x1650
-// CHECK-ARM-PLT-NEXT: 1304:        bl      0x1650
-// CHECK-ARM-PLT-NEXT: 1308:        b       0x1650
-// CHECK-ARM-PLT-NEXT: 130c:        b       0x1650
+// CHECK-ARM-PLT-NEXT: 1300:        bl      0x1630
+// CHECK-ARM-PLT-NEXT: 1304:        bl      0x1630
+// CHECK-ARM-PLT-NEXT: 1308:        b       0x1630
+// CHECK-ARM-PLT-NEXT: 130c:        b       0x1630
 // CHECK-ARM-PLT-NEXT: 1310:        b       0x1660
 // CHECK-ARM-PLT-NEXT: 1314:        b       0x1670
-// CHECK-ARM-PLT-NEXT: 1318:        b       0x1680
-// CHECK-ARM-PLT-NEXT: 131c:        beq     0x1690
-// CHECK-ARM-PLT-NEXT: 1320:        bne     0x16a0
+// CHECK-ARM-PLT-NEXT: 1318:        b       0x1640
+// CHECK-ARM-PLT-NEXT: 131c:        beq     0x1680
+// CHECK-ARM-PLT-NEXT: 1320:        bne     0x1690
 // CHECK-ARM-PLT-NEXT: 1324:        bx      lr
 
  .section .thumb_caller, "ax", %progbits
  .balign 0x100
  .thumb
  .globl thumb_caller
  .type thumb_caller, %function
 thumb_caller:

 // CHECK-PI-THUMB-NEXT: 1442: bx      r12
 
 /// Thumb calls need to change state to reach PLT
 /// bl can change to blx to PLT entries, branches
 /// need a state change thunk.
 // CHECK-ARM-PLT: Disassembly of section .thumb_caller:
 // CHECK-ARM-PLT-EMPTY:
 // CHECK-ARM-PLT-NEXT: <thumb_caller>:
-// CHECK-ARM-PLT-NEXT: 1400: blx     0x1680
-// CHECK-ARM-PLT-NEXT: 1404: blx     0x1680
+// CHECK-ARM-PLT-NEXT: 1400: blx     0x1640
+// CHECK-ARM-PLT-NEXT: 1404: blx     0x1640
 // CHECK-ARM-PLT-NEXT: 1408: b.w     0x1420 <__ThumbV7PILongThunk_arm_callee1>
 // CHECK-ARM-PLT-NEXT: 140c: b.w     0x142c <__ThumbV7PILongThunk_arm_callee2>
 // CHECK-ARM-PLT-NEXT: 1410: b.w     0x1438 <__ThumbV7PILongThunk_arm_callee3>
 // CHECK-ARM-PLT-NEXT: 1414: beq.w   0x1420 <__ThumbV7PILongThunk_arm_callee1>
 // CHECK-ARM-PLT-NEXT: 1418: beq.w   0x142c <__ThumbV7PILongThunk_arm_callee2>
 // CHECK-ARM-PLT-NEXT: 141c: bne.w   0x1438 <__ThumbV7PILongThunk_arm_callee3>
 
 /// Target Sections for thunks at a higher address than the callers.

 // CHECK-ARM-PLT-NEXT: 000016a0 <$a>:
 // CHECK-ARM-PLT-NEXT:     16a0:             add     r12, pc, #0, #12
 // CHECK-ARM-PLT-NEXT:     16a4:             add     r12, r12, #0, #20
 // CHECK-ARM-PLT-NEXT:     16a8:             ldr     pc, [r12, #564]!
 // CHECK-ARM-PLT-EMPTY:
 // CHECK-ARM-PLT-NEXT: 000016ac <$d>:
 // CHECK-ARM-PLT-NEXT:     16ac:     d4 d4 d4 d4     .word   0xd4d4d4d4
 
-// CHECK-DSO-REL:      0x18C0 R_ARM_JUMP_SLOT arm_caller
-// CHECK-DSO-REL-NEXT: 0x18C4 R_ARM_JUMP_SLOT thumb_caller
-// CHECK-DSO-REL-NEXT: 0x18C8 R_ARM_JUMP_SLOT thumb_callee1
+// CHECK-DSO-REL:      0x18C0 R_ARM_JUMP_SLOT thumb_callee1
+// CHECK-DSO-REL-NEXT: 0x18C4 R_ARM_JUMP_SLOT arm_callee1
+// CHECK-DSO-REL-NEXT: 0x18C8 R_ARM_JUMP_SLOT arm_caller
 // CHECK-DSO-REL-NEXT: 0x18CC R_ARM_JUMP_SLOT thumb_callee2
 // CHECK-DSO-REL-NEXT: 0x18D0 R_ARM_JUMP_SLOT thumb_callee3
-// CHECK-DSO-REL-NEXT: 0x18D4 R_ARM_JUMP_SLOT arm_callee1
-// CHECK-DSO-REL-NEXT: 0x18D8 R_ARM_JUMP_SLOT arm_callee2
-// CHECK-DSO-REL-NEXT: 0x18DC R_ARM_JUMP_SLOT arm_callee3
+// CHECK-DSO-REL-NEXT: 0x18D4 R_ARM_JUMP_SLOT arm_callee2
+// CHECK-DSO-REL-NEXT: 0x18D8 R_ARM_JUMP_SLOT arm_callee3
+// CHECK-DSO-REL-NEXT: 0x18DC R_ARM_JUMP_SLOT thumb_caller

lld/test/ELF/bsymbolic.s

 
 # REL_DEF:      .rela.dyn {
 # REL_DEF-NEXT:   R_X86_64_RELATIVE -
 # REL_DEF-NEXT:   R_X86_64_RELATIVE -
 # REL_DEF-NEXT:   R_X86_64_64 data_default
 # REL_DEF-NEXT: }
 # REL_DEF-NEXT: .rela.plt {
 # REL_DEF-NEXT:   R_X86_64_JUMP_SLOT default
+# REL_DEF-NEXT:   R_X86_64_JUMP_SLOT notype_default
 # REL_DEF-NEXT:   R_X86_64_JUMP_SLOT weak_default
 # REL_DEF-NEXT:   R_X86_64_JUMP_SLOT ext_default
-# REL_DEF-NEXT:   R_X86_64_JUMP_SLOT notype_default
 # REL_DEF-NEXT:   R_X86_64_JUMP_SLOT undef
 # REL_DEF-NEXT: }
 
 # ASM_DEF:      <_start>:
 # ASM_DEF-NEXT:   callq {{.*}} <default@plt>
 # ASM_DEF-NEXT:   callq {{.*}} <protected>
 # ASM_DEF-NEXT:   callq {{.*}} <hidden>
 # ASM_DEF-NEXT:   callq {{.*}} <weak_default@plt>
 # ASM_DEF-NEXT:   callq {{.*}} <ext_default@plt>
 # ASM_DEF-NEXT:   callq {{.*}} <notype_default@plt>
 # ASM_DEF-NEXT:   callq {{.*}} <undef@plt>
 
 # REL_GFUN:      .rela.dyn {
 # REL_GFUN-NEXT:   R_X86_64_RELATIVE -
 # REL_GFUN-NEXT:   R_X86_64_RELATIVE -
 # REL_GFUN-NEXT:   R_X86_64_64 data_default
 # REL_GFUN-NEXT: }
 # REL_GFUN-NEXT: .rela.plt {
-# REL_GFUN-NEXT:   R_X86_64_JUMP_SLOT weak_default
 # REL_GFUN-NEXT:   R_X86_64_JUMP_SLOT notype_default
+# REL_GFUN-NEXT:   R_X86_64_JUMP_SLOT weak_default
 # REL_GFUN-NEXT:   R_X86_64_JUMP_SLOT undef
 # REL_GFUN-NEXT: }
 
 # ASM_GFUN:      <_start>:
 # ASM_GFUN-NEXT:   callq {{.*}} <default>
 # ASM_GFUN-NEXT:   callq {{.*}} <protected>
 # ASM_GFUN-NEXT:   callq {{.*}} <hidden>
 # ASM_GFUN-NEXT:   callq {{.*}} <weak_default@plt>

lld/test/ELF/gnu-ifunc-i386.s

 // CHECK-NEXT:   Type: None
 // CHECK-NEXT:   Other [
 // CHECK-NEXT:     STV_HIDDEN
 // CHECK-NEXT:   ]
 // CHECK-NEXT:   Section: .rel.dyn
 // CHECK-NEXT: }
 // CHECK-NEXT: Symbol {
 // CHECK-NEXT:   Name: bar
-// CHECK-NEXT:   Value: 0x401110
+// CHECK-NEXT:   Value: 0x401100
 // CHECK-NEXT:   Size: 0
 // CHECK-NEXT:   Binding: Global
 // CHECK-NEXT:   Type: Function
 // CHECK-NEXT:   Other: 0
 // CHECK-NEXT:   Section: .iplt
 // CHECK-NEXT: }
 // CHECK-NEXT: Symbol {
 // CHECK-NEXT:   Name: bar_resolver
 // CHECK-NEXT:   Value: 0x4010E4
 // CHECK-NEXT:   Size: 0
 // CHECK-NEXT:   Binding: Global
 // CHECK-NEXT:   Type: Function
 // CHECK-NEXT:   Other: 0
 // CHECK-NEXT:   Section: .text
 // CHECK-NEXT: }
 // CHECK-NEXT: Symbol {
 // CHECK-NEXT:   Name: foo
-// CHECK-NEXT:   Value: 0x401100
+// CHECK-NEXT:   Value: 0x401110
 // CHECK-NEXT:   Size: 0
 // CHECK-NEXT:   Binding: Global
 // CHECK-NEXT:   Type: Function
 // CHECK-NEXT:   Other: 0
 // CHECK-NEXT:   Section: .iplt
 // CHECK-NEXT: }
 // CHECK-NEXT: Symbol {
 // CHECK-NEXT:   Name: foo_resolver

 
 // DISASM: Disassembly of section .text:
 // DISASM-EMPTY:
 // DISASM-NEXT: <bar_resolver>:
 // DISASM-NEXT:   4010e4:       retl
 // DISASM:      <foo_resolver>:
 // DISASM-NEXT:   4010e5:       retl
 // DISASM:      <_start>:
-// DISASM-NEXT:   4010e6:       calll 0x401100 <foo>
-// DISASM-NEXT:                 calll 0x401110 <bar>
+// DISASM-NEXT:   4010e6:       calll 0x401110 <foo>
+// DISASM-NEXT:                 calll 0x401100 <bar>
 // DISASM-NEXT:                 movl $4194516, %edx
 // DISASM-NEXT:                 movl $4194532, %edx
 // DISASM-EMPTY:
 // DISASM-NEXT: Disassembly of section .iplt:
 // DISASM-EMPTY:
-// DISASM-NEXT: <foo>:
+// DISASM-NEXT: <bar>:
 // DISASM-NEXT:   401100:       jmpl *4202784
 // DISASM-NEXT:                 pushl $0
 // DISASM-NEXT:                 jmp 0x0
-// DISASM:      <bar>:
+// DISASM:      <foo>:
 // DISASM-NEXT:   401110:       jmpl *4202788
 // DISASM-NEXT:                 pushl $8
 // DISASM-NEXT:                 jmp 0x0
 
 .type bar STT_GNU_IFUNC
 .globl bar
 bar:
 .type bar_resolver STT_FUNC

lld/test/ELF/ppc32-canonical-plt.s

 # REL-NEXT:     0x10030320 R_PPC_JMP_SLOT ifunc 0x0
 # REL-NEXT:   }
 # REL-NEXT: ]
 
 # SYM: .glink PROGBITS 1001022c
 
 ## st_value points to the canonical PLT entry in .glink
 # SYM: Symbol table '.dynsym'
-# SYM: 1001023c 0 FUNC GLOBAL DEFAULT UND func
-# SYM: 1001022c 0 FUNC GLOBAL DEFAULT UND func2
+# SYM: 1001022c 0 FUNC GLOBAL DEFAULT UND func
+# SYM: 1001023c 0 FUNC GLOBAL DEFAULT UND func2
 # SYM: 1001024c 0 FUNC GLOBAL DEFAULT UND ifunc
 # SYM: Symbol table '.symtab'
-# SYM: 1001023c 0 FUNC GLOBAL DEFAULT UND func
-# SYM: 1001022c 0 FUNC GLOBAL DEFAULT UND func2
+# SYM: 1001022c 0 FUNC GLOBAL DEFAULT UND func
+# SYM: 1001023c 0 FUNC GLOBAL DEFAULT UND func2
 # SYM: 1001024c 0 FUNC GLOBAL DEFAULT UND ifunc
 
 # HEX: 0x10030318 1001025c 10010260 10010264
 
 ## Canonical PLT entry of func2.
-## 0x1003031C = 65536*4099+796
+## 0x10030318 = 65536*4099+792
 # CHECK:      1001022c <.glink>:
 # CHECK-NEXT:           lis 11, 4099
-# CHECK-NEXT:           lwz 11, 796(11)
+# CHECK-NEXT:           lwz 11, 792(11)
 # CHECK-NEXT:           mtctr 11
 # CHECK-NEXT:           bctr
 
 ## Canonical PLT entry of func.
-## 0x10030318 = 65536*4099+792
+## 0x1003031C = 65536*4099+796
 # CHECK-NEXT: 1001023c: lis 11, 4099
-# CHECK-NEXT:           lwz 11, 792(11)
+# CHECK-NEXT:           lwz 11, 796(11)
 # CHECK-NEXT:           mtctr 11
 # CHECK-NEXT:           bctr
 
 ## Canonical PLT entry of ifunc.
 ## 0x10030320 = 65536*4099+800
 # CHECK-NEXT: 1001024c: lis 11, 4099
 # CHECK-NEXT:           lwz 11, 800(11)
 # CHECK-NEXT:           mtctr 11

lld/test/ELF/ppc32-ifunc-nonpreemptible-pic.s

 # REQUIRES: ppc
 # RUN: llvm-mc -filetype=obj -triple=powerpc %s -o %t.o
 # RUN: ld.lld -pie %t.o -o %t
 # RUN: llvm-readobj -r %t | FileCheck --check-prefix=RELOC %s
 # RUN: llvm-readelf -s %t | FileCheck --check-prefix=SYM %s
 # RUN: llvm-readelf -x .got2 %t | FileCheck --check-prefix=HEX %s
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
 
 # RELOC:      .rela.dyn {
-# RELOC-NEXT:   0x30254 R_PPC_RELATIVE - 0x101A8
-# RELOC-NEXT:   0x30258 R_PPC_IRELATIVE - 0x10188
+# RELOC-NEXT:   0x3024C R_PPC_RELATIVE - 0x101A0
+# RELOC-NEXT:   0x30250 R_PPC_IRELATIVE - 0x10188
 # RELOC-NEXT: }
 
-# SYM: 000101a8 0 FUNC GLOBAL DEFAULT {{.*}} func
-# HEX: 0x00030254 00000000
+# SYM: 000101a0 0 FUNC GLOBAL DEFAULT {{.*}} func
+# HEX:      Hex dump of section '.got2':
+# HEX-NEXT: 0x0003024c 00000000 ....
 
 .section .got2,"aw"
 .long func
 
 # CHECK:      Disassembly of section .text:
 # CHECK:      <.text>:
 # CHECK-NEXT: 10188: blr
 # CHECK:      <_start>:
-# CHECK-NEXT:   bl 0x10198
-# CHECK-NEXT:   lis 9, 1
-# CHECK-NEXT:   addi 9, 9, 424
+# CHECK-NEXT:   bl 0x10190
 # CHECK-EMPTY:
 # CHECK-NEXT: <00008000.got2.plt_pic32.func>:
 ## 0x10020114 = 65536*4098+276
 # CHECK-NEXT:   lwz 11, -32764(30)
 # CHECK-NEXT:   mtctr 11
 # CHECK-NEXT:   bctr
 # CHECK-NEXT:   nop
 
 .text
 .globl func
 .type func, @gnu_indirect_function
 func:
   blr
 
 .globl _start
 _start:
   bl func+0x8000@plt
-
-  lis 9, func@ha
-  la 9, func@l(9)

lld/test/ELF/ppc32-reloc-got.s

 # REQUIRES: ppc
 # RUN: llvm-mc -filetype=obj -triple=powerpc %s -o %t.o
 # RUN: echo '.globl b; b:' | llvm-mc -filetype=obj -triple=powerpc - -o %t1.o
 # RUN: ld.lld -shared %t1.o -soname=t1.so -o %t1.so
 
 # RUN: ld.lld %t.o %t1.so -o %t
 # RUN: llvm-readobj -r %t | FileCheck --check-prefix=RELOC %s
 # RUN: llvm-nm %t | FileCheck --check-prefix=NM %s
 # RUN: llvm-readobj -x .got %t | FileCheck --check-prefix=HEX %s
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
 
 ## Check we can handle R_PPC_GOT16, which may be generated by -fpic code.
 
 # SEC: .got PROGBITS 00020068 020068 000014
 
 # RELOC:      .rela.dyn {
-# RELOC-NEXT:   0x1002021C R_PPC_GLOB_DAT b 0x0
+# RELOC-NEXT:   0x10020218 R_PPC_GLOB_DAT b 0x0
 # RELOC-NEXT: }
 
 # NM: 10030220 d a
 
 ## The GOT slot of a can be filled at link time.
-# HEX: section '.got':
-# HEX: 0x1002020c {{[0-9a-f]+}} 00000000 00000000 10030220
+# HEX:      section '.got':
+# HEX:      0x1002020c 100201a4 00000000 00000000 00000000
+# HEX-NEXT: 0x1002021c {{[0-9a-f]+}}
 
-## a: &.got[3] - _GLOBAL_OFFSET_TABLE_ = 12
-## b: &.got[4] - _GLOBAL_OFFSET_TABLE_ = 16
-# CHECK: lwz 3, 12(30)
-# CHECK: lwz 4, 16(30)
+## a: &.got[4] - _GLOBAL_OFFSET_TABLE_ = 12
+## b: &.got[3] - _GLOBAL_OFFSET_TABLE_ = 16
+# CHECK: lwz 3, 16(30)
+# CHECK: lwz 4, 12(30)
 
 lwz 3,a@got(30)
 lwz 4,b@got(30)
 
 .data
 a:
 .long _GLOBAL_OFFSET_TABLE_

lld/test/ELF/ppc64-ifunc.s

 # RUN: ld.lld %t.o -o %t
 # RUN: llvm-readelf -s %t | FileCheck --check-prefix=SYM %s
 # RUN: llvm-readelf -S %t | FileCheck --check-prefix=SECTIONS %s
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
 # RUN: llvm-readobj -r %t | FileCheck --check-prefix=REL %s
 
 # SYM: Value            Size Type   Bind   Vis     Ndx
 # SYM: 0000000010028298    0 NOTYPE LOCAL  HIDDEN    4 .TOC.
-# SYM: 0000000010010288    0 FUNC   GLOBAL DEFAULT   3 ifunc1
+# SYM: 0000000010010268    0 FUNC   GLOBAL DEFAULT   3 ifunc1
 # SYM: 0000000010010210    0 IFUNC  GLOBAL DEFAULT   2 ifunc2
-# SYM: 0000000010010278    0 FUNC   GLOBAL DEFAULT   3 ifunc3
+# SYM: 0000000010010288    0 FUNC   GLOBAL DEFAULT   3 ifunc3
 
 # SECTIONS: .plt NOBITS 00000000100302a0 0002a0 000018 00 WA 0 0 8
 
 # __plt_ifunc - . = 0x10010218 - 0x10010208 = 16
 # __plt_ifunc2 - . = 0x1001022c - 0x10010210 = 28
 # CHECK: <_start>:
 # CHECK-NEXT:                 addis 2, 12, 2
 # CHECK-NEXT:                 addi 2, 2, -32636
 # CHECK-NEXT: 1001021c:       bl 0x10010240
 # CHECK-NEXT:                 ld 2, 24(1)
 # CHECK-NEXT: 10010224:       bl 0x10010254
 # CHECK-NEXT:                 ld 2, 24(1)
 # CHECK-NEXT:                 addis 3, 2, -2
-# CHECK-NEXT:                 addi 3, 3, 32752
+# CHECK-NEXT:                 addi 3, 3, 32720
 # CHECK-NEXT:                 addis 3, 2, -2
-# CHECK-NEXT:                 addi 3, 3, 32736
+# CHECK-NEXT:                 addi 3, 3, 32752
 
-# .plt[0] - .TOC. = 0x100302a0 - 0x10028298 = (1<<16) - 32760
+# .plt[1] - .TOC. = 0x100302a0+8 - 0x10028298 = (1<<16) - 32752
 # CHECK: <__plt_ifunc2>:
 # CHECK-NEXT:     std 2, 24(1)
 # CHECK-NEXT:     addis 12, 2, 1
-# CHECK-NEXT:     ld 12, -32760(12)
+# CHECK-NEXT:     ld 12, -32752(12)
 # CHECK-NEXT:     mtctr 12
 # CHECK-NEXT:     bctr
 
-# .plt[1] - .TOC. = 0x100302a0+8 - 0x10028298 = (1<<16) - 32752
+# .plt[2] - .TOC. = 0x100302a0+16 - 0x10028298 = (1<<16) - 32744
 # CHECK: <__plt_ifunc3>:
 # CHECK-NEXT:     std 2, 24(1)
 # CHECK-NEXT:     addis 12, 2, 1
-# CHECK-NEXT:     ld 12, -32752(12)
+# CHECK-NEXT:     ld 12, -32744(12)
 # CHECK-NEXT:     mtctr 12
 # CHECK-NEXT:     bctr
 # CHECK-EMPTY:
 
 ## .glink has 3 IPLT entries for ifunc1, ifunc2 and ifunc3.
 ## ifunc2 and ifunc3 have the same code sequence as their PLT call stubs.
 # CHECK:      Disassembly of section .glink:
 # CHECK-EMPTY:
-# CHECK-NEXT: 0000000010010268 <.glink>:
+# CHECK-NEXT: 0000000010010268 <ifunc1>:
 # CHECK-NEXT:     addis 12, 2, 1
 # CHECK-NEXT:     ld 12, -32760(12)
 # CHECK-NEXT:     mtctr 12
 # CHECK-NEXT:     bctr
-# CHECK-EMPTY:
-# CHECK-NEXT: 0000000010010278 <ifunc3>:
 # CHECK-NEXT:     addis 12, 2, 1
 # CHECK-NEXT:     ld 12, -32752(12)
 # CHECK-NEXT:     mtctr 12
 # CHECK-NEXT:     bctr
 # CHECK-EMPTY:
-# CHECK-NEXT: 0000000010010288 <ifunc1>:
+# CHECK-NEXT: 0000000010010288 <ifunc3>:
 # CHECK-NEXT:     addis 12, 2, 1
 # CHECK-NEXT:     ld 12, -32744(12)
 # CHECK-NEXT:     mtctr 12
 # CHECK-NEXT:     bctr
 
 ## Check that we emit 3 R_PPC64_IRELATIVE in .rela.dyn.
 # REL:      .rela.dyn {
 # REL-NEXT:   0x100302A0 R_PPC64_IRELATIVE - 0x10010210

lld/test/ELF/relocation-nocopy.s

 // REQUIRES: x86
 // RUN: llvm-mc -filetype=obj -triple=x86_64-pc-linux %s -o %t.o
 // RUN: llvm-mc -filetype=obj -triple=x86_64-pc-linux %p/Inputs/relocation-copy.s -o %t2.o
 // RUN: ld.lld -shared %t2.o -o %t.so
 // RUN: not ld.lld -z nocopyreloc %t.o %t.so -o /dev/null 2>&1 | FileCheck %s
 
 // CHECK: unresolvable relocation R_X86_64_32S against symbol 'x'
 // CHECK: unresolvable relocation R_X86_64_32S against symbol 'y'
 // CHECK: unresolvable relocation R_X86_64_32S against symbol 'z'
+// CHECK: unresolvable relocation R_X86_64_32 against symbol 'x'
+// CHECK: unresolvable relocation R_X86_64_32 against symbol 'y'
+// CHECK: unresolvable relocation R_X86_64_32 against symbol 'z'
 
 .text
 .global _start
 _start:
 movl $5, x
 movl $7, y
 movl $9, z
 movl $x, %edx
 movl $y, %edx
 movl $z, %edx

lld/test/ELF/riscv-reloc-got.s

 # RUN: llvm-nm %t | FileCheck --check-prefix=NM64 %s
 # RUN: llvm-readobj -x .got %t | FileCheck --check-prefix=HEX64 %s
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck --check-prefix=DIS64 %s
 
 # SEC32: .got PROGBITS         0001220c 00020c 00000c
 # SEC64: .got PROGBITS 0000000000012358 000358 000018
 
 # RELOC32:      .rela.dyn {
-# RELOC32-NEXT:   0x12214 R_RISCV_32 b 0x0
+# RELOC32-NEXT:   0x12210 R_RISCV_32 b 0x0
 # RELOC32-NEXT: }
 
 # RELOC64:      .rela.dyn {
-# RELOC64-NEXT:   0x12368 R_RISCV_64 b 0x0
+# RELOC64-NEXT:   0x12360 R_RISCV_64 b 0x0
 # RELOC64-NEXT: }
 
 # NM32: 00013218 d a
 # NM64: 0000000000013370 d a
 
 ## .got[0] = _DYNAMIC
 ## .got[1] = a (filled at link time)
 ## .got[2] = 0 (relocated by R_RISCV_64 at runtime)
 # HEX32: section '.got':
-# HEX32: 0x0001220c ac210100 18320100 00000000
+# HEX32: 0x0001220c ac210100 00000000 18320100 
 
 # HEX64: section '.got':
-# HEX64: 0x00012358 98220100 00000000 70330100 00000000
-# HEX64: 0x00012368 00000000 00000000
+# HEX64: 0x00012358 98220100 00000000 00000000 00000000
+# HEX64: 0x00012368 70330100 00000000
 
-## &.got[1]-. = 0x12210-0x1119c = 4096*1+116
+## &.got[2]-. = 0x12214-0x1119c = 4096*1+120
 # DIS32:      1119c: auipc a0, 1
-# DIS32-NEXT:        lw a0, 116(a0)
-## &.got[2]-. = 0x12214-0x111a4 = 4096*1+112
+# DIS32-NEXT:        lw a0, 120(a0)
+## &.got[1]-. = 0x12210-0x111a4 = 4096*1+108
 # DIS32:      111a4: auipc a0, 1
-# DIS32-NEXT:        lw a0, 112(a0)
+# DIS32-NEXT:        lw a0, 108(a0)
 
-## &.got[1]-. = 0x12360-0x11288 = 4096*1+216
+## &.got[2]-. = 0x12368-0x11288 = 4096*1+224
 # DIS64:      11288: auipc a0, 1
-# DIS64-NEXT:        ld a0, 216(a0)
-## &.got[2]-. = 0x12368-0x11290 = 4096*1+216
+# DIS64-NEXT:        ld a0, 224(a0)
+## &.got[1]-. = 0x12360-0x11290 = 4096*1+208
 # DIS64:      11290: auipc a0, 1
-# DIS64-NEXT:        ld a0, 216(a0)
+# DIS64-NEXT:        ld a0, 208(a0)
 
 la a0,a
 la a0,b
 
 .data
 a:
 ## An undefined reference of _GLOBAL_OFFSET_TABLE_ causes .got[0] to be
 ## allocated to store _DYNAMIC.
 .long _GLOBAL_OFFSET_TABLE_ - .

lld/test/ELF/symver.s

 ## Test the interaction with --wrap.
 
 ## The reference from ref.o is redirected. The reference from ref1.o is not.
 # RUN: ld.lld -shared --soname=t --version-script=%t/ver --wrap=foo %t/ref.o %t/ref1.o %t/def1.o %t/wrap.o -o %t.w1
 # RUN: llvm-readobj -r %t.w1 | FileCheck %s --check-prefix=W1REL
 # RUN: llvm-objdump -d --no-show-raw-insn %t.w1 | FileCheck %s --check-prefix=W1DIS
 
 # W1REL:      .rela.plt {
-# W1REL-NEXT:   R_X86_64_JUMP_SLOT __wrap_foo 0x0
 # W1REL-NEXT:   R_X86_64_JUMP_SLOT foo@@v1 0x0
+# W1REL-NEXT:   R_X86_64_JUMP_SLOT __wrap_foo 0x0
 # W1REL-NEXT: }
 
 # W1DIS-LABEL: <.text>:
 # W1DIS-NEXT:    callq {{.*}} <__wrap_foo@plt>
 # W1DIS-COUNT-3: int3
 # W1DIS-NEXT:    callq {{.*}} <foo@plt>
 
 ## The reference from ref.o is redirected. The reference from ref1.o is not.
 ## Note: this case demonstrates the typical behavior wrapping a glibc libc.so definition.
 # RUN: ld.lld -shared --soname=t --version-script=%t/ver --wrap=foo %t/ref.o %t/ref1.o %t/def1.so %t/wrap.o -o %t.w2
 # RUN: llvm-readobj -r %t.w2 | FileCheck %s --check-prefix=W2REL
 # RUN: llvm-objdump -d --no-show-raw-insn %t.w2 | FileCheck %s --check-prefix=W2DIS
 
 # W2REL:      .rela.plt {
-# W2REL-NEXT:   R_X86_64_JUMP_SLOT __wrap_foo 0x0
 # W2REL-NEXT:   R_X86_64_JUMP_SLOT foo@v1 0x0
+# W2REL-NEXT:   R_X86_64_JUMP_SLOT __wrap_foo 0x0
 # W2REL-NEXT: }
 
 # W2DIS-LABEL: <.text>:
 # W2DIS-NEXT:    callq {{.*}} <__wrap_foo@plt>
 # W2DIS-COUNT-3: int3
 # W2DIS-NEXT:    callq {{.*}} <foo@plt>
 
 ## Test --wrap on @ and @@.

lld/test/ELF/version-script-symver.s

 # MIX2-NEXT: [[#]] foo2@@v1
 # MIX2-NEXT: [[#]] foo4@@v2
 # MIX2-NEXT: [[#]] foo3@v1
 # MIX2-NOT:  {{.}}
 
 # RUN: ld.lld --version-script %t4.script -shared %t.o %tref.o -o %t5.so
 # RUN: llvm-readelf -r %t5.so | FileCheck --check-prefix=RELOC %s
 
-# RELOC: R_X86_64_JUMP_SLOT {{.*}} foo3@v1 + 0
 # RELOC: R_X86_64_JUMP_SLOT {{.*}} foo4@@v2 + 0
+# RELOC: R_X86_64_JUMP_SLOT {{.*}} foo3@v1 + 0
 
 .globl foo1; foo1: ret
 .globl foo2; foo2: ret
 .globl foo3; .symver foo3,foo3@v1; foo3: ret
 .globl foo4; .symver foo4,foo4@@v2; foo4: ret
 
 .globl _start; _start: ret

lld/test/ELF/wrap-no-real.s

 // REQUIRES: x86
 // RUN: llvm-mc -filetype=obj -triple=x86_64-pc-linux %s -o %t1.o
 // RUN: llvm-mc -filetype=obj -triple=x86_64-pc-linux %p/Inputs/wrap-no-real.s -o %t2.o
 // RUN: llvm-mc -filetype=obj -triple=x86_64-pc-linux %p/Inputs/wrap-no-real2.s -o %t3.o
 // RUN: ld.lld -o %t3.so -shared --soname=t3 %t3.o
 
 // RUN: ld.lld -o %t %t1.o %t2.o -wrap foo
 // RUN: llvm-objdump -d %t | FileCheck %s
 // RUN: llvm-readelf -s -x .got %t | FileCheck --check-prefix=READELF --implicit-check-not=__real_ %s
 
 // CHECK: <_start>:
-// CHECK-NEXT: movq {{.*}}(%rip), %rax  # 0x2021a8
-// CHECK-NEXT: movq {{.*}}(%rip), %rbx  # 0x2021a8
-// CHECK-NEXT: movq {{.*}}(%rip), %rcx  # 0x2021b0
+// CHECK-NEXT: movq {{.*}}(%rip), %rax  # 0x2021b0
+// CHECK-NEXT: movq {{.*}}(%rip), %rbx  # 0x2021b0
+// CHECK-NEXT: movq {{.*}}(%rip), %rcx  # 0x2021a8
 
 // READELF:      0000000000011000  0 NOTYPE GLOBAL DEFAULT ABS foo
 // READELF:      0000000000011010  0 NOTYPE GLOBAL DEFAULT ABS __wrap_foo
 // READELF:      Hex dump of section '.got':
-// READELF-NEXT: 0x[[#%x,ADDR:]] 10100100 00000000 00100100 00000000
+// READELF-NEXT: 0x[[#%x,ADDR:]] 00100100 00000000 10100100 00000000
 
 // RUN: ld.lld -o %t2 %t1.o %t2.o %t3.so --wrap foo
 // RUN: llvm-objdump -d %t2 | FileCheck --check-prefix=CHECK2 %s
 // RUN: llvm-readelf -s -x .got %t2 | FileCheck --check-prefix=READELF --implicit-check-not=__real_ %s
 
 // CHECK2: <_start>:
-// CHECK2-NEXT: movq {{.*}}(%rip), %rax  # 0x2022e0
-// CHECK2-NEXT: movq {{.*}}(%rip), %rbx  # 0x2022e0
-// CHECK2-NEXT: movq {{.*}}(%rip), %rcx  # 0x2022e8
+// CHECK2-NEXT: movq {{.*}}(%rip), %rax  # 0x2022e8
+// CHECK2-NEXT: movq {{.*}}(%rip), %rbx  # 0x2022e8
+// CHECK2-NEXT: movq {{.*}}(%rip), %rcx  # 0x2022e0
 
 .global _start
 _start:
   mov foo@gotpcrel(%rip), %rax
   mov __wrap_foo@gotpcrel(%rip), %rbx
   mov __real_foo@gotpcrel(%rip), %rcx

lld/test/ELF/wrap-plt.s

 // REQUIRES: x86
 
 /// Test we correctly wrap PLT calls.
 
 // RUN: llvm-mc -filetype=obj -triple=x86_64-pc-linux %s -o %t
 
 // RUN: ld.lld -o %t2 %t -wrap foo -shared
 // RUN: llvm-readobj -S -r %t2 | FileCheck %s
 // RUN: llvm-objdump -d %t2 | FileCheck --check-prefix=DISASM %s
 
 // CHECK:      Relocations [
 // CHECK-NEXT:   Section ({{.*}}) .rela.plt {
-// CHECK-NEXT:     R_X86_64_JUMP_SLOT __wrap_foo 0x0
 // CHECK-NEXT:     R_X86_64_JUMP_SLOT foo 0x0
+// CHECK-NEXT:     R_X86_64_JUMP_SLOT __wrap_foo 0x0
 // CHECK-NEXT:     R_X86_64_JUMP_SLOT _start 0x0
 // CHECK-NEXT:   }
 // CHECK-NEXT: ]
 
 // DISASM:      <_start>:
 // DISASM-NEXT:   jmp {{.*}} <__wrap_foo@plt>
 // DISASM-NEXT:   jmp {{.*}} <__wrap_foo@plt>
 // DISASM-NEXT:   jmp {{.*}} <foo@plt>

lld/test/ELF/x86-64-gotpc-relax-und-dso.s

 # 0x1025 + 7 - 43 = 0x1001
 # DISASM:      Disassembly of section .text:
 # DISASM-EMPTY:
 # DISASM-NEXT: <foo>:
 # DISASM-NEXT:     nop
 # DISASM:      <hid>:
 # DISASM-NEXT:     nop
 # DISASM:      <_start>:
-# DISASM-NEXT:    movq    4367(%rip), %rax
-# DISASM-NEXT:    movq    4360(%rip), %rax
-# DISASM-NEXT:    movq    4361(%rip), %rax
-# DISASM-NEXT:    movq    4354(%rip), %rax
+# DISASM-NEXT:    movq    4375(%rip), %rax
+# DISASM-NEXT:    movq    4368(%rip), %rax
+# DISASM-NEXT:    movq    4369(%rip), %rax
+# DISASM-NEXT:    movq    4362(%rip), %rax
 # DISASM-NEXT:    leaq    -36(%rip), %rax
 # DISASM-NEXT:    leaq    -43(%rip), %rax
-# DISASM-NEXT:    movq    4341(%rip), %rax
-# DISASM-NEXT:    movq    4334(%rip), %rax
-# DISASM-NEXT:    movq    4311(%rip), %rax
-# DISASM-NEXT:    movq    4304(%rip), %rax
-# DISASM-NEXT:    movq    4305(%rip), %rax
-# DISASM-NEXT:    movq    4298(%rip), %rax
+# DISASM-NEXT:    movq    4325(%rip), %rax
+# DISASM-NEXT:    movq    4318(%rip), %rax
+# DISASM-NEXT:    movq    4319(%rip), %rax
+# DISASM-NEXT:    movq    4312(%rip), %rax
+# DISASM-NEXT:    movq    4313(%rip), %rax
+# DISASM-NEXT:    movq    4306(%rip), %rax
 # DISASM-NEXT:    leaq    -92(%rip), %rax
 # DISASM-NEXT:    leaq    -99(%rip), %rax
-# DISASM-NEXT:    movq    4285(%rip), %rax
-# DISASM-NEXT:    movq    4278(%rip), %rax
+# DISASM-NEXT:    movq    4269(%rip), %rax
+# DISASM-NEXT:    movq    4262(%rip), %rax
 
 .text
 .globl foo
 .type foo, @function
 foo:
  nop
 
 .globl hid

lld/test/ELF/x86-64-plt.s

 # REQUIRES: x86
 # RUN: llvm-mc -filetype=obj -triple=x86_64 %s -o %t.o
 # RUN: llvm-mc -filetype=obj -triple=x86_64 %p/Inputs/shared.s -o %t2.o
 # RUN: ld.lld -shared -soname=t2 %t2.o -o %t2.so
 
 # RUN: ld.lld %t.o %t2.so -o %t
 # RUN: ld.lld -shared %t.o %t2.so -o %t.so
 # RUN: llvm-readelf -S -r %t | FileCheck %s --check-prefix=CHECK1
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s --check-prefixes=DISASM,DISASM1
 # RUN: llvm-readelf -S -r %t.so | FileCheck %s --check-prefix=CHECK2
 # RUN: llvm-objdump -d --no-show-raw-insn %t.so | FileCheck %s --check-prefixes=DISASM,DISASM2
 
 # CHECK1:      Name      Type     Address          Off    Size   ES Flg Lk Inf Al
 # CHECK1:      .plt      PROGBITS 00000000002012e0 0002e0 000030 00 AX   0   0 16
 # CHECK1:      .got.plt  PROGBITS 00000000002033e0 0003e0 000028 00 WA   0   0  8
 # CHECK1:      Relocation section '.rela.plt' at offset {{.*}} contains 2 entries:
-# CHECK1:      00000000002033f8 {{.*}} R_X86_64_JUMP_SLOT 0000000000000000 bar + 0
-# CHECK1-NEXT: 0000000000203400 {{.*}} R_X86_64_JUMP_SLOT 0000000000000000 weak + 0
+# CHECK1:      00000000002033f8 {{.*}} R_X86_64_JUMP_SLOT 0000000000000000 weak + 0
+# CHECK1-NEXT: 0000000000203400 {{.*}} R_X86_64_JUMP_SLOT 0000000000000000 bar + 0
 
 # CHECK2:      Name      Type     Address          Off    Size   ES Flg Lk Inf Al
 # CHECK2:      .plt      PROGBITS 0000000000001310 000310 000030 00 AX   0   0 16
 # CHECK2:      .got.plt  PROGBITS 0000000000003400 000400 000028 00 WA   0   0  8
 # CHECK2:      Relocation section '.rela.plt' at offset {{.*}} contains 2 entries:
-# CHECK2:      0000000000003418 {{.*}} R_X86_64_JUMP_SLOT 0000000000000000 bar + 0
-# CHECK2-NEXT: 0000000000003420 {{.*}} R_X86_64_JUMP_SLOT 0000000000000000 weak + 0
+# CHECK2:      0000000000003418 {{.*}} R_X86_64_JUMP_SLOT 0000000000000000 weak + 0
+# CHECK2-NEXT: 0000000000003420 {{.*}} R_X86_64_JUMP_SLOT 0000000000000000 bar + 0
 
 # DISASM:       <_start>:
 # DISASM-NEXT:    callq {{.*}} <local>
 # DISASM-NEXT:    callq {{.*}} <bar@plt>
 # DISASM-NEXT:    jmp   {{.*}} <bar@plt>
 # DISASM-NEXT:    jmp   {{.*}} <weak@plt>
 
 # DISASM1:      Disassembly of section .plt:
 # DISASM1-EMPTY:
 # DISASM1-NEXT: <.plt>:
 # DISASM1-NEXT: 2012e0:     pushq 8450(%rip)  # 0x2033e8
 # DISASM1-NEXT:             jmpq *8452(%rip)  # 0x2033f0
 # DISASM1-NEXT:             nopl (%rax)
 # DISASM1-EMPTY:
-# DISASM1-NEXT: <bar@plt>:
+# DISASM1-NEXT: <weak@plt>:
 # DISASM1-NEXT: 2012f0:     jmpq *8450(%rip)  # 0x2033f8
 # DISASM1-NEXT:             pushq $0
 # DISASM1-NEXT:             jmp 0x2012e0 <.plt>
 # DISASM1-EMPTY:
-# DISASM1-NEXT: <weak@plt>:
+# DISASM1-NEXT: <bar@plt>:
 # DISASM1-NEXT: 201300:     jmpq *8442(%rip)  # 0x203400
 # DISASM1-NEXT:             pushq $1
 # DISASM1-NEXT:             jmp 0x2012e0 <.plt>
 # DISASM1-NOT:  {{.}}
 
 # DISASM2:      Disassembly of section .plt:
 # DISASM2-EMPTY:
 # DISASM2-NEXT: <.plt>:
 # DISASM2-NEXT:   1310:     pushq 8434(%rip)  # 0x3408
 # DISASM2-NEXT:             jmpq *8436(%rip)  # 0x3410
 # DISASM2-NEXT:             nopl (%rax)
 # DISASM2-EMPTY:
-# DISASM2-NEXT: <bar@plt>:
+# DISASM2-NEXT: <weak@plt>:
 # DISASM2-NEXT:   1320:     jmpq *8434(%rip)  # 0x3418
 # DISASM2-NEXT:             pushq $0
 # DISASM2-NEXT:             jmp 0x1310 <.plt>
 # DISASM2-EMPTY:
-# DISASM2-NEXT: <weak@plt>:
+# DISASM2-NEXT: <bar@plt>:
 # DISASM2-NEXT:   1330:     jmpq *8426(%rip)  # 0x3420
 # DISASM2-NEXT:             pushq $1
 # DISASM2-NEXT:             jmp 0x1310 <.plt>
 # DISASM2-NOT:  {{.}}
 
 .global _start
 .weak weak
 

lld/test/ELF/x86-x32-plt.s

 # REQUIRES: x86
 # RUN: llvm-mc -filetype=obj -triple=x86_64-gnux32 %s -o %t.o
 # RUN: llvm-mc -filetype=obj -triple=x86_64-gnux32 %p/Inputs/shared.s -o %t2.o
 # RUN: ld.lld -shared -soname=t2 %t2.o -o %t2.so
 
 # RUN: ld.lld %t.o %t2.so -o %t
 # RUN: llvm-readelf -S -r %t | FileCheck %s
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s --check-prefixes=DISASM
 
 # CHECK:      Name      Type     Address          Off    Size   ES Flg Lk Inf Al
 # CHECK:      .plt      PROGBITS 002011e0 0001e0 000030 00 AX   0   0 16
 # CHECK:      .got.plt  PROGBITS 00203278 000278 000028 00 WA   0   0  8
 # CHECK:      Relocation section '.rela.plt' at offset {{.*}} contains 2 entries:
-# CHECK:      00203290 {{.*}} R_X86_64_JUMP_SLOT 00000000 bar + 0
-# CHECK-NEXT: 00203298 {{.*}} R_X86_64_JUMP_SLOT 00000000 weak + 0
+# CHECK:      00203290 {{.*}} R_X86_64_JUMP_SLOT 00000000 weak + 0
+# CHECK-NEXT: 00203298 {{.*}} R_X86_64_JUMP_SLOT 00000000 bar + 0
 
 # DISASM:       <_start>:
 # DISASM-NEXT:    callq {{.*}} <local>
 # DISASM-NEXT:    callq {{.*}} <bar@plt>
 # DISASM-NEXT:    jmp   {{.*}} <bar@plt>
 # DISASM-NEXT:    jmp   {{.*}} <weak@plt>
 
 # DISASM:      Disassembly of section .plt:
 # DISASM-EMPTY:
 # DISASM-NEXT: <.plt>:
 # DISASM-NEXT: 2011e0:     pushq 8346(%rip)  # 0x203280
 # DISASM-NEXT:             jmpq *8348(%rip)  # 0x203288
 # DISASM-NEXT:             nopl (%rax)
 # DISASM-EMPTY:
-# DISASM-NEXT: <bar@plt>:
+# DISASM-NEXT: <weak@plt>:
 # DISASM-NEXT: 2011f0:     jmpq *8346(%rip)  # 0x203290
 # DISASM-NEXT:             pushq $0
 # DISASM-NEXT:             jmp 0x2011e0 <.plt>
 # DISASM-EMPTY:
-# DISASM-NEXT: <weak@plt>:
+# DISASM-NEXT: <bar@plt>:
 # DISASM-NEXT: 201200:     jmpq *8338(%rip)  # 0x203298
 # DISASM-NEXT:             pushq $1
 # DISASM-NEXT:             jmp 0x2011e0 <.plt>
 # DISASM-NOT:  {{.}}
 
 .global _start
 .weak weak