[PowerPC] FP compare and test XL compat builtins.

[quinnp]

Summary

This patch is in a series of patches to provide builtins for
compatability with the XL compiler. This patch adds builtins for compare
exponent and test data class operations on floating point values.

[quinnp]

Adding SemaChecking for the first argument of __builitn_ppc_test_data_class so the llvm_unreachable in CGBuiltin is actually unreachable.

[Conanap]

clang/lib/Sema/SemaChecking.cpp

3492

If you're making a function anyways, it may be a good idea to just have a function with all the sema checking in it

[lei]

clang/lib/Sema/SemaChecking.cpp

3542

I don't think this need to be function in the Sema class. It can just be a static function.

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

10381

I think it'll be more clear if you move ppc_test_data-* handling out of this case stmt and move them into their own since they don't use the same CmprOpc or Op[1|2] as the other instrinsics.

[kamaub]

clang/lib/Sema/SemaChecking.cpp

3542

This is a great suggestion, I'm wondering if the function is even needed at all though since the code block is quite small and only called once, having it inside the case statement seems more readable to me.

[quinnp]

Separating the switch case in ISelLowering into two switch cases. One for compare_exp_ and another for test_data_class.

[quinnp]

Moving the semachecking of test_data_class from the function to the switch case.

[lei]

clang/include/clang/Sema/Sema.h

12680 ↗

(On Diff #374312)

need to remove.

clang/lib/CodeGen/CGBuiltin.cpp

16081–16082

ArgValue is only used one so not needed.

llvm::Type *ArgType = EmitScalarExpr(E->getArg(0))->getType();

16083

variables should be discriptive of what they represent. This is no diff then a single char variable 🙂

unsigned IntrinsicID;

16084

braces here are redundant.

16092

Try to refrain from def one-time use variables.

return Builder.CreateCall(CGM.getIntrinsic(Int), Ops, "test_data_class");

clang/lib/Sema/SemaChecking.cpp

3494

I'm not sure this is needed... can't we just return true here since this is a S error?

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

10382–10383

I dont' think this is needed since you will only be here if he IntrinsicID matches the lines listed prior to this block.

10397–10398

one time used variables can be removed.

10408–10417

this can just be an if/else since you won't be in this block unless the IntrisicID are ppc_test_data_class_[d|f]

unsigned CmprOpc = PPC::XSTSTDCDP;
if (IntrinsicID == Intrinsic::ppc_test_data_class_f)
  CmprOpc = PPC::XSTSTDCSP;

10419

one-time use variable. Can be merged into the call below.

[quinnp]

Addressing some review comments.

[quinnp]

Addressing review comment about ISelLowering of test_data_class.

[lei]

LGTM
Pleases address nit on commit.

clang/lib/Sema/SemaChecking.cpp

3497–3498

nit: I think these 2 stmts can just be merged into return Diag(....); and brace removed.

[quinnp]

Addressing nit in SemaChecking.

[quinnp]

Rebase with main.

clang/include/clang/Basic/BuiltinsPPC.def

 BUILTIN(__builtin_ppc_fctiw, "dd", "")
 BUILTIN(__builtin_ppc_fctiwz, "dd", "")
 BUILTIN(__builtin_ppc_fctudz, "dd", "")
 BUILTIN(__builtin_ppc_fctuwz, "dd", "")
 BUILTIN(__builtin_ppc_swdiv_nochk, "ddd", "")
 BUILTIN(__builtin_ppc_swdivs_nochk, "fff", "")
 BUILTIN(__builtin_ppc_alignx, "vIivC*", "nc")
 BUILTIN(__builtin_ppc_rdlam, "UWiUWiUWiUWIi", "nc")
+BUILTIN(__builtin_ppc_compare_exp_uo, "idd", "")
+BUILTIN(__builtin_ppc_compare_exp_lt, "idd", "")
+BUILTIN(__builtin_ppc_compare_exp_gt, "idd", "")
+BUILTIN(__builtin_ppc_compare_exp_eq, "idd", "")
+BUILTIN(__builtin_ppc_test_data_class, "idIi", "t")
 // Compare
 BUILTIN(__builtin_ppc_cmpeqb, "LLiLLiLLi", "")
 BUILTIN(__builtin_ppc_cmprb, "iCIiii", "")
 BUILTIN(__builtin_ppc_setb, "LLiLLiLLi", "")
 BUILTIN(__builtin_ppc_cmpb, "LLiLLiLLi", "")
 // Multiply
 BUILTIN(__builtin_ppc_mulhd, "LLiLiLi", "")
 BUILTIN(__builtin_ppc_mulhdu, "ULLiULiULi", "")

clang/include/clang/Basic/DiagnosticSemaKinds.td

 def err_mips_builtin_requires_dsp : Error<
   "this builtin requires 'dsp' ASE, please use -mdsp">;
 def err_mips_builtin_requires_dspr2 : Error<
   "this builtin requires 'dsp r2' ASE, please use -mdspr2">;
 def err_mips_builtin_requires_msa : Error<
   "this builtin requires 'msa' ASE, please use -mmsa">;
 def err_ppc_builtin_only_on_arch : Error<
   "this builtin is only valid on POWER%0 or later CPUs">;
+def err_ppc_builtin_requires_vsx : Error<
+  "this builtin requires VSX to be enabled">;
 def err_ppc_invalid_use_mma_type : Error<
   "invalid use of PPC MMA type">;
+def err_ppc_invalid_test_data_class_type : Error<
+  "expected a 'float' or 'double' for the first argument">;
 def err_x86_builtin_invalid_rounding : Error<
   "invalid rounding argument">;
 def err_x86_builtin_invalid_scale : Error<
   "scale argument must be 1, 2, 4, or 8">;
 def err_x86_builtin_tile_arg_duplicate : Error<
   "tile arguments must refer to different tiles">;
 
 def err_builtin_target_unsupported : Error<

clang/lib/Basic/Targets/PPC.cpp

static void defineXLCompatMacros(MacroBuilder &Builder) {
   Builder.defineMacro("__fsel", "__builtin_ppc_fsel");
   Builder.defineMacro("__fsels", "__builtin_ppc_fsels");
   Builder.defineMacro("__frsqrte", "__builtin_ppc_frsqrte");
   Builder.defineMacro("__frsqrtes", "__builtin_ppc_frsqrtes");
   Builder.defineMacro("__fsqrt", "__builtin_ppc_fsqrt");
   Builder.defineMacro("__fsqrts", "__builtin_ppc_fsqrts");
   Builder.defineMacro("__addex", "__builtin_ppc_addex");
   Builder.defineMacro("__cmplxl", "__builtin_complex");
+  Builder.defineMacro("__compare_exp_uo", "__builtin_ppc_compare_exp_uo");
+  Builder.defineMacro("__compare_exp_lt", "__builtin_ppc_compare_exp_lt");
+  Builder.defineMacro("__compare_exp_gt", "__builtin_ppc_compare_exp_gt");
+  Builder.defineMacro("__compare_exp_eq", "__builtin_ppc_compare_exp_eq");
+  Builder.defineMacro("__test_data_class", "__builtin_ppc_test_data_class");
 }
 
 /// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
 /// #defines that are not tied to a specific subtarget.
 void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
                                      MacroBuilder &Builder) const {
 
   defineXLCompatMacros(Builder);

clang/lib/CodeGen/CGBuiltin.cpp

return RValue::get(emitUnaryMaybeConstrainedFPBuiltin(
                            Intrinsic::experimental_constrained_trunc))
         .getScalarVal();
   case PPC::BI__builtin_ppc_fsqrt:
   case PPC::BI__builtin_ppc_fsqrts:
     return RValue::get(emitUnaryMaybeConstrainedFPBuiltin(
                            *this, E, Intrinsic::sqrt,
                            Intrinsic::experimental_constrained_sqrt))
         .getScalarVal();
+  case PPC::BI__builtin_ppc_test_data_class:
+    llvm::Type *ArgType = EmitScalarExpr(E->getArg(0))->getType();
+    unsigned IntrinsicID;
+    if (ArgType->isDoubleTy())
+      IntrinsicID = Intrinsic::ppc_test_data_class_d;
+    else if (ArgType->isFloatTy())
+      IntrinsicID = Intrinsic::ppc_test_data_class_f;
+    else
+      llvm_unreachable("Invalid Argument Type");
+    return Builder.CreateCall(CGM.getIntrinsic(IntrinsicID), Ops,
+                              "test_data_class");
   }
 }
 
 namespace {
 // If \p E is not null pointer, insert address space cast to match return
 // type of \p E if necessary.
 Value *EmitAMDGPUDispatchPtr(CodeGenFunction &CGF,
                              const CallExpr *E = nullptr) {
   auto *F = CGF.CGM.getIntrinsic(Intrinsic::amdgcn_dispatch_ptr);
   auto *Call = CGF.Builder.CreateCall(F);

clang/lib/Sema/SemaChecking.cpp

bool Sema::CheckPPCBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID,
   case PPC::BI__builtin_darn_raw:
   case PPC::BI__builtin_darn_32:
     return SemaFeatureCheck(*this, TheCall, "isa-v30-instructions",
                             diag::err_ppc_builtin_only_on_arch, "9");
   case PPC::BI__builtin_vsx_xxgenpcvbm:
   case PPC::BI__builtin_vsx_xxgenpcvhm:
   case PPC::BI__builtin_vsx_xxgenpcvwm:
   case PPC::BI__builtin_vsx_xxgenpcvdm:
     return SemaBuiltinConstantArgRange(TheCall, 1, 0, 3);
+  case PPC::BI__builtin_ppc_compare_exp_uo:
+  case PPC::BI__builtin_ppc_compare_exp_lt:
+  case PPC::BI__builtin_ppc_compare_exp_gt:
+  case PPC::BI__builtin_ppc_compare_exp_eq:
+    return SemaFeatureCheck(*this, TheCall, "isa-v30-instructions",
+                            diag::err_ppc_builtin_only_on_arch, "9") ||
+           SemaFeatureCheck(*this, TheCall, "vsx",
+                            diag::err_ppc_builtin_requires_vsx);
+  case PPC::BI__builtin_ppc_test_data_class: {
+    // Check if the first argument of the __builtin_ppc_test_data_class call is
+    // valid. The argument must be either a 'float' or a 'double'.
+    QualType ArgType = TheCall->getArg(0)->getType();
+    if (ArgType != QualType(Context.FloatTy) &&
+        ArgType != QualType(Context.DoubleTy))
+      return Diag(TheCall->getBeginLoc(),
+                  diag::err_ppc_invalid_test_data_class_type);
+    return SemaFeatureCheck(*this, TheCall, "isa-v30-instructions",
+                            diag::err_ppc_builtin_only_on_arch, "9") ||
+           SemaFeatureCheck(*this, TheCall, "vsx",
+                            diag::err_ppc_builtin_requires_vsx) ||
+           SemaBuiltinConstantArgRange(TheCall, 1, 0, 127);
+  }
 #define CUSTOM_BUILTIN(Name, Intr, Types, Acc) \
   case PPC::BI__builtin_##Name: \
     return SemaBuiltinPPCMMACall(TheCall, Types);
 #include "clang/Basic/BuiltinsPPC.def"
   }
   return SemaBuiltinConstantArgRange(TheCall, i, l, u);
 }
 
#include "clang/Basic/PPCTypes.def"
     Diag(TypeLoc, diag::err_ppc_invalid_use_mma_type);
     return true;
   }
   return false;
 }
 
 bool Sema::CheckAMDGCNBuiltinFunctionCall(unsigned BuiltinID,
                                           CallExpr *TheCall) {
   // position of memory order and scope arguments in the builtin
   unsigned OrderIndex, ScopeIndex;
   switch (BuiltinID) {
   case AMDGPU::BI__builtin_amdgcn_atomic_inc32:
   case AMDGPU::BI__builtin_amdgcn_atomic_inc64:
   case AMDGPU::BI__builtin_amdgcn_atomic_dec32:
   case AMDGPU::BI__builtin_amdgcn_atomic_dec64:
     OrderIndex = 2;
     ScopeIndex = 3;

clang/test/CodeGen/builtins-ppc-xlcompat-pwr9-error.c

 // REQUIRES: powerpc-registered-target
 // RUN: %clang_cc1 -triple powerpc64-unknown-unknown -target-cpu pwr9 \
 // RUN:   -fsyntax-only -Wall -Werror -verify %s
 // RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -target-cpu pwr9 \
 // RUN:   -fsyntax-only -Wall -Werror -verify %s
 // RUN: %clang_cc1 -triple powerpc64-unknown-aix -target-cpu pwr9 \
 // RUN:   -fsyntax-only -Wall -Werror -verify %s
 // RUN: %clang_cc1 -triple powerpc-unknown-aix -target-cpu pwr9 \
 // RUN:   -fsyntax-only -Wall -Werror -verify %s
 
 extern unsigned int ui;
 extern unsigned long long ull;
 extern long long ll;
+extern float f;
+extern double d;
 
 void test_builtin_ppc_cmprb() {
   int res = __builtin_ppc_cmprb(3, ui, ui); // expected-error {{argument value 3 is outside the valid range [0, 1]}}
 }
 
 #ifdef __PPC64__
 
 void test_builtin_ppc_addex() {
   long long res = __builtin_ppc_addex(ll, ll, 4); // expected-error {{argument value 4 is outside the valid range [0, 3]}}
   unsigned long long res2 = __builtin_ppc_addex(ull, ull, -1); // expected-error {{argument value -1 is outside the valid range [0, 3]}}
 }
 
 #endif
+
+int test_builtin_ppc_test_data_class_d() {
+  return __builtin_ppc_test_data_class(d, -1); // expected-error {{argument value -1 is outside the valid range [0, 127]}}
+}
+
+int test_builtin_ppc_test_data_class_f() {
+  return __builtin_ppc_test_data_class(f, -1); // expected-error {{argument value -1 is outside the valid range [0, 127]}}
+}
+
+int test_test_data_class_d() {
+  return __test_data_class(d, 128); // expected-error {{argument value 128 is outside the valid range [0, 127]}}
+}
+
+int test_test_data_class_f() {
+  return __test_data_class(f, 128); // expected-error {{argument value 128 is outside the valid range [0, 127]}}
+}
+
+int test_test_data_class_type() {
+  return __test_data_class(ui, 0); // expected-error {{expected a 'float' or 'double' for the first argument}}
+}

clang/test/CodeGen/builtins-ppc-xlcompat-test.c

+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s \
+// RUN:   -target-cpu pwr9 -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -emit-llvm %s \
+// RUN:   -target-cpu pwr9 -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s \
+// RUN:   -target-cpu pwr9 -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-unknown-aix %s -emit-llvm %s \
+// RUN:   -target-cpu pwr9 -o - | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm-only %s \
+// RUN:   -target-cpu pwr8 2>&1 | FileCheck %s --check-prefix=CHECK-NONPWR9-ERR
+// RUN: not %clang_cc1 -target-feature -vsx -triple powerpc64-unknown-unknown -emit-llvm-only %s \
+// RUN:   -target-cpu pwr9 2>&1 | FileCheck %s --check-prefix=CHECK-NOVSX-ERR
+
+extern double d;
+extern float f;
+
+int test_builtin_ppc_compare_exp_uo() {
+// CHECK-LABEL:       @test_builtin_ppc_compare_exp_uo
+// CHECK:             [[TMP:%.*]] = call i32 @llvm.ppc.compare.exp.uo(double %0, double %1)
+// CHECK-NEXT:        ret i32 [[TMP]]
+// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
+// CHECK-NOVSX-ERR: error: this builtin requires VSX to be enabled
+  return __builtin_ppc_compare_exp_uo(d, d);
+}
+
+int test_builtin_ppc_compare_exp_lt() {
+// CHECK-LABEL:       @test_builtin_ppc_compare_exp_lt
+// CHECK:             [[TMP:%.*]] = call i32 @llvm.ppc.compare.exp.lt(double %0, double %1)
+// CHECK-NEXT:        ret i32 [[TMP]]
+// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
+// CHECK-NOVSX-ERR: error: this builtin requires VSX to be enabled
+  return __builtin_ppc_compare_exp_lt(d, d);
+}
+
+int test_builtin_ppc_compare_exp_gt() {
+// CHECK-LABEL:       @test_builtin_ppc_compare_exp_gt
+// CHECK:             [[TMP:%.*]] = call i32 @llvm.ppc.compare.exp.gt(double %0, double %1)
+// CHECK-NEXT:        ret i32 [[TMP]]
+// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
+// CHECK-NOVSX-ERR: error: this builtin requires VSX to be enabled
+  return __builtin_ppc_compare_exp_gt(d, d);
+}
+
+int test_builtin_ppc_compare_exp_eq() {
+// CHECK-LABEL:       @test_builtin_ppc_compare_exp_eq
+// CHECK:             [[TMP:%.*]] = call i32 @llvm.ppc.compare.exp.eq(double %0, double %1)
+// CHECK-NEXT:        ret i32 [[TMP]]
+// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
+// CHECK-NOVSX-ERR: error: this builtin requires VSX to be enabled
+  return __builtin_ppc_compare_exp_eq(d, d);
+}
+
+int test_builtin_ppc_test_data_class_d() {
+// CHECK-LABEL:       @test_builtin_ppc_test_data_class_d
+// CHECK:             [[TMP:%.*]] = call i32 @llvm.ppc.test.data.class.d(double %0, i32 0)
+// CHECK-NEXT:        ret i32 [[TMP]]
+// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
+// CHECK-NOVSX-ERR: error: this builtin requires VSX to be enabled
+  return __builtin_ppc_test_data_class(d, 0);
+}
+
+int test_builtin_ppc_test_data_class_f() {
+// CHECK-LABEL:       @test_builtin_ppc_test_data_class_f
+// CHECK:             [[TMP:%.*]] = call i32 @llvm.ppc.test.data.class.f(float %0, i32 0)
+// CHECK-NEXT:        ret i32 [[TMP]]
+// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
+// CHECK-NOVSX-ERR: error: this builtin requires VSX to be enabled
+  return __builtin_ppc_test_data_class(f, 0);
+}
+
+int test_compare_exp_uo() {
+// CHECK-LABEL:       @test_compare_exp_uo
+// CHECK:             [[TMP:%.*]] = call i32 @llvm.ppc.compare.exp.uo(double %0, double %1)
+// CHECK-NEXT:        ret i32 [[TMP]]
+// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
+// CHECK-NOVSX-ERR: error: this builtin requires VSX to be enabled
+  return __compare_exp_uo(d, d);
+}
+
+int test_compare_exp_lt() {
+// CHECK-LABEL:       @test_compare_exp_lt
+// CHECK:             [[TMP:%.*]] = call i32 @llvm.ppc.compare.exp.lt(double %0, double %1)
+// CHECK-NEXT:        ret i32 [[TMP]]
+// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
+// CHECK-NOVSX-ERR: error: this builtin requires VSX to be enabled
+  return __compare_exp_lt(d, d);
+}
+
+int test_compare_exp_gt() {
+// CHECK-LABEL:       @test_compare_exp_gt
+// CHECK:             [[TMP:%.*]] = call i32 @llvm.ppc.compare.exp.gt(double %0, double %1)
+// CHECK-NEXT:        ret i32 [[TMP]]
+// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
+// CHECK-NOVSX-ERR: error: this builtin requires VSX to be enabled
+  return __compare_exp_gt(d, d);
+}
+
+int test_compare_exp_eq() {
+// CHECK-LABEL:       @test_compare_exp_eq
+// CHECK:             [[TMP:%.*]] = call i32 @llvm.ppc.compare.exp.eq(double %0, double %1)
+// CHECK-NEXT:        ret i32 [[TMP]]
+// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
+// CHECK-NOVSX-ERR: error: this builtin requires VSX to be enabled
+  return __compare_exp_eq(d, d);
+}
+
+int test_test_data_class_d() {
+// CHECK-LABEL:       @test_test_data_class_d
+// CHECK:             [[TMP:%.*]] = call i32 @llvm.ppc.test.data.class.d(double %0, i32 127)
+// CHECK-NEXT:        ret i32 [[TMP]]
+// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
+// CHECK-NOVSX-ERR: error: this builtin requires VSX to be enabled
+  return __test_data_class(d, 127);
+}
+
+int test_test_data_class_f() {
+// CHECK-LABEL:       @test_test_data_class_f
+// CHECK:             [[TMP:%.*]] = call i32 @llvm.ppc.test.data.class.f(float %0, i32 127)
+// CHECK-NEXT:        ret i32 [[TMP]]
+// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
+// CHECK-NOVSX-ERR: error: this builtin requires VSX to be enabled
+  return __test_data_class(f, 127);
+}

llvm/include/llvm/IR/IntrinsicsPowerPC.td

def int_ppc_fsel : GCCBuiltin<"__builtin_ppc_fsel">,
                                                   llvm_double_ty], [IntrNoMem]>;
   def int_ppc_fsels : GCCBuiltin<"__builtin_ppc_fsels">,
                       Intrinsic<[llvm_float_ty], [llvm_float_ty, llvm_float_ty,
                                                   llvm_float_ty], [IntrNoMem]>;
   def int_ppc_frsqrte : GCCBuiltin<"__builtin_ppc_frsqrte">,
                         Intrinsic<[llvm_double_ty], [llvm_double_ty], [IntrNoMem]>;
   def int_ppc_frsqrtes : GCCBuiltin<"__builtin_ppc_frsqrtes">,
                          Intrinsic<[llvm_float_ty], [llvm_float_ty], [IntrNoMem]>;
+  def int_ppc_compare_exp_uo : GCCBuiltin<"__builtin_ppc_compare_exp_uo">,
+                               Intrinsic<[llvm_i32_ty],
+                                         [llvm_double_ty, llvm_double_ty], 
+                                         [IntrNoMem]>;
+  def int_ppc_compare_exp_lt : GCCBuiltin<"__builtin_ppc_compare_exp_lt">,
+                               Intrinsic<[llvm_i32_ty], 
+                                         [llvm_double_ty, llvm_double_ty], 
+                                         [IntrNoMem]>;
+  def int_ppc_compare_exp_gt : GCCBuiltin<"__builtin_ppc_compare_exp_gt">,
+                               Intrinsic<[llvm_i32_ty],
+                                         [llvm_double_ty, llvm_double_ty], 
+                                         [IntrNoMem]>;
+  def int_ppc_compare_exp_eq : GCCBuiltin<"__builtin_ppc_compare_exp_eq">,
+                               Intrinsic<[llvm_i32_ty], 
+                                         [llvm_double_ty, llvm_double_ty], 
+                                         [IntrNoMem]>;
+  def int_ppc_test_data_class_d : Intrinsic<[llvm_i32_ty],
+                                            [llvm_double_ty, llvm_i32_ty],
+                                            [IntrNoMem, ImmArg<ArgIndex<1>>]>;
+  def int_ppc_test_data_class_f : Intrinsic<[llvm_i32_ty],
+                                            [llvm_float_ty, llvm_i32_ty],
+                                            [IntrNoMem, ImmArg<ArgIndex<1>>]>;
 }
 
 //===----------------------------------------------------------------------===//
 // PowerPC Atomic Intrinsic Definitions.
 let TargetPrefix = "ppc" in {
   class AtomicRMW128Intrinsic
     : Intrinsic<[llvm_i64_ty, llvm_i64_ty],
                 [llvm_ptr_ty, llvm_i64_ty, llvm_i64_ty],

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

for (int VecNo = 0; VecNo < NumVecs; VecNo++) {
           PPCISD::EXTRACT_VSX_REG, dl, MVT::v16i8, WideVec,
           DAG.getConstant(Subtarget.isLittleEndian() ? NumVecs - 1 - VecNo
                                                      : VecNo,
                           dl, getPointerTy(DAG.getDataLayout())));
       RetOps.push_back(Extract);
     }
     return DAG.getMergeValues(RetOps, dl);
   }
+  case Intrinsic::ppc_compare_exp_lt:
+  case Intrinsic::ppc_compare_exp_gt:
+  case Intrinsic::ppc_compare_exp_eq:
+  case Intrinsic::ppc_compare_exp_uo: {
+    unsigned Pred;
+    switch (IntrinsicID) {
+    case Intrinsic::ppc_compare_exp_lt:
+      Pred = PPC::PRED_LT;
+      break;
+    case Intrinsic::ppc_compare_exp_gt:
+      Pred = PPC::PRED_GT;
+      break;
+    case Intrinsic::ppc_compare_exp_eq:
+      Pred = PPC::PRED_EQ;
+      break;
+    case Intrinsic::ppc_compare_exp_uo:
+      Pred = PPC::PRED_UN;
+      break;
+    }
+    return SDValue(
+        DAG.getMachineNode(
+            PPC::SELECT_CC_I4, dl, MVT::i32,
+            {SDValue(DAG.getMachineNode(PPC::XSCMPEXPDP, dl, MVT::i32,
+                                        Op.getOperand(1), Op.getOperand(2)),
+                     0),
+             DAG.getConstant(1, dl, MVT::i32), DAG.getConstant(0, dl, MVT::i32),
+             DAG.getTargetConstant(Pred, dl, MVT::i32)}),
+        0);
+  }
+  case Intrinsic::ppc_test_data_class_d:
+  case Intrinsic::ppc_test_data_class_f: {
+    unsigned CmprOpc = PPC::XSTSTDCDP;
+    if (IntrinsicID == Intrinsic::ppc_test_data_class_f)
+      CmprOpc = PPC::XSTSTDCSP;
+    return SDValue(
+        DAG.getMachineNode(
+            PPC::SELECT_CC_I4, dl, MVT::i32,
+            {SDValue(DAG.getMachineNode(CmprOpc, dl, MVT::i32, Op.getOperand(2),
+                                        Op.getOperand(1)),
+                     0),
+             DAG.getConstant(1, dl, MVT::i32), DAG.getConstant(0, dl, MVT::i32),
+             DAG.getTargetConstant(PPC::PRED_EQ, dl, MVT::i32)}),
+        0);
+  }
   }
 
   // If this is a lowered altivec predicate compare, CompareOpc is set to the
   // opcode number of the comparison.
   int CompareOpc;
   bool isDot;
   if (!getVectorCompareInfo(Op, CompareOpc, isDot, Subtarget))
     return SDValue();    // Don't custom lower most intrinsics.

llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-test.ll

+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-unknown \
+; RUN:   -mcpu=pwr9 < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown \
+; RUN:   -mcpu=pwr9 < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
+; RUN:   -mcpu=pwr9 < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN:   -mcpu=pwr9 < %s | FileCheck %s
+
+define i32 @test_builtin_ppc_compare_exp_eq(double %d) {
+; CHECK-LABEL: test_builtin_ppc_compare_exp_eq:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xscmpexpdp 0, 1, 1
+; CHECK-NEXT:    li 3, 0
+; CHECK-NEXT:    li 4, 1
+; CHECK-NEXT:    iseleq 3, 4, 3
+; CHECK-NEXT:    blr
+entry:
+  %0 = tail call i32 @llvm.ppc.compare.exp.eq(double %d, double %d)
+  ret i32 %0
+}
+
+declare i32 @llvm.ppc.compare.exp.eq(double, double)
+
+define i32 @test_builtin_ppc_compare_exp_lt(double %d) {
+; CHECK-LABEL: test_builtin_ppc_compare_exp_lt:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xscmpexpdp 0, 1, 1
+; CHECK-NEXT:    li 3, 0
+; CHECK-NEXT:    li 4, 1
+; CHECK-NEXT:    isellt 3, 4, 3
+; CHECK-NEXT:    blr
+entry:
+  %0 = tail call i32 @llvm.ppc.compare.exp.lt(double %d, double %d)
+  ret i32 %0
+}
+
+declare i32 @llvm.ppc.compare.exp.lt(double, double)
+
+define i32 @test_builtin_ppc_compare_exp_gt(double %d) {
+; CHECK-LABEL: test_builtin_ppc_compare_exp_gt:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xscmpexpdp 0, 1, 1
+; CHECK-NEXT:    li 3, 0
+; CHECK-NEXT:    li 4, 1
+; CHECK-NEXT:    iselgt 3, 4, 3
+; CHECK-NEXT:    blr
+entry:
+  %0 = tail call i32 @llvm.ppc.compare.exp.gt(double %d, double %d)
+  ret i32 %0
+}
+
+declare i32 @llvm.ppc.compare.exp.gt(double, double)
+
+define i32 @test_builtin_ppc_compare_exp_uo(double %d) {
+; CHECK-LABEL: test_builtin_ppc_compare_exp_uo:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xscmpexpdp 0, 1, 1
+; CHECK-NEXT:    li 3, 0
+; CHECK-NEXT:    li 4, 1
+; CHECK-NEXT:    isel 3, 4, 3, 3
+; CHECK-NEXT:    blr
+entry:
+  %0 = tail call i32 @llvm.ppc.compare.exp.uo(double %d, double %d)
+  ret i32 %0
+}
+
+declare i32 @llvm.ppc.compare.exp.uo(double, double)
+
+define i32 @test_builtin_ppc_test_data_class_d(double %d) {
+; CHECK-LABEL: test_builtin_ppc_test_data_class_d:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xststdcdp 0, 1, 0
+; CHECK-NEXT:    li 3, 0
+; CHECK-NEXT:    li 4, 1
+; CHECK-NEXT:    iseleq 3, 4, 3
+; CHECK-NEXT:    blr
+entry:
+  %test_data_class = tail call i32 @llvm.ppc.test.data.class.d(double %d, i32 0)
+  ret i32 %test_data_class
+}
+
+declare i32 @llvm.ppc.test.data.class.d(double, i32 immarg)
+
+define i32 @test_builtin_ppc_test_data_class_f(float %f) {
+; CHECK-LABEL: test_builtin_ppc_test_data_class_f:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xststdcsp 0, 1, 127
+; CHECK-NEXT:    li 3, 0
+; CHECK-NEXT:    li 4, 1
+; CHECK-NEXT:    iseleq 3, 4, 3
+; CHECK-NEXT:    blr
+entry:
+  %test_data_class = tail call i32 @llvm.ppc.test.data.class.f(float %f, i32 127)
+  ret i32 %test_data_class
+}
+
+declare i32 @llvm.ppc.test.data.class.f(float, i32 immarg)