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stefanp (Stefan Pintilie)
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User Since
May 29 2017, 8:02 AM (190 w, 6 d)

Recent Activity

Fri, Jan 22

stefanp requested review of D95262: [LLD][PowerPC] Fix bug in PC-Relative initial exec.
Fri, Jan 22, 12:56 PM · Restricted Project

Thu, Jan 7

stefanp updated the diff for D92879: [PowerPC] Materialize 34 bit constants with pli on Power 10..

Fixed spelling mistake in comment.

Thu, Jan 7, 4:06 AM · Restricted Project

Wed, Jan 6

stefanp updated the diff for D92879: [PowerPC] Materialize 34 bit constants with pli on Power 10..

Updated some of the test cases for the 32 bit compilation.

Wed, Jan 6, 11:49 AM · Restricted Project
stefanp committed rGcb0c034edc98: [PowerPC] Fix issue where vsrq is given incorrect shift vector (authored by stefanp).
[PowerPC] Fix issue where vsrq is given incorrect shift vector
Wed, Jan 6, 3:56 AM
stefanp closed D94113: [PowerPC] Fix issue where vsrq is given incorrect shift vector.
Wed, Jan 6, 3:56 AM · Restricted Project
stefanp updated the diff for D94113: [PowerPC] Fix issue where vsrq is given incorrect shift vector.

Added the todo comment in the TD file.

Wed, Jan 6, 3:28 AM · Restricted Project

Tue, Jan 5

stefanp updated the diff for D92879: [PowerPC] Materialize 34 bit constants with pli on Power 10..

Added comment for function.
Fixed variable name.
Added test case for 32 bit target.

Tue, Jan 5, 1:47 PM · Restricted Project
stefanp abandoned D91611: [PowerPC][LLD] Detecting and fixing missing TLS relocation on __tls_get_addr.

Since D92959 is now in I am going to abandon this patch.

Tue, Jan 5, 1:05 PM · Restricted Project
stefanp updated the diff for D94113: [PowerPC] Fix issue where vsrq is given incorrect shift vector.

Forgot to delete the old lines in the TD file.

Tue, Jan 5, 1:00 PM · Restricted Project
stefanp added a reviewer for D94113: [PowerPC] Fix issue where vsrq is given incorrect shift vector: Restricted Project.
Tue, Jan 5, 12:58 PM · Restricted Project
stefanp requested review of D94113: [PowerPC] Fix issue where vsrq is given incorrect shift vector.
Tue, Jan 5, 12:55 PM · Restricted Project

Dec 17 2020

stefanp accepted D92089: [PowerPC] Materialize i64 constants by enumerated patterns..

I do not have any more questions.
Thank you for refactoring this. It looks a lot cleaner.
LGTM.

Dec 17 2020, 9:59 AM · Restricted Project
stefanp added a comment to D93370: [PowerPC] Add new infrastructure to select load/store instructions, update P8/P9 load/store patterns..

I just had some minor comments. I think it makes sense overall.

Dec 17 2020, 8:03 AM · Restricted Project, Restricted Project
stefanp accepted D92959: [ELF][PPC64] Detect missing R_PPC64_TLSGD/R_PPC64_TLSLD and disable TLS relaxation.

Tested this on some actual legacy compiled code and it does what we want.
Only one minor question. Otherwise, LGTM.

Dec 17 2020, 3:47 AM · Restricted Project

Dec 15 2020

stefanp added reviewers for D93300: [PowerPC] Exploit paddi instruction on Power 10 for constant materialization: NeHuang, Restricted Project.
Dec 15 2020, 7:36 AM · Restricted Project
stefanp requested review of D93300: [PowerPC] Exploit paddi instruction on Power 10 for constant materialization.
Dec 15 2020, 7:33 AM · Restricted Project

Dec 14 2020

stefanp added a comment to D92959: [ELF][PPC64] Detect missing R_PPC64_TLSGD/R_PPC64_TLSLD and disable TLS relaxation.

Missing R_PPC64_TLSGD/R_PPC64_TLSGD for one function and correct for another in the same translation unit - does this only happen with relocatable links? I'd hope we simply consider this too niche to fix and don't add more logic on this...

Dec 14 2020, 1:53 PM · Restricted Project

Dec 11 2020

stefanp added a comment to D92959: [ELF][PPC64] Detect missing R_PPC64_TLSGD/R_PPC64_TLSLD and disable TLS relaxation.

Thank you for your help!

It make sense what you have written but I would still prefer to explicitly check for calls to __tls_get_addr and look at the relocations on the call.

How would you like to proceed from here? Do you want me to take the patch over and make changes?

This patch is essentially a rewrite.
If this patch looks fine, I'd like if we take this route instead....

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=727fc41e077139570ea8b8ddfd6c546b2a55627c introduced the R_PPC64_TLSGD/R_PPC64_TLSLD behavior in 2009 so assumably the problem existed before 2009. It made feel pretty uneasy that you are needing the pre-2009 workaround....

I am not sure checking "__tls_get_addr" is useful. R_PPC64_TLSGD/R_PPC64_TLSLD is only used by "__tls_get_addr". GD/LD GOT relocations are not used otherwise, are they?
So a simple check like this patch should work. We don't necessarily bring all the complexity from GNU ld.

I don't want to implement a complete fix of this. I am completely happy with just detecting the issue and disabling the relaxation if we find it.
However, if we have a scenario like this one:

Right:
  addis 3, 2, x@got@tlsgd@ha
  addi 3, 3, x@got@tlsgd@l
  bl __tls_get_addr(x@tlsgd)
  nop
  blr

Wrong:
  addis 3, 2, x@got@tlsgd@ha
  addi 3, 3, x@got@tlsgd@l
  bl __tls_get_addr
  nop
  blr

the function Wrong won't be caught by the code that you posted. We basically have two functions, one was compiled correctly and the other was not.

In the code that you have what if you just look for R_PPC64_REL24 and check those relocations for __tls_get_addr? I know that this adds more overhead but it helps with the backwards compatibility and I feel that is important. Also, if it adds too much overhead we can keep the option and that way we only do this extra check if the user asks for it.

Dec 11 2020, 1:39 PM · Restricted Project
stefanp added a comment to D92959: [ELF][PPC64] Detect missing R_PPC64_TLSGD/R_PPC64_TLSLD and disable TLS relaxation.

Thank you for your help!

It make sense what you have written but I would still prefer to explicitly check for calls to __tls_get_addr and look at the relocations on the call.

How would you like to proceed from here? Do you want me to take the patch over and make changes?

This patch is essentially a rewrite.
If this patch looks fine, I'd like if we take this route instead....

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=727fc41e077139570ea8b8ddfd6c546b2a55627c introduced the R_PPC64_TLSGD/R_PPC64_TLSLD behavior in 2009 so assumably the problem existed before 2009. It made feel pretty uneasy that you are needing the pre-2009 workaround....

I am not sure checking "__tls_get_addr" is useful. R_PPC64_TLSGD/R_PPC64_TLSLD is only used by "__tls_get_addr". GD/LD GOT relocations are not used otherwise, are they?
So a simple check like this patch should work. We don't necessarily bring all the complexity from GNU ld.

Dec 11 2020, 1:04 PM · Restricted Project
stefanp added inline comments to D92089: [PowerPC] Materialize i64 constants by enumerated patterns..
Dec 11 2020, 7:56 AM · Restricted Project

Dec 10 2020

stefanp added a comment to D92089: [PowerPC] Materialize i64 constants by enumerated patterns..

Thank you for the explanations!
I'm fine with keeping the if conditions looking similar and avoiding too many test changes.

Dec 10 2020, 1:42 PM · Restricted Project
stefanp added a comment to D92959: [ELF][PPC64] Detect missing R_PPC64_TLSGD/R_PPC64_TLSLD and disable TLS relaxation.

Thank you for your help!

Dec 10 2020, 1:33 PM · Restricted Project
stefanp added a comment to D91611: [PowerPC][LLD] Detecting and fixing missing TLS relocation on __tls_get_addr.

I think the code should be extracted to scanRelocs: check whether there are R_TLSGD_GOT relocations without R_PPC64_TLSGD/R_PPC64_TLSLD. This may be an entire rewrite. I'm working on it.

I think I understand what you are looking for. It's my patch so I should probably be doing the rewrite myself.
I don't want you to spend more time than you have to on this...

... but do you think D92959 is complete now?

Dec 10 2020, 1:16 PM · Restricted Project
stefanp added a comment to D91611: [PowerPC][LLD] Detecting and fixing missing TLS relocation on __tls_get_addr.

I think the code should be extracted to scanRelocs: check whether there are R_TLSGD_GOT relocations without R_PPC64_TLSGD/R_PPC64_TLSLD. This may be an entire rewrite. I'm working on it.

Dec 10 2020, 9:36 AM · Restricted Project
stefanp updated the diff for D92879: [PowerPC] Materialize 34 bit constants with pli on Power 10..

Rebased on top of D92089

Dec 10 2020, 4:00 AM · Restricted Project

Dec 9 2020

stefanp added a comment to D92089: [PowerPC] Materialize i64 constants by enumerated patterns..

Thank you for pointing me to this patch.

Dec 9 2020, 7:23 PM · Restricted Project
stefanp added a comment to D92879: [PowerPC] Materialize 34 bit constants with pli on Power 10..
Dec 9 2020, 7:40 AM · Restricted Project
stefanp updated the diff for D91611: [PowerPC][LLD] Detecting and fixing missing TLS relocation on __tls_get_addr.

Merged if statement and did a bit of cleanup according to comments.
Merged two test cases.

Dec 9 2020, 7:13 AM · Restricted Project

Dec 8 2020

stefanp added a reviewer for D92879: [PowerPC] Materialize 34 bit constants with pli on Power 10.: Restricted Project.
Dec 8 2020, 12:51 PM · Restricted Project
stefanp requested review of D92879: [PowerPC] Materialize 34 bit constants with pli on Power 10..
Dec 8 2020, 12:50 PM · Restricted Project
stefanp committed rG2812c1515627: [PowerPC] Fix missing nop after call to weak callee. (authored by stefanp).
[PowerPC] Fix missing nop after call to weak callee.
Dec 8 2020, 7:39 AM
stefanp closed D91983: [PowerPC] Fix missing nop after call to weak callee..
Dec 8 2020, 7:39 AM · Restricted Project
stefanp added a comment to D91426: [PowerPC] Fix issue where binary uses a .got but is missing a .TOC..

@MaskRay
I'm sorry to bug you but I still don't understand what you are looking for.

Dec 8 2020, 6:54 AM · Restricted Project
stefanp added a comment to D91611: [PowerPC][LLD] Detecting and fixing missing TLS relocation on __tls_get_addr.

Gentle Ping

Dec 8 2020, 6:49 AM · Restricted Project

Dec 7 2020

stefanp updated the diff for D91983: [PowerPC] Fix missing nop after call to weak callee..

Added CHECK-NEXT that was missed.

Dec 7 2020, 11:36 AM · Restricted Project
stefanp committed rG49921d1c3cee: [PowerPC] Exploitation of xxeval instruction for AND and NAND (authored by stefanp).
[PowerPC] Exploitation of xxeval instruction for AND and NAND
Dec 7 2020, 10:37 AM
stefanp closed D92420: [PowerPC] Exploitation of xxeval instruction for AND and NAND.
Dec 7 2020, 10:37 AM · Restricted Project
stefanp added inline comments to D92420: [PowerPC] Exploitation of xxeval instruction for AND and NAND.
Dec 7 2020, 6:42 AM · Restricted Project

Dec 4 2020

stefanp updated the diff for D92420: [PowerPC] Exploitation of xxeval instruction for AND and NAND.

Changed the multiclass into class.

Dec 4 2020, 1:41 PM · Restricted Project

Dec 3 2020

stefanp updated the diff for D92420: [PowerPC] Exploitation of xxeval instruction for AND and NAND.

A few of the lines in the TD file were too long so I fixed that.

Dec 3 2020, 8:01 AM · Restricted Project
stefanp updated the diff for D92420: [PowerPC] Exploitation of xxeval instruction for AND and NAND.

Updated the test case to use a multiclass and added a comment to each pattern.
Also added different types to one of the patterns.

Dec 3 2020, 7:57 AM · Restricted Project

Dec 1 2020

stefanp added inline comments to D91611: [PowerPC][LLD] Detecting and fixing missing TLS relocation on __tls_get_addr.
Dec 1 2020, 12:55 PM · Restricted Project
stefanp updated the diff for D91611: [PowerPC][LLD] Detecting and fixing missing TLS relocation on __tls_get_addr.

Since the scope of the patch has changed two of the tests were no longer
required so I have removed them.
Added a warning for the case where TLS relaxation is disabled due to a missing
relocation.

Dec 1 2020, 12:55 PM · Restricted Project
stefanp added a reviewer for D92420: [PowerPC] Exploitation of xxeval instruction for AND and NAND: Restricted Project.
Dec 1 2020, 12:38 PM · Restricted Project
stefanp requested review of D92420: [PowerPC] Exploitation of xxeval instruction for AND and NAND.
Dec 1 2020, 12:37 PM · Restricted Project
stefanp updated the diff for D91983: [PowerPC] Fix missing nop after call to weak callee..

Updated test cases according to review.

Dec 1 2020, 12:01 PM · Restricted Project

Nov 30 2020

stefanp updated the summary of D91611: [PowerPC][LLD] Detecting and fixing missing TLS relocation on __tls_get_addr.
Nov 30 2020, 6:26 AM · Restricted Project
stefanp updated the diff for D91611: [PowerPC][LLD] Detecting and fixing missing TLS relocation on __tls_get_addr.

Completely changed the way that the patch works.

Nov 30 2020, 6:21 AM · Restricted Project

Nov 25 2020

stefanp added a comment to D91611: [PowerPC][LLD] Detecting and fixing missing TLS relocation on __tls_get_addr.

I have done some testing with gcc (Ubuntu 7.5.0-3ubuntu1~18.04) 7.5.0 and GNU ld (GNU Binutils for Ubuntu) 2.30.

Nov 25 2020, 7:45 PM · Restricted Project

Nov 23 2020

stefanp added a reviewer for D91983: [PowerPC] Fix missing nop after call to weak callee.: Restricted Project.
Nov 23 2020, 10:54 AM · Restricted Project
stefanp requested review of D91983: [PowerPC] Fix missing nop after call to weak callee..
Nov 23 2020, 10:54 AM · Restricted Project
stefanp added inline comments to D91426: [PowerPC] Fix issue where binary uses a .got but is missing a .TOC..
Nov 23 2020, 4:36 AM · Restricted Project

Nov 20 2020

stefanp added a comment to D91611: [PowerPC][LLD] Detecting and fixing missing TLS relocation on __tls_get_addr.

I remember that I have questioned about the error checking when the patch was initially brought up. The introduction of a new linker option for an incorrect case where compiler will not generate such code makes me feel more uneasy about it. Surely the linker can detect such errors but does it really have to? With assembly the user can play all sorts of tricks which will not work, but is that the duty of the linker?

Nov 20 2020, 7:31 AM · Restricted Project
stefanp updated the summary of D91611: [PowerPC][LLD] Detecting and fixing missing TLS relocation on __tls_get_addr.
Nov 20 2020, 7:16 AM · Restricted Project

Nov 18 2020

stefanp added a comment to D91279: [PowerPC] DForm instructions should be preferred when using zero register.

Using dform with offset 0 can save one register r0/X0, this is benefit for register allocation? But adding it in PPCPreEmitPeephole pass which is after register allocation will make the benefit gone.
Maybe we need to do it before register allocation? For example at the place where the x-form with zero register is generated.

I checked one example loadConstant in test/CodeGen/PowerPC/f128-passByValue.ll.
We generate LXVX $zero8, in ISEL because we meet the worst case and we don't have d-form choice for the instruction selection. so we have to use x-form and in x-form selection, we have to use zero/zero8 as the base and use load address as the index. See PPCTargetLowering::SelectAddressRegRegOnly.

I guess most cases are with same reason for generating x-form + zero register, we meet the worst case in ISEL, so we have to use x-form + zero register form, with this form, we can always select a powerpc load/store instruction.

For me, a better solution should be change the worst case handling in ISEL, it is before RA and it is also transparent for types like STXVX/LXVX/ and also LDX/STDX, LFDX/STFDX...

I'm just going to jump in to give a little more background. The initial reason we wanted to do this was to enable an optimization that actually happens in the linker after the code is emitted.
To get the idea you can look at this test:

/llvm/test/CodeGen/PowerPC/pcrel-linkeropt.ll

Which contains this section:

; FIXME: we should always convert X-Form instructions that use
; PPC::ZERO[8] to the corresponding D-Form so we can perform this opt.
define dso_local void @ReadWrite128() local_unnamed_addr #0 {
; CHECK-LABEL: ReadWrite128:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    pld r3, input128@got@pcrel(0), 1
; CHECK-NEXT:    lxvx vs0, 0, r3
; CHECK-NEXT:    pld r3, output128@got@pcrel(0), 1
; CHECK-NEXT:    stxvx vs0, 0, r3
; CHECK-NEXT:    blr
entry:
  %0 = load i128, i128* @input128, align 16
  store i128 %0, i128* @output128, align 16
  ret void
}

When we have a GOT access like this it is possible for the compiler to mark the instruction with R_PPC64_PCREL_OPT and then the linker merges the two instructions into one and replaces the second instruction with a nop. The problem is that this opt can only be done if the second instruction is DForm. We noticed that when we implemented this optimization we could not catch all of the cases because in some situations (like the one above) we use the XForm instead of the DForm.

Having said that, we should try to do this before the PreEmitPeephole. The optimization that adds the R_PPC64_PCREL_OPT relocation is also in the PreEmitPeephole and I'm not sure if it will be detected if we do both things at the same time (both as in convert the XForm to a DForm and then have the same opt use that DForm to add the relocation).

I agree that ISel is a better place for this. If we cannot do this in ISel then we should still try to do this before we get to the PreEmitPeephole or at least make sure that both the DForm is present and that the R_PPC64_PCREL_OPT relocation is added as we expected in the same pass.

Nov 18 2020, 1:48 PM · Restricted Project, Restricted Project, Restricted Project

Nov 17 2020

stefanp added a comment to D91279: [PowerPC] DForm instructions should be preferred when using zero register.

Using dform with offset 0 can save one register r0/X0, this is benefit for register allocation? But adding it in PPCPreEmitPeephole pass which is after register allocation will make the benefit gone.
Maybe we need to do it before register allocation? For example at the place where the x-form with zero register is generated.

I checked one example loadConstant in test/CodeGen/PowerPC/f128-passByValue.ll.
We generate LXVX $zero8, in ISEL because we meet the worst case and we don't have d-form choice for the instruction selection. so we have to use x-form and in x-form selection, we have to use zero/zero8 as the base and use load address as the index. See PPCTargetLowering::SelectAddressRegRegOnly.

I guess most cases are with same reason for generating x-form + zero register, we meet the worst case in ISEL, so we have to use x-form + zero register form, with this form, we can always select a powerpc load/store instruction.

For me, a better solution should be change the worst case handling in ISEL, it is before RA and it is also transparent for types like STXVX/LXVX/ and also LDX/STDX, LFDX/STFDX...

Nov 17 2020, 1:29 PM · Restricted Project, Restricted Project, Restricted Project
stefanp added inline comments to D91426: [PowerPC] Fix issue where binary uses a .got but is missing a .TOC..
Nov 17 2020, 4:03 AM · Restricted Project
stefanp added a reviewer for D91426: [PowerPC] Fix issue where binary uses a .got but is missing a .TOC.: sfertile.
Nov 17 2020, 3:36 AM · Restricted Project
stefanp added a reviewer for D91611: [PowerPC][LLD] Detecting and fixing missing TLS relocation on __tls_get_addr: Restricted Project.
Nov 17 2020, 3:36 AM · Restricted Project
stefanp requested review of D91611: [PowerPC][LLD] Detecting and fixing missing TLS relocation on __tls_get_addr.
Nov 17 2020, 3:35 AM · Restricted Project

Nov 13 2020

stefanp added a reviewer for D91426: [PowerPC] Fix issue where binary uses a .got but is missing a .TOC.: Restricted Project.
Nov 13 2020, 7:29 AM · Restricted Project
stefanp added a reviewer for D91426: [PowerPC] Fix issue where binary uses a .got but is missing a .TOC.: NeHuang.
Nov 13 2020, 7:28 AM · Restricted Project
stefanp requested review of D91426: [PowerPC] Fix issue where binary uses a .got but is missing a .TOC..
Nov 13 2020, 7:25 AM · Restricted Project

Oct 23 2020

stefanp added a comment to D85994: [LLD][PowerPC] Add check in LLD to produce an error for missing TLSGD/TLSLD.

@MaskRay
Sorry... can you pause on this for a second. I want to talk to the glibc guys about this first.

@stefanp I already did it... I think this is a problem for many ld.so implementations. For example, musl has

if ((def.sym->st_info&0xf) == STT_TLS)
         return __tls_get_addr((tls_mod_off_t []){def.dso->tls_id, def.sym->st_value-DTP_OFFSET});

It was broken as well...

Oct 23 2020, 10:54 AM · Restricted Project
stefanp added a comment to D85994: [LLD][PowerPC] Add check in LLD to produce an error for missing TLSGD/TLSLD.

@MaskRay
Sorry... can you pause on this for a second. I want to talk to the glibc guys about this first.

Oct 23 2020, 10:33 AM · Restricted Project
stefanp added a comment to D85994: [LLD][PowerPC] Add check in LLD to produce an error for missing TLSGD/TLSLD.

@MaskRay
Would you like me to just revert this change? Do you want to see something on Phabricator for it?

I have prepared a partial revert, as the test is still useful. I can do it if you allow:)

Oct 23 2020, 10:30 AM · Restricted Project
stefanp added a comment to D85994: [LLD][PowerPC] Add check in LLD to produce an error for missing TLSGD/TLSLD.

@MaskRay
Would you like me to just revert this change? Do you want to see something on Phabricator for it?

Oct 23 2020, 10:25 AM · Restricted Project
stefanp added a comment to D85994: [LLD][PowerPC] Add check in LLD to produce an error for missing TLSGD/TLSLD.

First, if this issue is not common enough, I'd rather we don't have a diagnostic at all.

If we do need it, note that *(i - 2); may be out of bounds.

Last, we should avoid pre-built object files. You can synthesize them with yaml2obj. The preferred style is llvm/test/tools/llvm-readobj/ELF/*.test. lld/test/ELF has some yaml2obj tests as well.

@stefanp The error turns out to be a problem when building glibc.

elf/dl-sym.c has a raw __tls_get_addr call (it sets up the parameter by itself), without R_PPC64_TLSGD/R_PPC64_TLSLD (similar to CallOnly). Shall we drop the logic? I believe GNU ld does not have the logic.

/* Return the symbol address given the map of the module it is in and
   the symbol record.  This is used in dl-sym.c.  */
static void *
_dl_tls_symaddr (struct link_map *map, const ElfW(Sym) *ref)
{
# ifndef DONT_USE_TLS_INDEX
  tls_index tmp =
    {
      .ti_module = map->l_tls_modid,
      .ti_offset = ref->st_value
    };

  return __TLS_GET_ADDR (&tmp);
# else
  return __TLS_GET_ADDR (map->l_tls_modid, ref->st_value);
# endif
}
#endif
Oct 23 2020, 10:19 AM · Restricted Project
stefanp committed rGc6561ccfd982: [PowerPC][LLD] Support for PC Relative TLS for Local Dynamic (authored by stefanp).
[PowerPC][LLD] Support for PC Relative TLS for Local Dynamic
Oct 23 2020, 6:24 AM
stefanp closed D87504: [PowerPC][LLD] Support for PC Relative TLS for Local Dynamic.
Oct 23 2020, 6:24 AM · Restricted Project
stefanp updated the diff for D87504: [PowerPC][LLD] Support for PC Relative TLS for Local Dynamic.

Updated comment in test case.

Oct 23 2020, 6:06 AM · Restricted Project

Oct 22 2020

stefanp added a comment to D89041: [libc++] Include <__config_site> from <__config>.

This is still causing a buildbot failure on a Power PC sanitizer bot:
http://lab.llvm.org:8011/#/builders/18

Oct 22 2020, 6:12 PM · Restricted Project, Restricted Project

Oct 20 2020

stefanp updated the diff for D87504: [PowerPC][LLD] Support for PC Relative TLS for Local Dynamic.

Fixed the LLVM_FALLTHROUGH
Added split-file and -soname to the test file.

Oct 20 2020, 7:55 AM · Restricted Project

Oct 15 2020

stefanp updated the diff for D87504: [PowerPC][LLD] Support for PC Relative TLS for Local Dynamic.

Fixed a couple of comments.
Moved the R_PPC64_DTPREL34 case first and adjusted the dynamic thread offset
there before falling through to the common case.

Oct 15 2020, 4:01 AM · Restricted Project

Oct 13 2020

stefanp updated the diff for D87504: [PowerPC][LLD] Support for PC Relative TLS for Local Dynamic.

Fixed the issue where the 0x8000 offset was not being considered.

Oct 13 2020, 10:53 AM · Restricted Project
stefanp added inline comments to D87504: [PowerPC][LLD] Support for PC Relative TLS for Local Dynamic.
Oct 13 2020, 10:25 AM · Restricted Project
stefanp accepted D88738: [PowerPC][PCRelative] Turn on TLS support for PCRel by default.

LGTM

Oct 13 2020, 6:03 AM · Restricted Project

Oct 9 2020

stefanp committed rG0741a2c9caca: [Clang][unittests][NFC] Break up test in Callbacks.cpp (authored by stefanp).
[Clang][unittests][NFC] Break up test in Callbacks.cpp
Oct 9 2020, 6:54 AM
stefanp closed D88886: [Clang][unittests][NFC] Break up test in Callbacks.cpp.
Oct 9 2020, 6:54 AM · Restricted Project

Oct 8 2020

stefanp updated the diff for D88886: [Clang][unittests][NFC] Break up test in Callbacks.cpp.

Added the missing header file.
Added the license comment.

Oct 8 2020, 7:25 AM · Restricted Project

Oct 6 2020

stefanp added a comment to D88886: [Clang][unittests][NFC] Break up test in Callbacks.cpp.

Related to this please see Nemanja's comment on https://reviews.llvm.org/D82485.

Oct 6 2020, 4:23 AM · Restricted Project
stefanp added reviewers for D88886: [Clang][unittests][NFC] Break up test in Callbacks.cpp: gribozavr, ymandel, eduucaldas.
Oct 6 2020, 4:20 AM · Restricted Project
stefanp requested review of D88886: [Clang][unittests][NFC] Break up test in Callbacks.cpp.
Oct 6 2020, 4:18 AM · Restricted Project

Oct 2 2020

stefanp added a comment to D88591: [WebAssembly] Emulate v128.const efficiently.

I can confirm that this changeset is causing the timeout on the clang-ppc64be-linux buildbot.
The following was run on a Big Endian Power PC machine.

Oct 2 2020, 9:34 AM · Restricted Project
stefanp updated the summary of D87504: [PowerPC][LLD] Support for PC Relative TLS for Local Dynamic.
Oct 2 2020, 9:14 AM · Restricted Project
stefanp added a comment to D87504: [PowerPC][LLD] Support for PC Relative TLS for Local Dynamic.

All of the dependencies of this patch have now been committed.

Oct 2 2020, 9:13 AM · Restricted Project
stefanp added inline comments to D87504: [PowerPC][LLD] Support for PC Relative TLS for Local Dynamic.
Oct 2 2020, 9:09 AM · Restricted Project
stefanp updated the diff for D87504: [PowerPC][LLD] Support for PC Relative TLS for Local Dynamic.

Rebased to top of trunk.
Fixed a couple of comments.
Removed some lines that are not required form the test.

Oct 2 2020, 9:09 AM · Restricted Project

Oct 1 2020

stefanp added a comment to D87318: [LLD][PowerPC] Add support for R_PPC64_GOT_TLSGD_PCREL34 used in TLS General Dynamic.

Ok, thank you MaskRay.
Sorry, in my head I didn't put the error together with what you had said previously.

Oct 1 2020, 5:01 PM · Restricted Project
stefanp added a comment to D87318: [LLD][PowerPC] Add support for R_PPC64_GOT_TLSGD_PCREL34 used in TLS General Dynamic.

Looks like .rela.dyn is located in different places depending on the machine.
From two different bots:

# GDTOIE-RELOC: Relocation section '.rela.dyn' at offset 0x10118 contains 2 entries:
                ^
<stdin>:2:1: note: scanning from here
Relocation section '.rela.dyn' at offset 0x10128 contains 2 entries:

or

# GDTOIE-RELOC: Relocation section '.rela.dyn' at offset 0x10118 contains 2 entries:
                ^
<stdin>:2:1: note: scanning from here
Relocation section '.rela.dyn' at offset 0x10148 contains 2 entries:
Oct 1 2020, 12:13 PM · Restricted Project
stefanp reopened D87318: [LLD][PowerPC] Add support for R_PPC64_GOT_TLSGD_PCREL34 used in TLS General Dynamic.

Reopening this to see why the test failed.

Oct 1 2020, 12:07 PM · Restricted Project
stefanp added a reverting change for rG79122868f9a3: [LLD][PowerPC] Add support for R_PPC64_GOT_TLSGD_PCREL34 used in TLS General…: rG5f3e565f59ee: Revert "[LLD][PowerPC] Add support for R_PPC64_GOT_TLSGD_PCREL34 used in TLS….
Oct 1 2020, 11:29 AM
stefanp committed rG5f3e565f59ee: Revert "[LLD][PowerPC] Add support for R_PPC64_GOT_TLSGD_PCREL34 used in TLS… (authored by stefanp).
Revert "[LLD][PowerPC] Add support for R_PPC64_GOT_TLSGD_PCREL34 used in TLS…
Oct 1 2020, 11:29 AM
stefanp added a reverting change for D87318: [LLD][PowerPC] Add support for R_PPC64_GOT_TLSGD_PCREL34 used in TLS General Dynamic: rG5f3e565f59ee: Revert "[LLD][PowerPC] Add support for R_PPC64_GOT_TLSGD_PCREL34 used in TLS….
Oct 1 2020, 11:29 AM · Restricted Project
stefanp committed rG79122868f9a3: [LLD][PowerPC] Add support for R_PPC64_GOT_TLSGD_PCREL34 used in TLS General… (authored by stefanp).
[LLD][PowerPC] Add support for R_PPC64_GOT_TLSGD_PCREL34 used in TLS General…
Oct 1 2020, 11:01 AM
stefanp closed D87318: [LLD][PowerPC] Add support for R_PPC64_GOT_TLSGD_PCREL34 used in TLS General Dynamic.
Oct 1 2020, 11:01 AM · Restricted Project
stefanp updated the diff for D87318: [LLD][PowerPC] Add support for R_PPC64_GOT_TLSGD_PCREL34 used in TLS General Dynamic.

Updated the comment.

Oct 1 2020, 4:18 AM · Restricted Project

Sep 30 2020

stefanp updated the diff for D87318: [LLD][PowerPC] Add support for R_PPC64_GOT_TLSGD_PCREL34 used in TLS General Dynamic.

Further reduced the test case.

Sep 30 2020, 11:05 AM · Restricted Project
stefanp updated the diff for D87318: [LLD][PowerPC] Add support for R_PPC64_GOT_TLSGD_PCREL34 used in TLS General Dynamic.

Removed the last function from the test assembly file.

Sep 30 2020, 9:35 AM · Restricted Project
stefanp accepted D88586: [zorg] [PowerPC] Limit number of threads to 64 on clang-ppc64le-rhel buildbot.

LGTM

Sep 30 2020, 9:14 AM · Restricted Project