This is an archive of the discontinued LLVM Phabricator instance.

[RISCV] V does not imply F.
ClosedPublic

Authored by HsiangKai on Dec 14 2020, 11:02 PM.

Details

Summary

If users want to use vector floating point instructions, they need to specify 'F' extension additionally.

Diff Detail

Event Timeline

HsiangKai created this revision.Dec 14 2020, 11:02 PM
HsiangKai requested review of this revision.Dec 14 2020, 11:02 PM
Herald added a project: Restricted Project. · View Herald TranscriptDec 14 2020, 11:02 PM
Herald added a subscriber: MaskRay. · View Herald Transcript
craig.topper added inline comments.Dec 14 2020, 11:09 PM
llvm/lib/Target/RISCV/RISCVInstrInfoV.td
741

Can't this just be [HasStdExtV, HasStdExtF]?

893

Same here

frasercrmck added inline comments.Dec 15 2020, 2:11 AM
llvm/lib/Target/RISCV/RISCVInstrInfoV.td
741

I'd vote for separating them too

HsiangKai updated this revision to Diff 311877.Dec 15 2020, 5:17 AM

Address @craig.topper's comments.

This revision is now accepted and ready to land.Dec 16 2020, 12:46 PM
This revision was landed with ongoing or failed builds.Dec 16 2020, 6:58 PM
This revision was automatically updated to reflect the committed changes.