Page MenuHomePhabricator

[RISCV] Implement Hooks to avoid chaining SELECT

Authored by lenary on May 1 2020, 2:51 PM.



This implements two hooks that attempt to avoid control flow for RISC-V. RISC-V
will lower SELECTs into control flow, which is not a great idea.

The hook hasMultipleConditionRegisters() turns off the following
DAGCombiner folds:

select(C0|C1, x, y) <=> select(C0, x, select(C1, x, y))
select(C0&C1, x, y) <=> select(C0, select(C1, x, y), y)

The second hook setJumpIsExpensive controls a flag that has a similar purpose
and is used in CodeGenPrepare and the SelectionDAGBuilder.

Both of these have the effect of ensuring more logic is done before fewer jumps.

Note: with the B extension, we may be able to lower select into a conditional
move instruction, so at some point these hooks will need to be guarded based on
enabled extensions.

Diff Detail

Event Timeline

lenary created this revision.May 1 2020, 2:51 PM
Herald added a project: Restricted Project. · View Herald TranscriptMay 1 2020, 2:51 PM
lenary updated this revision to Diff 261569.May 1 2020, 4:01 PM

@luismarques pointed out there's an easier implementation of this: to use
setHasMultipleConditionRegisters, instead of overriding
shouldNormalizeToSelectSequence. This is correct as RISC-V branches can use
any register they want.

It might be a good idea to add more targetted tests for this. See llvm/test/CodeGen/PowerPC/no-pref-jumps.ll and some of the tests added in 940ab934d42.

lenary updated this revision to Diff 274535.Jun 30 2020, 10:35 AM
  • Update tests due to changes in D79267
lenary updated this revision to Diff 274539.Jun 30 2020, 10:46 AM
  • Update tests for last time
This revision is now accepted and ready to land.Jul 1 2020, 1:58 AM
lenary edited the summary of this revision. (Show Details)Jul 1 2020, 2:40 AM
lenary edited the summary of this revision. (Show Details)
This revision was automatically updated to reflect the committed changes.