[lld] Support TLS in RISC-V

[PkmX]

Summary

This patch adds support for thread-local storage (TLS). All four TLS models: global/local-dynamic (both are the same in RISC-V), initial-exec and local-exec are supported, but TLS relaxation is not implemented yet.

In RISC-V (in glibc's implementation at least), the thread pointer (tp/x4) points to the end of TCB and the beginning of the static TLS block, and each DTV points to 0x800 past the start of the TLS block.

[ruiu]

Generally looking good.

ELF/Arch/RISCV.cpp

39

I think there's no reason to use a preprocessor macro. Why don't you use constexpr?

74–77

It is probably easier to read if you write in this way:

if (Config->Is64) {
} else {
}

[PkmX]

De-template RISCV class.

[ruiu]

ELF/Arch/RISCV.cpp

39

Can you make this static?

ELF/InputSection.cpp

643–644

Hmm, was that just mis-designed?

[PkmX]

• Mark TLS_DTP_OFFSET as internal linkage.

[PkmX]

Rebase onto latest master

[PkmX]

Rebase onto latest master.

[PkmX]

Rebase onto master.

[PkmX]

Rebased. NFC from last revision.

[jrtc27]

ELF/InputSection.cpp

643

Perhaps we should have a TlsVariant1 boolean member (or a TlsVariant enum, but that seems overkill when there are only two variants), so we can avoid this?

[jrtc27]

Other than my single minor point (and D39323), is there anything blocking this from being accepted?

[jrtc27]

Oh, since D39323 needs rebasing, this will also need to be rebased again.

ELF/Arch/RISCV.cpp

67

Should probably move this into the if/else below?

[PkmX]

In D39324#1280424, @jrtc27 wrote:

Other than my single minor point (and D39323), is there anything blocking this from being accepted?

I will upload rebased diffs later.

ELF/InputSection.cpp

643

I think there are three variants now:

• Variant 1: TP points to beginning of TCB which has a fixed size, followed by TLS blocks.
• Variant 2: TP points to beginning of TCB with unspecified size, and TLS blocks are placed before TP.
• Variant 3: TP points to the end of TCB with unspecified size, and TLS blocks follows TP. This is essentially a reversed version of variant 2.

I agree there should probably an enum to distinguish these variants.

[jrtc27]

ELF/InputSection.cpp

643

Well, nobody that I know if is calling it variant 3, they're reusing the variant 1 machinery (as are we), so I think that would just add to the confusion. This is the same as PPC64 except with a zero TlsTpOffset (and a smaller DTP offset), and we don't call that variant 3.

[PkmX]

ELF/InputSection.cpp

643

Yeah, I suppose you can also say that it is variant 1 with a zero-sized TCB for the purpose of calculating TP offsets.

Still we need to be a separate flag/enum to distinguish that. Using TcbSize == 0 is sort of a hack here.

[ruiu]

For lld/ELF, we generally write tests in assembly rather than YAML. If you can write these tests in assembly, please do.

[jrtc27]

In D39324#1280966, @ruiu wrote:

For lld/ELF, we generally write tests in assembly rather than YAML. If you can write these tests in assembly, please do.

Unfortunately llvm-mc doesn't yet support any of these (unless a commit has passed me by, despite being subscribed to anything touching lib/Target/RISCV). I'm personally implementing some of this myself, but for now if we want tests we need to use YAML...

[ruiu]

Did you create these tests files from assembly files? If so, I'd add assembly as comments to keep them, so that we can rewrite them to assembly without re-inventing the same assembly files in the future.

[PkmX]

In D39324#1280982, @ruiu wrote:

Did you create these tests files from assembly files? If so, I'd add assembly as comments to keep them, so that we can rewrite them to assembly without re-inventing the same assembly files in the future.

The original assembly are already in the comments.

As @jrtc27 mentioned, LLVM MC does not support RISC-V's TLS pseudo instructions yet.

[ruiu]

LGTM

ELF/Arch/RISCV.cpp

321–325

I think we should inline TLS_DTP_OFFSET with a comment saying that 0x800 is the offset to the DTV. We write lots of magic numbers with comments in this function already.

[PkmX]

Rebased onto trunk.

[jrtc27]

Ping; still a couple of tiny points.

ELF/Arch/RISCV.cpp

67

This is still outstanding.

321–325

PkmX, the idea is to replace TLS_DTP_OFFSET with the constant literal, not declare it here.

[jrtc27]

@PkmX Ping, any chance you could address the remaining few points, please?

[PkmX]

• Rebased onto master
• Moved GotRel into if (Config->Is64)
• Use a literal constant for TLS_DTP_OFFSET.
• Rewrite all tests in MC. However this depends on D55667 to assemble la.tls.ie and la.tls.gd, which is not accepted yet.

[ruiu]

LGTM

[lenary]

Am I correct in thinking that this functionality has already been upstreamed into LLD, and that this patch can now been abandoned?

[ruiu]

This has been merged on July 2 as http://reviews.llvm.org/rL364813

ELF/Arch/RISCV.cpp

 
 using namespace llvm;
 using namespace llvm::object;
 using namespace llvm::support::endian;
 using namespace llvm::ELF;
 using namespace lld;
 using namespace lld::elf;
 
+static constexpr uint64_t TLS_DTP_OFFSET = 0x800;
+
 namespace {
 
 class RISCV final : public TargetInfo {
 public:
   RISCV();
   RelExpr getRelExpr(RelType Type, const SymbolBody &S,
                      const uint8_t *Loc) const override;
   void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
public:
   virtual bool usesOnlyLowPageBits(RelType Type) const override;
 };
 
 } // end anonymous namespace
 
 RISCV::RISCV() {
   CopyRel = R_RISCV_COPY;
   RelativeRel = R_RISCV_RELATIVE;
   GotRel = Config->Is64 ? R_RISCV_64 : R_RISCV_32;
   PltRel = R_RISCV_JUMP_SLOT;
   GotEntrySize = Config->Wordsize;
   GotPltEntrySize = Config->Wordsize;
   PltEntrySize = 16;
   PltHeaderSize = 32;
   GotPltHeaderEntriesNum = 2;
+  if (Config->Is64) {
+    TlsGotRel = R_RISCV_TLS_TPREL64;
+    TlsModuleIndexRel = R_RISCV_TLS_DTPMOD64;
+    TlsOffsetRel = R_RISCV_TLS_DTPREL64;
+  } else {
+    TlsGotRel = R_RISCV_TLS_TPREL32;
+    TlsModuleIndexRel = R_RISCV_TLS_DTPMOD32;
+    TlsOffsetRel = R_RISCV_TLS_DTPREL32;
+  }
 }
 
 bool RISCV::usesOnlyLowPageBits(RelType Type) const {
   return Type == R_RISCV_LO12_I || Type == R_RISCV_PCREL_LO12_I ||
          Type == R_RISCV_LO12_S || Type == R_RISCV_PCREL_LO12_S ||
          // These are used in a pair to calculate relative address in debug
          // sections, so they aren't really absolute. We list those here as a
          // hack so the linker doesn't try to create dynamic relocations.
RelExpr RISCV::getRelExpr(const RelType Type, const SymbolBody &S,
   case R_RISCV_32_PCREL:
     return R_PC;
   case R_RISCV_CALL_PLT:
     return R_PLT_PC;
   case R_RISCV_PCREL_LO12_I:
   case R_RISCV_PCREL_LO12_S:
     return R_RISCV_PC_INDIRECT;
   case R_RISCV_GOT_HI20:
+  case R_RISCV_TLS_GOT_HI20:
     return R_GOT_PC;
+  case R_RISCV_TPREL_HI20:
+  case R_RISCV_TPREL_LO12_I:
+  case R_RISCV_TPREL_LO12_S:
+    return R_TLS;
+  case R_RISCV_TLS_GD_HI20:
+    return R_TLSGD_PC;
   case R_RISCV_ALIGN:
   case R_RISCV_RELAX:
+  case R_RISCV_TPREL_ADD:
     return R_HINT;
   default:
     return R_ABS;
   }
 }
 
 // Extract bits V[Begin:End].
 static uint32_t extractBits(uint64_t V, uint32_t Begin, uint32_t End) {
case R_RISCV_CALL: {
     uint32_t Lo = Val - (Hi & 0xFFFFF000);
     write32le(Loc, (read32le(Loc) & 0xFFF) | (Hi & 0xFFFFF000));
     write32le(Loc + 4,
                    (read32le(Loc + 4) & 0xFFFFF) | ((Lo & 0xFFF) << 20));
     return;
   }
 
   case R_RISCV_PCREL_HI20:
+  case R_RISCV_TPREL_HI20:
   case R_RISCV_GOT_HI20:
+  case R_RISCV_TLS_GOT_HI20:
+  case R_RISCV_TLS_GD_HI20:
   case R_RISCV_HI20: {
     checkInt<32>(Loc, Val, Type);
     uint32_t Hi = Val + 0x800;
     write32le(Loc, (read32le(Loc) & 0xFFF) | (Hi & 0xFFFFF000));
     return;
   }
   case R_RISCV_PCREL_LO12_I:
+  case R_RISCV_TPREL_LO12_I:
   case R_RISCV_LO12_I: {
     checkInt<32>(Loc, Val, Type);
     uint32_t Hi = Val + 0x800;
     uint32_t Lo = Val - (Hi & 0xFFFFF000);
     write32le(Loc, (read32le(Loc) & 0xFFFFF) | ((Lo & 0xFFF) << 20));
     return;
   }
   case R_RISCV_PCREL_LO12_S:
+  case R_RISCV_TPREL_LO12_S:
   case R_RISCV_LO12_S: {
     checkInt<32>(Loc, Val, Type);
     uint32_t Hi = Val + 0x800;
     uint32_t Lo = Val - (Hi & 0xFFFFF000);
     uint32_t Imm11_5 = extractBits(Lo, 11, 5) << 25;
     uint32_t Imm4_0 = extractBits(Lo, 4, 0) << 7;
     write32le(Loc, (read32le(Loc) & 0x1FFF07F) | Imm11_5 | Imm4_0);
     return;
   }
 
+  case R_RISCV_TLS_DTPMOD32:
+    write32le(Loc, 1);
+    return;
+  case R_RISCV_TLS_DTPMOD64:
+    write64le(Loc, 1);
+    return;
+  case R_RISCV_TLS_DTPREL32:
+    write32le(Loc, Val - TLS_DTP_OFFSET);
+    return;
+  case R_RISCV_TLS_DTPREL64:
+    write64le(Loc, Val - TLS_DTP_OFFSET);
+    return;
+  case R_RISCV_TLS_TPREL32:
+    write32le(Loc, Val);
+    return;
+  case R_RISCV_TLS_TPREL64:
+    write64le(Loc, Val);
+    return;
+  case R_RISCV_TPREL_ADD:
+    return; // Do nothing
+
   case R_RISCV_ADD8:
     *Loc += Val;
     return;
   case R_RISCV_ADD16:
     write16le(Loc, read16le(Loc) + Val);
     return;
   case R_RISCV_ADD32:
     write32le(Loc, read32le(Loc) + Val);

ELF/InputSection.cpp

case R_RISCV_PC_INDIRECT: {
     // is calculated using HI20's symbol.
     uint64_t Label = Body.getVA();
     const InputSection *IS =
         cast<InputSection>(cast<DefinedRegular>(Body).Section);
     for (const Relocation &HiRel : IS->Relocations) {
       uint64_t HiOffset = IS->getOffset(HiRel.Offset);
       uint64_t HiAddrLoc = IS->getOutputSection()->Addr + HiOffset;
       if (Label == HiAddrLoc &&
-          isRelExprOneOf<R_PC, R_PLT_PC, R_GOT_PC>(HiRel.Expr)) {
+          isRelExprOneOf<R_PC, R_PLT_PC, R_GOT_PC, R_TLSGD_PC>(HiRel.Expr)) {
         return getRelocTargetVA(HiRel.Type, HiRel.Addend, HiAddrLoc, *HiRel.Sym,
                                 HiRel.Expr);
       }
     }
 
     error("PCREL_LO12 relocation to symbol " + Body.getName() +
           " without associated HI20 relocation");
     return 0;
static uint64_t getRelocTargetVA(RelType Type, int64_t A, uint64_t P,
   case R_TLS:
     // A weak undefined TLS symbol resolves to the base of the TLS
     // block, i.e. gets a value of zero. If we pass --gc-sections to
     // lld and .tbss is not referenced, it gets reclaimed and we don't
     // create a TLS program header. Therefore, we resolve this
     // statically to zero.
     if (Body.isTls() && Body.isUndefWeak())
       return 0;
-    if (Target->TcbSize)
+    // RISC-V uses variant I but tp points to the end of TCB.
+    if (Target->TcbSize || Config->EMachine == EM_RISCV)
       return Body.getVA(A) + alignTo(Target->TcbSize, Out::TlsPhdr->p_align);
     return Body.getVA(A) - Out::TlsPhdr->p_memsz;
   case R_RELAX_TLS_GD_TO_LE_NEG:
   case R_NEG_TLS:
     return Out::TlsPhdr->p_memsz - Body.getVA(A);
   case R_SIZE:
     return A; // Body.getSize was already folded into the addend.
   case R_TLSDESC:

ELF/Relocations.cpp

 handleTlsRelocation(RelType Type, SymbolBody &Body, InputSectionBase &C,
                     typename ELFT::uint Offset, int64_t Addend, RelExpr Expr) {
   if (!(C.Flags & SHF_ALLOC))
     return 0;
 
   if (!Body.isTls())
     return 0;
 
-  if (Config->EMachine == EM_ARM)
+  // TODO: RISC-V currently doesn't implement TLS relaxation yet, so we reuse
+  // the same logic for ARM tls relocation.
+  if (Config->EMachine == EM_ARM || Config->EMachine == EM_RISCV)
     return handleARMTlsRelocation<ELFT>(Type, Body, C, Offset, Addend, Expr);
   if (Config->EMachine == EM_MIPS)
     return handleMipsTlsRelocation<ELFT>(Type, Body, C, Offset, Addend, Expr);
 
   if (isRelExprOneOf<R_TLSDESC, R_TLSDESC_PAGE, R_TLSDESC_CALL>(Expr) &&
       Config->Shared) {
     if (InX::Got->addDynTlsEntry(Body)) {
       uint64_t Off = InX::Got->getGlobalDynOffset(Body);

test/ELF/Inputs/riscv-shared.yaml

- Name:            .data
     Type:            SHT_PROGBITS
     Flags:           [ SHF_WRITE, SHF_ALLOC ]
     AddressAlign:    0x0000000000000001
     Content:         2A000000
   - Name:            .bss
     Type:            SHT_NOBITS
     Flags:           [ SHF_WRITE, SHF_ALLOC ]
     AddressAlign:    0x0000000000000001
+  - Name:            .tdata
+    Type:            SHT_PROGBITS
+    Flags:           [ SHF_WRITE, SHF_ALLOC, SHF_TLS ]
+    AddressAlign:    0x0000000000000001
+    Content:         2A000000
 Symbols:         
   Local:           
     - Name:            .text
       Type:            STT_SECTION
       Section:         .text
     - Name:            .data
       Type:            STT_SECTION
       Section:         .data
     - Name:            .bss
       Type:            STT_SECTION
       Section:         .bss
+    - Name:            .tdata
+      Type:            STT_SECTION
+      Section:         .tdata
   Global:          
     - Name:            f
       Type:            STT_FUNC
       Section:         .text
+    - Name:            __tls_get_addr
+      Type:            STT_FUNC
+      Section:         .text
     - Name:            x
       Type:            STT_OBJECT
       Section:         .data
       Size:            0x0000000000000004
+    - Name:            tx
+      Type:            STT_TLS
+      Section:         .tdata
+      Size:            0x0000000000000004
 ...

test/ELF/riscv-tls-gd.test

+# .option norelax
+# .option pic
+#
+# .global _start
+# _start:
+# L1:
+#     la.tls.gd   a0, tx
+#     call        __tls_get_addr@plt
+#     lw          a0, 0(a0)
+#
+# REQUIRES: riscv
+# RUN: yaml2obj %s -o %t.o
+# RUN: yaml2obj %p/Inputs/riscv-shared.yaml -o %t2.o
+# RUN: ld.lld -shared %t2.o -o %t3.so
+# RUN: ld.lld %t.o %t3.so -o %t --section-start .got=0x20000 --section-start .text=0x10000
+# RUN: obj2yaml %t | FileCheck %s
+#
+# CHECK: - Name:            .text
+# CHECK:   Content:         '170501001305050097200100E78080010841'
+# 10000:       00010517                auipc   a0,0x10
+# 10004:       00050513                mv      a0,a0
+# 10008:       00012097                auipc   ra,0x12
+# 1000c:       018080e7                jalr    24(ra) # 22020 <__tls_get_addr@plt>
+# 10010:       4108                    lw      a0,0(a0)
+#
+# CHECK: - Name:            .got
+# CHECK:   Content:         '0000000000000000'
+# CHECK: - Name:            .rela.dyn
+# CHECK:   Relocations:
+# CHECK:     - Offset:          0x0000000000020000
+# CHECK:       Symbol:          tx
+# CHECK:       Type:            R_RISCV_TLS_DTPMOD32
+# CHECK:     - Offset:          0x0000000000020004
+# CHECK:       Symbol:          tx
+# CHECK:       Type:            R_RISCV_TLS_DTPREL32
+
+--- !ELF
+FileHeader:
+  Class:           ELFCLASS32
+  Data:            ELFDATA2LSB
+  Type:            ET_REL
+  Machine:         EM_RISCV
+  Flags:           [ EF_RISCV_RVC, EF_RISCV_FLOAT_ABI_SOFT ]
+Sections:
+  - Name:            .text
+    Type:            SHT_PROGBITS
+    Flags:           [ SHF_ALLOC, SHF_EXECINSTR ]
+    AddressAlign:    0x0000000000000002
+    Content:         '170500001305050097000000E78000000841'
+  - Name:            .rela.text
+    Type:            SHT_RELA
+    Flags:           [ SHF_INFO_LINK ]
+    Link:            .symtab
+    AddressAlign:    0x0000000000000004
+    Info:            .text
+    Relocations:
+      - Offset:          0x0000000000000000
+        Symbol:          tx
+        Type:            R_RISCV_TLS_GD_HI20
+      - Offset:          0x0000000000000004
+        Symbol:          '.L0 '
+        Type:            R_RISCV_PCREL_LO12_I
+      - Offset:          0x0000000000000008
+        Symbol:          __tls_get_addr
+        Type:            R_RISCV_CALL_PLT
+  - Name:            .data
+    Type:            SHT_PROGBITS
+    Flags:           [ SHF_WRITE, SHF_ALLOC ]
+    AddressAlign:    0x0000000000000001
+    Content:         ''
+  - Name:            .bss
+    Type:            SHT_NOBITS
+    Flags:           [ SHF_WRITE, SHF_ALLOC ]
+    AddressAlign:    0x0000000000000001
+Symbols:
+  Local:
+    - Name:            .text
+      Type:            STT_SECTION
+      Section:         .text
+    - Name:            .data
+      Type:            STT_SECTION
+      Section:         .data
+    - Name:            .bss
+      Type:            STT_SECTION
+      Section:         .bss
+    - Name:            L1
+      Section:         .text
+    - Name:            '.L0 '
+      Section:         .text
+  Global:
+    - Name:            _start
+      Section:         .text
+    - Name:            tx
+      Type:            STT_TLS
+    - Name:            __tls_get_addr
+...

test/ELF/riscv-tls-ie.test

+# .option norelax
+# .option pic
+# .global _start
+# _start:
+# L1:
+#     la.tls.ie   a5, tx
+#     add         a5, a5, tp
+#     lw          a5, 0(a5)
+#
+# REQUIRES: riscv
+# RUN: yaml2obj %s -o %t.o
+# RUN: yaml2obj %p/Inputs/riscv-shared.yaml -o %t2.o
+# RUN: ld.lld -shared %t2.o -o %t3.so
+# RUN: ld.lld %t.o %t3.so -o %t --section-start .got=0x20000 --section-start .text=0x10000
+# RUN: obj2yaml %t | FileCheck %s
+#
+# CHECK: - Name:            .text
+# CHECK:   Content:         9707010083A7070092979C43
+# 10000:       00010797                auipc   a5,0x10
+# 10004:       0007a783                lw      a5,0(a5) # 20000 <_start+0x10000>
+# 10008:       9792                    add     a5,a5,tp
+# 1000a:       439c                    lw      a5,0(a5)
+#
+# CHECK: - Name:            .got
+# CHECK:   Content:         '00000000'
+# CHECK: - Name:            .rela.dyn
+# CHECK:   Relocations:
+# CHECK:     - Offset:          0x0000000000020000
+# CHECK:       Symbol:          tx
+# CHECK:       Type:            R_RISCV_TLS_TPREL32
+
+--- !ELF
+FileHeader:
+  Class:           ELFCLASS32
+  Data:            ELFDATA2LSB
+  Type:            ET_REL
+  Machine:         EM_RISCV
+  Flags:           [ EF_RISCV_RVC, EF_RISCV_FLOAT_ABI_SOFT ]
+Sections:
+  - Name:            .text
+    Type:            SHT_PROGBITS
+    Flags:           [ SHF_ALLOC, SHF_EXECINSTR ]
+    AddressAlign:    0x0000000000000002
+    Content:         9707000083A7070092979C43
+  - Name:            .rela.text
+    Type:            SHT_RELA
+    Flags:           [ SHF_INFO_LINK ]
+    Link:            .symtab
+    AddressAlign:    0x0000000000000004
+    Info:            .text
+    Relocations:
+      - Offset:          0x0000000000000000
+        Symbol:          tx
+        Type:            R_RISCV_TLS_GOT_HI20
+      - Offset:          0x0000000000000004
+        Symbol:          '.L0 '
+        Type:            R_RISCV_PCREL_LO12_I
+  - Name:            .data
+    Type:            SHT_PROGBITS
+    Flags:           [ SHF_WRITE, SHF_ALLOC ]
+    AddressAlign:    0x0000000000000001
+    Content:         ''
+  - Name:            .bss
+    Type:            SHT_NOBITS
+    Flags:           [ SHF_WRITE, SHF_ALLOC ]
+    AddressAlign:    0x0000000000000001
+Symbols:
+  Local:
+    - Name:            .text
+      Type:            STT_SECTION
+      Section:         .text
+    - Name:            .data
+      Type:            STT_SECTION
+      Section:         .data
+    - Name:            .bss
+      Type:            STT_SECTION
+      Section:         .bss
+    - Name:            L1
+      Section:         .text
+    - Name:            '.L0 '
+      Section:         .text
+  Global:
+    - Name:            _start
+      Section:         .text
+    - Name:            tx
+      Type:            STT_TLS
+...

test/ELF/riscv-tls-le.test

+# .option norelax
+# .global _start
+# _start:
+# L1:
+#     lui a5, %tprel_hi(x)
+#     add a5, a5, tp, %tprel_add(x)
+#     lw  a5, %tprel_lo(x)(a5)
+#
+# .section    .tdata, "awT", @progbits
+# .type       x, @object
+# .size       x, 4
+# x:
+#     .word 42
+#
+#
+# REQUIRES: riscv
+# RUN: yaml2obj %s -o %t.o
+# RUN: ld.lld %t.o -o %t
+# RUN: obj2yaml %t | FileCheck %s
+#
+# CHECK: - Name:            .text
+# CHECK:   Content:         B7070000B387470083A70700
+# 11000:       000007b7                lui     a5,0x0
+# 11004:       004787b3                add     a5,a5,tp
+# 11008:       0007a783                lw      a5,0(a5) # 0 <x>
+#
+# CHECK: - Name:            .tdata
+# CHECK:   Content:         2A000000
+
+--- !ELF
+FileHeader:
+  Class:           ELFCLASS32
+  Data:            ELFDATA2LSB
+  Type:            ET_REL
+  Machine:         EM_RISCV
+  Flags:           [ EF_RISCV_RVC, EF_RISCV_FLOAT_ABI_SOFT ]
+Sections:
+  - Name:            .text
+    Type:            SHT_PROGBITS
+    Flags:           [ SHF_ALLOC, SHF_EXECINSTR ]
+    AddressAlign:    0x0000000000000002
+    Content:         B7070000B387470083A70700
+  - Name:            .rela.text
+    Type:            SHT_RELA
+    Flags:           [ SHF_INFO_LINK ]
+    Link:            .symtab
+    AddressAlign:    0x0000000000000004
+    Info:            .text
+    Relocations:
+      - Offset:          0x0000000000000000
+        Symbol:          x
+        Type:            R_RISCV_TPREL_HI20
+      - Offset:          0x0000000000000004
+        Symbol:          x
+        Type:            R_RISCV_TPREL_ADD
+      - Offset:          0x0000000000000008
+        Symbol:          x
+        Type:            R_RISCV_TPREL_LO12_I
+  - Name:            .data
+    Type:            SHT_PROGBITS
+    Flags:           [ SHF_WRITE, SHF_ALLOC ]
+    AddressAlign:    0x0000000000000001
+    Content:         ''
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