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asb
jrtc27

Commits

rG74ed1f264156: Merging r369093: --------------------------------------------------------------…
rL369649: Merging r369093:
rG1653ebee3f04: [RISCV] Add inline asm constraint A for RISC-V
rC369093: [RISCV] Add inline asm constraint A for RISC-V
rL369093: [RISCV] Add inline asm constraint A for RISC-V

Summary

This allows the constraint A to be used in inline asm for RISC-V, which allows an address held in a register to be used.

This patch adds the minimal amount of code required to get operands with the right constraints to compile.

Diff Detail

Repository: rL LLVM

Event Timeline

lewis-revill created this revision.Nov 9 2018, 1:21 AM

Herald added subscribers: cfe-commits, jocewei, PkmX and 18 others. · View Herald TranscriptNov 9 2018, 1:21 AM

lewis-revill added a parent revision: D54296: [RISCV] Lower inline asm constraint A for RISC-V.Nov 9 2018, 1:26 AM

lewis-revill added a parent revision: D54091: [RISCV] Add inline asm constraints I, J & K for RISC-V.Nov 9 2018, 1:29 AM

jrtc27 requested changes to this revision.Feb 6 2019, 7:00 AM

jrtc27 added inline comments.

test/CodeGen/riscv-inline-asm.c
32 ↗	(On Diff #173278)	Should be `sideeffect`

This revision now requires changes to proceed.Feb 6 2019, 7:00 AM

Herald added a project: Restricted Project. · View Herald TranscriptFeb 6 2019, 7:00 AM

Correct test.

Herald added a project: Restricted Project. · View Herald TranscriptFeb 19 2019, 2:55 AM

Herald added subscribers: llvm-commits, jdoerfert. · View Herald Transcript

lewis-revill updated this revision to Diff 204512.Jun 13 2019, 6:30 AM

lewis-revill retitled this revision from [WIP, RISCV] Add inline asm constraint A for RISC-V to [RISCV] Add inline asm constraint A for RISC-V.

Herald added subscribers: Jim, benna, psnobl. · View Herald TranscriptJun 13 2019, 6:30 AM

LGTM, thanks!

Rebased prior to commit.

Herald added subscribers: s.egerton, lenary, MaskRay. · View Herald TranscriptAug 16 2019, 3:06 AM

This revision was not accepted when it landed; it landed in state Needs Review.Aug 16 2019, 3:23 AM

Closed by commit rL369093: [RISCV] Add inline asm constraint A for RISC-V (authored by lewis-revill). · Explain Why

This revision was automatically updated to reflect the committed changes.

Please use GitHub pull requests for new patches. Phabricator shutdown timeline

[RISCV] Add inline asm constraint A for RISC-V
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Diff 215556

cfe/trunk/lib/Basic/Targets/RISCV.cpp

cfe/trunk/test/CodeGen/riscv-inline-asm.c

Please use GitHub pull requests for new patches. Phabricator shutdown timeline

[RISCV] Add inline asm constraint A for RISC-VClosedPublicActions

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Diff 215556

cfe/trunk/lib/Basic/Targets/RISCV.cpp

cfe/trunk/test/CodeGen/riscv-inline-asm.c

[RISCV] Add inline asm constraint A for RISC-V
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