- User Since
- Sep 9 2016, 12:55 AM (175 w, 3 d)
Sep 30 2019
Oct 11 2018
For me the patch looks good, thank you for working on it Alex!
Jun 7 2018
@asb I just missed my opportunity in the call to ping you regarding this patch. ;) Are there any remaining issues with it that I missed?
May 30 2018
Updated the patch to emit ADDIW again and rebased it.
May 29 2018
Thank you for finding the flaw in my thinking. I obviously missed that everything falls apart due to the sign extension of the LUI instruction...
May 24 2018
In case it helps, my reasoning is as follows. There are basically two situations which can occur:
May 23 2018
Rebased the patch. Luckily, it was not as bad as I anticipated. :)
May 22 2018
Ping! Some feedback would be nice before I rebase this patch (which is less fun as it should be due to the recent improvements on the ASM parser)...
May 11 2018
I finally found the time to work on this patch, sorry for the delay.
Apr 26 2018
Apr 18 2018
Apr 17 2018
Updated patch to fix variable names.
Apr 13 2018
Extended peephole optimisation to fix introduced codegen regression.
Rebased on master as Mandeep requested via email .
Mar 23 2018
Mar 15 2018
I rebased the patch and addressed all comments. Thank you again for the feedback.
Mar 7 2018
Hi Alex, thank you very much for your comments!
Feb 26 2018
Thank you for your comments Eli!
Feb 23 2018
Addressed the discovered defect regarding the immediate of the li instruction. In RV32 mode we now accept either a signed or an unsigned 32-bit value. In RV64 mode we accept basically everything that fits into 64-bit.
Feb 16 2018
I just stumbled across a difference between the binutils assembler and my current li implementation regarding accepted immediate values.
Feb 6 2018
Fixed some typos in the comments.
Added support for handling 64-bit immediate values.
Feb 2 2018
Thank you Ana for your comments!
Jan 31 2018
Moved the shared emitLoadImm methods to a free function into the RISCVDesc library. Additionally, the Size of the pseudo instruction has been set to 8 (worst case for RV32) to ensure proper branch relaxation. Finally, the pattern for 32-bit immediate integers has been updated to generate PseudoLI and the tests have been updated accordingly.
Jan 18 2018
Addresses all of Alex's comments (thank you) and integrates PseudoLI emission into CodeGen.
Jan 12 2018
Hi Alex, thank you for your comments!
Jan 11 2018
Great, thank you Ana for confirming that this patch fixes the problem.
Jan 4 2018
Ignoring the predicates currently leads to the problem that aliases get printed although the corresponding extension is not enabled.
Dec 14 2017
Dec 13 2017
Great. I am going to work on the patch which enables aliases by default and updates the tests next. Is it preferred that only the RUN lines are updated to disable aliases in the already existing tests or should the actual content of the tests be updated with aliases?
Dec 11 2017
Addressed all comments for this patch. I already used riscv-no-aliases as command line flag but defaulted it to true instead of adding riscv-aliases which would be removed soon anyway.
Thank you for the review Alex. I will incorporate your comments in an updated patch today.
Dec 7 2017
Rebased as requested.