This allows the constraints I, J & K to be used in inline asm for RISC-V, with the following semantics (equivalent to GCC):
I: Any 12-bit signed immediate.
J: Integer zero only.
K: Any 5-bit unsigned immediate.
See the GCC definitions here: https://gcc.gnu.org/onlinedocs/gccint/Machine-Constraints.html
Note that GCC also implements 'f' for floating point register and 'A' for address-only operand. These are not implemented here because:
- It appears trivial to implement the floating point register constraint, however since floating point registers are not yet recognised by the calling convention the call to the inline asm node cannot be lowered.
- I'm not yet certain how to implement an 'address-only' operand and I'd rather get the above constraints done first and add it later.