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brucehoult (Bruce Hoult)
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User Since
Jun 5 2018, 3:11 PM (75 w, 2 d)

Recent Activity

Aug 29 2019

brucehoult added a comment to D66278: [RISCV] Enable tail call opt for variadic function.
In D66278#1652021, @Jim wrote:

It can focus on whether the stack frame is created and not yet freed before the function call
for saving saved register or passing parameters or others.

Aug 29 2019, 7:47 PM · Restricted Project
brucehoult added a comment to D66278: [RISCV] Enable tail call opt for variadic function.

Please may you explain a bit further why calls using varargs (when not passed by the stack) are allowed to be tail-call-optimised?

I feel the justification would be good documentation to go with the patch, and will help out me and other reviewers.

Aug 29 2019, 4:01 AM · Restricted Project

Jan 7 2019

brucehoult added inline comments to D53230: [RISCV] Introduce codegen patterns for RV64M-only instructions.
Jan 7 2019, 4:43 PM
brucehoult added inline comments to D53230: [RISCV] Introduce codegen patterns for RV64M-only instructions.
Jan 7 2019, 4:07 PM

Oct 16 2018

brucehoult added a comment to D53291: add riscv32e to the llvm.

But, I was not sure what rv32e and ilp32e really meaans. There is still something not clearly. Is the march rv32e only means that the regs only contains x0-x15 ? And the ABI ilp32e means Stack Alignment and calling convention, etc (see in https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md#rv32e-calling-convention )?

Oct 16 2018, 1:49 AM · Restricted Project

Oct 15 2018

brucehoult added a comment to D53291: add riscv32e to the llvm.

rv32e arch and ilp32e ABI is decoupling is GCC, that's mean rv32i with ilp32e is possible, so I would suggest separate two thing.

Oct 15 2018, 8:05 PM · Restricted Project

Oct 9 2018

brucehoult added a comment to D52962: [RISCV] Constant materialisation for RV64I.

Oh, and by the way, if the user really wants to use a load, they can easily force that by writing a global const (or single element initialized array to be really sure).

Oct 9 2018, 2:38 AM
brucehoult added a comment to D52962: [RISCV] Constant materialisation for RV64I.

Wouldn't it better to put more complicated constants (requiring 4 and more instructions to materialize) in constant pool and load them from there?

Oct 9 2018, 1:44 AM

Jun 27 2018

brucehoult added a comment to rL335786: [RISCV] Add machine function pass to merge base + offset.

This pass already handles that indeed.

Jun 27 2018, 2:44 PM
brucehoult added a comment to rL335786: [RISCV] Add machine function pass to merge base + offset.

Can something similar to this be done where the user is a load or store?

Jun 27 2018, 2:22 PM