The patch supports vector strict_fsetcc/fsetccs. Instead of revserving fflags,
the method to implement scalar quiet compares, the patch implement quiet
compares by masking the signaling compares when either input is NaN [0].
Details
Details
Diff Detail
Diff Detail
- Repository
- rG LLVM Github Monorepo
Event Timeline
Comment Actions
We shouldn't need to touch fflags for the quiet comparisons for vector. We can do what the vector spec shows for isgreater. isgreater is the same as quiet ogt.
# Example of implementing isgreater() vmfeq.vv v0, va, va vmfeq.vv v1, vb, vb vmand.mm v0, v0, v1 vmfgt.vv v0, va, vb, v0.t # so only set flags on ordered values.
llvm/lib/Target/RISCV/RISCVISelLowering.cpp | ||
---|---|---|
7456 | I think you can do auto [Mask, VL] = getDefaultVLOps(InVT, ContainerInVT, DL, DAG, Subtarget); before the if. Then you don't need this else. The mask will have already been set to all ones by getDefaultVLOps. |
llvm/lib/Target/RISCV/RISCVISelLowering.cpp | ||
---|---|---|
7419 | Don't we need to signal for qnan? strict_fsetcc oeq won't do that. |
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfcmp-constrained-sdnode.ll | ||
---|---|---|
49 ↗ | (On Diff #513079) | Yeah, you are right. |
conditon -> condition