[RISCV][NFC] Add VIOTA_VL node

[luke]

Summary

This adds a node for the viota.m instruction so that it can be used
during instruction lowering.

[luke]

Not needed anymore as D144092 doesn't need viota.m anymore

llvm/lib/Target/RISCV/RISCVISelLowering.h

enum NodeType : unsigned {
   VMAND_VL,
   VMOR_VL,
   VMXOR_VL,
 
   // Set mask vector to all zeros or ones.
   VMCLR_VL,
   VMSET_VL,
 
+  // viota.m with additional mask and VL operands.
+  // Operands are (passthru, src, mask, vl)
+  VIOTA_VL,
+
   // Matches the semantics of vrgather.vx and vrgather.vv with extra operands
   // for passthru and VL. Operands are (src, index, mask, passthru, vl).
   VRGATHER_VX_VL,
   VRGATHER_VV_VL,
   VRGATHEREI16_VV_VL,
 
   // Vector sign/zero extend with additional mask & VL operands.
   VSEXT_VL,

llvm/lib/Target/RISCV/RISCVISelLowering.cpp

#define NODE_NAME_CASE(NODE)                                                   \
   NODE_NAME_CASE(SETCC_VL)
   NODE_NAME_CASE(VSELECT_VL)
   NODE_NAME_CASE(VP_MERGE_VL)
   NODE_NAME_CASE(VMAND_VL)
   NODE_NAME_CASE(VMOR_VL)
   NODE_NAME_CASE(VMXOR_VL)
   NODE_NAME_CASE(VMCLR_VL)
   NODE_NAME_CASE(VMSET_VL)
+  NODE_NAME_CASE(VIOTA_VL)
   NODE_NAME_CASE(VRGATHER_VX_VL)
   NODE_NAME_CASE(VRGATHER_VV_VL)
   NODE_NAME_CASE(VRGATHEREI16_VV_VL)
   NODE_NAME_CASE(VSEXT_VL)
   NODE_NAME_CASE(VZEXT_VL)
   NODE_NAME_CASE(VCPOP_VL)
   NODE_NAME_CASE(VFIRST_VL)
   NODE_NAME_CASE(READ_CSR)

llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td

 
 def riscv_vfirst_vl : SDNode<"RISCVISD::VFIRST_VL",
                             SDTypeProfile<1, 3, [SDTCisVT<0, XLenVT>,
                                                  SDTCisVec<1>, SDTCisInt<1>,
                                                  SDTCVecEltisVT<2, i1>,
                                                  SDTCisSameNumEltsAs<1, 2>,
                                                  SDTCisVT<3, XLenVT>]>>;
 
+def riscv_viota_vl : SDNode<"RISCVISD::VIOTA_VL",
+                           SDTypeProfile<1, 4, [SDTCisVec<0>,
+                                                SDTCisSameAs<1, 0>,
+                                                SDTCisSameNumEltsAs<0, 2>,
+                                                SDTCVecEltisVT<2, i1>,
+                                                SDTCisSameAs<2, 3>,
+                                                SDTCisVT<4, XLenVT>]>>;
+
 def SDT_RISCVVEXTEND_VL : SDTypeProfile<1, 3, [SDTCisVec<0>,
                                                SDTCisSameNumEltsAs<0, 1>,
                                                SDTCisSameNumEltsAs<1, 2>,
                                                SDTCVecEltisVT<2, i1>,
                                                SDTCisVT<3, XLenVT>]>;
 def riscv_sext_vl : SDNode<"RISCVISD::VSEXT_VL", SDT_RISCVVEXTEND_VL>;
 def riscv_zext_vl : SDNode<"RISCVISD::VZEXT_VL", SDT_RISCVVEXTEND_VL>;
 
def : Pat<(mti.Mask (riscv_vmnot_vl (riscv_vmor_vl VR:$rs1, VR:$rs2,
             (!cast<Instruction>("PseudoVMNOR_MM_" # mti.LMul.MX)
                  VR:$rs1, VR:$rs2, GPR:$vl, mti.Log2SEW)>;
   def : Pat<(mti.Mask (riscv_vmnot_vl (riscv_vmxor_vl VR:$rs1, VR:$rs2,
                                                       VLOpFrag),
                                       VLOpFrag)),
             (!cast<Instruction>("PseudoVMXNOR_MM_" # mti.LMul.MX)
                  VR:$rs1, VR:$rs2, GPR:$vl, mti.Log2SEW)>;
 
-  // Match the not idiom to the vmnot.m pseudo.
+  // Match the not idiom to the vmnand.m pseudo.
   def : Pat<(mti.Mask (riscv_vmnot_vl VR:$rs, VLOpFrag)),
             (!cast<Instruction>("PseudoVMNAND_MM_" # mti.LMul.MX)
                  VR:$rs, VR:$rs, GPR:$vl, mti.Log2SEW)>;
 
   // 15.2 Vector count population in mask vcpop.m
   def : Pat<(XLenVT (riscv_vcpop_vl (mti.Mask VR:$rs2), (mti.Mask true_mask),
                                     VLOpFrag)),
             (!cast<Instruction>("PseudoVCPOP_M_" # mti.BX)
def : Pat<(XLenVT (riscv_vfirst_vl (mti.Mask VR:$rs2), (mti.Mask true_mask),
             (!cast<Instruction>("PseudoVFIRST_M_" # mti.BX)
                  VR:$rs2, GPR:$vl, mti.Log2SEW)>;
   def : Pat<(XLenVT (riscv_vfirst_vl (mti.Mask VR:$rs2), (mti.Mask V0),
                                     VLOpFrag)),
             (!cast<Instruction>("PseudoVFIRST_M_" # mti.BX # "_MASK")
                  VR:$rs2, (mti.Mask V0), GPR:$vl, mti.Log2SEW)>;
 }
 
+// 15.8 viota.m
+foreach vti = AllIntegerVectors in {
+  def : Pat<(vti.Vector (riscv_viota_vl vti.RegClass:$merge,
+                                        (vti.Mask VR:$rs2),
+                                        (vti.Mask V0),
+                                        VLOpFrag)),
+            (!cast<Instruction>("PseudoVIOTA_M_"#vti.LMul.MX#_#"MASK")
+                vti.RegClass:$merge, (vti.Mask VR:$rs2), (vti.Mask V0),
+                GPR:$vl, vti.Log2SEW, TAIL_AGNOSTIC)>;
+}
+
 } // Predicates = [HasVInstructions]
 
 // 16. Vector Permutation Instructions
 
 let Predicates = [HasVInstructions] in {
 // 16.1. Integer Scalar Move Instructions
 // 16.4. Vector Register Gather Instruction
 foreach vti = AllIntegerVectors in {