[12/15][Clang][RISCV][NFC] Refine the way to check for Policy in riscv_vector_builtin_cg.inc

[eopXD]

Summary

The current way creates a fallacy that checking for
PolicyAttrs == TAIL_AGNOSTIC is implicitly equivalant to
TAIL_AGNOSTIC_MASK_UNDISTURBED. This works under the assumption that
an unmasked intrinsic has a policy of TAMU. The expression here is
mis-leading and will not be correct when the default policy is not
TAMU.

As this patch-set targets to change the default policy from TAMU to
TAMA, this commit is necessary before changing the default.

This is the 12th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.

Please refer to the cover letter in the 1st commit (D141573) for an
overview.

[craig.topper]

clang/include/clang/Support/RISCVVIntrinsicUtils.h

431

simultaes -> simulates

clang/lib/CodeGen/CGBuiltin.cpp

19484

simultaes -> simulates

[eopXD]

Update code: Address review comment from Craig.

[craig.topper]

LGTM

clang/include/clang/Basic/riscv_vector.td

defm "" : RVVOutBuiltinSet<NAME, "csil",
                                [["vx","Uv", "UvUvUvz"]]>;
   }
 }
 
 let UnMaskedPolicyScheme = HasPassthruOperand,
     ManualCodegen = [{
       if (IsMasked) {
         std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end() - 1);
-        if (PolicyAttrs == TAIL_AGNOSTIC_MASK_AGNOSTIC)
+        if ((PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA))
           Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType));
       } else {
-        if (PolicyAttrs == TAIL_AGNOSTIC)
+        if (PolicyAttrs & RVV_VTA)
           Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType));
       }
 
       Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
       IntrinsicTypes = {ResultType, Ops.back()->getType()};
     }] in {
   multiclass RVVSlideDownBuiltinSet {
     defm "" : RVVOutBuiltinSet<NAME, "csilxfd",
let Name = NAME # "_v",
       MaskedIRName = "vleff_mask",
       SupportOverloading = false,
       UnMaskedPolicyScheme = HasPassthruOperand,
       ManualCodegen = [{
       {
         if (IsMasked) {
           // Move mask to right before vl.
           std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end() - 1);
-          if (PolicyAttrs == TAIL_AGNOSTIC_MASK_AGNOSTIC)
+          if ((PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA))
             Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType));
           Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
           IntrinsicTypes = {ResultType, Ops[4]->getType()};
         } else {
-          if (PolicyAttrs == TAIL_AGNOSTIC)
+          if (PolicyAttrs & RVV_VTA)
             Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType));
           IntrinsicTypes = {ResultType, Ops[3]->getType()};
         }
         Ops[1] = Builder.CreateBitCast(Ops[1], ResultType->getPointerTo());
         Value *NewVL = Ops[2];
         Ops.erase(Ops.begin() + 2);
         llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes);
         llvm::Value *LoadValue = Builder.CreateCall(F, Ops, "");
defvar eew = !cond(!eq(type, "c") : "8",
             NF = nf,
             ManualCodegen = [{
     {
       ResultType = ConvertType(E->getArg(0)->getType()->getPointeeType());
       IntrinsicTypes = {ResultType, Ops.back()->getType()};
       SmallVector<llvm::Value*, 12> Operands;
 
       // Please refer to comment under 'defvar NFList' in this file
-      if ((IsMasked && PolicyAttrs == TAIL_AGNOSTIC_MASK_AGNOSTIC) ||
-          (!IsMasked && PolicyAttrs == TAIL_AGNOSTIC))
+      if ((IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) ||
+          (!IsMasked && PolicyAttrs & RVV_VTA))
         Operands.append(NF, llvm::PoisonValue::get(ResultType));
       else {
         if (IsMasked)
           Operands.append(Ops.begin() + NF + 1, Ops.begin() + 2 * NF + 1);
         else // Unmasked
           Operands.append(Ops.begin() + NF, Ops.begin() + 2 * NF);
       }
       unsigned PtrOperandIdx = IsMasked ?
-        (PolicyAttrs == TAIL_AGNOSTIC_MASK_AGNOSTIC) ? NF + 1 : 2 * NF + 1 :
-        (PolicyAttrs == TAIL_AGNOSTIC) ? NF : 2 * NF;
+        ((PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) ? NF + 1 : 2 * NF + 1 :
+        (PolicyAttrs & RVV_VTA) ? NF : 2 * NF;
       Value *PtrOperand = Ops[PtrOperandIdx];
       Value *VLOperand = Ops[PtrOperandIdx + 1];
       Operands.push_back(PtrOperand);
       if (IsMasked)
         Operands.push_back(Ops[NF]);
       Operands.push_back(VLOperand);
       if (IsMasked)
         Operands.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
defvar eew = !cond(!eq(type, "c") : "8",
             NF = nf,
             ManualCodegen = [{
     {
       ResultType = ConvertType(E->getArg(0)->getType()->getPointeeType());
       IntrinsicTypes = {ResultType, Ops.back()->getType()};
       SmallVector<llvm::Value*, 12> Operands;
 
       // Please refer to comment under 'defvar NFList' in this file
-      if ((IsMasked && PolicyAttrs == TAIL_AGNOSTIC_MASK_AGNOSTIC) ||
-          (!IsMasked && PolicyAttrs == TAIL_AGNOSTIC))
+      if ((IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) ||
+          (!IsMasked && PolicyAttrs & RVV_VTA))
         Operands.append(NF, llvm::PoisonValue::get(ResultType));
       else {
         if (IsMasked)
           Operands.append(Ops.begin() + NF + 1, Ops.begin() + 2 * NF + 1);
         else // Unmasked
           Operands.append(Ops.begin() + NF, Ops.begin() + 2 * NF);
       }
       unsigned PtrOperandIdx = IsMasked ?
-        (PolicyAttrs == TAIL_AGNOSTIC_MASK_AGNOSTIC) ? NF + 1 : 2 * NF + 1 :
-        (PolicyAttrs == TAIL_AGNOSTIC) ? NF : 2 * NF;
+        ((PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) ? NF + 1 : 2 * NF + 1 :
+        (PolicyAttrs & RVV_VTA) ? NF : 2 * NF;
       Value *PtrOperand = Ops[PtrOperandIdx];
       Value *NewVLOperand = Ops[PtrOperandIdx + 1];
       Value *VLOperand = Ops[PtrOperandIdx + 2];
       Operands.push_back(PtrOperand);
       if (IsMasked)
         Operands.push_back(Ops[NF]);
       Operands.push_back(VLOperand);
       if (IsMasked)
defvar eew = !cond(!eq(type, "c") : "8",
             NF = nf,
             ManualCodegen = [{
     {
       ResultType = ConvertType(E->getArg(0)->getType()->getPointeeType());
       IntrinsicTypes = {ResultType, Ops.back()->getType()};
       SmallVector<llvm::Value*, 12> Operands;
 
       // Please refer to comment under 'defvar NFList' in this file
-      if ((IsMasked && PolicyAttrs == TAIL_AGNOSTIC_MASK_AGNOSTIC) ||
-          (!IsMasked && PolicyAttrs == TAIL_AGNOSTIC))
+      if ((IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) ||
+          (!IsMasked && PolicyAttrs & RVV_VTA))
         Operands.append(NF, llvm::PoisonValue::get(ResultType));
       else {
         if (IsMasked)
           Operands.append(Ops.begin() + NF + 1, Ops.begin() + 2 * NF + 1);
         else // Unmasked
           Operands.append(Ops.begin() + NF, Ops.begin() + 2 * NF);
       }
       unsigned PtrOperandIdx = IsMasked ?
-        (PolicyAttrs == TAIL_AGNOSTIC_MASK_AGNOSTIC) ? NF + 1 : 2 * NF + 1 :
-        (PolicyAttrs == TAIL_AGNOSTIC) ? NF : 2 * NF;
+        ((PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) ? NF + 1 : 2 * NF + 1 :
+        (PolicyAttrs & RVV_VTA) ? NF : 2 * NF;
       Value *PtrOperand = Ops[PtrOperandIdx];
       Value *StrideOperand = Ops[PtrOperandIdx + 1];
       Value *VLOperand = Ops[PtrOperandIdx + 2];
       Operands.push_back(PtrOperand);
       Operands.push_back(StrideOperand);
       if (IsMasked)
         Operands.push_back(Ops[NF]);
       Operands.push_back(VLOperand);
foreach eew_info = EEWList in {
             MaskedIRName = op # nf # "_mask",
             NF = nf,
             ManualCodegen = [{
     {
       ResultType = ConvertType(E->getArg(0)->getType()->getPointeeType());
       SmallVector<llvm::Value*, 12> Operands;
 
       // Please refer to comment under 'defvar NFList' in this file
-      if ((IsMasked && PolicyAttrs == TAIL_AGNOSTIC_MASK_AGNOSTIC) ||
-          (!IsMasked && PolicyAttrs == TAIL_AGNOSTIC))
+      if ((IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) ||
+          (!IsMasked && PolicyAttrs & RVV_VTA))
         Operands.append(NF, llvm::PoisonValue::get(ResultType));
       else {
         if (IsMasked)
           Operands.append(Ops.begin() + NF + 1, Ops.begin() + 2 * NF + 1);
         else // Unmasked
           Operands.append(Ops.begin() + NF, Ops.begin() + 2 * NF);
       }
       unsigned PtrOperandIdx = IsMasked ?
-        (PolicyAttrs == TAIL_AGNOSTIC_MASK_AGNOSTIC) ? NF + 1 : 2 * NF + 1 :
-        (PolicyAttrs == TAIL_AGNOSTIC) ? NF : 2 * NF;
+        ((PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) ? NF + 1 : 2 * NF + 1 :
+        (PolicyAttrs & RVV_VTA) ? NF : 2 * NF;
       Value *PtrOperand = Ops[PtrOperandIdx];
       Value *IndexOperand = Ops[PtrOperandIdx + 1];
       Value *VLOperand = Ops[PtrOperandIdx + 2];
       Operands.push_back(PtrOperand);
       Operands.push_back(IndexOperand);
       if (IsMasked)
         Operands.push_back(Ops[NF]);
       Operands.push_back(VLOperand);
multiclass RVVPseudoUnaryBuiltin<string IR, string type_range> {
   let Name = NAME,
       IRName = IR,
       MaskedIRName = IR # "_mask",
       UnMaskedPolicyScheme = HasPassthruOperand,
       ManualCodegen = [{
       {
         if (IsMasked) {
           std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end() - 1);
-          if (PolicyAttrs == TAIL_AGNOSTIC_MASK_AGNOSTIC)
+          if ((PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA))
             Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType));
         } else {
-          if (PolicyAttrs == TAIL_AGNOSTIC)
+          if (PolicyAttrs & RVV_VTA)
             Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType));
         }
         auto ElemTy = cast<llvm::VectorType>(ResultType)->getElementType();
         Ops.insert(Ops.begin() + 2, llvm::Constant::getNullValue(ElemTy));
 
         if (IsMasked) {
           Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
           // maskedoff, op1, op2, mask, vl, policy
multiclass RVVPseudoVNotBuiltin<string IR, string type_range> {
   let Name = NAME,
       IRName = IR,
       MaskedIRName = IR # "_mask",
       UnMaskedPolicyScheme = HasPassthruOperand,
       ManualCodegen = [{
       {
         if (IsMasked) {
           std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end() - 1);
-          if (PolicyAttrs == TAIL_AGNOSTIC_MASK_AGNOSTIC)
+          if ((PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA))
             Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType));
         } else {
-          if (PolicyAttrs == TAIL_AGNOSTIC)
+          if (PolicyAttrs & RVV_VTA)
             Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType));
         }
         auto ElemTy = cast<llvm::VectorType>(ResultType)->getElementType();
         Ops.insert(Ops.begin() + 2,
                    llvm::Constant::getAllOnesValue(ElemTy));
         if (IsMasked) {
           Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
           // maskedoff, op1, po2, mask, vl, policy
multiclass RVVPseudoVFUnaryBuiltin<string IR, string type_range> {
   let Name = NAME,
       IRName = IR,
       MaskedIRName = IR # "_mask",
       UnMaskedPolicyScheme = HasPassthruOperand,
       ManualCodegen = [{
       {
         if (IsMasked) {
           std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end() - 1);
-          if (PolicyAttrs == TAIL_AGNOSTIC_MASK_AGNOSTIC)
+          if ((PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA))
             Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType));
           Ops.insert(Ops.begin() + 2, Ops[1]);
           Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
           // maskedoff, op1, op2, mask, vl
           IntrinsicTypes = {ResultType,
                             Ops[2]->getType(),
                             Ops.back()->getType()};
         } else {
-          if (PolicyAttrs == TAIL_AGNOSTIC)
+          if (PolicyAttrs & RVV_VTA)
             Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType));
           // op1, po2, vl
           IntrinsicTypes = {ResultType,
                             Ops[1]->getType(), Ops[2]->getType()};
           Ops.insert(Ops.begin() + 2, Ops[1]);
           break;
         }
         break;
let Name = NAME,
       OverloadedName = MName,
       IRName = IR,
       MaskedIRName = IR # "_mask",
       UnMaskedPolicyScheme = HasPassthruOperand,
       ManualCodegen = [{
       {
         if (IsMasked) {
           std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end() - 1);
-          if (PolicyAttrs == TAIL_AGNOSTIC_MASK_AGNOSTIC)
+          if ((PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA))
             Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType));
         } else {
-          if (PolicyAttrs == TAIL_AGNOSTIC)
+          if (PolicyAttrs & RVV_VTA)
             Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType));
         }
         auto ElemTy = cast<llvm::VectorType>(ResultType)->getElementType();
         Ops.insert(Ops.begin() + 2, llvm::Constant::getNullValue(ElemTy));
         if (IsMasked) {
           Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
           // maskedoff, op1, op2, mask, vl, policy
           IntrinsicTypes = {ResultType,
let Name = NAME,
       OverloadedName = MName,
       IRName = IR,
       MaskedIRName = IR # "_mask",
       UnMaskedPolicyScheme = HasPassthruOperand,
       ManualCodegen = [{
       {
         if (IsMasked) {
           std::rotate(Ops.begin(), Ops.begin() + 1, Ops.end() - 1);
-          if (PolicyAttrs == TAIL_AGNOSTIC_MASK_AGNOSTIC)
+          if ((PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA))
             Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType));
         } else {
-          if (PolicyAttrs == TAIL_AGNOSTIC)
+          if (PolicyAttrs & RVV_VTA)
             Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType));
         }
         Ops.insert(Ops.begin() + 2, llvm::Constant::getNullValue(Ops.back()->getType())); 
         if (IsMasked) {
           Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
           // maskedoff, op1, xlen, mask, vl
           IntrinsicTypes = {ResultType,
                             Ops[1]->getType(),

 
 // 12.15. Vector Integer Merge Instructions
 // C/C++ Operand: (mask, op1, op2, vl), Intrinsic: (passthru, op1, op2, mask, vl)
 let HasMasked = false,
     UnMaskedPolicyScheme = HasPassthruOperand,
     MaskedPolicyScheme = NonePolicy,
     ManualCodegen = [{
       // insert poison passthru
-      if (PolicyAttrs == TAIL_AGNOSTIC)
+      if (PolicyAttrs & RVV_VTA)
         Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType));
       IntrinsicTypes = {ResultType, Ops[2]->getType(), Ops.back()->getType()};
     }] in {
   defm vmerge : RVVOutOp1BuiltinSet<"vmerge", "csil",
                                     [["vvm", "v", "vvvm"],
                                      ["vxm", "v", "vvem"],
                                      ["vvm", "Uv", "UvUvUvm"],
                                      ["vxm", "Uv", "UvUvUem"]]>;

 
 // 14.15. Vector Floating-Point Merge Instructio
 // C/C++ Operand: (mask, op1, op2, vl), Builtin: (op1, op2, mask, vl)
 let HasMasked = false,
     UnMaskedPolicyScheme = HasPassthruOperand,
     MaskedPolicyScheme = NonePolicy,
     ManualCodegen = [{
       // insert poison passthru
-      if (PolicyAttrs == TAIL_AGNOSTIC)
+      if (PolicyAttrs & RVV_VTA)
         Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType));
       IntrinsicTypes = {ResultType, Ops[2]->getType(), Ops.back()->getType()};
     }] in {
   defm vmerge : RVVOutOp1BuiltinSet<"vmerge", "xfd",
                                     [["vvm", "v", "vvvm"]]>;
   defm vfmerge : RVVOutOp1BuiltinSet<"vfmerge", "xfd",
                                      [["vfm", "v", "vvem"]]>;
 }

 }
 
 // 17.5. Vector Compress Instruction
 let HasMasked = false,
     UnMaskedPolicyScheme = HasPassthruOperand,
     MaskedPolicyScheme = NonePolicy,
     ManualCodegen = [{
       // insert poison passthru
-      if (PolicyAttrs == TAIL_AGNOSTIC)
+      if (PolicyAttrs & RVV_VTA)
         Ops.insert(Ops.begin(), llvm::PoisonValue::get(ResultType));
       IntrinsicTypes = {ResultType, Ops.back()->getType()};
     }] in {
   // signed and floating type
   defm vcompress : RVVOutBuiltinSet<"vcompress", "csilxfd",
                                     [["vm", "v", "vvm"]]>;
   // unsigned type
   defm vcompress : RVVOutBuiltinSet<"vcompress", "csil",

clang/include/clang/Support/RISCVVIntrinsicUtils.h

public:
   const std::vector<int64_t> &getIntrinsicTypes() const {
     return IntrinsicTypes;
   }
   Policy getPolicyAttrs() const {
     assert(PolicyAttrs.IsUnspecified == false);
     return PolicyAttrs;
   }
   unsigned getPolicyAttrsBits() const {
-    // Return following value.
-    // constexpr unsigned TAIL_UNDISTURBED = 0;
-    // constexpr unsigned TAIL_AGNOSTIC = 1;
-    // constexpr unsigned TAIL_AGNOSTIC_MASK_AGNOSTIC = 3;
-    // FIXME: how about value 2
-    // int PolicyAttrs = TAIL_UNDISTURBED;
+    // CGBuiltin.cpp
+    // The 0th bit simulates the `vta` of RVV
+    // The 1st bit simulates the `vma` of RVV
+    // int PolicyAttrs = 0;
+
     assert(PolicyAttrs.IsUnspecified == false);
 
     if (PolicyAttrs.isTUMAPolicy())
       return 2;
     if (PolicyAttrs.isTAMAPolicy())
       return 3;
     if (PolicyAttrs.isTUMUPolicy())
       return 0;
     if (PolicyAttrs.isTAMUPolicy())
       return 1;
-    if (PolicyAttrs.isTUPolicy())
-      return 0;
-    if (PolicyAttrs.isTAPolicy())
-      return 1;
 
     llvm_unreachable("unsupport policy");
     return 0;
   }
 
   // Return the type string for a BUILTIN() macro in Builtins.def.
   std::string getBuiltinTypeStr() const;
 

clang/lib/CodeGen/CGBuiltin.cpp

for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) {
     // If this is required to be a constant, constant fold it so that we know
     // that the generated intrinsic gets a ConstantInt.
     Ops.push_back(llvm::ConstantInt::get(
         getLLVMContext(), *E->getArg(i)->getIntegerConstantExpr(getContext())));
   }
 
   Intrinsic::ID ID = Intrinsic::not_intrinsic;
   unsigned NF = 1;
-  constexpr unsigned TAIL_UNDISTURBED = 0;
-  constexpr unsigned TAIL_AGNOSTIC = 1;
-  constexpr unsigned TAIL_AGNOSTIC_MASK_AGNOSTIC = 3;
-  int PolicyAttrs = TAIL_UNDISTURBED;
+  // The 0th bit simulates the `vta` of RVV
+  // The 1st bit simulates the `vma` of RVV
+  constexpr unsigned RVV_VTA = 0x1;
+  constexpr unsigned RVV_VMA = 0x2;
+  int PolicyAttrs = 0;
   bool IsMasked = false;
 
   // Required for overloaded intrinsics.
   llvm::SmallVector<llvm::Type *, 2> IntrinsicTypes;
   switch (BuiltinID) {
   default: llvm_unreachable("unexpected builtin ID");
   case RISCV::BI__builtin_riscv_orc_b_32:
   case RISCV::BI__builtin_riscv_orc_b_64: