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[RISCV] Lower unmasked zero-stride vector load to (scalar load + splat)
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Authored by pcwang-thead on Nov 16 2022, 12:30 AM.

Details

Summary

So we have the opportunity to fold splat into .vx instruction as what
D101138 has done. If failed, we can select zero-stride vector load
again.

Diff Detail

Event Timeline

pcwang-thead requested review of this revision.Nov 16 2022, 12:30 AM
Herald added a project: Restricted Project. · View Herald TranscriptNov 16 2022, 12:30 AM
reames added inline comments.Nov 21 2022, 11:00 AM
llvm/test/CodeGen/RISCV/rvv/fixed-vector-strided-load-store-asm.ll
180–181

This looks like a regression.

pcwang-thead marked an inline comment as done.Nov 21 2022, 6:31 PM
pcwang-thead added inline comments.
llvm/test/CodeGen/RISCV/rvv/fixed-vector-strided-load-store-asm.ll
180–181

The diff result seems weird, but I think it's what we expected.
I added a new test gather_zero_stride_unfold (copied from gather_zero_stride) in which I changed %4 = add <32 x i8> %wide.load, %wide.masked.gather to %4 = udiv <32 x i8> %wide.masked.gather, %wide.load so that splat can't be folded since division is not commutative. So here are scalar load(lbu a5, 0(a1)) and vector splat(vmv.v.x v9, a5).

reames accepted this revision.Nov 22 2022, 8:23 AM

LGTM, but please land the new test and the opcode change in a separate commit (using old llc), then rebase and land this over it. Will make the test diff less confusing in the change log.

llvm/test/CodeGen/RISCV/rvv/fixed-vector-strided-load-store-asm.ll
180–181

I got confused here by the diff. I was responding as if this was the optimized check, which it isn't. So ignore me here.

This revision is now accepted and ready to land.Nov 22 2022, 8:23 AM
pcwang-thead marked an inline comment as done.

Rebase on separate test.

pcwang-thead marked an inline comment as done.Nov 22 2022, 11:21 PM